@tscircuit/core 0.0.2148 → 0.0.2149
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/index.js +68 -1
- package/package.json +1 -1
package/dist/index.js
CHANGED
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@@ -6553,6 +6553,66 @@ var getRouteForPcbPath = ({
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6553
6553
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return route;
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6554
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};
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6555
6555
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6556
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+
// lib/components/primitive-components/Trace/insert-pcb-path-via-policy-errors.ts
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6557
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var insertPcbPathViaPolicyErrors = ({
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6558
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trace,
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6559
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pcbTrace,
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6560
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path,
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6561
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ports,
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6562
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pathIndex
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6563
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}) => {
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6564
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const allowBlindAndBuriedVias = trace._getBoard()?.getInheritedProperty("allowBlindAndBuriedVias");
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6565
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if (allowBlindAndBuriedVias) {
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6566
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return;
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6567
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}
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6568
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const { db: db2 } = trace.root;
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6569
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const connection = db2.source_trace.get(trace.source_trace_id)?.display_name;
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6570
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const traceDescription = [trace._parsedProps.name ? trace.getDisplayName() : void 0, connection].filter(Boolean).join(", ") || "unnamed trace";
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6571
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const pathName = pathIndex === void 0 ? "pcbPath" : `pcbPaths[${pathIndex}]`;
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6572
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const viaPathEntryIndices = [];
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6573
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for (const [pathEntryIndex, point6] of path.entries()) {
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6574
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if (typeof point6 !== "string" && point6.via) {
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6575
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viaPathEntryIndices.push(pathEntryIndex);
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6576
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}
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6577
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}
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6578
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const pcbVias = db2.pcb_via.list({ pcb_trace_id: pcbTrace.pcb_trace_id });
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6579
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const viaDescriptions = [];
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6580
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const viaKinds = /* @__PURE__ */ new Set();
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6581
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let firstDisallowedVia;
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6582
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for (const [viaIndex, via] of pcbVias.entries()) {
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6583
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const reachesTop = via.layers.includes("top");
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6584
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const reachesBottom = via.layers.includes("bottom");
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if (reachesTop && reachesBottom) {
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continue;
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6587
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}
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const viaKind = reachesTop || reachesBottom ? "blind" : "buried";
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viaKinds.add(viaKind);
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const pathEntryIndex = viaPathEntryIndices[viaIndex];
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const pathEntry = `${pathName}[${pathEntryIndex}]`;
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6592
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const boardX = Number(via.x.toFixed(4));
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6593
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const boardY = Number(via.y.toFixed(4));
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firstDisallowedVia ??= via;
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viaDescriptions.push(
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6596
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`${pathEntry}: ${viaKind} via (fromLayer: "${via.from_layer}", toLayer: "${via.to_layer}") spanning [${via.layers.join(", ")}] at board (${boardX}, ${boardY}) mm`
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6597
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);
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}
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if (!firstDisallowedVia) {
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6600
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return;
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6601
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}
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6602
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const viaKindDescription = [...viaKinds].sort().join(" and ");
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6603
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db2.pcb_trace_error.insert({
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6604
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error_type: "pcb_trace_error",
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6605
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source_trace_id: trace.source_trace_id,
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6606
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pcb_trace_id: pcbTrace.pcb_trace_id,
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6607
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pcb_component_ids: [],
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6608
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pcb_port_ids: ports.map((port) => port.pcb_port_id).filter(Boolean),
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6609
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subcircuit_id: pcbTrace.subcircuit_id,
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6610
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center: { x: firstDisallowedVia.x, y: firstDisallowedVia.y },
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6611
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is_fatal: false,
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6612
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message: `${viaKindDescription} vias aren't allowed by allowBlindAndBuriedVias settings in ${pathName} (${traceDescription}): ${viaDescriptions.length} disallowed via${viaDescriptions.length === 1 ? "" : "s"}. Use top-to-bottom through vias (fromLayer: "top", toLayer: "bottom", or the reverse) and adjust the adjoining wire layers to match, or set allowBlindAndBuriedVias={true} on <board> if fabrication supports blind/buried vias. Saved copper has been preserved. Affected indices (zero-based): ${viaDescriptions.join("; ")}.`
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6613
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});
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6614
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};
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6615
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6556
6616
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// lib/components/primitive-components/Trace/render-pcb-paths.ts
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6557
6617
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var renderPcbPaths = ({
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trace,
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@@ -6617,6 +6677,7 @@ var renderPcbPaths = ({
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6617
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}
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6618
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insertPcbPathViaContactErrors({ trace, pcbTrace, ports, pathIndex });
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6619
6679
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trace._insertErrorIfTraceIsOutsideBoard(route, ports);
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6680
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insertPcbPathViaPolicyErrors({ trace, pcbTrace, path, ports, pathIndex });
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6620
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}
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6621
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trace._portsRoutedOnPcb = ports;
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};
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@@ -7007,6 +7068,12 @@ function Trace_doInitialPcbManualTraceRender(trace) {
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7007
7068
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});
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7008
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}
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7009
7070
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}
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7071
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insertPcbPathViaPolicyErrors({
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7072
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trace,
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7073
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pcbTrace: pcb_trace,
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7074
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path: props.pcbPath,
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7075
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ports
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7076
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});
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7010
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trace._portsRoutedOnPcb = ports;
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7011
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trace.pcb_trace_id = pcb_trace.pcb_trace_id;
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7012
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insertPcbPathViaContactErrors({ trace, pcbTrace: pcb_trace, ports });
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@@ -118721,7 +118788,7 @@ var RoutingPhasePreparationError = class extends Error {
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118721
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var package_default = {
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118722
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name: "@tscircuit/core",
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118723
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type: "module",
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118724
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-
version: "0.0.
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118791
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+
version: "0.0.2148",
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118725
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types: "dist/index.d.ts",
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118726
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main: "dist/index.js",
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118727
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module: "dist/index.js",
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