@tscircuit/core 0.0.1479 → 0.0.1481
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/index.js +125 -26
- package/package.json +3 -3
package/dist/index.js
CHANGED
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@@ -5145,6 +5145,14 @@ var Trace_doInitialSchematicTraceRender = (trace) => {
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5145
5145
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const hasSheetLocalSchematicPortRepresentation = portsWithPosition.some(
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5146
5146
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({ port, schematic_port_id }) => port.schematic_port_id !== schematic_port_id
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5147
5147
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);
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5148
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+
const connectedSchematicPorts = portsWithPosition.map(({ schematic_port_id }) => db.schematic_port.get(schematic_port_id)).filter((port) => Boolean(port));
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5149
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+
const [firstSchematicPort, secondSchematicPort] = connectedSchematicPorts;
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5150
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const firstIsInternalAndSecondOverlaps = firstSchematicPort?.is_internal_circuit_port && secondSchematicPort?.is_overlapping_internal_circuit_port;
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5151
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const secondIsInternalAndFirstOverlaps = secondSchematicPort?.is_internal_circuit_port && firstSchematicPort?.is_overlapping_internal_circuit_port;
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5152
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const isInternalCircuitPortMapping = connectedSchematicPorts.length === 2 && (firstIsInternalAndSecondOverlaps || secondIsInternalAndFirstOverlaps);
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5153
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if (isInternalCircuitPortMapping) {
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5154
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return;
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5155
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}
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const portPairKey = portIds.join(",");
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5149
5157
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const board = trace.root?._getBoard();
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5150
5158
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if (board?._connectedSchematicPortPairs) {
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@@ -9716,6 +9724,62 @@ var getNetNameFromSourcePorts = (db, sourcePortIds) => {
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9716
9724
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return [...new Set(portNames)].join("/");
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9717
9725
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};
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9727
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+
// lib/components/primitive-components/Port/internalCircuitPortMapping.ts
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9728
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+
var getInternalCircuitAncestor = (port) => {
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9729
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let ancestor = port.parent;
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9730
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+
while (ancestor) {
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9731
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if (ancestor.componentName === "InternalCircuit") return ancestor;
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ancestor = ancestor.parent;
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}
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9734
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return null;
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9735
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};
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9736
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var isInternalCircuitPort = (port) => getInternalCircuitAncestor(port) !== null;
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9737
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var getConnectionTargets2 = (target) => {
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9738
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if (!target) return [];
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return typeof target === "string" ? [target] : [...target];
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9740
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};
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9741
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var getChipPortsMappedToInternalCircuitPort = (internalCircuitPort) => {
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9742
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const internalCircuit = getInternalCircuitAncestor(internalCircuitPort);
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9743
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const containingChip = internalCircuit?.parent;
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if (!internalCircuit || !containingChip) return [];
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const internalComponent = internalCircuitPort.getParentNormalComponent();
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9746
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const connections = internalComponent?._parsedProps?.connections;
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9747
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if (!connections) return [];
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9748
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const mappedChipPorts = [];
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9749
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for (const [portName, target] of Object.entries(connections)) {
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9750
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if (!internalCircuitPort.isMatchingAnyOf([portName])) continue;
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9751
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for (const targetSelector of getConnectionTargets2(target)) {
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9752
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const targetPort = internalCircuitPort.getSubcircuit().selectOne(targetSelector, { type: "port" });
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if (!targetPort) continue;
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9754
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if (targetPort.getParentNormalComponent() !== containingChip) continue;
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if (!mappedChipPorts.includes(targetPort)) {
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mappedChipPorts.push(targetPort);
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9757
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}
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9758
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}
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9759
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}
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9760
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return mappedChipPorts;
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9761
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};
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9762
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var isInternalCircuitPortMappedToChipPort = (port) => getChipPortsMappedToInternalCircuitPort(port).length > 0;
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9763
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+
var getInternalCircuitPortMappedToChipPort = (chipPort) => {
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9764
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const chipComponent = chipPort.getParentNormalComponent();
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9765
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if (!chipComponent) return null;
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9766
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const internalCircuit = chipComponent.children.find(
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9767
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(child) => child.componentName === "InternalCircuit"
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9768
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);
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9769
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if (!internalCircuit) return null;
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9770
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const mappedInternalCircuitPorts = internalCircuit.getDescendants().filter((component) => component.componentName === "Port").map((component) => component).filter(
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9771
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(internalCircuitPort) => getChipPortsMappedToInternalCircuitPort(internalCircuitPort).includes(
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chipPort
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9773
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)
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);
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if (mappedInternalCircuitPorts.length > 1) {
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9776
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throw new Error(
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9777
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`${chipPort.getString()} is mapped to multiple internal circuit ports: ${mappedInternalCircuitPorts.map((port) => port.getString()).join(", ")}. A chip port can overlap only one internal circuit port.`
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9778
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);
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9779
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}
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return mappedInternalCircuitPorts[0] ?? null;
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9781
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};
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9782
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9783
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// lib/components/primitive-components/Port/Port.ts
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9720
9784
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var Port = class extends PrimitiveComponent2 {
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9721
9785
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source_port_id = null;
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@@ -9835,6 +9899,10 @@ var Port = class extends PrimitiveComponent2 {
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9835
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* are rendered properly.
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9836
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*/
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_hasSchematicPort() {
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9902
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const mappedInternalPort = getInternalCircuitPortMappedToChipPort(this);
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9903
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if (mappedInternalPort) {
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9904
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return mappedInternalPort._hasSchematicPort();
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9905
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}
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const { schX, schY } = this._parsedProps;
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9839
9907
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if (schX !== void 0 && schY !== void 0) {
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return true;
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@@ -9858,6 +9926,10 @@ var Port = class extends PrimitiveComponent2 {
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9858
9926
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return false;
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9859
9927
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}
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9860
9928
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_getGlobalSchematicPositionBeforeLayout() {
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9929
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+
const mappedInternalPort = getInternalCircuitPortMappedToChipPort(this);
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9930
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+
if (mappedInternalPort) {
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9931
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return mappedInternalPort._getGlobalSchematicPositionBeforeLayout();
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9932
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+
}
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9861
9933
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const { schX, schY } = this._parsedProps;
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9862
9934
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if (schX !== void 0 && schY !== void 0) {
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9863
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return { x: schX, y: schY };
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@@ -10164,16 +10236,21 @@ var Port = class extends PrimitiveComponent2 {
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10164
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if (collapsedAncestor && this.parent !== collapsedAncestor) return;
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10165
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const { db } = this.root;
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10166
10238
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const { _parsedProps: props } = this;
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10167
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-
const
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10168
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-
const
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10239
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+
const mappedInternalPort = getInternalCircuitPortMappedToChipPort(this);
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10240
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+
const schematicPlacementPort = mappedInternalPort ?? this;
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10241
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+
const schematicPlacementProps = schematicPlacementPort._parsedProps;
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10242
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+
const { schX, schY } = schematicPlacementProps;
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10243
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+
const container = schX !== void 0 && schY !== void 0 ? schematicPlacementPort.getParentNormalComponent() : schematicPlacementPort.getPrimitiveContainer();
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10169
10244
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if (!container) return;
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10170
10245
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if (!this._hasSchematicPort()) return;
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10171
10246
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const containerCenter = container._getGlobalSchematicPositionBeforeLayout();
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10172
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-
const portCenter =
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10247
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+
const portCenter = schematicPlacementPort._getGlobalSchematicPositionBeforeLayout();
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10173
10248
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let localPortInfo = null;
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10174
10249
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const containerDims = container._getSchematicBoxDimensions();
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10175
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-
if (containerDims &&
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10176
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-
localPortInfo = containerDims.getPortPositionByPinNumber(
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10250
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+
if (containerDims && schematicPlacementProps.pinNumber !== void 0) {
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10251
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localPortInfo = containerDims.getPortPositionByPinNumber(
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10252
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schematicPlacementProps.pinNumber
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);
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10177
10254
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}
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10178
10255
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if (this.getSubcircuit().props._schDebugObjectsEnabled) {
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10179
10256
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db.schematic_debug_object.insert({
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@@ -10186,11 +10263,11 @@ var Port = class extends PrimitiveComponent2 {
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label: "obstacle"
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10187
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});
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10188
10265
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}
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10189
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-
const isExplicitCustomSymbolPort = schX !== void 0 && schY !== void 0 && !!
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10266
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+
const isExplicitCustomSymbolPort = schX !== void 0 && schY !== void 0 && !!schematicPlacementPort._getSymbolAncestor();
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10190
10267
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if (!localPortInfo?.side) {
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this.facingDirection = getRelativeDirection(containerCenter, portCenter);
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10192
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-
if (isExplicitCustomSymbolPort &&
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10193
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-
this.facingDirection =
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10269
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if (isExplicitCustomSymbolPort && schematicPlacementProps.direction) {
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10270
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this.facingDirection = schematicPlacementProps.direction;
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10194
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}
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10195
10272
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} else {
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10196
10273
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this.facingDirection = {
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@@ -10201,20 +10278,24 @@ var Port = class extends PrimitiveComponent2 {
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10201
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}[localPortInfo.side];
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10202
10279
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}
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10203
10280
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const bestDisplayPinLabel = this._getBestDisplayPinLabel();
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10204
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-
const parentNormalComponent =
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10205
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-
const sideOfComponent = localPortInfo?.side ?? (
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10281
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+
const parentNormalComponent = schematicPlacementPort.getParentNormalComponent();
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10282
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+
const sideOfComponent = localPortInfo?.side ?? (schematicPlacementProps.direction === "up" ? "top" : schematicPlacementProps.direction === "down" ? "bottom" : schematicPlacementProps.direction);
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10283
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+
const isInternalPort = isInternalCircuitPort(this);
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10284
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const isMappedInternalPort = isInternalPort && isInternalCircuitPortMappedToChipPort(this);
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10206
10285
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const schematicPortInsertProps = {
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10207
10286
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type: "schematic_port",
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10208
10287
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schematic_component_id: parentNormalComponent?.schematic_component_id,
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10288
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center: portCenter,
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10289
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source_port_id: this.source_port_id,
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10211
10290
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facing_direction: this.facingDirection,
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10212
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-
distance_from_component_edge:
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10291
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+
distance_from_component_edge: schematicPlacementProps.schStemLength ?? 0.4,
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10213
10292
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side_of_component: sideOfComponent,
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10214
10293
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pin_number: props.pinNumber,
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10215
10294
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true_ccw_index: localPortInfo?.trueIndex,
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10216
10295
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display_pin_label: bestDisplayPinLabel,
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10217
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-
is_connected:
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|
10296
|
+
is_connected: mappedInternalPort !== null || isMappedInternalPort,
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10297
|
+
is_internal_circuit_port: isInternalPort ? true : void 0,
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10298
|
+
is_overlapping_internal_circuit_port: mappedInternalPort !== null ? true : void 0,
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10218
10299
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schematic_sheet_id: this._resolveSchematicSheetId()
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10219
10300
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};
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10220
10301
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for (const attributes of this._getMatchingPinAttributes()) {
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@@ -10227,8 +10308,8 @@ var Port = class extends PrimitiveComponent2 {
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10227
10308
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}
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10228
10309
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const schematic_port = db.schematic_port.insert(schematicPortInsertProps);
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10229
10310
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this.schematic_port_id = schematic_port.schematic_port_id;
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10230
|
-
if (
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10231
|
-
const { schStemLength, direction } =
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10311
|
+
if (!mappedInternalPort && schematicPlacementProps.schStemLength !== void 0 && schematicPlacementProps.schStemLength !== 0) {
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10312
|
+
const { schStemLength, direction } = schematicPlacementProps;
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10232
10313
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let x2 = portCenter.x;
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10233
10314
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let y2 = portCenter.y;
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10234
10315
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if (direction === "right") x2 -= schStemLength;
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@@ -10252,7 +10333,9 @@ var Port = class extends PrimitiveComponent2 {
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10252
10333
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doInitialSchematicSymbolResize() {
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10253
10334
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if (this.root?.schematicDisabled) return;
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10254
10335
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if (!this.schematic_port_id) return;
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10255
|
-
const
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10336
|
+
const mappedInternalPort = getInternalCircuitPortMappedToChipPort(this);
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10337
|
+
const schematicPlacementPort = mappedInternalPort ?? this;
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10338
|
+
const symbol = schematicPlacementPort._getSymbolAncestor();
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10256
10339
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const transform = symbol?.getUserCoordinateToResizedSymbolTransform();
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10257
10340
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if (!transform) return;
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10258
10341
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const { db } = this.root;
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@@ -19738,9 +19821,9 @@ function convertTreeToMatchPackInputProblem(tree, db, group, opts = {}) {
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19738
19821
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const component = group.children.find(
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19739
19822
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(groupChild) => groupChild.source_component_id === child.sourceComponent?.source_component_id
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19740
19823
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);
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19741
|
-
const
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|
19824
|
+
const portsDefiningLayout = db.schematic_port.list({
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19742
19825
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schematic_component_id: schematicComponent.schematic_component_id
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19743
|
-
});
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19826
|
+
}).filter((port) => !port.is_overlapping_internal_circuit_port);
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19744
19827
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let availableRotations = [
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19745
19828
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...DEFAULT_AVAILABLE_ROTATIONS
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19746
19829
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];
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@@ -19760,7 +19843,10 @@ function convertTreeToMatchPackInputProblem(tree, db, group, opts = {}) {
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19760
19843
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availableRotations = [0];
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19761
19844
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}
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19762
19845
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if (availableRotations.length === DEFAULT_AVAILABLE_ROTATIONS.length) {
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19763
|
-
const forcedRotation = getPowerGroundForcedRotation(
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|
19846
|
+
const forcedRotation = getPowerGroundForcedRotation(
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|
19847
|
+
db,
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19848
|
+
portsDefiningLayout
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19849
|
+
);
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19764
19850
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if (forcedRotation !== null) availableRotations = [forcedRotation];
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19765
19851
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}
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19766
19852
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const ccwRotationDegrees = availableRotations.length === 1 ? availableRotations[0] : 0;
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@@ -19783,7 +19869,7 @@ function convertTreeToMatchPackInputProblem(tree, db, group, opts = {}) {
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19783
19869
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}
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19784
19870
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}
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19785
19871
|
};
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19786
|
-
for (const port of
|
|
19872
|
+
for (const port of portsDefiningLayout) {
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19787
19873
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const sourcePort = db.source_port.get(port.source_port_id);
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19788
19874
|
if (!sourcePort) continue;
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19789
19875
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const pinId = `${chipId}.${sourcePort.pin_number || sourcePort.name || port.schematic_port_id}`;
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@@ -19832,10 +19918,10 @@ function convertTreeToMatchPackInputProblem(tree, db, group, opts = {}) {
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19832
19918
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);
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19833
19919
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const groupPins = [];
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19834
19920
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for (const comp of groupComponents) {
|
|
19835
|
-
const
|
|
19921
|
+
const portsDefiningLayout = db.schematic_port.list({
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|
19836
19922
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schematic_component_id: comp.schematic_component_id
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|
19837
|
-
});
|
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19838
|
-
for (const port of
|
|
19923
|
+
}).filter((port) => !port.is_overlapping_internal_circuit_port);
|
|
19924
|
+
for (const port of portsDefiningLayout) {
|
|
19839
19925
|
const sourcePort = db.source_port.get(port.source_port_id);
|
|
19840
19926
|
if (!sourcePort) continue;
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|
19841
19927
|
const pinId = `${groupId}.${sourcePort.pin_number || sourcePort.name || port.schematic_port_id}`;
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@@ -20751,8 +20837,9 @@ function createSchematicTraceSolverInputProblem(group, opts = {}) {
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|
|
20751
20837
|
});
|
|
20752
20838
|
for (const schematicPort of schematicPorts) {
|
|
20753
20839
|
const sourcePort = db.source_port.get(schematicPort.source_port_id);
|
|
20840
|
+
const portSourceComponent = sourcePort?.source_component_id ? db.source_component.get(sourcePort.source_component_id) : void 0;
|
|
20754
20841
|
const selector = getSchematicPortSelector({
|
|
20755
|
-
componentName: sourceComponent?.name ?? schematicComponent.schematic_component_id,
|
|
20842
|
+
componentName: portSourceComponent?.name ?? sourceComponent?.name ?? schematicComponent.schematic_component_id,
|
|
20756
20843
|
schematicPort,
|
|
20757
20844
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sourcePort
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20758
20845
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});
|
|
@@ -20833,6 +20920,7 @@ function createSchematicTraceSolverInputProblem(group, opts = {}) {
|
|
|
20833
20920
|
}
|
|
20834
20921
|
const directConnections = [];
|
|
20835
20922
|
const connectedPairKeys = /* @__PURE__ */ new Set();
|
|
20923
|
+
const internalCircuitPortIdsRepresentedByChipPorts = /* @__PURE__ */ new Set();
|
|
20836
20924
|
const connKeysWithExplicitPortNetTraces = /* @__PURE__ */ new Set();
|
|
20837
20925
|
for (const sourceTrace of tracesInScope) {
|
|
20838
20926
|
if (sourceTrace?.subcircuit_connectivity_map_key && (sourceTrace.connected_source_port_ids?.length ?? 0) > 0 && (sourceTrace.connected_source_net_ids?.length ?? 0) > 0) {
|
|
@@ -20860,6 +20948,16 @@ function createSchematicTraceSolverInputProblem(group, opts = {}) {
|
|
|
20860
20948
|
}
|
|
20861
20949
|
const portA = db.schematic_port.get(a);
|
|
20862
20950
|
const portB = db.schematic_port.get(b);
|
|
20951
|
+
const portAIsInternalAndPortBOverlaps = portA?.is_internal_circuit_port && portB?.is_overlapping_internal_circuit_port;
|
|
20952
|
+
const portBIsInternalAndPortAOverlaps = portB?.is_internal_circuit_port && portA?.is_overlapping_internal_circuit_port;
|
|
20953
|
+
const isInternalCircuitPortMapping = portAIsInternalAndPortBOverlaps || portBIsInternalAndPortAOverlaps;
|
|
20954
|
+
if (portA && portB && isInternalCircuitPortMapping) {
|
|
20955
|
+
const internalCircuitPort = portA.is_internal_circuit_port ? portA : portB;
|
|
20956
|
+
internalCircuitPortIdsRepresentedByChipPorts.add(
|
|
20957
|
+
internalCircuitPort.schematic_port_id
|
|
20958
|
+
);
|
|
20959
|
+
continue;
|
|
20960
|
+
}
|
|
20863
20961
|
let portDistance = 0;
|
|
20864
20962
|
if (portA && portB) {
|
|
20865
20963
|
portDistance = Math.sqrt(
|
|
@@ -20894,6 +20992,7 @@ function createSchematicTraceSolverInputProblem(group, opts = {}) {
|
|
|
20894
20992
|
}
|
|
20895
20993
|
const connKeyToPinIds = /* @__PURE__ */ new Map();
|
|
20896
20994
|
for (const [schId, srcPortId] of schPortIdToSourcePortId) {
|
|
20995
|
+
if (internalCircuitPortIdsRepresentedByChipPorts.has(schId)) continue;
|
|
20897
20996
|
const sp = db.source_port.get(srcPortId);
|
|
20898
20997
|
if (!sp?.subcircuit_connectivity_map_key) continue;
|
|
20899
20998
|
const connKey = sp.subcircuit_connectivity_map_key;
|
|
@@ -22978,7 +23077,7 @@ function Group_getRoutingPhasePlans(group) {
|
|
|
22978
23077
|
var package_default = {
|
|
22979
23078
|
name: "@tscircuit/core",
|
|
22980
23079
|
type: "module",
|
|
22981
|
-
version: "0.0.
|
|
23080
|
+
version: "0.0.1480",
|
|
22982
23081
|
types: "dist/index.d.ts",
|
|
22983
23082
|
main: "dist/index.js",
|
|
22984
23083
|
module: "dist/index.js",
|
|
@@ -23042,7 +23141,7 @@ var package_default = {
|
|
|
23042
23141
|
"bun-match-svg": "0.0.12",
|
|
23043
23142
|
"calculate-elbow": "^0.0.12",
|
|
23044
23143
|
"chokidar-cli": "^3.0.0",
|
|
23045
|
-
"circuit-json": "^0.0.
|
|
23144
|
+
"circuit-json": "^0.0.451",
|
|
23046
23145
|
"circuit-json-to-bpc": "^0.0.13",
|
|
23047
23146
|
"circuit-json-to-connectivity-map": "^0.0.23",
|
|
23048
23147
|
"circuit-json-to-gltf": "^0.0.107",
|
|
@@ -23063,7 +23162,7 @@ var package_default = {
|
|
|
23063
23162
|
poppygl: "^0.0.26",
|
|
23064
23163
|
react: "^19.1.0",
|
|
23065
23164
|
"react-dom": "^19.1.0",
|
|
23066
|
-
"schematic-symbols": "^0.0.
|
|
23165
|
+
"schematic-symbols": "^0.0.233",
|
|
23067
23166
|
spicets: "^0.0.2",
|
|
23068
23167
|
spicey: "^0.0.14",
|
|
23069
23168
|
"stack-svgs": "^0.0.1",
|
package/package.json
CHANGED
|
@@ -1,7 +1,7 @@
|
|
|
1
1
|
{
|
|
2
2
|
"name": "@tscircuit/core",
|
|
3
3
|
"type": "module",
|
|
4
|
-
"version": "0.0.
|
|
4
|
+
"version": "0.0.1481",
|
|
5
5
|
"types": "dist/index.d.ts",
|
|
6
6
|
"main": "dist/index.js",
|
|
7
7
|
"module": "dist/index.js",
|
|
@@ -65,7 +65,7 @@
|
|
|
65
65
|
"bun-match-svg": "0.0.12",
|
|
66
66
|
"calculate-elbow": "^0.0.12",
|
|
67
67
|
"chokidar-cli": "^3.0.0",
|
|
68
|
-
"circuit-json": "^0.0.
|
|
68
|
+
"circuit-json": "^0.0.451",
|
|
69
69
|
"circuit-json-to-bpc": "^0.0.13",
|
|
70
70
|
"circuit-json-to-connectivity-map": "^0.0.23",
|
|
71
71
|
"circuit-json-to-gltf": "^0.0.107",
|
|
@@ -86,7 +86,7 @@
|
|
|
86
86
|
"poppygl": "^0.0.26",
|
|
87
87
|
"react": "^19.1.0",
|
|
88
88
|
"react-dom": "^19.1.0",
|
|
89
|
-
"schematic-symbols": "^0.0.
|
|
89
|
+
"schematic-symbols": "^0.0.233",
|
|
90
90
|
"spicets": "^0.0.2",
|
|
91
91
|
"spicey": "^0.0.14",
|
|
92
92
|
"stack-svgs": "^0.0.1",
|