@tscircuit/core 0.0.1415 → 0.0.1417

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
package/dist/index.d.ts CHANGED
@@ -241,9 +241,9 @@ interface IIsolatedCircuit {
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  interface IRootCircuit extends IIsolatedCircuit {
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  }
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- declare const orderedRenderPhases: readonly ["ReactSubtreesRender", "RenderIsolatedSubcircuits", "InflateSubcircuitCircuitJson", "SourceNameDuplicateComponentRemoval", "PcbFootprintStringRender", "FetchPartFootprint", "ResolveFootprintPinLabels", "InitializePortsFromChildren", "CreateNetsFromProps", "AssignFallbackProps", "CreateTracesFromProps", "CreateTracesFromNetLabels", "CreateTraceHintsFromProps", "CreateAutoplacedBreakoutPoints", "SourceGroupRender", "AssignNameToUnnamedComponents", "SourceRender", "CheckRefDesConvention", "SourceComponentPropertyValidation", "SourceParentAttachment", "PortMatching", "OptimizeSelectorCache", "SourceTraceRender", "SourceAddConnectivityMapKey", "SourceDesignRuleChecks", "SimulationRender", "SchematicComponentRender", "SchematicPortRender", "SymbolContainerRender", "SchematicPrimitiveRender", "SchematicSymbolResize", "SchematicComponentSizeCalculation", "SchematicLayout", "SchematicSectionRender", "SchematicTraceRender", "SchematicSheetRender", "SchematicReplaceNetLabelsWithSymbols", "PanelBoardLayout", "ValidatePcbCoordinates", "PcbComponentRender", "PcbPrimitiveRender", "PcbFootprintLayout", "PcbPortRender", "PcbPortAttachment", "PcbComponentSizeCalculation", "PcbComponentAnchorAlignment", "PcbCalcPlacementResolution", "PcbLayout", "PcbBoardAutoSize", "PanelLayout", "PcbAutoplaceBreakoutPoints", "PcbTraceHintRender", "PcbManualTraceRender", "PcbTraceRender", "PcbRouteNetIslands", "PcbCopperPourRender", "PcbDesignRuleChecks", "SilkscreenOverlapAdjustment", "CadModelRender", "PartsEngineRender", "SupplierFootprintMismatchWarning", "SimulationSpiceEngineRender"];
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+ declare const orderedRenderPhases: readonly ["ReactSubtreesRender", "RenderIsolatedSubcircuits", "InflateSubcircuitCircuitJson", "SourceNameDuplicateComponentRemoval", "PcbFootprintStringRender", "FetchPartFootprint", "ResolveFootprintPinLabels", "InitializePortsFromChildren", "CreateNetsFromProps", "AssignFallbackProps", "CreateTracesFromProps", "CreateTracesFromNetLabels", "CreateTraceHintsFromProps", "CreateAutoplacedBreakoutPoints", "SourceGroupRender", "AssignNameToUnnamedComponents", "SourceRender", "CheckRefDesConvention", "SourceComponentPropertyValidation", "SourceParentAttachment", "PortMatching", "OptimizeSelectorCache", "SourceTraceRender", "SourceAddConnectivityMapKey", "SourceDesignRuleChecks", "SimulationRender", "SchematicComponentRender", "SchematicPortRender", "SymbolContainerRender", "SchematicPrimitiveRender", "SchematicSymbolResize", "SchematicComponentSizeCalculation", "SchematicLayout", "SchematicSectionRender", "SchematicTraceRender", "SchematicSheetRender", "SchematicReplaceNetLabelsWithSymbols", "PanelBoardLayout", "ValidatePcbCoordinates", "PcbComponentRender", "PcbPrimitiveRender", "PcbFootprintLayout", "PcbPortRender", "PcbPortAttachment", "PcbComponentSizeCalculation", "PcbComponentAnchorAlignment", "PcbCalcPlacementResolution", "PcbLayout", "PcbBoardAutoSize", "PanelLayout", "PcbAutoplaceBreakoutPoints", "PcbTraceHintRender", "PcbManualTraceRender", "PcbPlacementDesignRuleChecks", "PcbTraceRender", "PcbRouteNetIslands", "PcbCopperPourRender", "PcbDesignRuleChecks", "SilkscreenOverlapAdjustment", "CadModelRender", "PartsEngineRender", "SupplierFootprintMismatchWarning", "SimulationSpiceEngineRender"];
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  type RenderPhase = (typeof orderedRenderPhases)[number];
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- declare const renderPhaseIndexMap: Map<"ReactSubtreesRender" | "RenderIsolatedSubcircuits" | "InflateSubcircuitCircuitJson" | "SourceNameDuplicateComponentRemoval" | "PcbFootprintStringRender" | "FetchPartFootprint" | "ResolveFootprintPinLabels" | "InitializePortsFromChildren" | "CreateNetsFromProps" | "AssignFallbackProps" | "CreateTracesFromProps" | "CreateTracesFromNetLabels" | "CreateTraceHintsFromProps" | "CreateAutoplacedBreakoutPoints" | "SourceGroupRender" | "AssignNameToUnnamedComponents" | "SourceRender" | "CheckRefDesConvention" | "SourceComponentPropertyValidation" | "SourceParentAttachment" | "PortMatching" | "OptimizeSelectorCache" | "SourceTraceRender" | "SourceAddConnectivityMapKey" | "SourceDesignRuleChecks" | "SimulationRender" | "SchematicComponentRender" | "SchematicPortRender" | "SymbolContainerRender" | "SchematicPrimitiveRender" | "SchematicSymbolResize" | "SchematicComponentSizeCalculation" | "SchematicLayout" | "SchematicSectionRender" | "SchematicTraceRender" | "SchematicSheetRender" | "SchematicReplaceNetLabelsWithSymbols" | "PanelBoardLayout" | "ValidatePcbCoordinates" | "PcbComponentRender" | "PcbPrimitiveRender" | "PcbFootprintLayout" | "PcbPortRender" | "PcbPortAttachment" | "PcbComponentSizeCalculation" | "PcbComponentAnchorAlignment" | "PcbCalcPlacementResolution" | "PcbLayout" | "PcbBoardAutoSize" | "PanelLayout" | "PcbAutoplaceBreakoutPoints" | "PcbTraceHintRender" | "PcbManualTraceRender" | "PcbTraceRender" | "PcbRouteNetIslands" | "PcbCopperPourRender" | "PcbDesignRuleChecks" | "SilkscreenOverlapAdjustment" | "CadModelRender" | "PartsEngineRender" | "SupplierFootprintMismatchWarning" | "SimulationSpiceEngineRender", number>;
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+ declare const renderPhaseIndexMap: Map<"ReactSubtreesRender" | "RenderIsolatedSubcircuits" | "InflateSubcircuitCircuitJson" | "SourceNameDuplicateComponentRemoval" | "PcbFootprintStringRender" | "FetchPartFootprint" | "ResolveFootprintPinLabels" | "InitializePortsFromChildren" | "CreateNetsFromProps" | "AssignFallbackProps" | "CreateTracesFromProps" | "CreateTracesFromNetLabels" | "CreateTraceHintsFromProps" | "CreateAutoplacedBreakoutPoints" | "SourceGroupRender" | "AssignNameToUnnamedComponents" | "SourceRender" | "CheckRefDesConvention" | "SourceComponentPropertyValidation" | "SourceParentAttachment" | "PortMatching" | "OptimizeSelectorCache" | "SourceTraceRender" | "SourceAddConnectivityMapKey" | "SourceDesignRuleChecks" | "SimulationRender" | "SchematicComponentRender" | "SchematicPortRender" | "SymbolContainerRender" | "SchematicPrimitiveRender" | "SchematicSymbolResize" | "SchematicComponentSizeCalculation" | "SchematicLayout" | "SchematicSectionRender" | "SchematicTraceRender" | "SchematicSheetRender" | "SchematicReplaceNetLabelsWithSymbols" | "PanelBoardLayout" | "ValidatePcbCoordinates" | "PcbComponentRender" | "PcbPrimitiveRender" | "PcbFootprintLayout" | "PcbPortRender" | "PcbPortAttachment" | "PcbComponentSizeCalculation" | "PcbComponentAnchorAlignment" | "PcbCalcPlacementResolution" | "PcbLayout" | "PcbBoardAutoSize" | "PanelLayout" | "PcbAutoplaceBreakoutPoints" | "PcbTraceHintRender" | "PcbManualTraceRender" | "PcbPlacementDesignRuleChecks" | "PcbTraceRender" | "PcbRouteNetIslands" | "PcbCopperPourRender" | "PcbDesignRuleChecks" | "SilkscreenOverlapAdjustment" | "CadModelRender" | "PartsEngineRender" | "SupplierFootprintMismatchWarning" | "SimulationSpiceEngineRender", number>;
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  type RenderPhaseFn<K extends RenderPhase = RenderPhase> = `doInitial${K}` | `update${K}` | `remove${K}`;
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  type RenderPhaseStates = Record<RenderPhase, {
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  initialized: boolean;
@@ -2380,6 +2380,7 @@ declare class Group<Props extends z.ZodType<any, any, any> = typeof groupProps>
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  schematic_group_id: string | null;
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  subcircuit_id: string | null;
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  _hasStartedAsyncAutorouting: boolean;
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+ _pcbPlacementDrcErrorCount: number | null;
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  _isInflatedFromCircuitJson: boolean;
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  _isolatedCircuitJson: AnyCircuitElement[] | null;
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  get _isIsolatedSubcircuit(): boolean;
@@ -4046,6 +4047,7 @@ declare class Board extends Group<typeof boardProps> implements BoardI, Subcircu
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  doInitialPcbComponentRender(): void;
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  removePcbComponentRender(): void;
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  doInitialPcbDesignRuleChecks(): void;
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+ doInitialPcbPlacementDesignRuleChecks(): void;
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  updatePcbDesignRuleChecks(): void;
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  _emitRenderLifecycleEvent(phase: RenderPhase, startOrEnd: "start" | "end"): void;
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  _repositionOnPcb(position: {
package/dist/index.js CHANGED
@@ -373,6 +373,7 @@ var orderedRenderPhases = [
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  "PcbAutoplaceBreakoutPoints",
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  "PcbTraceHintRender",
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  "PcbManualTraceRender",
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+ "PcbPlacementDesignRuleChecks",
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  "PcbTraceRender",
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  "PcbRouteNetIslands",
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  "PcbCopperPourRender",
@@ -421,6 +422,10 @@ var asyncPhaseDependencies = {
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  "PcbTraceRender",
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  "PcbRouteNetIslands"
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  ],
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+ PcbPlacementDesignRuleChecks: [
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+ "PcbFootprintStringRender",
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+ "FetchPartFootprint"
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+ ],
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  PcbTraceRender: ["PcbFootprintStringRender", "FetchPartFootprint"],
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  PcbRouteNetIslands: ["PcbFootprintStringRender", "FetchPartFootprint"],
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  PcbDesignRuleChecks: ["PcbFootprintStringRender", "FetchPartFootprint"],
@@ -4056,6 +4061,37 @@ function Trace_doInitialPcbManualTraceRender(trace) {
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  import { MultilayerIjump } from "@tscircuit/infgrid-ijump-astar";
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  import "circuit-json";
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  import { getFullConnectivityMapFromCircuitJson } from "circuit-json-to-connectivity-map";
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+
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+ // lib/utils/autorouting/should-skip-autorouting-because-of-placement-errors.ts
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+ var shouldSkipAutoroutingBecauseOfPlacementErrors = ({
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+ component,
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+ subcircuit
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+ }) => {
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+ let ancestor = component;
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+ let placementErrorCount = 0;
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+ while (ancestor) {
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+ if ("_pcbPlacementDrcErrorCount" in ancestor && typeof ancestor._pcbPlacementDrcErrorCount === "number") {
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+ placementErrorCount = ancestor._pcbPlacementDrcErrorCount;
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+ break;
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+ }
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+ ancestor = ancestor.parent;
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+ }
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+ if (placementErrorCount === 0) return false;
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+ const { db } = component.root;
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+ const pcbErrorId = `pcb_autorouting_skipped_placement_errors_${subcircuit.subcircuit_id}`;
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+ const errorAlreadyExists = db.pcb_autorouting_error.list().some((error) => error.pcb_error_id === pcbErrorId);
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+ if (!errorAlreadyExists) {
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+ db.pcb_autorouting_error.insert({
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+ pcb_error_id: pcbErrorId,
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+ error_type: "pcb_autorouting_error",
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+ subcircuit_id: subcircuit.subcircuit_id ?? void 0,
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+ message: `Autorouting was skipped because ${placementErrorCount} PCB placement error${placementErrorCount === 1 ? " was" : "s were"} found. Fix the placement errors or set placementDrcChecksDisabled to true to route anyway.`
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+ });
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+ }
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+ return true;
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+ };
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+
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+ // lib/components/primitive-components/Trace/Trace_doInitialPcbTraceRender.ts
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  var portToObjective = (port) => {
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  const portPosition = port._getGlobalPcbPositionAfterLayout();
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  return {
@@ -4121,6 +4157,11 @@ function Trace_doInitialPcbTraceRender(trace) {
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  if (!subcircuit._shouldUseTraceByTraceRouting()) {
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  return;
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  }
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+ if (shouldSkipAutoroutingBecauseOfPlacementErrors({
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+ component: trace,
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+ subcircuit
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+ }))
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+ return;
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  let allPortsFound;
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  let ports;
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  let portsWithSelectors;
@@ -15674,6 +15715,8 @@ function getPresetAutoroutingConfig(autorouterConfig, platformConfig) {
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  };
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  }
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  switch (normalizedPreset) {
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+ case "default":
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+ case "auto":
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  case "auto-local":
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  return {
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  local: true,
@@ -22933,6 +22976,7 @@ var Group5 = class extends NormalComponent3 {
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  schematic_group_id = null;
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  subcircuit_id = null;
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  _hasStartedAsyncAutorouting = false;
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+ _pcbPlacementDrcErrorCount = null;
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  _isInflatedFromCircuitJson = false;
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  _isolatedCircuitJson = null;
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  get _isIsolatedSubcircuit() {
@@ -23732,6 +23776,11 @@ var Group5 = class extends NormalComponent3 {
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  `[${this.getString()}] no child subcircuits to wait for, initiating async routing`
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  );
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  if (!this._hasTracesToRoute()) return;
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+ if (shouldSkipAutoroutingBecauseOfPlacementErrors({
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+ component: this,
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+ subcircuit: this
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+ }))
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+ return;
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  this._startAsyncAutorouting();
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  }
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  doInitialSchematicTraceRender() {
@@ -23745,6 +23794,11 @@ var Group5 = class extends NormalComponent3 {
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  if (this._isInflatedFromCircuitJson) return;
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  if (this._shouldRouteAsync() && this._hasTracesToRoute() && !this._hasStartedAsyncAutorouting) {
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  if (this._areChildSubcircuitsRouted()) {
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+ if (shouldSkipAutoroutingBecauseOfPlacementErrors({
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+ component: this,
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+ subcircuit: this
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+ }))
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+ return;
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  debug12(
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  `[${this.getString()}] child subcircuits are now routed, starting async autorouting`
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  );
@@ -25357,7 +25411,7 @@ import { identity as identity5 } from "transformation-matrix";
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  var package_default = {
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  name: "@tscircuit/core",
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  type: "module",
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- version: "0.0.1414",
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+ version: "0.0.1416",
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  types: "dist/index.d.ts",
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  main: "dist/index.js",
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  module: "dist/index.js",
@@ -25921,6 +25975,40 @@ function Subcircuit_getSubcircuitPropHash(subcircuit) {
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  return computeHash(hashableData);
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  }
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+ // lib/components/normal-components/Board_doInitialPcbPlacementDesignRuleChecks.ts
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+ import {
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+ checkConnectorAccessibleOrientation,
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+ checkPadPadClearance,
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+ checkPadTraceClearance,
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+ checkPcbComponentOverlap,
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+ checkPcbComponentsOutOfBoard,
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+ checkViasOffBoard
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+ } from "@tscircuit/checks";
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+ var Board_doInitialPcbPlacementDesignRuleChecks = (board) => {
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+ if (board.root?.pcbDisabled) return;
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+ const placementDrcChecksDisabled = board.root?.platform?.placementDrcChecksDisabled ?? board.getInheritedProperty("placementDrcChecksDisabled");
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+ const drcChecksDisabled = board.root?.platform?.drcChecksDisabled ?? board.getInheritedProperty("drcChecksDisabled");
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+ board._pcbPlacementDrcErrorCount = 0;
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+ if (placementDrcChecksDisabled || drcChecksDisabled) return;
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+ const { db } = board.root;
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+ const existingPlacementErrorCount = db.pcb_placement_error.list().length;
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+ const subcircuitCircuitJson = db.subtree({ subcircuit_id: board.subcircuit_id }).toArray();
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+ try {
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+ const placementCheckResults = [
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+ ...checkViasOffBoard(subcircuitCircuitJson),
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+ ...checkPcbComponentsOutOfBoard(subcircuitCircuitJson),
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+ ...checkPcbComponentOverlap(subcircuitCircuitJson),
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+ ...checkPadPadClearance(subcircuitCircuitJson),
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+ ...checkPadTraceClearance(subcircuitCircuitJson),
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+ ...checkConnectorAccessibleOrientation(subcircuitCircuitJson)
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+ ];
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+ db.insertAll(placementCheckResults);
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+ board._pcbPlacementDrcErrorCount = existingPlacementErrorCount + placementCheckResults.filter((result) => result.type.endsWith("_error")).length;
26007
+ } catch {
26008
+ board._pcbPlacementDrcErrorCount = existingPlacementErrorCount;
26009
+ }
26010
+ };
26011
+
25924
26012
  // lib/components/normal-components/Board.ts
25925
26013
  var MIN_EFFECTIVE_BORDER_RADIUS_MM = 0.01;
25926
26014
  var getRoundedRectOutline = (width, height, radius) => {
@@ -26315,6 +26403,9 @@ var Board = class extends Group5 {
26315
26403
  super.doInitialPcbDesignRuleChecks();
26316
26404
  this.updatePcbDesignRuleChecks();
26317
26405
  }
26406
+ doInitialPcbPlacementDesignRuleChecks() {
26407
+ Board_doInitialPcbPlacementDesignRuleChecks(this);
26408
+ }
26318
26409
  updatePcbDesignRuleChecks() {
26319
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  const { db } = this.root;
26320
26411
  const routingDisabled = this.root?.pcbRoutingDisabled || this.getInheritedProperty("routingDisabled");
@@ -26344,8 +26435,15 @@ var Board = class extends Group5 {
26344
26435
  );
26345
26436
  }
26346
26437
  if (shouldRunPlacementChecks) {
26438
+ const existingPlacementDiagnostics = db.toArray();
26347
26439
  checksToRun.push(
26348
- runAllPlacementChecks(circuitJson)
26440
+ runAllPlacementChecks(circuitJson).then(
26441
+ (results) => results.filter(
26442
+ (result) => !existingPlacementDiagnostics.some(
26443
+ (existing) => existing.type === result.type && "message" in existing && existing.message === result.message
26444
+ )
26445
+ )
26446
+ )
26349
26447
  );
26350
26448
  }
26351
26449
  if (shouldRunNetlistChecks) {
package/package.json CHANGED
@@ -1,7 +1,7 @@
1
1
  {
2
2
  "name": "@tscircuit/core",
3
3
  "type": "module",
4
- "version": "0.0.1415",
4
+ "version": "0.0.1417",
5
5
  "types": "dist/index.d.ts",
6
6
  "main": "dist/index.js",
7
7
  "module": "dist/index.js",