@tscircuit/core 0.0.1414 → 0.0.1416

package/dist/index.d.ts

@@ -241,9 +241,9 @@ interface IIsolatedCircuit {
 interface IRootCircuit extends IIsolatedCircuit {
 }
 
-declare const orderedRenderPhases: readonly ["ReactSubtreesRender", "RenderIsolatedSubcircuits", "InflateSubcircuitCircuitJson", "SourceNameDuplicateComponentRemoval", "PcbFootprintStringRender", "FetchPartFootprint", "ResolveFootprintPinLabels", "InitializePortsFromChildren", "CreateNetsFromProps", "AssignFallbackProps", "CreateTracesFromProps", "CreateTracesFromNetLabels", "CreateTraceHintsFromProps", "CreateAutoplacedBreakoutPoints", "SourceGroupRender", "AssignNameToUnnamedComponents", "SourceRender", "CheckRefDesConvention", "SourceComponentPropertyValidation", "SourceParentAttachment", "PortMatching", "OptimizeSelectorCache", "SourceTraceRender", "SourceAddConnectivityMapKey", "SourceDesignRuleChecks", "SimulationRender", "SchematicComponentRender", "SchematicPortRender", "SymbolContainerRender", "SchematicPrimitiveRender", "SchematicSymbolResize", "SchematicComponentSizeCalculation", "SchematicLayout", "SchematicSectionRender", "SchematicTraceRender", "SchematicSheetRender", "SchematicReplaceNetLabelsWithSymbols", "PanelBoardLayout", "ValidatePcbCoordinates", "PcbComponentRender", "PcbPrimitiveRender", "PcbFootprintLayout", "PcbPortRender", "PcbPortAttachment", "PcbComponentSizeCalculation", "PcbComponentAnchorAlignment", "PcbCalcPlacementResolution", "PcbLayout", "PcbBoardAutoSize", "PanelLayout", "PcbAutoplaceBreakoutPoints", "PcbTraceHintRender", "PcbManualTraceRender", "PcbTraceRender", "PcbRouteNetIslands", "PcbCopperPourRender", "PcbDesignRuleChecks", "SilkscreenOverlapAdjustment", "CadModelRender", "PartsEngineRender", "SupplierFootprintMismatchWarning", "SimulationSpiceEngineRender"];
+declare const orderedRenderPhases: readonly ["ReactSubtreesRender", "RenderIsolatedSubcircuits", "InflateSubcircuitCircuitJson", "SourceNameDuplicateComponentRemoval", "PcbFootprintStringRender", "FetchPartFootprint", "ResolveFootprintPinLabels", "InitializePortsFromChildren", "CreateNetsFromProps", "AssignFallbackProps", "CreateTracesFromProps", "CreateTracesFromNetLabels", "CreateTraceHintsFromProps", "CreateAutoplacedBreakoutPoints", "SourceGroupRender", "AssignNameToUnnamedComponents", "SourceRender", "CheckRefDesConvention", "SourceComponentPropertyValidation", "SourceParentAttachment", "PortMatching", "OptimizeSelectorCache", "SourceTraceRender", "SourceAddConnectivityMapKey", "SourceDesignRuleChecks", "SimulationRender", "SchematicComponentRender", "SchematicPortRender", "SymbolContainerRender", "SchematicPrimitiveRender", "SchematicSymbolResize", "SchematicComponentSizeCalculation", "SchematicLayout", "SchematicSectionRender", "SchematicTraceRender", "SchematicSheetRender", "SchematicReplaceNetLabelsWithSymbols", "PanelBoardLayout", "ValidatePcbCoordinates", "PcbComponentRender", "PcbPrimitiveRender", "PcbFootprintLayout", "PcbPortRender", "PcbPortAttachment", "PcbComponentSizeCalculation", "PcbComponentAnchorAlignment", "PcbCalcPlacementResolution", "PcbLayout", "PcbBoardAutoSize", "PanelLayout", "PcbAutoplaceBreakoutPoints", "PcbTraceHintRender", "PcbManualTraceRender", "PcbPlacementDesignRuleChecks", "PcbTraceRender", "PcbRouteNetIslands", "PcbCopperPourRender", "PcbDesignRuleChecks", "SilkscreenOverlapAdjustment", "CadModelRender", "PartsEngineRender", "SupplierFootprintMismatchWarning", "SimulationSpiceEngineRender"];
 type RenderPhase = (typeof orderedRenderPhases)[number];
-declare const renderPhaseIndexMap: Map<"ReactSubtreesRender" | "RenderIsolatedSubcircuits" | "InflateSubcircuitCircuitJson" | "SourceNameDuplicateComponentRemoval" | "PcbFootprintStringRender" | "FetchPartFootprint" | "ResolveFootprintPinLabels" | "InitializePortsFromChildren" | "CreateNetsFromProps" | "AssignFallbackProps" | "CreateTracesFromProps" | "CreateTracesFromNetLabels" | "CreateTraceHintsFromProps" | "CreateAutoplacedBreakoutPoints" | "SourceGroupRender" | "AssignNameToUnnamedComponents" | "SourceRender" | "CheckRefDesConvention" | "SourceComponentPropertyValidation" | "SourceParentAttachment" | "PortMatching" | "OptimizeSelectorCache" | "SourceTraceRender" | "SourceAddConnectivityMapKey" | "SourceDesignRuleChecks" | "SimulationRender" | "SchematicComponentRender" | "SchematicPortRender" | "SymbolContainerRender" | "SchematicPrimitiveRender" | "SchematicSymbolResize" | "SchematicComponentSizeCalculation" | "SchematicLayout" | "SchematicSectionRender" | "SchematicTraceRender" | "SchematicSheetRender" | "SchematicReplaceNetLabelsWithSymbols" | "PanelBoardLayout" | "ValidatePcbCoordinates" | "PcbComponentRender" | "PcbPrimitiveRender" | "PcbFootprintLayout" | "PcbPortRender" | "PcbPortAttachment" | "PcbComponentSizeCalculation" | "PcbComponentAnchorAlignment" | "PcbCalcPlacementResolution" | "PcbLayout" | "PcbBoardAutoSize" | "PanelLayout" | "PcbAutoplaceBreakoutPoints" | "PcbTraceHintRender" | "PcbManualTraceRender" | "PcbTraceRender" | "PcbRouteNetIslands" | "PcbCopperPourRender" | "PcbDesignRuleChecks" | "SilkscreenOverlapAdjustment" | "CadModelRender" | "PartsEngineRender" | "SupplierFootprintMismatchWarning" | "SimulationSpiceEngineRender", number>;
+declare const renderPhaseIndexMap: Map<"ReactSubtreesRender" | "RenderIsolatedSubcircuits" | "InflateSubcircuitCircuitJson" | "SourceNameDuplicateComponentRemoval" | "PcbFootprintStringRender" | "FetchPartFootprint" | "ResolveFootprintPinLabels" | "InitializePortsFromChildren" | "CreateNetsFromProps" | "AssignFallbackProps" | "CreateTracesFromProps" | "CreateTracesFromNetLabels" | "CreateTraceHintsFromProps" | "CreateAutoplacedBreakoutPoints" | "SourceGroupRender" | "AssignNameToUnnamedComponents" | "SourceRender" | "CheckRefDesConvention" | "SourceComponentPropertyValidation" | "SourceParentAttachment" | "PortMatching" | "OptimizeSelectorCache" | "SourceTraceRender" | "SourceAddConnectivityMapKey" | "SourceDesignRuleChecks" | "SimulationRender" | "SchematicComponentRender" | "SchematicPortRender" | "SymbolContainerRender" | "SchematicPrimitiveRender" | "SchematicSymbolResize" | "SchematicComponentSizeCalculation" | "SchematicLayout" | "SchematicSectionRender" | "SchematicTraceRender" | "SchematicSheetRender" | "SchematicReplaceNetLabelsWithSymbols" | "PanelBoardLayout" | "ValidatePcbCoordinates" | "PcbComponentRender" | "PcbPrimitiveRender" | "PcbFootprintLayout" | "PcbPortRender" | "PcbPortAttachment" | "PcbComponentSizeCalculation" | "PcbComponentAnchorAlignment" | "PcbCalcPlacementResolution" | "PcbLayout" | "PcbBoardAutoSize" | "PanelLayout" | "PcbAutoplaceBreakoutPoints" | "PcbTraceHintRender" | "PcbManualTraceRender" | "PcbPlacementDesignRuleChecks" | "PcbTraceRender" | "PcbRouteNetIslands" | "PcbCopperPourRender" | "PcbDesignRuleChecks" | "SilkscreenOverlapAdjustment" | "CadModelRender" | "PartsEngineRender" | "SupplierFootprintMismatchWarning" | "SimulationSpiceEngineRender", number>;
 type RenderPhaseFn<K extends RenderPhase = RenderPhase> = `doInitial${K}` | `update${K}` | `remove${K}`;
 type RenderPhaseStates = Record<RenderPhase, {
     initialized: boolean;
@@ -2380,6 +2380,7 @@ declare class Group<Props extends z.ZodType<any, any, any> = typeof groupProps>
     schematic_group_id: string | null;
     subcircuit_id: string | null;
     _hasStartedAsyncAutorouting: boolean;
+    _pcbPlacementDrcErrorCount: number | null;
     _isInflatedFromCircuitJson: boolean;
     _isolatedCircuitJson: AnyCircuitElement[] | null;
     get _isIsolatedSubcircuit(): boolean;
@@ -4046,6 +4047,7 @@ declare class Board extends Group<typeof boardProps> implements BoardI, Subcircu
     doInitialPcbComponentRender(): void;
     removePcbComponentRender(): void;
     doInitialPcbDesignRuleChecks(): void;
+    doInitialPcbPlacementDesignRuleChecks(): void;
     updatePcbDesignRuleChecks(): void;
     _emitRenderLifecycleEvent(phase: RenderPhase, startOrEnd: "start" | "end"): void;
     _repositionOnPcb(position: {

package/dist/index.js

@@ -373,6 +373,7 @@ var orderedRenderPhases = [
   "PcbAutoplaceBreakoutPoints",
   "PcbTraceHintRender",
   "PcbManualTraceRender",
+  "PcbPlacementDesignRuleChecks",
   "PcbTraceRender",
   "PcbRouteNetIslands",
   "PcbCopperPourRender",
@@ -421,6 +422,10 @@ var asyncPhaseDependencies = {
     "PcbTraceRender",
     "PcbRouteNetIslands"
   ],
+  PcbPlacementDesignRuleChecks: [
+    "PcbFootprintStringRender",
+    "FetchPartFootprint"
+  ],
   PcbTraceRender: ["PcbFootprintStringRender", "FetchPartFootprint"],
   PcbRouteNetIslands: ["PcbFootprintStringRender", "FetchPartFootprint"],
   PcbDesignRuleChecks: ["PcbFootprintStringRender", "FetchPartFootprint"],
@@ -4056,6 +4061,37 @@ function Trace_doInitialPcbManualTraceRender(trace) {
 import { MultilayerIjump } from "@tscircuit/infgrid-ijump-astar";
 import "circuit-json";
 import { getFullConnectivityMapFromCircuitJson } from "circuit-json-to-connectivity-map";
+
+// lib/utils/autorouting/should-skip-autorouting-because-of-placement-errors.ts
+var shouldSkipAutoroutingBecauseOfPlacementErrors = ({
+  component,
+  subcircuit
+}) => {
+  let ancestor = component;
+  let placementErrorCount = 0;
+  while (ancestor) {
+    if ("_pcbPlacementDrcErrorCount" in ancestor && typeof ancestor._pcbPlacementDrcErrorCount === "number") {
+      placementErrorCount = ancestor._pcbPlacementDrcErrorCount;
+      break;
+    }
+    ancestor = ancestor.parent;
+  }
+  if (placementErrorCount === 0) return false;
+  const { db } = component.root;
+  const pcbErrorId = `pcb_autorouting_skipped_placement_errors_${subcircuit.subcircuit_id}`;
+  const errorAlreadyExists = db.pcb_autorouting_error.list().some((error) => error.pcb_error_id === pcbErrorId);
+  if (!errorAlreadyExists) {
+    db.pcb_autorouting_error.insert({
+      pcb_error_id: pcbErrorId,
+      error_type: "pcb_autorouting_error",
+      subcircuit_id: subcircuit.subcircuit_id ?? void 0,
+      message: `Autorouting was skipped because ${placementErrorCount} PCB placement error${placementErrorCount === 1 ? " was" : "s were"} found. Fix the placement errors or set placementDrcChecksDisabled to true to route anyway.`
+    });
+  }
+  return true;
+};
+
+// lib/components/primitive-components/Trace/Trace_doInitialPcbTraceRender.ts
 var portToObjective = (port) => {
   const portPosition = port._getGlobalPcbPositionAfterLayout();
   return {
@@ -4121,6 +4157,11 @@ function Trace_doInitialPcbTraceRender(trace) {
   if (!subcircuit._shouldUseTraceByTraceRouting()) {
     return;
   }
+  if (shouldSkipAutoroutingBecauseOfPlacementErrors({
+    component: trace,
+    subcircuit
+  }))
+    return;
   let allPortsFound;
   let ports;
   let portsWithSelectors;
@@ -19031,6 +19072,7 @@ function convertTreeToMatchPackInputProblem(tree, db, group) {
           x: (schematicComponent.size?.width || 1) + marginLeft + marginRight,
           y: (schematicComponent.size?.height || 1) + marginTop + marginBottom
         },
+        isCapacitor: child.sourceComponent.ftype === "simple_capacitor",
         availableRotations,
         ...explicitlyPositioned && {
           fixedPosition: {
@@ -22932,6 +22974,7 @@ var Group5 = class extends NormalComponent3 {
   schematic_group_id = null;
   subcircuit_id = null;
   _hasStartedAsyncAutorouting = false;
+  _pcbPlacementDrcErrorCount = null;
   _isInflatedFromCircuitJson = false;
   _isolatedCircuitJson = null;
   get _isIsolatedSubcircuit() {
@@ -23731,6 +23774,11 @@ var Group5 = class extends NormalComponent3 {
       `[${this.getString()}] no child subcircuits to wait for, initiating async routing`
     );
     if (!this._hasTracesToRoute()) return;
+    if (shouldSkipAutoroutingBecauseOfPlacementErrors({
+      component: this,
+      subcircuit: this
+    }))
+      return;
     this._startAsyncAutorouting();
   }
   doInitialSchematicTraceRender() {
@@ -23744,6 +23792,11 @@ var Group5 = class extends NormalComponent3 {
     if (this._isInflatedFromCircuitJson) return;
     if (this._shouldRouteAsync() && this._hasTracesToRoute() && !this._hasStartedAsyncAutorouting) {
       if (this._areChildSubcircuitsRouted()) {
+        if (shouldSkipAutoroutingBecauseOfPlacementErrors({
+          component: this,
+          subcircuit: this
+        }))
+          return;
         debug12(
           `[${this.getString()}] child subcircuits are now routed, starting async autorouting`
         );
@@ -25356,7 +25409,7 @@ import { identity as identity5 } from "transformation-matrix";
 var package_default = {
   name: "@tscircuit/core",
   type: "module",
-  version: "0.0.1413",
+  version: "0.0.1415",
   types: "dist/index.d.ts",
   main: "dist/index.js",
   module: "dist/index.js",
@@ -25401,7 +25454,7 @@ var package_default = {
     "@tscircuit/jlcpcb-manufacturing-specs": "git+https://github.com/tscircuit/jlcpcb-manufacturing-specs#e08af159db01a37db007e33f0a7268d0e4a279a5",
     "@tscircuit/krt-wasm": "^0.1.1",
     "@tscircuit/log-soup": "^1.0.2",
-    "@tscircuit/matchpack": "^0.0.31",
+    "@tscircuit/matchpack": "^0.0.33",
     "@tscircuit/math-utils": "^0.0.36",
     "@tscircuit/miniflex": "^0.0.4",
     "@tscircuit/ngspice-spice-engine": "^0.0.19",
@@ -25920,6 +25973,40 @@ function Subcircuit_getSubcircuitPropHash(subcircuit) {
   return computeHash(hashableData);
 }
 
+// lib/components/normal-components/Board_doInitialPcbPlacementDesignRuleChecks.ts
+import {
+  checkConnectorAccessibleOrientation,
+  checkPadPadClearance,
+  checkPadTraceClearance,
+  checkPcbComponentOverlap,
+  checkPcbComponentsOutOfBoard,
+  checkViasOffBoard
+} from "@tscircuit/checks";
+var Board_doInitialPcbPlacementDesignRuleChecks = (board) => {
+  if (board.root?.pcbDisabled) return;
+  const placementDrcChecksDisabled = board.root?.platform?.placementDrcChecksDisabled ?? board.getInheritedProperty("placementDrcChecksDisabled");
+  const drcChecksDisabled = board.root?.platform?.drcChecksDisabled ?? board.getInheritedProperty("drcChecksDisabled");
+  board._pcbPlacementDrcErrorCount = 0;
+  if (placementDrcChecksDisabled || drcChecksDisabled) return;
+  const { db } = board.root;
+  const existingPlacementErrorCount = db.pcb_placement_error.list().length;
+  const subcircuitCircuitJson = db.subtree({ subcircuit_id: board.subcircuit_id }).toArray();
+  try {
+    const placementCheckResults = [
+      ...checkViasOffBoard(subcircuitCircuitJson),
+      ...checkPcbComponentsOutOfBoard(subcircuitCircuitJson),
+      ...checkPcbComponentOverlap(subcircuitCircuitJson),
+      ...checkPadPadClearance(subcircuitCircuitJson),
+      ...checkPadTraceClearance(subcircuitCircuitJson),
+      ...checkConnectorAccessibleOrientation(subcircuitCircuitJson)
+    ];
+    db.insertAll(placementCheckResults);
+    board._pcbPlacementDrcErrorCount = existingPlacementErrorCount + placementCheckResults.filter((result) => result.type.endsWith("_error")).length;
+  } catch {
+    board._pcbPlacementDrcErrorCount = existingPlacementErrorCount;
+  }
+};
+
 // lib/components/normal-components/Board.ts
 var MIN_EFFECTIVE_BORDER_RADIUS_MM = 0.01;
 var getRoundedRectOutline = (width, height, radius) => {
@@ -26314,6 +26401,9 @@ var Board = class extends Group5 {
     super.doInitialPcbDesignRuleChecks();
     this.updatePcbDesignRuleChecks();
   }
+  doInitialPcbPlacementDesignRuleChecks() {
+    Board_doInitialPcbPlacementDesignRuleChecks(this);
+  }
   updatePcbDesignRuleChecks() {
     const { db } = this.root;
     const routingDisabled = this.root?.pcbRoutingDisabled || this.getInheritedProperty("routingDisabled");
@@ -26343,8 +26433,15 @@ var Board = class extends Group5 {
         );
       }
       if (shouldRunPlacementChecks) {
+        const existingPlacementDiagnostics = db.toArray();
         checksToRun.push(
-          runAllPlacementChecks(circuitJson)
+          runAllPlacementChecks(circuitJson).then(
+            (results) => results.filter(
+              (result) => !existingPlacementDiagnostics.some(
+                (existing) => existing.type === result.type && "message" in existing && existing.message === result.message
+              )
+            )
+          )
         );
       }
       if (shouldRunNetlistChecks) {

package/package.json

@@ -1,7 +1,7 @@
 {
   "name": "@tscircuit/core",
   "type": "module",
-  "version": "0.0.1414",
+  "version": "0.0.1416",
   "types": "dist/index.d.ts",
   "main": "dist/index.js",
   "module": "dist/index.js",
@@ -46,7 +46,7 @@
     "@tscircuit/jlcpcb-manufacturing-specs": "git+https://github.com/tscircuit/jlcpcb-manufacturing-specs#e08af159db01a37db007e33f0a7268d0e4a279a5",
     "@tscircuit/krt-wasm": "^0.1.1",
     "@tscircuit/log-soup": "^1.0.2",
-    "@tscircuit/matchpack": "^0.0.31",
+    "@tscircuit/matchpack": "^0.0.33",
     "@tscircuit/math-utils": "^0.0.36",
     "@tscircuit/miniflex": "^0.0.4",
     "@tscircuit/ngspice-spice-engine": "^0.0.19",