@tscircuit/core 0.0.1312 → 0.0.1314

package/dist/index.js

@@ -9767,8 +9767,12 @@ var Port = class extends PrimitiveComponent2 {
         label: "obstacle"
       });
     }
+    const isExplicitCustomSymbolPort = schX !== void 0 && schY !== void 0 && !!this._getSymbolAncestor();
     if (!localPortInfo?.side) {
       this.facingDirection = getRelativeDirection(containerCenter, portCenter);
+      if (isExplicitCustomSymbolPort && props.direction) {
+        this.facingDirection = props.direction;
+      }
     } else {
       this.facingDirection = {
         left: "left",
@@ -15714,7 +15718,7 @@ var getSimpleRouteJsonFromCircuitJson = ({
     };
   }
   const routedTraceIds = new Set(
-    db.pcb_trace.list().filter((t) => !subcircuit_id || t.subcircuit_id === subcircuit_id).map((t) => t.source_trace_id).filter((id) => Boolean(id))
+    subcircuit_id ? db.pcb_trace.list().filter((t) => t.subcircuit_id === subcircuit_id).map((t) => t.source_trace_id).filter((id) => Boolean(id)) : []
   );
   const sourcePortIdToBreakoutPoint = /* @__PURE__ */ new Map();
   for (const bp of breakoutPoints) {
@@ -15810,22 +15814,27 @@ var getSimpleRouteJsonFromCircuitJson = ({
         sourceTrace.min_trace_thickness
       );
     }
-    connectionsFromNets.push({
-      name: net.source_net_id ?? connMap.getNetConnectedToId(net.source_net_id),
-      nominalTraceWidth: nominalTraceWidthFromConnectedTraces,
-      width: nominalTraceWidthFromConnectedTraces,
-      pointsToConnect: connectedSourceTraces.flatMap((st) => {
-        const pcb_ports = db.pcb_port.list().filter(
-          (p) => st.connected_source_port_ids.includes(p.source_port_id)
-        );
-        return pcb_ports.map((p) => ({
+    const pointsToConnect = [];
+    const addedPointIds = /* @__PURE__ */ new Set();
+    for (const st of connectedSourceTraces) {
+      const pcb_ports = db.pcb_port.list().filter((p) => st.connected_source_port_ids.includes(p.source_port_id));
+      for (const p of pcb_ports) {
+        if (addedPointIds.has(p.pcb_port_id)) continue;
+        addedPointIds.add(p.pcb_port_id);
+        pointsToConnect.push({
           x: p.x,
           y: p.y,
           layer: p.layers?.[0] ?? "top",
           pointId: p.pcb_port_id,
           pcb_port_id: p.pcb_port_id
-        }));
-      })
+        });
+      }
+    }
+    connectionsFromNets.push({
+      name: net.source_net_id ?? connMap.getNetConnectedToId(net.source_net_id),
+      nominalTraceWidth: nominalTraceWidthFromConnectedTraces,
+      width: nominalTraceWidthFromConnectedTraces,
+      pointsToConnect
     });
   }
   const connectionsFromBreakoutPoints = [];
@@ -15877,31 +15886,34 @@ var getSimpleRouteJsonFromCircuitJson = ({
     ...connectionsFromNets,
     ...connectionsFromBreakoutPoints
   ];
-  const pointIdToConn = /* @__PURE__ */ new Map();
-  for (const conn of allConns) {
-    for (const pt of conn.pointsToConnect) {
-      if (pt.pointId) pointIdToConn.set(pt.pointId, conn);
+  if (subcircuit_id) {
+    const pointIdToConn = /* @__PURE__ */ new Map();
+    for (const conn of allConns) {
+      for (const pt of conn.pointsToConnect) {
+        if (pt.pointId) pointIdToConn.set(pt.pointId, conn);
+      }
+    }
+    const existingTraces = db.pcb_trace.list().filter((t) => {
+      return relevantSubcircuitIds?.has(t.subcircuit_id);
+    });
+    for (const tr of existingTraces) {
+      const tracePortIds = /* @__PURE__ */ new Set();
+      for (const seg of tr.route) {
+        if (seg.start_pcb_port_id) tracePortIds.add(seg.start_pcb_port_id);
+        if (seg.end_pcb_port_id) tracePortIds.add(seg.end_pcb_port_id);
+      }
+      if (tracePortIds.size < 2) continue;
+      const firstId = tracePortIds.values().next().value;
+      if (!firstId) continue;
+      const conn = pointIdToConn.get(firstId);
+      if (!conn) continue;
+      if (![...tracePortIds].every((pid) => pointIdToConn.get(pid) === conn)) {
+        continue;
+      }
+      conn.externallyConnectedPointIds ??= [];
+      conn.externallyConnectedPointIds.push([...tracePortIds]);
     }
   }
-  const existingTraces = db.pcb_trace.list().filter(
-    (t) => !subcircuit_id || relevantSubcircuitIds?.has(t.subcircuit_id)
-  );
-  for (const tr of existingTraces) {
-    const tracePortIds = /* @__PURE__ */ new Set();
-    for (const seg of tr.route) {
-      if (seg.start_pcb_port_id) tracePortIds.add(seg.start_pcb_port_id);
-      if (seg.end_pcb_port_id) tracePortIds.add(seg.end_pcb_port_id);
-    }
-    if (tracePortIds.size < 2) continue;
-    const firstId = tracePortIds.values().next().value;
-    if (!firstId) continue;
-    const conn = pointIdToConn.get(firstId);
-    if (!conn) continue;
-    if (![...tracePortIds].every((pid) => pointIdToConn.get(pid) === conn))
-      continue;
-    conn.externallyConnectedPointIds ??= [];
-    conn.externallyConnectedPointIds.push([...tracePortIds]);
-  }
   const resolvedMinViaHoleDiameter = minViaHoleDiameter ?? board?.min_via_hole_diameter;
   const resolvedMinViaPadDiameter = minViaPadDiameter ?? board?.min_via_pad_diameter;
   const resolvedMinTraceToPadEdgeClearance = minTraceToPadEdgeClearance ?? board?.min_trace_to_pad_edge_clearance;
@@ -23486,7 +23498,7 @@ import { identity as identity5 } from "transformation-matrix";
 var package_default = {
   name: "@tscircuit/core",
   type: "module",
-  version: "0.0.1311",
+  version: "0.0.1313",
   types: "dist/index.d.ts",
   main: "dist/index.js",
   module: "dist/index.js",

package/package.json

@@ -1,7 +1,7 @@
 {
   "name": "@tscircuit/core",
   "type": "module",
-  "version": "0.0.1312",
+  "version": "0.0.1314",
   "types": "dist/index.d.ts",
   "main": "dist/index.js",
   "module": "dist/index.js",