@tscircuit/core 0.0.1233 → 0.0.1234

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
package/dist/index.d.ts CHANGED
@@ -1,5 +1,5 @@
1
1
  import * as circuit_json from 'circuit-json';
2
- import { PcbTraceError, PcbPlacementError, PcbManualEditConflictWarning, PcbViaClearanceError, LayerRef, AnyCircuitElement, Size, PcbTraceRoutePoint, AnySourceComponent, PcbComponent, PcbTrace as PcbTrace$1, PcbVia, SchematicPort, SchematicComponent, RouteHintPoint, CircuitJson } from 'circuit-json';
2
+ import { PcbTraceError, PcbPlacementError, PcbManualEditConflictWarning, PcbViaClearanceError, LayerRef, AnyCircuitElement, Size, PcbTrace as PcbTrace$1, PcbTraceRoutePoint, AnySourceComponent, PcbComponent, PcbVia, SchematicPort, SchematicComponent, RouteHintPoint, CircuitJson } from 'circuit-json';
3
3
  import * as _tscircuit_props from '@tscircuit/props';
4
4
  import { PlatformConfig, traceProps, netProps, AutorouterProp, AutoroutingPhaseProps, subcircuitGroupProps, AutorouterConfig, PcbSx, portProps, SupplierPartNumbers, CadModelProp, SchematicPortArrangement, groupProps, boardProps, subcircuitProps, subpanelProps, capacitorProps, chipProps, pinoutProps, diodeProps, fuseProps, jumperProps, interconnectProps, solderjumperProps, ledProps, powerSourceProps, voltageSourceProps, currentSourceProps, resistorProps, constraintProps, autoroutingPhaseProps, fabricationNoteRectProps, fabricationNotePathProps, fabricationNoteTextProps, fabricationNoteDimensionProps, pcbNoteLineProps, pcbNoteRectProps, pcbNoteTextProps, pcbNotePathProps, pcbNoteDimensionProps, footprintProps, breakoutProps, breakoutPointProps, holeProps, pcbKeepoutProps, netLabelProps, cadmodelProps, cadassemblyProps, platedHoleProps, courtyardCircleProps, courtyardOutlineProps, courtyardRectProps, silkscreenCircleProps, silkscreenPathProps, silkscreenRectProps, silkscreenTextProps, silkscreenLineProps, smtPadProps, fiducialProps, traceHintProps, viaProps, copperPourProps, copperTextProps, cutoutProps, batteryProps, pinHeaderProps, resonatorProps, inductorProps, potentiometerProps, pushButtonProps, crystalProps, transistorProps, mosfetProps, opampProps, OpAmpPinLabels, switchProps, SwitchProps, testpointProps, schematicTextProps, schematicLineProps, schematicRectProps, schematicArcProps, schematicCircleProps, schematicPathProps, schematicBoxProps, schematicSectionProps, schematicTableProps, schematicRowProps, schematicCellProps, symbolProps, analogSimulationProps, voltageProbeProps, CapacitorProps, ChipProps, DiodeProps, ResistorProps, ManualEditEvent, ManualEditsFile, ChipConnections, manual_edits_file } from '@tscircuit/props';
5
5
  export { kicadFootprintStrings } from '@tscircuit/props';
@@ -458,6 +458,7 @@ declare class Trace extends PrimitiveComponent<typeof traceProps> implements Tra
458
458
  source_trace_id: string | null;
459
459
  pcb_trace_id: string | null;
460
460
  schematic_trace_id: string | null;
461
+ _inflatedPcbTrace?: PcbTrace$1;
461
462
  _portsRoutedOnPcb: Port[];
462
463
  subcircuit_connectivity_map_key: string | null;
463
464
  _traceConnectionHash: string | null;
package/dist/index.js CHANGED
@@ -4541,7 +4541,8 @@ function Trace_doInitialPcbManualTraceRender(trace) {
4541
4541
  const subcircuit = trace.getSubcircuit();
4542
4542
  const hasPcbPath = props.pcbPath !== void 0;
4543
4543
  const wantsStraightLine = Boolean(props.pcbStraightLine);
4544
- if (!hasPcbPath && !wantsStraightLine) return;
4544
+ const inflatedPcbTrace = trace._inflatedPcbTrace;
4545
+ if (!hasPcbPath && !wantsStraightLine && !inflatedPcbTrace) return;
4545
4546
  let allPortsFound;
4546
4547
  let ports;
4547
4548
  let portsWithSelectors;
@@ -4594,6 +4595,49 @@ function Trace_doInitialPcbManualTraceRender(trace) {
4594
4595
  return;
4595
4596
  }
4596
4597
  const width = trace._getExplicitTraceThickness() ?? trace.getSubcircuit()._parsedProps.minTraceWidth ?? jlcMinTolerances.min_trace_width;
4598
+ if (inflatedPcbTrace) {
4599
+ const { maybeFlipLayer } = trace._getPcbPrimitiveFlippedHelpers();
4600
+ const transform2 = trace._computePcbGlobalTransformBeforeLayout();
4601
+ const transformedRoute = inflatedPcbTrace.route.map((point6) => {
4602
+ const { x, y, ...restOfPoint } = point6;
4603
+ const transformedPoint = applyToPoint2(transform2, { x, y });
4604
+ if (point6.route_type === "wire" && point6.layer) {
4605
+ return {
4606
+ ...transformedPoint,
4607
+ ...restOfPoint,
4608
+ layer: maybeFlipLayer(point6.layer)
4609
+ };
4610
+ }
4611
+ return { ...transformedPoint, ...restOfPoint };
4612
+ });
4613
+ const pcb_trace2 = db.pcb_trace.insert({
4614
+ ...inflatedPcbTrace,
4615
+ route: transformedRoute,
4616
+ source_trace_id: trace.source_trace_id,
4617
+ subcircuit_id: subcircuit?.subcircuit_id ?? void 0,
4618
+ pcb_group_id: trace.getGroup()?.pcb_group_id ?? void 0
4619
+ });
4620
+ const pcbStyle2 = trace.getInheritedMergedProperty("pcbStyle");
4621
+ const { holeDiameter: holeDiameter2, padDiameter: padDiameter2 } = getViaDiameterDefaults(pcbStyle2);
4622
+ for (const point6 of transformedRoute) {
4623
+ if (point6.route_type === "via") {
4624
+ db.pcb_via.insert({
4625
+ pcb_trace_id: pcb_trace2.pcb_trace_id,
4626
+ x: point6.x,
4627
+ y: point6.y,
4628
+ hole_diameter: holeDiameter2,
4629
+ outer_diameter: padDiameter2,
4630
+ layers: [point6.from_layer, point6.to_layer],
4631
+ from_layer: point6.from_layer,
4632
+ to_layer: point6.to_layer
4633
+ });
4634
+ }
4635
+ }
4636
+ trace._portsRoutedOnPcb = ports;
4637
+ trace.pcb_trace_id = pcb_trace2.pcb_trace_id;
4638
+ trace._insertErrorIfTraceIsOutsideBoard(pcb_trace2.route, ports);
4639
+ return;
4640
+ }
4597
4641
  if (wantsStraightLine && !hasPcbPath) {
4598
4642
  if (!ports || ports.length < 2) {
4599
4643
  trace.renderError("pcbStraightLine requires exactly two connected ports");
@@ -4960,6 +5004,7 @@ var Trace3 = class extends PrimitiveComponent2 {
4960
5004
  source_trace_id = null;
4961
5005
  pcb_trace_id = null;
4962
5006
  schematic_trace_id = null;
5007
+ _inflatedPcbTrace;
4963
5008
  _portsRoutedOnPcb;
4964
5009
  subcircuit_connectivity_map_key = null;
4965
5010
  _traceConnectionHash = null;
@@ -20541,10 +20586,11 @@ function inflateSourceTrace(sourceTrace, inflatorContext) {
20541
20586
  }
20542
20587
  if (pcbPath && pcbPath.length > 0) {
20543
20588
  traceProps2.pcbPath = pcbPath;
20544
- } else if (pcbTrace) {
20589
+ } else if (!pcbTrace && sourceTrace.connected_source_port_ids.length === 2 && sourceTrace.connected_source_net_ids.length === 0) {
20545
20590
  traceProps2.pcbStraightLine = true;
20546
20591
  }
20547
20592
  const trace = new Trace3(traceProps2);
20593
+ trace._inflatedPcbTrace = pcbTrace ?? void 0;
20548
20594
  subcircuit.add(trace);
20549
20595
  }
20550
20596
 
@@ -20755,7 +20801,7 @@ import { identity as identity5 } from "transformation-matrix";
20755
20801
  var package_default = {
20756
20802
  name: "@tscircuit/core",
20757
20803
  type: "module",
20758
- version: "0.0.1232",
20804
+ version: "0.0.1233",
20759
20805
  types: "dist/index.d.ts",
20760
20806
  main: "dist/index.js",
20761
20807
  module: "dist/index.js",
package/package.json CHANGED
@@ -1,7 +1,7 @@
1
1
  {
2
2
  "name": "@tscircuit/core",
3
3
  "type": "module",
4
- "version": "0.0.1233",
4
+ "version": "0.0.1234",
5
5
  "types": "dist/index.d.ts",
6
6
  "main": "dist/index.js",
7
7
  "module": "dist/index.js",