@tscircuit/core 0.0.1185 → 0.0.1186

package/dist/index.js

@@ -4030,8 +4030,18 @@ function getPcbSelectorErrorForTracePort(selector, port) {
   return null;
 }
 
+// node_modules/@tscircuit/jlcpcb-manufacturing-specs/lib/jlcpcb-manufacturing-specs.ts
+var jlcMinTolerances = {
+  min_trace_width: 0.1,
+  min_via_to_via_clearance: 0.1,
+  min_trace_to_pad_clearance: 0.1,
+  min_pad_to_pad_clearance: 0.1,
+  min_board_edge_clearance: 0.2,
+  min_via_hole_diameter: 0.2,
+  min_via_pad_diameter: 0.3
+};
+
 // lib/components/primitive-components/Trace/Trace_doInitialPcbTraceRender.ts
-import { jlcMinTolerances } from "@tscircuit/jlcpcb-manufacturing-specs";
 var portToObjective = (port) => {
   const portPosition = port._getGlobalPcbPositionAfterLayout();
   return {
@@ -4502,7 +4512,6 @@ function clipTraceEndAtPad(params) {
 }
 
 // lib/components/primitive-components/Trace/Trace_doInitialPcbManualTraceRender.ts
-import { jlcMinTolerances as jlcMinTolerances2 } from "@tscircuit/jlcpcb-manufacturing-specs";
 function Trace_doInitialPcbManualTraceRender(trace) {
   if (trace.root?.pcbDisabled) return;
   const { db } = trace.root;
@@ -4562,7 +4571,7 @@ function Trace_doInitialPcbManualTraceRender(trace) {
     });
     return;
   }
-  const width = trace._getExplicitTraceThickness() ?? trace.getSubcircuit()._parsedProps.minTraceWidth ?? jlcMinTolerances2.min_trace_width;
+  const width = trace._getExplicitTraceThickness() ?? trace.getSubcircuit()._parsedProps.minTraceWidth ?? jlcMinTolerances.min_trace_width;
   if (wantsStraightLine && !hasPcbPath) {
     if (!ports || ports.length < 2) {
       trace.renderError("pcbStraightLine requires exactly two connected ports");
@@ -20014,7 +20023,7 @@ import { identity as identity5 } from "transformation-matrix";
 var package_default = {
   name: "@tscircuit/core",
   type: "module",
-  version: "0.0.1184",
+  version: "0.0.1185",
   types: "dist/index.d.ts",
   main: "dist/index.js",
   module: "dist/index.js",
@@ -20032,7 +20041,7 @@ var package_default = {
     url: "https://github.com/tscircuit/core"
   },
   scripts: {
-    build: "tsup-node index.ts --format esm --dts",
+    build: "tsup-node",
     format: "biome format . --write",
     "measure-bundle": "howfat -r table .",
     "pkg-pr-new-release": "bunx pkg-pr-new publish --comment=off --peerDeps",
@@ -20566,7 +20575,6 @@ function Subcircuit_getSubcircuitPropHash(subcircuit) {
 }
 
 // lib/components/normal-components/Board.ts
-import { jlcMinTolerances as jlcMinTolerances3 } from "@tscircuit/jlcpcb-manufacturing-specs";
 var MIN_EFFECTIVE_BORDER_RADIUS_MM = 0.01;
 var getRoundedRectOutline = (width, height, radius) => {
   const w2 = width / 2;
@@ -20930,13 +20938,13 @@ var Board = class extends Group6 {
         y: point6.y + (props.outlineOffsetY ?? 0) + outlineTranslation.y
       })),
       material: props.material,
-      min_trace_width: subcircuitProps2.minTraceWidth ?? jlcMinTolerances3.min_trace_width,
-      min_via_hole_diameter: subcircuitProps2.minViaHoleDiameter ?? jlcMinTolerances3.min_via_hole_diameter,
-      min_via_pad_diameter: subcircuitProps2.minViaPadDiameter ?? jlcMinTolerances3.min_via_pad_diameter,
-      min_via_to_via_clearance: subcircuitProps2.minViaToViaClearance ?? jlcMinTolerances3.min_via_to_via_clearance,
-      min_trace_to_pad_clearance: subcircuitProps2.minTraceToPadClearance ?? jlcMinTolerances3.min_trace_to_pad_clearance,
-      min_pad_to_pad_clearance: subcircuitProps2.minPadToPadClearance ?? jlcMinTolerances3.min_pad_to_pad_clearance,
-      min_board_edge_clearance: subcircuitProps2.minBoardEdgeClearance ?? jlcMinTolerances3.min_board_edge_clearance
+      min_trace_width: subcircuitProps2.minTraceWidth ?? jlcMinTolerances.min_trace_width,
+      min_via_hole_diameter: subcircuitProps2.minViaHoleDiameter ?? jlcMinTolerances.min_via_hole_diameter,
+      min_via_pad_diameter: subcircuitProps2.minViaPadDiameter ?? jlcMinTolerances.min_via_pad_diameter,
+      min_via_to_via_clearance: subcircuitProps2.minViaToViaClearance ?? jlcMinTolerances.min_via_to_via_clearance,
+      min_trace_to_pad_clearance: subcircuitProps2.minTraceToPadClearance ?? jlcMinTolerances.min_trace_to_pad_clearance,
+      min_pad_to_pad_clearance: subcircuitProps2.minPadToPadClearance ?? jlcMinTolerances.min_pad_to_pad_clearance,
+      min_board_edge_clearance: subcircuitProps2.minBoardEdgeClearance ?? jlcMinTolerances.min_board_edge_clearance
     });
     this.pcb_board_id = pcb_board.pcb_board_id;
     this._addBoardInformationToSilkscreen();

package/package.json

@@ -1,7 +1,7 @@
 {
   "name": "@tscircuit/core",
   "type": "module",
-  "version": "0.0.1185",
+  "version": "0.0.1186",
   "types": "dist/index.d.ts",
   "main": "dist/index.js",
   "module": "dist/index.js",
@@ -19,7 +19,7 @@
     "url": "https://github.com/tscircuit/core"
   },
   "scripts": {
-    "build": "tsup-node index.ts --format esm --dts",
+    "build": "tsup-node",
     "format": "biome format . --write",
     "measure-bundle": "howfat -r table .",
     "pkg-pr-new-release": "bunx pkg-pr-new publish --comment=off --peerDeps",