@tscircuit/copper-pour-solver 0.0.8 → 0.0.10

package/.github/workflows/bun-pver-release.yml

@@ -47,12 +47,12 @@ jobs:
           committer: tscircuitbot <githubbot@tscircuit.com>
           author: tscircuitbot <githubbot@tscircuit.com>
 
-      # - name: Enable auto-merge
-      #   if: steps.create-pr.outputs.pull-request-number != ''
-      #   run: |
-      #     gh pr merge ${{ steps.create-pr.outputs.pull-request-number }} --auto --squash --delete-branch
-      #   env:
-      #     GH_TOKEN: ${{ secrets.TSCIRCUIT_BOT_GITHUB_TOKEN }}
+      - name: Enable auto-merge
+        if: steps.create-pr.outputs.pull-request-number != ''
+        run: |
+          gh pr merge ${{ steps.create-pr.outputs.pull-request-number }} --auto --squash --delete-branch
+        env:
+          GH_TOKEN: ${{ secrets.TSCIRCUIT_BOT_GITHUB_TOKEN }}
 
       # - name: Trigger upstream repo updates
       #   if: env.UPSTREAM_REPOS && env.UPSTREAM_PACKAGES_TO_UPDATE

package/dist/index.js

@@ -294,6 +294,9 @@ var convertCircuitJsonToInputProblem = (circuitJson, options) => {
   const source_traces = circuitJson.filter(
     (e) => e.type === "source_trace"
   );
+  const pcb_traces = circuitJson.filter(
+    (e) => e.type === "pcb_trace"
+  );
   const source_nets = circuitJson.filter(
     (e) => e.type === "source_net"
   );
@@ -333,6 +336,14 @@ var convertCircuitJsonToInputProblem = (circuitJson, options) => {
     ...sourceTraceIdToConnectivityKey,
     ...sourceNetIdToConnectivityKey
   };
+  const pcbTraceIdToConnectivityKey = Object.fromEntries(
+    pcb_traces.map(
+      (trace) => [
+        trace.pcb_trace_id,
+        trace.source_trace_id ? idToConnectivityKey[trace.source_trace_id] : void 0
+      ]
+    ).filter((entry) => Boolean(entry[1]))
+  );
   const pads = [];
   for (const elm of circuitJson) {
     if (elm.type === "pcb_smtpad") {
@@ -399,25 +410,57 @@ var convertCircuitJsonToInputProblem = (circuitJson, options) => {
         y: hole.y,
         radius: hole.hole_diameter / 2
       });
+    } else if (elm.type === "pcb_via") {
+      const via = elm;
+      if (!via.layers.includes(options.layer)) continue;
+      let connectivityKey;
+      if (via.pcb_trace_id) {
+        connectivityKey = pcbTraceIdToConnectivityKey[via.pcb_trace_id];
+      }
+      if (!connectivityKey) {
+        connectivityKey = `unconnected-via:${via.pcb_via_id}`;
+      }
+      pads.push({
+        shape: "circle",
+        padId: via.pcb_via_id,
+        layer: options.layer,
+        connectivityKey,
+        x: via.x,
+        y: via.y,
+        radius: via.outer_diameter / 2
+      });
     } else if (elm.type === "pcb_trace") {
       const trace = elm;
-      const first_wire = trace.route.find(
-        (r) => r.route_type === "wire" && r.layer
-      );
-      if (!first_wire) continue;
-      if (first_wire.route_type === "via") continue;
-      if (first_wire.layer !== options.layer) continue;
       if (!trace.source_trace_id) continue;
       const connectivityKey = idToConnectivityKey[trace.source_trace_id];
       if (!connectivityKey) continue;
-      pads.push({
-        shape: "trace",
-        padId: trace.pcb_trace_id,
-        layer: first_wire.layer,
-        connectivityKey,
-        segments: trace.route.map((r) => ({ x: r.x, y: r.y })),
-        width: first_wire.width
-      });
+      let currentSegmentGroup = [];
+      let currentWidth = null;
+      const commitGroup = () => {
+        if (currentSegmentGroup.length > 1) {
+          pads.push({
+            shape: "trace",
+            padId: `${trace.pcb_trace_id}-${pads.length}`,
+            layer: options.layer,
+            connectivityKey,
+            segments: currentSegmentGroup,
+            width: currentWidth
+          });
+        }
+        currentSegmentGroup = [];
+        currentWidth = null;
+      };
+      for (const r of trace.route) {
+        const ri = r;
+        const isWireOnLayer = ri.route_type === "wire" && ri.layer === options.layer;
+        if (isWireOnLayer) {
+          if (currentWidth === null) currentWidth = ri.width;
+          currentSegmentGroup.push({ x: ri.x, y: ri.y });
+        } else {
+          commitGroup();
+        }
+      }
+      commitGroup();
     }
   }
   const { width, height } = pcb_board;

package/lib/circuit-json/convert-circuit-json-to-input-problem.ts

@@ -7,6 +7,8 @@ import type {
   PcbPort,
   PcbSmtPad,
   PcbTrace,
+  PcbVia,
+  Point,
   SourceNet,
   SourcePort,
   SourceTrace,
@@ -38,6 +40,9 @@ export const convertCircuitJsonToInputProblem = (
   const source_traces = circuitJson.filter(
     (e) => e.type === "source_trace",
   ) as SourceTrace[]
+  const pcb_traces = circuitJson.filter(
+    (e) => e.type === "pcb_trace",
+  ) as PcbTrace[]
   const source_nets = circuitJson.filter(
     (e) => e.type === "source_net",
   ) as SourceNet[]
@@ -87,6 +92,21 @@ export const convertCircuitJsonToInputProblem = (
     ...sourceNetIdToConnectivityKey,
   }
 
+  const pcbTraceIdToConnectivityKey: Record<string, string> =
+    Object.fromEntries(
+      pcb_traces
+        .map(
+          (trace) =>
+            [
+              trace.pcb_trace_id,
+              trace.source_trace_id
+                ? idToConnectivityKey[trace.source_trace_id]
+                : undefined,
+            ] as const,
+        )
+        .filter((entry): entry is [string, string] => Boolean(entry[1])),
+    )
+
   const pads: InputPad[] = []
 
   for (const elm of circuitJson) {
@@ -160,27 +180,64 @@ export const convertCircuitJsonToInputProblem = (
         y: hole.y,
         radius: hole.hole_diameter / 2,
       } as InputCircularPad)
+    } else if (elm.type === "pcb_via") {
+      const via = elm as PcbVia
+      if (!via.layers.includes(options.layer)) continue
+
+      let connectivityKey: string | undefined
+      if (via.pcb_trace_id) {
+        connectivityKey = pcbTraceIdToConnectivityKey[via.pcb_trace_id]
+      }
+
+      if (!connectivityKey) {
+        connectivityKey = `unconnected-via:${via.pcb_via_id}`
+      }
+
+      pads.push({
+        shape: "circle",
+        padId: via.pcb_via_id,
+        layer: options.layer,
+        connectivityKey,
+        x: via.x,
+        y: via.y,
+        radius: via.outer_diameter / 2,
+      } as InputCircularPad)
     } else if (elm.type === "pcb_trace") {
       const trace = elm as PcbTrace
-      const first_wire = trace.route.find(
-        (r: any) => r.route_type === "wire" && r.layer,
-      )
-      if (!first_wire) continue
-      if (first_wire.route_type === "via") continue
-      if (first_wire.layer !== options.layer) continue
-
       if (!trace.source_trace_id) continue
       const connectivityKey = idToConnectivityKey[trace.source_trace_id]
       if (!connectivityKey) continue
 
-      pads.push({
-        shape: "trace",
-        padId: trace.pcb_trace_id,
-        layer: first_wire.layer!,
-        connectivityKey,
-        segments: trace.route.map((r: any) => ({ x: r.x, y: r.y })),
-        width: first_wire.width,
-      } as InputTracePad)
+      let currentSegmentGroup: Point[] = []
+      let currentWidth: number | null = null
+
+      const commitGroup = () => {
+        if (currentSegmentGroup.length > 1) {
+          pads.push({
+            shape: "trace",
+            padId: `${trace.pcb_trace_id}-${pads.length}`,
+            layer: options.layer,
+            connectivityKey,
+            segments: currentSegmentGroup,
+            width: currentWidth!,
+          } as InputTracePad)
+        }
+        currentSegmentGroup = []
+        currentWidth = null
+      }
+
+      for (const r of trace.route) {
+        const ri = r as any
+        const isWireOnLayer =
+          ri.route_type === "wire" && ri.layer === options.layer
+        if (isWireOnLayer) {
+          if (currentWidth === null) currentWidth = ri.width
+          currentSegmentGroup.push({ x: ri.x, y: ri.y })
+        } else {
+          commitGroup()
+        }
+      }
+      commitGroup()
     }
   }
 

package/package.json

@@ -1,7 +1,7 @@
 {
   "name": "@tscircuit/copper-pour-solver",
   "main": "dist/index.js",
-  "version": "0.0.8",
+  "version": "0.0.10",
   "scripts": {
     "format": "biome format . --write",
     "format:check": "biome format .",

package/tests/__snapshots__/via.snap.svg

@@ -0,0 +1 @@
+<svg xmlns="http://www.w3.org/2000/svg" width="800" height="600" data-software-used-string="@tscircuit/core@0.0.849"><style></style><rect class="boundary" x="0" y="0" fill="#000" width="800" height="600" data-type="pcb_background" data-pcb-layer="global"/><rect class="pcb-boundary" fill="none" stroke="#fff" stroke-width="0.3" x="150" y="50" width="500" height="500" data-type="pcb_boundary" data-pcb-layer="global"/><rect class="pcb-pad" fill="rgb(77, 127, 196)" x="284" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="bottom"/><rect class="pcb-pad" fill="rgb(77, 127, 196)" x="233" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 297.5 300 L 297.5 379.512341162088" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 297.5 379.512341162088 L 303.1454224777405 385.1577636398285" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 303.1454224777405 385.1577636398285 L 306.25 393.75" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 306.25 393.75 L 306.25 393.75" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-silkscreen pcb-silkscreen-bottom" d="M 246.5 264 L 321 264 L 321 336 L 246.5 336" fill="none" stroke="#5da9e9" stroke-width="5" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="pcb_component_1" data-pcb-silkscreen-path-id="pcb_silkscreen_path_1" data-type="pcb_silkscreen_path" data-pcb-layer="bottom"/><text x="0" y="0" dx="0" dy="0" fill="#5da9e9" font-family="Arial, sans-serif" font-size="20" text-anchor="middle" dominant-baseline="central" transform="matrix(-1,0,0,1,272,239)" class="pcb-silkscreen-text pcb-silkscreen-bottom" data-pcb-silkscreen-text-id="pcb_component_1" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="bottom">C1</text><path class="pcb-board" d="M 150 550 L 650 550 L 650 50 L 150 50 Z" fill="none" stroke="rgba(255, 255, 255, 0.5)" stroke-width="5" data-type="pcb_board" data-pcb-layer="board"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="361" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="412" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="top"/><path class="pcb-trace" stroke="rgb(200, 52, 52)" fill="none" d="M 306.25 393.75 L 306.25 393.75" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="top"/><path class="pcb-trace" stroke="rgb(200, 52, 52)" fill="none" d="M 306.25 393.75 L 306.25 368.25" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="top"/><path class="pcb-trace" stroke="rgb(200, 52, 52)" fill="none" d="M 306.25 368.25 L 374.5 300" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="top"/><path class="pcb-copper-pour pcb-copper-pour-brep" d="M 150 550 L 150 50 L 650 50 L 650 550 L 150 550 Z M 316.0805385563561 370.7938301144085 L 360.87436867076457 326 L 398 326 L 398 274 L 351 274 L 351 311.12563132923543 L 300.0628156646177 362.0628156646177 L 298.97464089235274 363.3887604610785 L 298.16605409052625 364.9015199668055 L 297.6681287964717 366.54295968235886 L 297.5 368.25 L 297.5 370.40515141679646 L 296.6829141908728 370.6530116872178 L 292.36074417450993 372.9632596924364 L 288.5723304703363 376.0723304703363 L 285.4632596924364 379.86074417450993 L 283.1530116872178 384.18291419087274 L 281.7303679899193 388.8727419495968 L 281.25 393.75 L 281.7303679899193 398.6272580504032 L 283.1530116872178 403.3170858091272 L 285.46325969243634 407.63925582549007 L 288.5723304703363 411.4276695296637 L 292.36074417450993 414.5367403075636 L 296.68291419087274 416.8469883127822 L 301.3727419495968 418.2696320100807 L 306.25 418.75 L 311.1272580504032 418.2696320100807 L 315.81708580912726 416.8469883127822 L 320.13925582549007 414.53674030756366 L 323.9276695296637 411.4276695296637 L 327.0367403075636 407.63925582549007 L 329.3469883127822 403.31708580912726 L 330.7696320100807 398.6272580504032 L 331.25 393.75 L 330.7696320100807 388.8727419495968 L 329.3469883127822 384.1829141908728 L 327.0367403075636 379.86074417450993 L 323.9276695296637 376.0723304703363 L 320.13925582549007 372.9632596924364 L 316.0805385563561 370.7938301144085 Z" fill="rgb(200, 52, 52)" fill-rule="evenodd" fill-opacity="0.5" data-type="pcb_copper_pour" data-pcb-layer="top"/><path class="pcb-silkscreen pcb-silkscreen-top" d="M 425.5 264 L 351 264 L 351 336 L 425.5 336" fill="none" stroke="#f2eda1" stroke-width="5" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="pcb_component_0" data-pcb-silkscreen-path-id="pcb_silkscreen_path_0" data-type="pcb_silkscreen_path" data-pcb-layer="top"/><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="20" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,400,239)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="pcb_component_0" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">R1</text><g data-type="pcb_via" data-pcb-layer="through"><circle class="pcb-hole-outer" fill="rgb(200, 52, 52)" cx="306.25" cy="393.75" r="15" data-type="pcb_via" data-pcb-layer="top"/><circle class="pcb-hole-inner" fill="#FF26E2" cx="306.25" cy="393.75" r="7.5" data-type="pcb_via" data-pcb-layer="drill"/></g></svg>

package/tests/assets/via.json

@@ -0,0 +1,716 @@
+[
+  {
+    "type": "source_project_metadata",
+    "source_project_metadata_id": "source_project_metadata_0",
+    "software_used_string": "@tscircuit/core@0.0.849"
+  },
+  {
+    "type": "source_group",
+    "source_group_id": "source_group_0",
+    "is_subcircuit": true,
+    "was_automatically_named": true,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "source_net",
+    "source_net_id": "source_net_0",
+    "name": "GND",
+    "member_source_group_ids": [],
+    "is_ground": true,
+    "is_power": false,
+    "is_positive_voltage_source": false,
+    "subcircuit_id": "subcircuit_source_group_0",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net0"
+  },
+  {
+    "type": "source_port",
+    "source_port_id": "source_port_0",
+    "name": "pin1",
+    "pin_number": 1,
+    "port_hints": ["pin1", "anode", "pos", "left", "1"],
+    "source_component_id": "source_component_0",
+    "subcircuit_id": "subcircuit_source_group_0",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net1"
+  },
+  {
+    "type": "source_port",
+    "source_port_id": "source_port_1",
+    "name": "pin2",
+    "pin_number": 2,
+    "port_hints": ["pin2", "cathode", "neg", "right", "2"],
+    "source_component_id": "source_component_0",
+    "subcircuit_id": "subcircuit_source_group_0",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net0"
+  },
+  {
+    "type": "source_component",
+    "source_component_id": "source_component_0",
+    "ftype": "simple_resistor",
+    "name": "R1",
+    "supplier_part_numbers": {
+      "jlcpcb": ["C11702", "C25543", "C2906864"]
+    },
+    "resistance": 1000,
+    "display_resistance": "1kΩ",
+    "are_pins_interchangeable": true,
+    "source_group_id": "source_group_0"
+  },
+  {
+    "type": "source_port",
+    "source_port_id": "source_port_2",
+    "name": "pin1",
+    "pin_number": 1,
+    "port_hints": ["pin1", "pos", "anode", "1"],
+    "source_component_id": "source_component_1",
+    "subcircuit_id": "subcircuit_source_group_0",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net1"
+  },
+  {
+    "type": "source_port",
+    "source_port_id": "source_port_3",
+    "name": "pin2",
+    "pin_number": 2,
+    "port_hints": ["pin2", "neg", "cathode", "2"],
+    "source_component_id": "source_component_1",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "source_component",
+    "source_component_id": "source_component_1",
+    "ftype": "simple_capacitor",
+    "name": "C1",
+    "supplier_part_numbers": {
+      "jlcpcb": ["C1523", "C696907", "C5137470"]
+    },
+    "capacitance": 1e-9,
+    "display_capacitance": "1000pF",
+    "are_pins_interchangeable": true,
+    "source_group_id": "source_group_0"
+  },
+  {
+    "type": "source_net",
+    "source_net_id": "source_net_1",
+    "name": "VCC",
+    "member_source_group_ids": [],
+    "is_ground": false,
+    "is_power": true,
+    "is_positive_voltage_source": true,
+    "subcircuit_id": "subcircuit_source_group_0",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net1"
+  },
+  {
+    "type": "source_board",
+    "source_board_id": "source_board_0",
+    "source_group_id": "source_group_0"
+  },
+  {
+    "type": "source_trace",
+    "source_trace_id": "source_trace_0",
+    "connected_source_port_ids": ["source_port_1"],
+    "connected_source_net_ids": ["source_net_0"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "display_name": ".R1 > .pin2 to net.GND",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net0"
+  },
+  {
+    "type": "source_trace",
+    "source_trace_id": "source_trace_1",
+    "connected_source_port_ids": ["source_port_0"],
+    "connected_source_net_ids": ["source_net_1"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "display_name": ".R1 > .pin1 to net.VCC",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net1"
+  },
+  {
+    "type": "source_trace",
+    "source_trace_id": "source_trace_2",
+    "connected_source_port_ids": ["source_port_2"],
+    "connected_source_net_ids": ["source_net_1"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "max_length": null,
+    "display_name": ".C1 > .pin1 to net.VCC",
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net1"
+  },
+  {
+    "type": "source_pin_missing_trace_warning",
+    "source_pin_missing_trace_warning_id": "source_pin_missing_trace_warning_0",
+    "message": "Port pin2 on C1 is missing a trace",
+    "source_component_id": "source_component_1",
+    "source_port_id": "source_port_3",
+    "subcircuit_id": "subcircuit_source_group_0",
+    "warning_type": "source_pin_missing_trace_warning"
+  },
+  {
+    "type": "schematic_component",
+    "schematic_component_id": "schematic_component_0",
+    "center": {
+      "x": 0,
+      "y": 0
+    },
+    "size": {
+      "width": 1.1,
+      "height": 0.388910699999999
+    },
+    "source_component_id": "source_component_0",
+    "is_box_with_pins": true,
+    "symbol_name": "boxresistor_right",
+    "symbol_display_value": "1kΩ",
+    "schematic_group_id": "schematic_group_0"
+  },
+  {
+    "type": "schematic_component",
+    "schematic_component_id": "schematic_component_1",
+    "center": {
+      "x": 0,
+      "y": -1.8144553499999994
+    },
+    "size": {
+      "width": 1.1,
+      "height": 0.84
+    },
+    "source_component_id": "source_component_1",
+    "is_box_with_pins": true,
+    "symbol_name": "capacitor_right",
+    "symbol_display_value": "1000pF",
+    "schematic_group_id": "schematic_group_0"
+  },
+  {
+    "type": "schematic_group",
+    "schematic_group_id": "schematic_group_0",
+    "is_subcircuit": true,
+    "subcircuit_id": "subcircuit_source_group_0",
+    "name": "unnamed_board1",
+    "center": {
+      "x": 0,
+      "y": 0
+    },
+    "width": 0,
+    "height": 0,
+    "schematic_component_ids": [],
+    "source_group_id": "source_group_0"
+  },
+  {
+    "type": "schematic_port",
+    "schematic_port_id": "schematic_port_0",
+    "schematic_component_id": "schematic_component_0",
+    "center": {
+      "x": -0.55,
+      "y": 0
+    },
+    "source_port_id": "source_port_0",
+    "facing_direction": "left",
+    "distance_from_component_edge": 0.4,
+    "pin_number": 1,
+    "display_pin_label": "anode",
+    "is_connected": true
+  },
+  {
+    "type": "schematic_port",
+    "schematic_port_id": "schematic_port_1",
+    "schematic_component_id": "schematic_component_0",
+    "center": {
+      "x": 0.55,
+      "y": 0
+    },
+    "source_port_id": "source_port_1",
+    "facing_direction": "right",
+    "distance_from_component_edge": 0.4,
+    "pin_number": 2,
+    "display_pin_label": "cathode",
+    "is_connected": false
+  },
+  {
+    "type": "schematic_port",
+    "schematic_port_id": "schematic_port_2",
+    "schematic_component_id": "schematic_component_1",
+    "center": {
+      "x": -0.55,
+      "y": -1.8144553499999994
+    },
+    "source_port_id": "source_port_2",
+    "facing_direction": "left",
+    "distance_from_component_edge": 0.4,
+    "pin_number": 1,
+    "display_pin_label": "pos",
+    "is_connected": true
+  },
+  {
+    "type": "schematic_port",
+    "schematic_port_id": "schematic_port_3",
+    "schematic_component_id": "schematic_component_1",
+    "center": {
+      "x": 0.55,
+      "y": -1.8144553499999994
+    },
+    "source_port_id": "source_port_3",
+    "facing_direction": "right",
+    "distance_from_component_edge": 0.4,
+    "pin_number": 2,
+    "display_pin_label": "neg",
+    "is_connected": false
+  },
+  {
+    "type": "schematic_trace",
+    "schematic_trace_id": "schematic_trace_0",
+    "source_trace_id": "solver_R1.1-C1.1",
+    "edges": [
+      {
+        "from": {
+          "x": -0.55,
+          "y": 0
+        },
+        "to": {
+          "x": -0.75,
+          "y": 0
+        }
+      },
+      {
+        "from": {
+          "x": -0.75,
+          "y": 0
+        },
+        "to": {
+          "x": -0.75,
+          "y": -1.8144553499999994
+        }
+      },
+      {
+        "from": {
+          "x": -0.75,
+          "y": -1.8144553499999994
+        },
+        "to": {
+          "x": -0.55,
+          "y": -1.8144553499999994
+        }
+      }
+    ],
+    "junctions": [],
+    "subcircuit_connectivity_map_key": "unnamedsubcircuit410_connectivity_net1"
+  },
+  {
+    "type": "schematic_net_label",
+    "schematic_net_label_id": "schematic_net_label_0",
+    "text": "VCC",
+    "anchor_position": {
+      "x": -0.75,
+      "y": 0
+    },
+    "center": {
+      "x": -0.75,
+      "y": 0.09
+    },
+    "anchor_side": "bottom",
+    "source_net_id": "source_net_1",
+    "symbol_name": "rail_up"
+  },
+  {
+    "type": "schematic_net_label",
+    "schematic_net_label_id": "schematic_net_label_1",
+    "text": "GND",
+    "anchor_position": {
+      "x": 0.55,
+      "y": 0
+    },
+    "center": {
+      "x": 0.7000000000000001,
+      "y": 0
+    },
+    "anchor_side": "left",
+    "source_net_id": "source_net_0"
+  },
+  {
+    "type": "pcb_component",
+    "pcb_component_id": "pcb_component_0",
+    "center": {
+      "x": 0,
+      "y": 0
+    },
+    "width": 1.56,
+    "height": 0.64,
+    "layer": "top",
+    "rotation": 0,
+    "source_component_id": "source_component_0",
+    "subcircuit_id": "subcircuit_source_group_0",
+    "do_not_place": false,
+    "obstructs_within_bounds": true
+  },
+  {
+    "type": "pcb_component",
+    "pcb_component_id": "pcb_component_1",
+    "center": {
+      "x": -2.5600000000000005,
+      "y": 0
+    },
+    "width": 1.56,
+    "height": 0.64,
+    "layer": "bottom",
+    "rotation": 0,
+    "source_component_id": "source_component_1",
+    "subcircuit_id": "subcircuit_source_group_0",
+    "do_not_place": false,
+    "obstructs_within_bounds": true
+  },
+  {
+    "type": "pcb_board",
+    "pcb_board_id": "pcb_board_0",
+    "center": {
+      "x": 0,
+      "y": 0
+    },
+    "thickness": 1.4,
+    "num_layers": 2,
+    "width": 10,
+    "height": 10,
+    "material": "fr4"
+  },
+  {
+    "type": "pcb_smtpad",
+    "pcb_smtpad_id": "pcb_smtpad_0",
+    "pcb_component_id": "pcb_component_0",
+    "pcb_port_id": "pcb_port_0",
+    "layer": "top",
+    "shape": "rect",
+    "width": 0.54,
+    "height": 0.64,
+    "port_hints": ["1", "left"],
+    "is_covered_with_solder_mask": false,
+    "x": -0.51,
+    "y": 0,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_solder_paste",
+    "pcb_solder_paste_id": "pcb_solder_paste_0",
+    "layer": "top",
+    "shape": "rect",
+    "width": 0.378,
+    "height": 0.44799999999999995,
+    "x": -0.51,
+    "y": 0,
+    "pcb_component_id": "pcb_component_0",
+    "pcb_smtpad_id": "pcb_smtpad_0",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_smtpad",
+    "pcb_smtpad_id": "pcb_smtpad_1",
+    "pcb_component_id": "pcb_component_0",
+    "pcb_port_id": "pcb_port_1",
+    "layer": "top",
+    "shape": "rect",
+    "width": 0.54,
+    "height": 0.64,
+    "port_hints": ["2", "right"],
+    "is_covered_with_solder_mask": false,
+    "x": 0.51,
+    "y": 0,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_solder_paste",
+    "pcb_solder_paste_id": "pcb_solder_paste_1",
+    "layer": "top",
+    "shape": "rect",
+    "width": 0.378,
+    "height": 0.44799999999999995,
+    "x": 0.51,
+    "y": 0,
+    "pcb_component_id": "pcb_component_0",
+    "pcb_smtpad_id": "pcb_smtpad_1",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_silkscreen_path",
+    "pcb_silkscreen_path_id": "pcb_silkscreen_path_0",
+    "pcb_component_id": "pcb_component_0",
+    "layer": "top",
+    "route": [
+      {
+        "x": 0.51,
+        "y": 0.72
+      },
+      {
+        "x": -0.98,
+        "y": 0.72
+      },
+      {
+        "x": -0.98,
+        "y": -0.72
+      },
+      {
+        "x": 0.51,
+        "y": -0.72
+      }
+    ],
+    "stroke_width": 0.1,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_silkscreen_text",
+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_0",
+    "anchor_alignment": "center",
+    "anchor_position": {
+      "x": 0,
+      "y": 1.22
+    },
+    "font": "tscircuit2024",
+    "font_size": 0.4,
+    "layer": "top",
+    "text": "R1",
+    "ccw_rotation": 0,
+    "pcb_component_id": "pcb_component_0",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_smtpad",
+    "pcb_smtpad_id": "pcb_smtpad_2",
+    "pcb_component_id": "pcb_component_1",
+    "pcb_port_id": "pcb_port_2",
+    "layer": "bottom",
+    "shape": "rect",
+    "width": 0.54,
+    "height": 0.64,
+    "port_hints": ["1", "left"],
+    "is_covered_with_solder_mask": false,
+    "x": -2.0500000000000007,
+    "y": 0,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_solder_paste",
+    "pcb_solder_paste_id": "pcb_solder_paste_2",
+    "layer": "bottom",
+    "shape": "rect",
+    "width": 0.378,
+    "height": 0.44799999999999995,
+    "x": 0.51,
+    "y": 0,
+    "pcb_component_id": "pcb_component_1",
+    "pcb_smtpad_id": "pcb_smtpad_2",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_smtpad",
+    "pcb_smtpad_id": "pcb_smtpad_3",
+    "pcb_component_id": "pcb_component_1",
+    "pcb_port_id": "pcb_port_3",
+    "layer": "bottom",
+    "shape": "rect",
+    "width": 0.54,
+    "height": 0.64,
+    "port_hints": ["2", "right"],
+    "is_covered_with_solder_mask": false,
+    "x": -3.0700000000000003,
+    "y": 0,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_solder_paste",
+    "pcb_solder_paste_id": "pcb_solder_paste_3",
+    "layer": "bottom",
+    "shape": "rect",
+    "width": 0.378,
+    "height": 0.44799999999999995,
+    "x": -0.51,
+    "y": 0,
+    "pcb_component_id": "pcb_component_1",
+    "pcb_smtpad_id": "pcb_smtpad_3",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_silkscreen_path",
+    "pcb_silkscreen_path_id": "pcb_silkscreen_path_1",
+    "pcb_component_id": "pcb_component_1",
+    "layer": "bottom",
+    "route": [
+      {
+        "x": -3.0700000000000003,
+        "y": 0.72
+      },
+      {
+        "x": -1.5800000000000005,
+        "y": 0.72
+      },
+      {
+        "x": -1.5800000000000005,
+        "y": -0.72
+      },
+      {
+        "x": -3.0700000000000003,
+        "y": -0.72
+      }
+    ],
+    "stroke_width": 0.1,
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_silkscreen_text",
+    "pcb_silkscreen_text_id": "pcb_silkscreen_text_1",
+    "anchor_alignment": "center",
+    "anchor_position": {
+      "x": -2.5600000000000005,
+      "y": 1.22
+    },
+    "font": "tscircuit2024",
+    "font_size": 0.4,
+    "layer": "bottom",
+    "text": "C1",
+    "ccw_rotation": 0,
+    "pcb_component_id": "pcb_component_1",
+    "subcircuit_id": "subcircuit_source_group_0"
+  },
+  {
+    "type": "pcb_port",
+    "pcb_port_id": "pcb_port_0",
+    "pcb_component_id": "pcb_component_0",
+    "layers": ["top"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "x": -0.51,
+    "y": 0,
+    "source_port_id": "source_port_0"
+  },
+  {
+    "type": "pcb_port",
+    "pcb_port_id": "pcb_port_1",
+    "pcb_component_id": "pcb_component_0",
+    "layers": ["top"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "x": 0.51,
+    "y": 0,
+    "source_port_id": "source_port_1"
+  },
+  {
+    "type": "pcb_port",
+    "pcb_port_id": "pcb_port_2",
+    "pcb_component_id": "pcb_component_1",
+    "layers": ["bottom"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "x": -2.0500000000000007,
+    "y": 0,
+    "source_port_id": "source_port_2"
+  },
+  {
+    "type": "pcb_port",
+    "pcb_port_id": "pcb_port_3",
+    "pcb_component_id": "pcb_component_1",
+    "layers": ["bottom"],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "x": -3.0700000000000003,
+    "y": 0,
+    "source_port_id": "source_port_3"
+  },
+  {
+    "type": "cad_component",
+    "cad_component_id": "cad_component_0",
+    "position": {
+      "x": 0,
+      "y": 0,
+      "z": 0.7
+    },
+    "rotation": {
+      "x": 0,
+      "y": 0,
+      "z": 0
+    },
+    "pcb_component_id": "pcb_component_0",
+    "source_component_id": "source_component_0",
+    "footprinter_string": "0402"
+  },
+  {
+    "type": "cad_component",
+    "cad_component_id": "cad_component_1",
+    "position": {
+      "x": -2.5600000000000005,
+      "y": 0,
+      "z": -0.7
+    },
+    "rotation": {
+      "x": 0,
+      "y": 180,
+      "z": 0
+    },
+    "pcb_component_id": "pcb_component_1",
+    "source_component_id": "source_component_1",
+    "footprinter_string": "0402"
+  },
+  {
+    "type": "pcb_trace",
+    "pcb_trace_id": "source_net_1_0",
+    "connection_name": "source_net_1",
+    "route": [
+      {
+        "route_type": "wire",
+        "x": -2.0500000000000007,
+        "y": 0,
+        "width": 0.15,
+        "layer": "bottom",
+        "start_pcb_port_id": "pcb_port_2"
+      },
+      {
+        "route_type": "wire",
+        "x": -2.0500000000000007,
+        "y": -1.5902468232417593,
+        "width": 0.15,
+        "layer": "bottom"
+      },
+      {
+        "route_type": "wire",
+        "x": -1.93709155044519,
+        "y": -1.70315527279657,
+        "width": 0.15,
+        "layer": "bottom"
+      },
+      {
+        "route_type": "wire",
+        "x": -1.875,
+        "y": -1.875,
+        "width": 0.15,
+        "layer": "bottom"
+      },
+      {
+        "route_type": "via",
+        "x": -1.875,
+        "y": -1.875,
+        "from_layer": "bottom",
+        "to_layer": "top"
+      },
+      {
+        "route_type": "wire",
+        "x": -1.875,
+        "y": -1.875,
+        "width": 0.15,
+        "layer": "top"
+      },
+      {
+        "route_type": "wire",
+        "x": -1.875,
+        "y": -1.365,
+        "width": 0.15,
+        "layer": "top"
+      },
+      {
+        "route_type": "wire",
+        "x": -0.51,
+        "y": 0,
+        "width": 0.15,
+        "layer": "top",
+        "end_pcb_port_id": "pcb_port_0"
+      }
+    ],
+    "subcircuit_id": "subcircuit_source_group_0",
+    "source_trace_id": "source_net_1"
+  },
+  {
+    "type": "pcb_via",
+    "pcb_via_id": "pcb_via_0",
+    "pcb_trace_id": "source_net_1_0",
+    "x": -1.875,
+    "y": -1.875,
+    "hole_diameter": 0.3,
+    "outer_diameter": 0.6,
+    "layers": ["bottom", "top"],
+    "from_layer": "bottom",
+    "to_layer": "top"
+  }
+]

package/tests/via.test.ts

@@ -0,0 +1,15 @@
+import { expect, test } from "bun:test"
+import circuitJson from "./assets/via.json"
+import { runSolverAndRenderToSvg } from "./utils/run-solver-and-render-to-svg"
+import type { AnyCircuitElement } from "circuit-json"
+
+test("via", async () => {
+  const svg = runSolverAndRenderToSvg(circuitJson as AnyCircuitElement[], {
+    layer: "top",
+    net_name: "GND",
+    pad_margin: 0.2,
+    trace_margin: 0.1,
+  })
+
+  await expect(svg).toMatchSvgSnapshot(import.meta.path, "via")
+})