@tscircuit/copper-pour-solver 0.0.12 → 0.0.13
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/.github/workflows/bun-test.yml +1 -1
- package/dist/index.js +3 -0
- package/lib/solvers/copper-pour/get-board-polygon.ts +4 -0
- package/package.json +1 -1
- package/tests/__snapshots__/polygon-board-2.snap.svg +1 -0
- package/tests/assets/polygon-board-2.json +1422 -0
- package/tests/polygon-board-2.test.ts +16 -0
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[
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{
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"type": "source_project_metadata",
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"source_project_metadata_id": "source_project_metadata_0",
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"software_used_string": "@tscircuit/core@0.0.852"
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},
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{
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"type": "source_group",
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"source_group_id": "source_group_0",
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"is_subcircuit": true,
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"was_automatically_named": true,
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_0",
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"name": "pin1",
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"pin_number": 1,
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"port_hints": ["pin1", "1"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_1",
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"name": "pin2",
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"pin_number": 2,
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"port_hints": ["pin2", "2"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_2",
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"name": "pin3",
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"pin_number": 3,
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"port_hints": ["pin3", "3"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_3",
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"name": "pin4",
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"pin_number": 4,
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"port_hints": ["pin4", "4"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_4",
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"name": "pin5",
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"pin_number": 5,
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"port_hints": ["pin5", "5"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_5",
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"name": "pin6",
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"pin_number": 6,
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"port_hints": ["pin6", "6"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_6",
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"name": "pin7",
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"pin_number": 7,
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"port_hints": ["pin7", "7"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_7",
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"name": "pin8",
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"pin_number": 8,
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"port_hints": ["pin8", "8"],
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"source_component_id": "source_component_0",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_component",
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"source_component_id": "source_component_0",
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"ftype": "simple_chip",
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"name": "U1",
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"source_group_id": "source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_8",
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"name": "pin1",
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"pin_number": 1,
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"port_hints": ["pin1", "anode", "pos", "left", "1"],
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"source_component_id": "source_component_1",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_9",
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"name": "pin2",
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"pin_number": 2,
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"port_hints": ["pin2", "cathode", "neg", "right", "2"],
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"source_component_id": "source_component_1",
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"subcircuit_id": "subcircuit_source_group_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_component",
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"source_component_id": "source_component_1",
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"ftype": "simple_resistor",
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"name": "R1",
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"resistance": 10000,
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"display_resistance": "10kΩ",
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"are_pins_interchangeable": true,
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"source_group_id": "source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_10",
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"name": "pin1",
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"pin_number": 1,
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"port_hints": ["pin1", "pos", "anode", "1"],
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"source_component_id": "source_component_2",
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"subcircuit_id": "subcircuit_source_group_0"
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},
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{
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"type": "source_port",
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"source_port_id": "source_port_11",
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"name": "pin2",
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"pin_number": 2,
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"port_hints": ["pin2", "neg", "cathode", "2"],
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"source_component_id": "source_component_2",
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"subcircuit_id": "subcircuit_source_group_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_component",
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"source_component_id": "source_component_2",
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"ftype": "simple_capacitor",
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"name": "C1",
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"capacitance": 1e-7,
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"display_capacitance": "100nF",
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"are_pins_interchangeable": true,
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"source_group_id": "source_group_0"
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},
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{
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"type": "source_net",
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"source_net_id": "source_net_0",
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"name": "GND",
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"member_source_group_ids": [],
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"is_ground": true,
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"is_power": false,
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"is_positive_voltage_source": false,
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"subcircuit_id": "subcircuit_source_group_0",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_board",
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"source_board_id": "source_board_0",
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"source_group_id": "source_group_0"
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},
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{
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"type": "source_trace",
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"source_trace_id": "source_trace_0",
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"connected_source_port_ids": ["source_port_9"],
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"connected_source_net_ids": ["source_net_0"],
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"subcircuit_id": "subcircuit_source_group_0",
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"display_name": ".R1 > .pin2 to net.GND",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_trace",
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"source_trace_id": "source_trace_1",
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"connected_source_port_ids": ["source_port_11"],
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"connected_source_net_ids": ["source_net_0"],
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"subcircuit_id": "subcircuit_source_group_0",
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"max_length": null,
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"display_name": ".C1 > .pin2 to net.GND",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_trace",
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"source_trace_id": "source_trace_2",
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"connected_source_port_ids": ["source_port_3"],
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"connected_source_net_ids": ["source_net_0"],
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"subcircuit_id": "subcircuit_source_group_0",
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"display_name": ".U1 > .pin4 to net.GND",
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"subcircuit_connectivity_map_key": "unnamedsubcircuit1142_connectivity_net0"
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},
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{
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"type": "source_pin_missing_trace_warning",
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"source_pin_missing_trace_warning_id": "source_pin_missing_trace_warning_0",
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"message": "Port pin1 on R1 is missing a trace",
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"source_component_id": "source_component_1",
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"source_port_id": "source_port_8",
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"subcircuit_id": "subcircuit_source_group_0",
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"warning_type": "source_pin_missing_trace_warning"
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},
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{
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"type": "source_pin_missing_trace_warning",
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"source_pin_missing_trace_warning_id": "source_pin_missing_trace_warning_1",
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"message": "Port pin1 on C1 is missing a trace",
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"source_component_id": "source_component_2",
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"source_port_id": "source_port_10",
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"subcircuit_id": "subcircuit_source_group_0",
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"warning_type": "source_pin_missing_trace_warning"
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},
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{
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"type": "schematic_component",
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"schematic_component_id": "schematic_component_0",
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"center": {
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"x": 0,
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"y": 0
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},
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"rotation": 0,
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"size": {
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"width": 0.4,
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"height": 1
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},
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"pin_spacing": 0.2,
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"port_labels": {},
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"source_component_id": "source_component_0",
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"schematic_group_id": "schematic_group_0"
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},
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{
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"type": "schematic_text",
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"schematic_text_id": "schematic_text_0",
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"text": "",
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"schematic_component_id": "schematic_component_0",
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"anchor": "left",
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"rotation": 0,
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"position": {
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"x": -0.2,
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"y": -0.63
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},
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"color": "#006464",
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"font_size": 0.18
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},
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{
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"type": "schematic_text",
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"schematic_text_id": "schematic_text_1",
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"text": "U1",
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"schematic_component_id": "schematic_component_0",
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"anchor": "left",
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"rotation": 0,
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"position": {
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"x": -0.2,
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"y": 0.63
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},
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"color": "#006464",
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"font_size": 0.18
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},
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{
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"type": "schematic_component",
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"schematic_component_id": "schematic_component_1",
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"center": {
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"x": -2.36,
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"y": -0.2999999999999998
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},
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"size": {
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"width": 1.1,
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"height": 0.388910699999999
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},
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"source_component_id": "source_component_1",
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"is_box_with_pins": true,
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"symbol_name": "boxresistor_right",
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"symbol_display_value": "10kΩ",
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"schematic_group_id": "schematic_group_0"
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},
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{
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"type": "schematic_component",
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"schematic_component_id": "schematic_component_2",
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"center": {
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"x": -2.36,
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"y": 1.5144553499999995
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},
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"size": {
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"width": 1.1,
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"height": 0.84
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},
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"source_component_id": "source_component_2",
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"is_box_with_pins": true,
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"symbol_name": "capacitor_right",
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"symbol_display_value": "100nF",
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"schematic_group_id": "schematic_group_0"
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},
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{
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"type": "schematic_group",
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"schematic_group_id": "schematic_group_0",
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"is_subcircuit": true,
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"subcircuit_id": "subcircuit_source_group_0",
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"name": "unnamed_board1",
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"center": {
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"x": 0,
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"y": 0
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},
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1220
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1221
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1228
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1229
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1230
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1231
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1232
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1233
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1235
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1236
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1238
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1239
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1240
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1241
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1242
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1243
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1244
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1245
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1246
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1247
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1248
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1249
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1250
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1251
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1252
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1253
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1254
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1255
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1256
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1257
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1258
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1259
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"pcb_port_id": "pcb_port_8",
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|
1260
|
+
"pcb_component_id": "pcb_component_1",
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|
1261
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+
"layers": ["top"],
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1262
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"subcircuit_id": "subcircuit_source_group_0",
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|
1263
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"x": 5.49,
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|
1264
|
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"y": 0,
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|
1265
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"source_port_id": "source_port_8"
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|
1266
|
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},
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|
1267
|
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{
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|
1268
|
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"type": "pcb_port",
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|
1269
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|
1270
|
+
"pcb_component_id": "pcb_component_1",
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|
1271
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"layers": ["top"],
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1272
|
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"subcircuit_id": "subcircuit_source_group_0",
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|
1273
|
+
"x": 6.51,
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|
1274
|
+
"y": 0,
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|
1275
|
+
"source_port_id": "source_port_9"
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|
1276
|
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},
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|
1277
|
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{
|
|
1278
|
+
"type": "pcb_port",
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|
1279
|
+
"pcb_port_id": "pcb_port_10",
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|
1280
|
+
"pcb_component_id": "pcb_component_2",
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|
1281
|
+
"layers": ["top"],
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1282
|
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"subcircuit_id": "subcircuit_source_group_0",
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|
1283
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"x": 5.49,
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1284
|
+
"y": -4,
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|
1285
|
+
"source_port_id": "source_port_10"
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|
1286
|
+
},
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|
1287
|
+
{
|
|
1288
|
+
"type": "pcb_port",
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|
1289
|
+
"pcb_port_id": "pcb_port_11",
|
|
1290
|
+
"pcb_component_id": "pcb_component_2",
|
|
1291
|
+
"layers": ["top"],
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|
1292
|
+
"subcircuit_id": "subcircuit_source_group_0",
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|
1293
|
+
"x": 6.51,
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|
1294
|
+
"y": -4,
|
|
1295
|
+
"source_port_id": "source_port_11"
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|
1296
|
+
},
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|
1297
|
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{
|
|
1298
|
+
"type": "cad_component",
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|
1299
|
+
"cad_component_id": "cad_component_0",
|
|
1300
|
+
"position": {
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|
1301
|
+
"x": -6,
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|
1302
|
+
"y": 0,
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|
1303
|
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"z": 0.7
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|
1304
|
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},
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|
1305
|
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"rotation": {
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|
1306
|
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"x": 0,
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|
1307
|
+
"y": 0,
|
|
1308
|
+
"z": 0
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|
1309
|
+
},
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|
1310
|
+
"pcb_component_id": "pcb_component_0",
|
|
1311
|
+
"source_component_id": "source_component_0",
|
|
1312
|
+
"footprinter_string": "soic8"
|
|
1313
|
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},
|
|
1314
|
+
{
|
|
1315
|
+
"type": "cad_component",
|
|
1316
|
+
"cad_component_id": "cad_component_1",
|
|
1317
|
+
"position": {
|
|
1318
|
+
"x": 6,
|
|
1319
|
+
"y": 0,
|
|
1320
|
+
"z": 0.7
|
|
1321
|
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},
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|
1322
|
+
"rotation": {
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|
1323
|
+
"x": 0,
|
|
1324
|
+
"y": 0,
|
|
1325
|
+
"z": 0
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|
1326
|
+
},
|
|
1327
|
+
"pcb_component_id": "pcb_component_1",
|
|
1328
|
+
"source_component_id": "source_component_1",
|
|
1329
|
+
"footprinter_string": "0402"
|
|
1330
|
+
},
|
|
1331
|
+
{
|
|
1332
|
+
"type": "cad_component",
|
|
1333
|
+
"cad_component_id": "cad_component_2",
|
|
1334
|
+
"position": {
|
|
1335
|
+
"x": 6,
|
|
1336
|
+
"y": -4,
|
|
1337
|
+
"z": 0.7
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|
1338
|
+
},
|
|
1339
|
+
"rotation": {
|
|
1340
|
+
"x": 0,
|
|
1341
|
+
"y": 0,
|
|
1342
|
+
"z": 0
|
|
1343
|
+
},
|
|
1344
|
+
"pcb_component_id": "pcb_component_2",
|
|
1345
|
+
"source_component_id": "source_component_2",
|
|
1346
|
+
"footprinter_string": "0402"
|
|
1347
|
+
},
|
|
1348
|
+
{
|
|
1349
|
+
"type": "pcb_trace",
|
|
1350
|
+
"pcb_trace_id": "source_net_0_mst0_0",
|
|
1351
|
+
"connection_name": "source_net_0",
|
|
1352
|
+
"route": [
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|
1353
|
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{
|
|
1354
|
+
"route_type": "wire",
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|
1355
|
+
"x": 6.51,
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|
1356
|
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"y": -4,
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|
1357
|
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"width": 0.15,
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|
1358
|
+
"layer": "top"
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|
1359
|
+
},
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|
1360
|
+
{
|
|
1361
|
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"route_type": "wire",
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|
1362
|
+
"x": 6.51,
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|
1363
|
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"y": 0,
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|
1364
|
+
"width": 0.15,
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|
1365
|
+
"layer": "top"
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|
1366
|
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},
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|
1367
|
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{
|
|
1368
|
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"route_type": "wire",
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|
1369
|
+
"x": 6.51,
|
|
1370
|
+
"y": 0,
|
|
1371
|
+
"width": 0.15,
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|
1372
|
+
"layer": "top"
|
|
1373
|
+
}
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|
1374
|
+
],
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|
1375
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
1376
|
+
"source_trace_id": "source_net_0"
|
|
1377
|
+
},
|
|
1378
|
+
{
|
|
1379
|
+
"type": "pcb_trace",
|
|
1380
|
+
"pcb_trace_id": "source_net_0_mst1_0",
|
|
1381
|
+
"connection_name": "source_net_0",
|
|
1382
|
+
"route": [
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|
1383
|
+
{
|
|
1384
|
+
"route_type": "wire",
|
|
1385
|
+
"x": 6.51,
|
|
1386
|
+
"y": 0,
|
|
1387
|
+
"width": 0.15,
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|
1388
|
+
"layer": "top"
|
|
1389
|
+
},
|
|
1390
|
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{
|
|
1391
|
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"route_type": "wire",
|
|
1392
|
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"x": 5.118061402203329,
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|
1393
|
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"y": -1.3919385977966703,
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|
1394
|
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"width": 0.15,
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|
1395
|
+
"layer": "top"
|
|
1396
|
+
},
|
|
1397
|
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{
|
|
1398
|
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"route_type": "wire",
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|
1399
|
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"x": -7.612819041180339,
|
|
1400
|
+
"y": -1.3919385977966703,
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|
1401
|
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"width": 0.15,
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|
1402
|
+
"layer": "top"
|
|
1403
|
+
},
|
|
1404
|
+
{
|
|
1405
|
+
"route_type": "wire",
|
|
1406
|
+
"x": -7.636938597796671,
|
|
1407
|
+
"y": -1.3919385977966703,
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|
1408
|
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"width": 0.15,
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|
1409
|
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"layer": "top"
|
|
1410
|
+
},
|
|
1411
|
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{
|
|
1412
|
+
"route_type": "wire",
|
|
1413
|
+
"x": -8.15,
|
|
1414
|
+
"y": -1.905,
|
|
1415
|
+
"width": 0.15,
|
|
1416
|
+
"layer": "top"
|
|
1417
|
+
}
|
|
1418
|
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],
|
|
1419
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
1420
|
+
"source_trace_id": "source_net_0"
|
|
1421
|
+
}
|
|
1422
|
+
]
|