@tscircuit/copper-pour-solver 0.0.10 → 0.0.12
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/index.d.ts +8 -2
- package/dist/index.js +99 -9
- package/lib/circuit-json/convert-circuit-json-to-input-problem.ts +37 -0
- package/lib/solvers/CopperPourPipelineSolver.ts +1 -0
- package/lib/solvers/copper-pour/process-obstacles.ts +83 -7
- package/lib/types.ts +11 -1
- package/package.json +1 -1
- package/tests/__snapshots__/hole-and-cutouts.snap.svg +1 -0
- package/tests/assets/hole-and-cutouts.json +772 -0
- package/tests/hole-and-cutouts.test.ts +16 -0
- package/tests/utils/run-solver-and-render-to-svg.ts +1 -0
package/dist/index.d.ts
CHANGED
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@@ -11,6 +11,7 @@ interface InputPourRegion {
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padMargin: number;
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traceMargin: number;
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board_edge_margin?: number;
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cutout_margin?: number;
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}
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interface BaseInputPad {
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padId: string;
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@@ -32,7 +33,11 @@ interface InputTracePad extends BaseInputPad {
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width: number;
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segments: Point[];
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}
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-
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interface InputPolygonPad extends BaseInputPad {
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shape: "polygon";
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points: Point[];
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}
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type InputPad = InputRectPad | InputCircularPad | InputTracePad | InputPolygonPad;
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interface InputProblem {
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regionsForPour: InputPourRegion[];
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pads: InputPad[];
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@@ -54,6 +59,7 @@ declare const convertCircuitJsonToInputProblem: (circuitJson: AnyCircuitElement[
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pad_margin: number;
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trace_margin: number;
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board_edge_margin?: number;
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cutout_margin?: number;
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}) => InputProblem;
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-
export { type BaseInputPad, CopperPourPipelineSolver, type InputCircularPad, type InputPad, type InputPourRegion, type InputProblem, type InputRectPad, type InputTracePad, type PipelineOutput, convertCircuitJsonToInputProblem };
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export { type BaseInputPad, CopperPourPipelineSolver, type InputCircularPad, type InputPad, type InputPolygonPad, type InputPourRegion, type InputProblem, type InputRectPad, type InputTracePad, type PipelineOutput, convertCircuitJsonToInputProblem };
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package/dist/index.js
CHANGED
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@@ -57,9 +57,10 @@ var circleToPolygon = (circle, numSegments = 32) => {
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var isRectPad = (pad) => pad.shape === "rect";
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var isTracePad = (pad) => pad.shape === "trace";
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var isCircularPad = (pad) => pad.shape === "circle";
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var isPolygonPad = (pad) => pad.shape === "polygon";
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var processObstaclesForPour = (pads, pourConnectivityKey, margins, boardOutline) => {
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const polygonsToSubtract = [];
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-
const { padMargin, traceMargin, board_edge_margin } = margins;
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const { padMargin, traceMargin, board_edge_margin, cutoutMargin } = margins;
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if (boardOutline && boardOutline.length > 0 && board_edge_margin && board_edge_margin > 0) {
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const boardPoly = new Flatten3.Polygon(
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boardOutline.map((p) => Flatten3.point(p.x, p.y))
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@@ -123,9 +124,9 @@ var processObstaclesForPour = (pads, pourConnectivityKey, margins, boardOutline)
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if (isOnNet) {
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continue;
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}
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const isHoleOrCutout = pad.connectivityKey.startsWith("hole:") || pad.connectivityKey.startsWith("cutout:");
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if (isCircularPad(pad)) {
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const
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const margin = isHole ? 0 : padMargin;
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const margin = isHoleOrCutout ? cutoutMargin ?? 0 : padMargin;
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const circle = new Flatten3.Circle(
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new Flatten3.Point(pad.x, pad.y),
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pad.radius + margin
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@@ -134,16 +135,66 @@ var processObstaclesForPour = (pads, pourConnectivityKey, margins, boardOutline)
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continue;
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}
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if (isRectPad(pad)) {
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const margin = isHoleOrCutout ? cutoutMargin ?? 0 : padMargin;
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const { bounds } = pad;
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const b = new Flatten3.Box(
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bounds.minX -
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bounds.minY -
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bounds.maxX +
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bounds.maxY +
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bounds.minX - margin,
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bounds.minY - margin,
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bounds.maxX + margin,
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bounds.maxY + margin
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);
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polygonsToSubtract.push(new Flatten3.Polygon(b.toPoints()));
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continue;
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}
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if (isPolygonPad(pad)) {
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const margin = isHoleOrCutout ? cutoutMargin ?? 0 : 0;
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const seen = /* @__PURE__ */ new Set();
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const uniquePoints = pad.points.filter((p) => {
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const key = `${p.x},${p.y}`;
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if (seen.has(key)) {
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return false;
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}
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seen.add(key);
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return true;
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});
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if (uniquePoints.length < 3) continue;
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const polygon = new Flatten3.Polygon(
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uniquePoints.map((p) => Flatten3.point(p.x, p.y))
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);
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if (Math.abs(polygon.area()) < 1e-9) continue;
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if (margin <= 0) {
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polygonsToSubtract.push(polygon);
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continue;
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}
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if (polygon.area() > 0) {
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polygon.reverse();
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}
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const offsetLines = [];
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const polygonVertices = polygon.vertices;
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for (let i = 0; i < polygonVertices.length; i++) {
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const p1 = polygonVertices[i];
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const p2 = polygonVertices[(i + 1) % polygonVertices.length];
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const segment = Flatten3.segment(p1, p2);
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if (segment.length === 0) continue;
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const line = Flatten3.line(segment.start, segment.end);
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const norm = line.norm;
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const offsetLine = line.translate(norm.multiply(-margin));
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offsetLines.push(offsetLine);
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}
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const newPolygonPoints = [];
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for (let i = 0; i < offsetLines.length; i++) {
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const line1 = offsetLines[i];
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const line2 = offsetLines[(i + 1) % offsetLines.length];
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const ip = line1.intersect(line2);
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if (ip.length > 0) {
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newPolygonPoints.push(ip[0]);
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}
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}
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if (newPolygonPoints.length >= 3) {
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polygonsToSubtract.push(new Flatten3.Polygon(newPolygonPoints));
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}
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continue;
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}
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if (isTracePad(pad)) {
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for (const segment of pad.segments) {
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const circle = new Flatten3.Circle(
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@@ -254,7 +305,8 @@ var CopperPourPipelineSolver = class extends BasePipelineSolver {
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{
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padMargin: region.padMargin,
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traceMargin: region.traceMargin,
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-
board_edge_margin: region.board_edge_margin
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board_edge_margin: region.board_edge_margin,
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cutoutMargin: region.cutout_margin
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},
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region.outline
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);
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@@ -410,6 +462,43 @@ var convertCircuitJsonToInputProblem = (circuitJson, options) => {
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y: hole.y,
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radius: hole.hole_diameter / 2
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});
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} else if (elm.type === "pcb_cutout") {
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const cutout = elm;
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if (cutout.shape === "rect") {
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pads.push({
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shape: "rect",
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padId: cutout.pcb_cutout_id,
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layer: options.layer,
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// through-all
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connectivityKey: `cutout:${cutout.pcb_cutout_id}`,
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bounds: {
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minX: cutout.center.x - cutout.width / 2,
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minY: cutout.center.y - cutout.height / 2,
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maxX: cutout.center.x + cutout.width / 2,
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maxY: cutout.center.y + cutout.height / 2
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}
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});
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} else if (cutout.shape === "circle") {
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pads.push({
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shape: "circle",
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padId: cutout.pcb_cutout_id,
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layer: options.layer,
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// through-all
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connectivityKey: `cutout:${cutout.pcb_cutout_id}`,
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x: cutout.center.x,
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y: cutout.center.y,
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radius: cutout.radius
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});
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} else if (cutout.shape === "polygon") {
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pads.push({
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shape: "polygon",
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padId: cutout.pcb_cutout_id,
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layer: options.layer,
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// through-all
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connectivityKey: `cutout:${cutout.pcb_cutout_id}`,
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points: cutout.points
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});
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}
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} else if (elm.type === "pcb_via") {
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const via = elm;
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if (!via.layers.includes(options.layer)) continue;
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@@ -478,7 +567,8 @@ var convertCircuitJsonToInputProblem = (circuitJson, options) => {
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connectivityKey: options.pour_connectivity_key,
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padMargin: options.pad_margin,
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traceMargin: options.trace_margin,
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-
board_edge_margin: options.board_edge_margin ?? 0
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board_edge_margin: options.board_edge_margin ?? 0,
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cutout_margin: options.cutout_margin
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}
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];
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return {
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@@ -16,6 +16,7 @@ import type {
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import type {
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InputCircularPad,
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InputPad,
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InputPolygonPad,
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InputProblem,
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InputRectPad,
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InputTracePad,
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@@ -29,6 +30,7 @@ export const convertCircuitJsonToInputProblem = (
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pad_margin: number
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30
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trace_margin: number
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31
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board_edge_margin?: number
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33
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cutout_margin?: number
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},
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35
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): InputProblem => {
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const source_ports = circuitJson.filter(
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@@ -180,6 +182,40 @@ export const convertCircuitJsonToInputProblem = (
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y: hole.y,
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radius: hole.hole_diameter / 2,
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} as InputCircularPad)
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} else if (elm.type === "pcb_cutout") {
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const cutout = elm as any
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if (cutout.shape === "rect") {
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pads.push({
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shape: "rect",
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padId: cutout.pcb_cutout_id,
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layer: options.layer, // through-all
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connectivityKey: `cutout:${cutout.pcb_cutout_id}`,
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bounds: {
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minX: cutout.center.x - cutout.width / 2,
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minY: cutout.center.y - cutout.height / 2,
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maxX: cutout.center.x + cutout.width / 2,
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maxY: cutout.center.y + cutout.height / 2,
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},
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} as InputRectPad)
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} else if (cutout.shape === "circle") {
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pads.push({
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shape: "circle",
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padId: cutout.pcb_cutout_id,
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layer: options.layer, // through-all
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connectivityKey: `cutout:${cutout.pcb_cutout_id}`,
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x: cutout.center.x,
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y: cutout.center.y,
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radius: cutout.radius,
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} as InputCircularPad)
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} else if (cutout.shape === "polygon") {
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pads.push({
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shape: "polygon",
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padId: cutout.pcb_cutout_id,
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layer: options.layer, // through-all
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connectivityKey: `cutout:${cutout.pcb_cutout_id}`,
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points: cutout.points,
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} as InputPolygonPad)
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}
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219
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} else if (elm.type === "pcb_via") {
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const via = elm as PcbVia
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if (!via.layers.includes(options.layer)) continue
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@@ -257,6 +293,7 @@ export const convertCircuitJsonToInputProblem = (
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padMargin: options.pad_margin,
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258
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traceMargin: options.trace_margin,
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board_edge_margin: options.board_edge_margin ?? 0,
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+
cutout_margin: options.cutout_margin,
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},
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]
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@@ -29,6 +29,7 @@ export class CopperPourPipelineSolver extends BasePipelineSolver<InputProblem> {
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29
29
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padMargin: region.padMargin,
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30
30
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traceMargin: region.traceMargin,
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31
31
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board_edge_margin: region.board_edge_margin,
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32
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+
cutoutMargin: region.cutout_margin,
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32
33
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},
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33
34
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region.outline,
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34
35
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)
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@@ -3,6 +3,7 @@ import type { Point } from "@tscircuit/math-utils"
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3
3
|
import type {
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4
4
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InputCircularPad,
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5
5
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InputPad,
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6
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+
InputPolygonPad,
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6
7
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InputRectPad,
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7
8
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InputTracePad,
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8
9
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} from "lib/types"
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@@ -17,6 +18,8 @@ const isTracePad = (pad: InputPad): pad is InputTracePad =>
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17
18
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pad.shape === "trace"
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18
19
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const isCircularPad = (pad: InputPad): pad is InputCircularPad =>
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19
20
|
pad.shape === "circle"
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21
|
+
const isPolygonPad = (pad: InputPad): pad is InputPolygonPad =>
|
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22
|
+
pad.shape === "polygon"
|
|
20
23
|
|
|
21
24
|
export const processObstaclesForPour = (
|
|
22
25
|
pads: InputPad[],
|
|
@@ -25,12 +28,13 @@ export const processObstaclesForPour = (
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|
|
25
28
|
padMargin: number
|
|
26
29
|
traceMargin: number
|
|
27
30
|
board_edge_margin?: number
|
|
31
|
+
cutoutMargin?: number
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|
28
32
|
},
|
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29
33
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boardOutline?: Point[],
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|
30
34
|
): ProcessedObstacles => {
|
|
31
35
|
const polygonsToSubtract: Flatten.Polygon[] = []
|
|
32
36
|
|
|
33
|
-
const { padMargin, traceMargin, board_edge_margin } = margins
|
|
37
|
+
const { padMargin, traceMargin, board_edge_margin, cutoutMargin } = margins
|
|
34
38
|
|
|
35
39
|
if (
|
|
36
40
|
boardOutline &&
|
|
@@ -120,9 +124,12 @@ export const processObstaclesForPour = (
|
|
|
120
124
|
continue
|
|
121
125
|
}
|
|
122
126
|
|
|
127
|
+
const isHoleOrCutout =
|
|
128
|
+
pad.connectivityKey.startsWith("hole:") ||
|
|
129
|
+
pad.connectivityKey.startsWith("cutout:")
|
|
130
|
+
|
|
123
131
|
if (isCircularPad(pad)) {
|
|
124
|
-
const
|
|
125
|
-
const margin = isHole ? 0 : padMargin
|
|
132
|
+
const margin = isHoleOrCutout ? (cutoutMargin ?? 0) : padMargin
|
|
126
133
|
const circle = new Flatten.Circle(
|
|
127
134
|
new Flatten.Point(pad.x, pad.y),
|
|
128
135
|
pad.radius + margin,
|
|
@@ -132,17 +139,86 @@ export const processObstaclesForPour = (
|
|
|
132
139
|
}
|
|
133
140
|
|
|
134
141
|
if (isRectPad(pad)) {
|
|
142
|
+
const margin = isHoleOrCutout ? (cutoutMargin ?? 0) : padMargin
|
|
135
143
|
const { bounds } = pad
|
|
136
144
|
const b = new Flatten.Box(
|
|
137
|
-
bounds.minX -
|
|
138
|
-
bounds.minY -
|
|
139
|
-
bounds.maxX +
|
|
140
|
-
bounds.maxY +
|
|
145
|
+
bounds.minX - margin,
|
|
146
|
+
bounds.minY - margin,
|
|
147
|
+
bounds.maxX + margin,
|
|
148
|
+
bounds.maxY + margin,
|
|
141
149
|
)
|
|
142
150
|
polygonsToSubtract.push(new Flatten.Polygon(b.toPoints()))
|
|
143
151
|
continue
|
|
144
152
|
}
|
|
145
153
|
|
|
154
|
+
if (isPolygonPad(pad)) {
|
|
155
|
+
const margin = isHoleOrCutout ? (cutoutMargin ?? 0) : 0
|
|
156
|
+
|
|
157
|
+
const seen = new Set<string>()
|
|
158
|
+
const uniquePoints = pad.points.filter((p) => {
|
|
159
|
+
const key = `${p.x},${p.y}`
|
|
160
|
+
if (seen.has(key)) {
|
|
161
|
+
return false
|
|
162
|
+
}
|
|
163
|
+
seen.add(key)
|
|
164
|
+
return true
|
|
165
|
+
})
|
|
166
|
+
|
|
167
|
+
if (uniquePoints.length < 3) continue
|
|
168
|
+
|
|
169
|
+
const polygon = new Flatten.Polygon(
|
|
170
|
+
uniquePoints.map((p) => Flatten.point(p.x, p.y)),
|
|
171
|
+
)
|
|
172
|
+
|
|
173
|
+
if (Math.abs(polygon.area()) < 1e-9) continue
|
|
174
|
+
|
|
175
|
+
if (margin <= 0) {
|
|
176
|
+
polygonsToSubtract.push(polygon)
|
|
177
|
+
continue
|
|
178
|
+
}
|
|
179
|
+
|
|
180
|
+
// Ensure polygon is CCW for consistent normal direction.
|
|
181
|
+
// In flatten-js, CCW corresponds to a negative area.
|
|
182
|
+
if (polygon.area() > 0) {
|
|
183
|
+
polygon.reverse()
|
|
184
|
+
}
|
|
185
|
+
|
|
186
|
+
const offsetLines: Flatten.Line[] = []
|
|
187
|
+
const polygonVertices = polygon.vertices
|
|
188
|
+
for (let i = 0; i < polygonVertices.length; i++) {
|
|
189
|
+
const p1 = polygonVertices[i]!
|
|
190
|
+
const p2 = polygonVertices[(i + 1) % polygonVertices.length]!
|
|
191
|
+
|
|
192
|
+
const segment = Flatten.segment(p1, p2)
|
|
193
|
+
|
|
194
|
+
if (segment.length === 0) continue
|
|
195
|
+
|
|
196
|
+
const line = Flatten.line(segment.start, segment.end)
|
|
197
|
+
|
|
198
|
+
// For a CCW polygon, the normal (rotated +90deg, i.e. "left") points inward.
|
|
199
|
+
// We must translate outward, so we use a negative margin.
|
|
200
|
+
const norm = line.norm
|
|
201
|
+
const offsetLine = line.translate(norm.multiply(-margin))
|
|
202
|
+
offsetLines.push(offsetLine)
|
|
203
|
+
}
|
|
204
|
+
|
|
205
|
+
const newPolygonPoints: Flatten.Point[] = []
|
|
206
|
+
for (let i = 0; i < offsetLines.length; i++) {
|
|
207
|
+
const line1 = offsetLines[i]!
|
|
208
|
+
const line2 = offsetLines[(i + 1) % offsetLines.length]!
|
|
209
|
+
|
|
210
|
+
const ip = line1.intersect(line2)
|
|
211
|
+
if (ip.length > 0) {
|
|
212
|
+
newPolygonPoints.push(ip[0]!)
|
|
213
|
+
}
|
|
214
|
+
}
|
|
215
|
+
|
|
216
|
+
if (newPolygonPoints.length >= 3) {
|
|
217
|
+
polygonsToSubtract.push(new Flatten.Polygon(newPolygonPoints))
|
|
218
|
+
}
|
|
219
|
+
continue
|
|
220
|
+
}
|
|
221
|
+
|
|
146
222
|
if (isTracePad(pad)) {
|
|
147
223
|
// Add circles for each vertex
|
|
148
224
|
for (const segment of pad.segments) {
|
package/lib/types.ts
CHANGED
|
@@ -10,6 +10,7 @@ export interface InputPourRegion {
|
|
|
10
10
|
padMargin: number
|
|
11
11
|
traceMargin: number
|
|
12
12
|
board_edge_margin?: number
|
|
13
|
+
cutout_margin?: number
|
|
13
14
|
}
|
|
14
15
|
|
|
15
16
|
export interface BaseInputPad {
|
|
@@ -36,7 +37,16 @@ export interface InputTracePad extends BaseInputPad {
|
|
|
36
37
|
segments: Point[]
|
|
37
38
|
}
|
|
38
39
|
|
|
39
|
-
export
|
|
40
|
+
export interface InputPolygonPad extends BaseInputPad {
|
|
41
|
+
shape: "polygon"
|
|
42
|
+
points: Point[]
|
|
43
|
+
}
|
|
44
|
+
|
|
45
|
+
export type InputPad =
|
|
46
|
+
| InputRectPad
|
|
47
|
+
| InputCircularPad
|
|
48
|
+
| InputTracePad
|
|
49
|
+
| InputPolygonPad
|
|
40
50
|
|
|
41
51
|
export interface InputProblem {
|
|
42
52
|
regionsForPour: InputPourRegion[]
|
package/package.json
CHANGED
|
@@ -0,0 +1 @@
|
|
|
1
|
+
<svg xmlns="http://www.w3.org/2000/svg" width="800" height="600" data-software-used-string="@tscircuit/core@0.0.849"><style></style><rect class="boundary" x="0" y="0" fill="#000" width="800" height="600" data-type="pcb_background" data-pcb-layer="global"/><rect class="pcb-boundary" fill="none" stroke="#fff" stroke-width="0.3" x="150" y="50" width="500" height="500" data-type="pcb_boundary" data-pcb-layer="global"/><rect class="pcb-pad" fill="rgb(77, 127, 196)" x="284" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="bottom"/><rect class="pcb-pad" fill="rgb(77, 127, 196)" x="233" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 297.5 300 L 297.5 378.95223661654137" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 297.5 378.95223661654137 L 303.5414925183353 384.99372913487673" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 303.5414925183353 384.99372913487673 L 306.25 393.75" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-trace" stroke="rgb(77, 127, 196)" fill="none" d="M 306.25 393.75 L 306.25 393.75" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="bottom"/><path class="pcb-silkscreen pcb-silkscreen-bottom" d="M 246.5 264 L 321 264 L 321 336 L 246.5 336" fill="none" stroke="#5da9e9" stroke-width="5" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="pcb_component_1" data-pcb-silkscreen-path-id="pcb_silkscreen_path_1" data-type="pcb_silkscreen_path" data-pcb-layer="bottom"/><text x="0" y="0" dx="0" dy="0" fill="#5da9e9" font-family="Arial, sans-serif" font-size="20" text-anchor="middle" dominant-baseline="central" transform="matrix(-1,0,0,1,272,239)" class="pcb-silkscreen-text pcb-silkscreen-bottom" data-pcb-silkscreen-text-id="pcb_component_1" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="bottom">C1</text><path class="pcb-board" d="M 150 550 L 650 550 L 650 50 L 150 50 Z" fill="none" stroke="rgba(255, 255, 255, 0.5)" stroke-width="5" data-type="pcb_board" data-pcb-layer="board"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="361" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="top"/><rect class="pcb-pad" fill="rgb(200, 52, 52)" x="412" y="284" width="27" height="32" data-type="pcb_smtpad" data-pcb-layer="top"/><path class="pcb-trace" stroke="rgb(200, 52, 52)" fill="none" d="M 306.25 393.75 L 306.25 393.75" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="top"/><path class="pcb-trace" stroke="rgb(200, 52, 52)" fill="none" d="M 306.25 393.75 L 306.25 368.25" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="top"/><path class="pcb-trace" stroke="rgb(200, 52, 52)" fill="none" d="M 306.25 368.25 L 374.5 300" stroke-width="7.5" stroke-linecap="round" stroke-linejoin="round" shape-rendering="crispEdges" data-type="pcb_trace" data-pcb-layer="top"/><path class="pcb-copper-pour pcb-copper-pour-brep" d="M 150 550 L 150 50 L 650 50 L 650 550 L 150 550 Z M 610 150 L 608.8471168241938 138.29458067903232 L 605.4327719506772 127.03899405809463 L 599.8881767381527 116.66578601882387 L 592.4264068711929 107.57359312880715 L 583.3342139811762 100.11182326184729 L 572.9610059419053 94.56722804932278 L 561.7054193209676 91.15288317580615 L 550 90 L 538.2945806790324 91.15288317580615 L 527.0389940580947 94.56722804932278 L 516.6657860188238 100.11182326184729 L 507.57359312880715 107.57359312880715 L 500.1118232618473 116.66578601882387 L 494.5672280493228 127.0389940580946 L 491.1528831758062 138.2945806790323 L 490 150 L 491.1528831758062 161.70541932096768 L 494.5672280493228 172.96100594190537 L 500.1118232618473 183.3342139811761 L 507.57359312880715 192.42640687119285 L 516.6657860188238 199.8881767381527 L 527.0389940580945 205.4327719506772 L 538.2945806790323 208.84711682419382 L 550 210 L 561.7054193209676 208.84711682419382 L 572.9610059419053 205.4327719506772 L 583.3342139811762 199.8881767381527 L 592.4264068711929 192.42640687119285 L 599.8881767381527 183.33421398117613 L 605.4327719506772 172.96100594190543 L 608.8471168241938 161.7054193209677 L 610 150 Z M 460 450 L 458.84711682419385 438.2945806790323 L 455.4327719506772 427.03899405809466 L 449.8881767381527 416.66578601882384 L 442.42640687119285 407.57359312880715 L 433.33421398117616 400.1118232618473 L 422.9610059419054 394.5672280493228 L 411.7054193209677 391.1528831758062 L 400 390 L 388.2945806790323 391.1528831758062 L 377.0389940580946 394.5672280493228 L 366.6657860188239 400.1118232618473 L 357.57359312880715 407.57359312880715 L 350.1118232618473 416.66578601882384 L 344.5672280493228 427.0389940580946 L 341.15288317580615 438.29458067903226 L 340 450 L 341.15288317580615 461.7054193209677 L 344.5672280493228 472.96100594190534 L 350.1118232618473 483.3342139811761 L 357.57359312880715 492.42640687119285 L 366.66578601882384 499.8881767381527 L 377.0389940580946 505.4327719506772 L 388.29458067903226 508.8471168241938 L 400 510 L 411.7054193209677 508.84711682419385 L 422.9610059419054 505.4327719506772 L 433.3342139811761 499.8881767381527 L 442.42640687119285 492.42640687119285 L 449.8881767381527 483.33421398117616 L 455.4327719506772 472.96100594190546 L 458.8471168241938 461.70541932096774 L 460 450 Z M 490 335 L 610 335 L 610 265 L 490 265 L 490 335 Z M 316.0805385563561 370.7938301144085 L 360.87436867076457 326 L 398 326 L 398 274 L 351 274 L 351 311.12563132923543 L 300.0628156646177 362.0628156646177 L 298.97464089235274 363.3887604610785 L 298.16605409052625 364.9015199668055 L 297.6681287964717 366.54295968235886 L 297.5 368.25 L 297.5 370.40515141679646 L 296.6829141908728 370.6530116872178 L 292.36074417450993 372.9632596924364 L 288.5723304703363 376.0723304703363 L 285.4632596924364 379.86074417450993 L 283.1530116872178 384.18291419087274 L 281.7303679899193 388.8727419495968 L 281.25 393.75 L 281.7303679899193 398.6272580504032 L 283.1530116872178 403.3170858091272 L 285.46325969243634 407.63925582549007 L 288.5723304703363 411.4276695296637 L 292.36074417450993 414.5367403075636 L 296.68291419087274 416.8469883127822 L 301.3727419495968 418.2696320100807 L 306.25 418.75 L 311.1272580504032 418.2696320100807 L 315.81708580912726 416.8469883127822 L 320.13925582549007 414.53674030756366 L 323.9276695296637 411.4276695296637 L 327.0367403075636 407.63925582549007 L 329.3469883127822 403.31708580912726 L 330.7696320100807 398.6272580504032 L 331.25 393.75 L 330.7696320100807 388.8727419495968 L 329.3469883127822 384.1829141908728 L 327.0367403075636 379.86074417450993 L 323.9276695296637 376.0723304703363 L 320.13925582549007 372.9632596924364 L 316.0805385563561 370.7938301144085 Z M 475.85786437626905 460 L 624.142135623731 460 L 550 385.85786437626905 L 475.85786437626905 460 Z" fill="rgb(200, 52, 52)" fill-rule="evenodd" fill-opacity="0.5" data-type="pcb_copper_pour" data-pcb-layer="top"/><path class="pcb-silkscreen pcb-silkscreen-top" d="M 425.5 264 L 351 264 L 351 336 L 425.5 336" fill="none" stroke="#f2eda1" stroke-width="5" stroke-linecap="round" stroke-linejoin="round" data-pcb-component-id="pcb_component_0" data-pcb-silkscreen-path-id="pcb_silkscreen_path_0" data-type="pcb_silkscreen_path" data-pcb-layer="top"/><text x="0" y="0" dx="0" dy="0" fill="#f2eda1" font-family="Arial, sans-serif" font-size="20" text-anchor="middle" dominant-baseline="central" transform="matrix(1,0,0,1,400,239)" class="pcb-silkscreen-text pcb-silkscreen-top" data-pcb-silkscreen-text-id="pcb_component_0" stroke="none" data-type="pcb_silkscreen_text" data-pcb-layer="top">R1</text><g data-type="pcb_via" data-pcb-layer="through"><circle class="pcb-hole-outer" fill="rgb(200, 52, 52)" cx="306.25" cy="393.75" r="15" data-type="pcb_via" data-pcb-layer="top"/><circle class="pcb-hole-inner" fill="#FF26E2" cx="306.25" cy="393.75" r="7.5" data-type="pcb_via" data-pcb-layer="drill"/></g><rect class="pcb-cutout pcb-cutout-rect" x="-50" y="-25" width="100" height="50" fill="#FF26E2" transform="matrix(1,0,0,1,550,300)" data-type="pcb_cutout" data-pcb-layer="drill"/><circle class="pcb-cutout pcb-cutout-circle" cx="550" cy="150" r="50" fill="#FF26E2" data-type="pcb_cutout" data-pcb-layer="drill"/><polygon class="pcb-cutout pcb-cutout-polygon" points="550,400 550,400 600,450 500,450" fill="#FF26E2" data-type="pcb_cutout" data-pcb-layer="drill"/><circle class="pcb-hole" cx="400" cy="450" r="50" fill="#FF26E2" data-type="pcb_hole" data-pcb-layer="drill"/></svg>
|
|
@@ -0,0 +1,772 @@
|
|
|
1
|
+
[
|
|
2
|
+
{
|
|
3
|
+
"type": "source_project_metadata",
|
|
4
|
+
"source_project_metadata_id": "source_project_metadata_0",
|
|
5
|
+
"software_used_string": "@tscircuit/core@0.0.849"
|
|
6
|
+
},
|
|
7
|
+
{
|
|
8
|
+
"type": "source_group",
|
|
9
|
+
"source_group_id": "source_group_0",
|
|
10
|
+
"is_subcircuit": true,
|
|
11
|
+
"was_automatically_named": true,
|
|
12
|
+
"subcircuit_id": "subcircuit_source_group_0"
|
|
13
|
+
},
|
|
14
|
+
{
|
|
15
|
+
"type": "source_net",
|
|
16
|
+
"source_net_id": "source_net_0",
|
|
17
|
+
"name": "GND",
|
|
18
|
+
"member_source_group_ids": [],
|
|
19
|
+
"is_ground": true,
|
|
20
|
+
"is_power": false,
|
|
21
|
+
"is_positive_voltage_source": false,
|
|
22
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
23
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net0"
|
|
24
|
+
},
|
|
25
|
+
{
|
|
26
|
+
"type": "source_port",
|
|
27
|
+
"source_port_id": "source_port_0",
|
|
28
|
+
"name": "pin1",
|
|
29
|
+
"pin_number": 1,
|
|
30
|
+
"port_hints": ["pin1", "anode", "pos", "left", "1"],
|
|
31
|
+
"source_component_id": "source_component_0",
|
|
32
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
33
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net1"
|
|
34
|
+
},
|
|
35
|
+
{
|
|
36
|
+
"type": "source_port",
|
|
37
|
+
"source_port_id": "source_port_1",
|
|
38
|
+
"name": "pin2",
|
|
39
|
+
"pin_number": 2,
|
|
40
|
+
"port_hints": ["pin2", "cathode", "neg", "right", "2"],
|
|
41
|
+
"source_component_id": "source_component_0",
|
|
42
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
43
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net0"
|
|
44
|
+
},
|
|
45
|
+
{
|
|
46
|
+
"type": "source_component",
|
|
47
|
+
"source_component_id": "source_component_0",
|
|
48
|
+
"ftype": "simple_resistor",
|
|
49
|
+
"name": "R1",
|
|
50
|
+
"supplier_part_numbers": {
|
|
51
|
+
"jlcpcb": ["C11702", "C25543", "C2906864"]
|
|
52
|
+
},
|
|
53
|
+
"resistance": 1000,
|
|
54
|
+
"display_resistance": "1kΩ",
|
|
55
|
+
"are_pins_interchangeable": true,
|
|
56
|
+
"source_group_id": "source_group_0"
|
|
57
|
+
},
|
|
58
|
+
{
|
|
59
|
+
"type": "source_port",
|
|
60
|
+
"source_port_id": "source_port_2",
|
|
61
|
+
"name": "pin1",
|
|
62
|
+
"pin_number": 1,
|
|
63
|
+
"port_hints": ["pin1", "pos", "anode", "1"],
|
|
64
|
+
"source_component_id": "source_component_1",
|
|
65
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
66
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net1"
|
|
67
|
+
},
|
|
68
|
+
{
|
|
69
|
+
"type": "source_port",
|
|
70
|
+
"source_port_id": "source_port_3",
|
|
71
|
+
"name": "pin2",
|
|
72
|
+
"pin_number": 2,
|
|
73
|
+
"port_hints": ["pin2", "neg", "cathode", "2"],
|
|
74
|
+
"source_component_id": "source_component_1",
|
|
75
|
+
"subcircuit_id": "subcircuit_source_group_0"
|
|
76
|
+
},
|
|
77
|
+
{
|
|
78
|
+
"type": "source_component",
|
|
79
|
+
"source_component_id": "source_component_1",
|
|
80
|
+
"ftype": "simple_capacitor",
|
|
81
|
+
"name": "C1",
|
|
82
|
+
"supplier_part_numbers": {
|
|
83
|
+
"jlcpcb": ["C1523", "C696907", "C5137470"]
|
|
84
|
+
},
|
|
85
|
+
"capacitance": 1e-9,
|
|
86
|
+
"display_capacitance": "1000pF",
|
|
87
|
+
"are_pins_interchangeable": true,
|
|
88
|
+
"source_group_id": "source_group_0"
|
|
89
|
+
},
|
|
90
|
+
{
|
|
91
|
+
"type": "source_net",
|
|
92
|
+
"source_net_id": "source_net_1",
|
|
93
|
+
"name": "VCC",
|
|
94
|
+
"member_source_group_ids": [],
|
|
95
|
+
"is_ground": false,
|
|
96
|
+
"is_power": true,
|
|
97
|
+
"is_positive_voltage_source": true,
|
|
98
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
99
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net1"
|
|
100
|
+
},
|
|
101
|
+
{
|
|
102
|
+
"type": "source_board",
|
|
103
|
+
"source_board_id": "source_board_0",
|
|
104
|
+
"source_group_id": "source_group_0"
|
|
105
|
+
},
|
|
106
|
+
{
|
|
107
|
+
"type": "source_trace",
|
|
108
|
+
"source_trace_id": "source_trace_0",
|
|
109
|
+
"connected_source_port_ids": ["source_port_1"],
|
|
110
|
+
"connected_source_net_ids": ["source_net_0"],
|
|
111
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
112
|
+
"display_name": ".R1 > .pin2 to net.GND",
|
|
113
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net0"
|
|
114
|
+
},
|
|
115
|
+
{
|
|
116
|
+
"type": "source_trace",
|
|
117
|
+
"source_trace_id": "source_trace_1",
|
|
118
|
+
"connected_source_port_ids": ["source_port_0"],
|
|
119
|
+
"connected_source_net_ids": ["source_net_1"],
|
|
120
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
121
|
+
"display_name": ".R1 > .pin1 to net.VCC",
|
|
122
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net1"
|
|
123
|
+
},
|
|
124
|
+
{
|
|
125
|
+
"type": "source_trace",
|
|
126
|
+
"source_trace_id": "source_trace_2",
|
|
127
|
+
"connected_source_port_ids": ["source_port_2"],
|
|
128
|
+
"connected_source_net_ids": ["source_net_1"],
|
|
129
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
130
|
+
"max_length": null,
|
|
131
|
+
"display_name": ".C1 > .pin1 to net.VCC",
|
|
132
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net1"
|
|
133
|
+
},
|
|
134
|
+
{
|
|
135
|
+
"type": "source_pin_missing_trace_warning",
|
|
136
|
+
"source_pin_missing_trace_warning_id": "source_pin_missing_trace_warning_0",
|
|
137
|
+
"message": "Port pin2 on C1 is missing a trace",
|
|
138
|
+
"source_component_id": "source_component_1",
|
|
139
|
+
"source_port_id": "source_port_3",
|
|
140
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
141
|
+
"warning_type": "source_pin_missing_trace_warning"
|
|
142
|
+
},
|
|
143
|
+
{
|
|
144
|
+
"type": "schematic_component",
|
|
145
|
+
"schematic_component_id": "schematic_component_0",
|
|
146
|
+
"center": {
|
|
147
|
+
"x": 0,
|
|
148
|
+
"y": 0
|
|
149
|
+
},
|
|
150
|
+
"size": {
|
|
151
|
+
"width": 1.1,
|
|
152
|
+
"height": 0.388910699999999
|
|
153
|
+
},
|
|
154
|
+
"source_component_id": "source_component_0",
|
|
155
|
+
"is_box_with_pins": true,
|
|
156
|
+
"symbol_name": "boxresistor_right",
|
|
157
|
+
"symbol_display_value": "1kΩ",
|
|
158
|
+
"schematic_group_id": "schematic_group_0"
|
|
159
|
+
},
|
|
160
|
+
{
|
|
161
|
+
"type": "schematic_component",
|
|
162
|
+
"schematic_component_id": "schematic_component_1",
|
|
163
|
+
"center": {
|
|
164
|
+
"x": 0,
|
|
165
|
+
"y": -1.8144553499999994
|
|
166
|
+
},
|
|
167
|
+
"size": {
|
|
168
|
+
"width": 1.1,
|
|
169
|
+
"height": 0.84
|
|
170
|
+
},
|
|
171
|
+
"source_component_id": "source_component_1",
|
|
172
|
+
"is_box_with_pins": true,
|
|
173
|
+
"symbol_name": "capacitor_right",
|
|
174
|
+
"symbol_display_value": "1000pF",
|
|
175
|
+
"schematic_group_id": "schematic_group_0"
|
|
176
|
+
},
|
|
177
|
+
{
|
|
178
|
+
"type": "schematic_group",
|
|
179
|
+
"schematic_group_id": "schematic_group_0",
|
|
180
|
+
"is_subcircuit": true,
|
|
181
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
182
|
+
"name": "unnamed_board1",
|
|
183
|
+
"center": {
|
|
184
|
+
"x": 0,
|
|
185
|
+
"y": 0
|
|
186
|
+
},
|
|
187
|
+
"width": 0,
|
|
188
|
+
"height": 0,
|
|
189
|
+
"schematic_component_ids": [],
|
|
190
|
+
"source_group_id": "source_group_0"
|
|
191
|
+
},
|
|
192
|
+
{
|
|
193
|
+
"type": "schematic_port",
|
|
194
|
+
"schematic_port_id": "schematic_port_0",
|
|
195
|
+
"schematic_component_id": "schematic_component_0",
|
|
196
|
+
"center": {
|
|
197
|
+
"x": -0.55,
|
|
198
|
+
"y": 0
|
|
199
|
+
},
|
|
200
|
+
"source_port_id": "source_port_0",
|
|
201
|
+
"facing_direction": "left",
|
|
202
|
+
"distance_from_component_edge": 0.4,
|
|
203
|
+
"pin_number": 1,
|
|
204
|
+
"display_pin_label": "anode",
|
|
205
|
+
"is_connected": true
|
|
206
|
+
},
|
|
207
|
+
{
|
|
208
|
+
"type": "schematic_port",
|
|
209
|
+
"schematic_port_id": "schematic_port_1",
|
|
210
|
+
"schematic_component_id": "schematic_component_0",
|
|
211
|
+
"center": {
|
|
212
|
+
"x": 0.55,
|
|
213
|
+
"y": 0
|
|
214
|
+
},
|
|
215
|
+
"source_port_id": "source_port_1",
|
|
216
|
+
"facing_direction": "right",
|
|
217
|
+
"distance_from_component_edge": 0.4,
|
|
218
|
+
"pin_number": 2,
|
|
219
|
+
"display_pin_label": "cathode",
|
|
220
|
+
"is_connected": false
|
|
221
|
+
},
|
|
222
|
+
{
|
|
223
|
+
"type": "schematic_port",
|
|
224
|
+
"schematic_port_id": "schematic_port_2",
|
|
225
|
+
"schematic_component_id": "schematic_component_1",
|
|
226
|
+
"center": {
|
|
227
|
+
"x": -0.55,
|
|
228
|
+
"y": -1.8144553499999994
|
|
229
|
+
},
|
|
230
|
+
"source_port_id": "source_port_2",
|
|
231
|
+
"facing_direction": "left",
|
|
232
|
+
"distance_from_component_edge": 0.4,
|
|
233
|
+
"pin_number": 1,
|
|
234
|
+
"display_pin_label": "pos",
|
|
235
|
+
"is_connected": true
|
|
236
|
+
},
|
|
237
|
+
{
|
|
238
|
+
"type": "schematic_port",
|
|
239
|
+
"schematic_port_id": "schematic_port_3",
|
|
240
|
+
"schematic_component_id": "schematic_component_1",
|
|
241
|
+
"center": {
|
|
242
|
+
"x": 0.55,
|
|
243
|
+
"y": -1.8144553499999994
|
|
244
|
+
},
|
|
245
|
+
"source_port_id": "source_port_3",
|
|
246
|
+
"facing_direction": "right",
|
|
247
|
+
"distance_from_component_edge": 0.4,
|
|
248
|
+
"pin_number": 2,
|
|
249
|
+
"display_pin_label": "neg",
|
|
250
|
+
"is_connected": false
|
|
251
|
+
},
|
|
252
|
+
{
|
|
253
|
+
"type": "schematic_trace",
|
|
254
|
+
"schematic_trace_id": "schematic_trace_0",
|
|
255
|
+
"source_trace_id": "solver_R1.1-C1.1",
|
|
256
|
+
"edges": [
|
|
257
|
+
{
|
|
258
|
+
"from": {
|
|
259
|
+
"x": -0.55,
|
|
260
|
+
"y": 0
|
|
261
|
+
},
|
|
262
|
+
"to": {
|
|
263
|
+
"x": -0.75,
|
|
264
|
+
"y": 0
|
|
265
|
+
}
|
|
266
|
+
},
|
|
267
|
+
{
|
|
268
|
+
"from": {
|
|
269
|
+
"x": -0.75,
|
|
270
|
+
"y": 0
|
|
271
|
+
},
|
|
272
|
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"to": {
|
|
273
|
+
"x": -0.75,
|
|
274
|
+
"y": -1.8144553499999994
|
|
275
|
+
}
|
|
276
|
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},
|
|
277
|
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{
|
|
278
|
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"from": {
|
|
279
|
+
"x": -0.75,
|
|
280
|
+
"y": -1.8144553499999994
|
|
281
|
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},
|
|
282
|
+
"to": {
|
|
283
|
+
"x": -0.55,
|
|
284
|
+
"y": -1.8144553499999994
|
|
285
|
+
}
|
|
286
|
+
}
|
|
287
|
+
],
|
|
288
|
+
"junctions": [],
|
|
289
|
+
"subcircuit_connectivity_map_key": "unnamedsubcircuit917_connectivity_net1"
|
|
290
|
+
},
|
|
291
|
+
{
|
|
292
|
+
"type": "schematic_net_label",
|
|
293
|
+
"schematic_net_label_id": "schematic_net_label_0",
|
|
294
|
+
"text": "VCC",
|
|
295
|
+
"anchor_position": {
|
|
296
|
+
"x": -0.75,
|
|
297
|
+
"y": 0
|
|
298
|
+
},
|
|
299
|
+
"center": {
|
|
300
|
+
"x": -0.75,
|
|
301
|
+
"y": 0.09
|
|
302
|
+
},
|
|
303
|
+
"anchor_side": "bottom",
|
|
304
|
+
"source_net_id": "source_net_1",
|
|
305
|
+
"symbol_name": "rail_up"
|
|
306
|
+
},
|
|
307
|
+
{
|
|
308
|
+
"type": "schematic_net_label",
|
|
309
|
+
"schematic_net_label_id": "schematic_net_label_1",
|
|
310
|
+
"text": "GND",
|
|
311
|
+
"anchor_position": {
|
|
312
|
+
"x": 0.55,
|
|
313
|
+
"y": 0
|
|
314
|
+
},
|
|
315
|
+
"center": {
|
|
316
|
+
"x": 0.7000000000000001,
|
|
317
|
+
"y": 0
|
|
318
|
+
},
|
|
319
|
+
"anchor_side": "left",
|
|
320
|
+
"source_net_id": "source_net_0"
|
|
321
|
+
},
|
|
322
|
+
{
|
|
323
|
+
"type": "pcb_component",
|
|
324
|
+
"pcb_component_id": "pcb_component_0",
|
|
325
|
+
"center": {
|
|
326
|
+
"x": 0,
|
|
327
|
+
"y": 0
|
|
328
|
+
},
|
|
329
|
+
"width": 1.56,
|
|
330
|
+
"height": 0.64,
|
|
331
|
+
"layer": "top",
|
|
332
|
+
"rotation": 0,
|
|
333
|
+
"source_component_id": "source_component_0",
|
|
334
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
335
|
+
"do_not_place": false,
|
|
336
|
+
"obstructs_within_bounds": true
|
|
337
|
+
},
|
|
338
|
+
{
|
|
339
|
+
"type": "pcb_component",
|
|
340
|
+
"pcb_component_id": "pcb_component_1",
|
|
341
|
+
"center": {
|
|
342
|
+
"x": -2.5600000000000005,
|
|
343
|
+
"y": 0
|
|
344
|
+
},
|
|
345
|
+
"width": 1.56,
|
|
346
|
+
"height": 0.64,
|
|
347
|
+
"layer": "bottom",
|
|
348
|
+
"rotation": 0,
|
|
349
|
+
"source_component_id": "source_component_1",
|
|
350
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
351
|
+
"do_not_place": false,
|
|
352
|
+
"obstructs_within_bounds": true
|
|
353
|
+
},
|
|
354
|
+
{
|
|
355
|
+
"type": "pcb_board",
|
|
356
|
+
"pcb_board_id": "pcb_board_0",
|
|
357
|
+
"center": {
|
|
358
|
+
"x": 0,
|
|
359
|
+
"y": 0
|
|
360
|
+
},
|
|
361
|
+
"thickness": 1.4,
|
|
362
|
+
"num_layers": 2,
|
|
363
|
+
"width": 10,
|
|
364
|
+
"height": 10,
|
|
365
|
+
"material": "fr4"
|
|
366
|
+
},
|
|
367
|
+
{
|
|
368
|
+
"type": "pcb_smtpad",
|
|
369
|
+
"pcb_smtpad_id": "pcb_smtpad_0",
|
|
370
|
+
"pcb_component_id": "pcb_component_0",
|
|
371
|
+
"pcb_port_id": "pcb_port_0",
|
|
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|
699
|
+
"route_type": "wire",
|
|
700
|
+
"x": -2.0500000000000007,
|
|
701
|
+
"y": 0,
|
|
702
|
+
"width": 0.15,
|
|
703
|
+
"layer": "bottom",
|
|
704
|
+
"start_pcb_port_id": "pcb_port_2"
|
|
705
|
+
},
|
|
706
|
+
{
|
|
707
|
+
"route_type": "wire",
|
|
708
|
+
"x": -2.0500000000000007,
|
|
709
|
+
"y": -1.5790447323308274,
|
|
710
|
+
"width": 0.15,
|
|
711
|
+
"layer": "bottom"
|
|
712
|
+
},
|
|
713
|
+
{
|
|
714
|
+
"route_type": "wire",
|
|
715
|
+
"x": -1.929170149633294,
|
|
716
|
+
"y": -1.699874582697534,
|
|
717
|
+
"width": 0.15,
|
|
718
|
+
"layer": "bottom"
|
|
719
|
+
},
|
|
720
|
+
{
|
|
721
|
+
"route_type": "wire",
|
|
722
|
+
"x": -1.875,
|
|
723
|
+
"y": -1.875,
|
|
724
|
+
"width": 0.15,
|
|
725
|
+
"layer": "bottom"
|
|
726
|
+
},
|
|
727
|
+
{
|
|
728
|
+
"route_type": "via",
|
|
729
|
+
"x": -1.875,
|
|
730
|
+
"y": -1.875,
|
|
731
|
+
"from_layer": "bottom",
|
|
732
|
+
"to_layer": "top"
|
|
733
|
+
},
|
|
734
|
+
{
|
|
735
|
+
"route_type": "wire",
|
|
736
|
+
"x": -1.875,
|
|
737
|
+
"y": -1.875,
|
|
738
|
+
"width": 0.15,
|
|
739
|
+
"layer": "top"
|
|
740
|
+
},
|
|
741
|
+
{
|
|
742
|
+
"route_type": "wire",
|
|
743
|
+
"x": -1.875,
|
|
744
|
+
"y": -1.365,
|
|
745
|
+
"width": 0.15,
|
|
746
|
+
"layer": "top"
|
|
747
|
+
},
|
|
748
|
+
{
|
|
749
|
+
"route_type": "wire",
|
|
750
|
+
"x": -0.51,
|
|
751
|
+
"y": 0,
|
|
752
|
+
"width": 0.15,
|
|
753
|
+
"layer": "top",
|
|
754
|
+
"end_pcb_port_id": "pcb_port_0"
|
|
755
|
+
}
|
|
756
|
+
],
|
|
757
|
+
"subcircuit_id": "subcircuit_source_group_0",
|
|
758
|
+
"source_trace_id": "source_net_1"
|
|
759
|
+
},
|
|
760
|
+
{
|
|
761
|
+
"type": "pcb_via",
|
|
762
|
+
"pcb_via_id": "pcb_via_0",
|
|
763
|
+
"pcb_trace_id": "source_net_1_0",
|
|
764
|
+
"x": -1.875,
|
|
765
|
+
"y": -1.875,
|
|
766
|
+
"hole_diameter": 0.3,
|
|
767
|
+
"outer_diameter": 0.6,
|
|
768
|
+
"layers": ["bottom", "top"],
|
|
769
|
+
"from_layer": "bottom",
|
|
770
|
+
"to_layer": "top"
|
|
771
|
+
}
|
|
772
|
+
]
|
|
@@ -0,0 +1,16 @@
|
|
|
1
|
+
import { expect, test } from "bun:test"
|
|
2
|
+
import circuitJson from "./assets/hole-and-cutouts.json"
|
|
3
|
+
import { runSolverAndRenderToSvg } from "./utils/run-solver-and-render-to-svg"
|
|
4
|
+
import type { AnyCircuitElement } from "circuit-json"
|
|
5
|
+
|
|
6
|
+
test("hole and cutouts", async () => {
|
|
7
|
+
const svg = runSolverAndRenderToSvg(circuitJson as AnyCircuitElement[], {
|
|
8
|
+
layer: "top",
|
|
9
|
+
net_name: "GND",
|
|
10
|
+
pad_margin: 0.2,
|
|
11
|
+
trace_margin: 0.1,
|
|
12
|
+
cutout_margin: 0.2,
|
|
13
|
+
})
|
|
14
|
+
|
|
15
|
+
await expect(svg).toMatchSvgSnapshot(import.meta.path, "hole-and-cutouts")
|
|
16
|
+
})
|