@tscircuit/autorouting-dataset-01 1.0.52 → 1.0.54

package/lib/dataset/circuit253.simple-route.json

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@@ -1947,6 +2017,7 @@
       ]
     },
     {
+      "componentId": "pcb_component_5",
       "type": "oval",
       "layers": [
         "top",
@@ -1975,6 +2046,7 @@
       ]
     },
     {
+      "componentId": "pcb_component_5",
       "type": "oval",
       "layers": [
         "top",
@@ -2009,7 +2081,7 @@
       "pointsToConnect": [
         {
           "x": 13.760000000000002,
-          "y": 14.59,
+          "y": 14.427499999999998,
           "layer": "top",
           "pointId": "pcb_port_2",
           "pcb_port_id": "pcb_port_2"
@@ -2029,7 +2101,7 @@
           "pcb_port_id": "pcb_port_43"
         },
         {
-          "x": 4.5600000000000005,
+          "x": 4.7225,
           "y": 7.22,
           "layer": "top",
           "pointId": "pcb_port_58",
@@ -2042,7 +2114,7 @@
       "pointsToConnect": [
         {
           "x": 14.71,
-          "y": 14.59,
+          "y": 14.427499999999998,
           "layer": "top",
           "pointId": "pcb_port_1",
           "pcb_port_id": "pcb_port_1"
@@ -2068,7 +2140,7 @@
       "pointsToConnect": [
         {
           "x": 15.66,
-          "y": 14.59,
+          "y": 14.427499999999998,
           "layer": "top",
           "pointId": "pcb_port_0",
           "pcb_port_id": "pcb_port_0"
@@ -2126,14 +2198,14 @@
           "pcb_port_id": "pcb_port_7"
         },
         {
-          "x": -5.49,
+          "x": -5.327500000000001,
           "y": -2.54,
           "layer": "top",
           "pointId": "pcb_port_32",
           "pcb_port_id": "pcb_port_32"
         },
         {
-          "x": 4.5600000000000005,
+          "x": 4.7225,
           "y": 6.27,
           "layer": "top",
           "pointId": "pcb_port_59",
@@ -2145,7 +2217,7 @@
       "name": "source_net_5",
       "pointsToConnect": [
         {
-          "x": -4.1,
+          "x": -3.9375,
           "y": 13.24,
           "layer": "top",
           "pointId": "pcb_port_9",
@@ -2171,14 +2243,14 @@
       "name": "source_net_6",
       "pointsToConnect": [
         {
-          "x": -4.1,
+          "x": -3.9375,
           "y": 14.19,
           "layer": "top",
           "pointId": "pcb_port_8",
           "pcb_port_id": "pcb_port_8"
         },
         {
-          "x": -4.1,
+          "x": -3.9375,
           "y": 12.290000000000001,
           "layer": "top",
           "pointId": "pcb_port_10",
@@ -2256,14 +2328,14 @@
           "pcb_port_id": "pcb_port_29"
         },
         {
-          "x": -5.49,
+          "x": -5.327500000000001,
           "y": -1.59,
           "layer": "top",
           "pointId": "pcb_port_31",
           "pcb_port_id": "pcb_port_31"
         },
         {
-          "x": 4.5600000000000005,
+          "x": 4.7225,
           "y": 5.319999999999999,
           "layer": "top",
           "pointId": "pcb_port_60",
@@ -2379,14 +2451,14 @@
           "pcb_port_id": "pcb_port_37"
         },
         {
-          "x": 13.17,
+          "x": 13.332500000000001,
           "y": 2.97,
           "layer": "top",
           "pointId": "pcb_port_65",
           "pcb_port_id": "pcb_port_65"
         },
         {
-          "x": 13.17,
+          "x": 13.332500000000001,
           "y": 3.92,
           "layer": "top",
           "pointId": "pcb_port_64",
@@ -2398,7 +2470,7 @@
       "name": "source_net_15",
       "pointsToConnect": [
         {
-          "x": -5.49,
+          "x": -5.327500000000001,
           "y": -0.6400000000000001,
           "layer": "top",
           "pointId": "pcb_port_30",
@@ -2483,7 +2555,7 @@
           "pcb_port_id": "pcb_port_41"
         },
         {
-          "x": 13.17,
+          "x": 13.332500000000001,
           "y": 2.0200000000000005,
           "layer": "top",
           "pointId": "pcb_port_66",
@@ -2500,5 +2572,15 @@
     }
   ],
   "layerCount": 4,
-  "minTraceWidth": 0.15
+  "minTraceWidth": 0.1,
+  "minViaDiameter": 0.3,
+  "minViaHoleDiameter": 0.2,
+  "minViaPadDiameter": 0.3,
+  "min_via_hole_diameter": 0.2,
+  "min_via_pad_diameter": 0.3,
+  "minTraceToPadEdgeClearance": 0.1,
+  "minViaHoleEdgeToViaHoleEdgeClearance": 0.1,
+  "minPlatedHoleDrillEdgeToDrillEdgeClearance": 0.15,
+  "minPadEdgeToPadEdgeClearance": 0.1,
+  "minBoardEdgeClearance": 0.2
 }