npm - @simten/embed - Versions diffs - 0.1.13 → 0.1.14 - Mend

@simten/embed 0.1.13 → 0.1.14

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.

Files changed (2) hide show

package/dist/circuit-embed.js +1 -1
package/package.json +3 -3

package/dist/circuit-embed.js CHANGED Viewed

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f=i.alternate;f!==null&&(f.lanes|=r),Wm(i.return,r,c)}function Ig(i,r,c,f,g,v){var T=i.memoizedState;T===null?i.memoizedState={isBackwards:r,rendering:null,renderingStartTime:0,last:f,tail:c,tailMode:g,treeForkCount:v}:(T.isBackwards=r,T.rendering=null,T.renderingStartTime=0,T.last=f,T.tail=c,T.tailMode=g,T.treeForkCount=v)}function qC(i,r,c){var f=r.pendingProps,g=f.revealOrder,v=f.tail;f=f.children;var T=be.current,V=(T&2)!==0;if(V?(T=T&1|2,r.flags|=128):T&=1,et(be,T),Be(i,r,f,c),f=qt?nl:0,!V&&i!==null&&(i.flags&128)!==0)t:for(i=r.child;i!==null;){if(i.tag===13)i.memoizedState!==null&&YC(i,c,r);else if(i.tag===19)YC(i,c,r);else if(i.child!==null){i.child.return=i,i=i.child;continue}if(i===r)break t;for(;i.sibling===null;){if(i.return===null||i.return===r)break t;i=i.return}i.sibling.return=i.return,i=i.sibling}switch(g){case"forwards":for(c=r.child,g=null;c!==null;)i=c.alternate,i!==null&&Wu(i)===null&&(g=c),c=c.sibling;c=g,c===null?(g=r.child,r.child=null):(g=c.sibling,c.sibling=null),Ig(r,!1,g,c,v,f);break;case"backwards":case"unstable_legacy-backwards":for(c=null,g=r.child,r.child=null;g!==null;){if(i=g.alternate,i!==null&&Wu(i)===null){r.child=g;break}i=g.sibling,g.sibling=c,c=g,g=i}Ig(r,!0,c,null,v,f);break;case"together":Ig(r,!1,null,null,void 0,f);break;default:r.memoizedState=null}return r.child}function Oi(i,r,c){if(i!==null&&(r.dependencies=i.dependencies),xo|=r.lanes,(c&r.childLanes)===0)if(i!==null){if(xs(i,r,c,!1),(c&r.childLanes)===0)return null}else return null;if(i!==null&&r.child!==i.child)throw Error(o(153));if(r.child!==null){for(i=r.child,c=Ti(i,i.pendingProps),r.child=c,c.return=r;i.sibling!==null;)i=i.sibling,c=c.sibling=Ti(i,i.pendingProps),c.return=r;c.sibling=null}return r.child}function Pg(i,r){return(i.lanes&r)!==0?!0:(i=i.dependencies,!!(i!==null&&Yu(i)))}function F9(i,r,c){switch(r.tag){case 3:ut(r,r.stateNode.containerInfo),fo(r,Ee,i.memoizedState.cache),fr();break;case 27:case 5:Ot(r);break;case 4:ut(r,r.stateNode.containerInfo);break;case 10:fo(r,r.type,r.memoizedProps.value);break;case 31:if(r.memoizedState!==null)return r.flags|=128,ug(r),null;break;case 13:var f=r.memoizedState;if(f!==null)return f.dehydrated!==null?(go(r),r.flags|=128,null):(c&r.child.childLanes)!==0?UC(i,r,c):(go(r),i=Oi(i,r,c),i!==null?i.sibling:null);go(r);break;case 19:var g=(i.flags&128)!==0;if(f=(c&r.childLanes)!==0,f||(xs(i,r,c,!1),f=(c&r.childLanes)!==0),g){if(f)return qC(i,r,c);r.flags|=128}if(g=r.memoizedState,g!==null&&(g.rendering=null,g.tail=null,g.lastEffect=null),et(be,be.current),f)break;return null;case 22:return r.lanes=0,LC(i,r,c,r.pendingProps);case 24:fo(r,Ee,i.memoizedState.cache)}return Oi(i,r,c)}function GC(i,r,c){if(i!==null)if(i.memoizedProps!==r.pendingProps)Te=!0;else{if(!Pg(i,c)&&(r.flags&128)===0)return Te=!1,F9(i,r,c);Te=(i.flags&131072)!==0}else Te=!1,qt&&(r.flags&1048576)!==0&&EE(r,nl,r.index);switch(r.lanes=0,r.tag){case 16:t:{var f=r.pendingProps;if(i=mr(r.elementType),r.type=i,typeof i=="function")Ym(i)?(f=br(i,f),r.tag=1,r=HC(null,r,i,f,c)):(r.tag=0,r=Og(null,r,i,f,c));else{if(i!=null){var g=i.$$typeof;if(g===E){r.tag=11,r=jC(null,r,i,f,c);break t}else if(g===O){r.tag=14,r=zC(null,r,i,f,c);break t}}throw r=B(i)||i,Error(o(306,r,""))}}return r;case 0:return Og(i,r,r.type,r.pendingProps,c);case 1:return f=r.type,g=br(f,r.pendingProps),HC(i,r,f,g,c);case 3:t:{if(ut(r,r.stateNode.containerInfo),i===null)throw Error(o(387));f=r.pendingProps;var v=r.memoizedState;g=v.element,rg(i,r),ul(r,f,null,c);var T=r.memoizedState;if(f=T.cache,fo(r,Ee,f),f!==v.cache&&Jm(r,[Ee],c,!0),cl(),f=T.element,v.isDehydrated)if(v={element:f,isDehydrated:!1,cache:T.cache},r.updateQueue.baseState=v,r.memoizedState=v,r.flags&256){r=$C(i,r,f,c);break t}else if(f!==g){g=_n(Error(o(424)),r),il(g),r=$C(i,r,f,c);break t}else for(i=r.stateNode.containerInfo,i.nodeType===9?i=i.body:i=i.nodeName==="HTML"?i.ownerDocument.body:i,ce=Nn(i.firstChild),Ie=r,qt=!0,co=null,Cn=!0,c=LE(r,null,f,c),r.child=c;c;)c.flags=c.flags&-3|4096,c=c.sibling;else{if(fr(),f===g){r=Oi(i,r,c);break t}Be(i,r,f,c)}r=r.child}return r;case 26:return uf(i,r),i===null?(c=iN(r.type,null,r.pendingProps,null))?r.memoizedState=c:qt||(c=r.type,i=r.pendingProps,f=Nf(ht.current).createElement(c),f[ke]=r,f[Ye]=i,He(f,c,i),Se(f),r.stateNode=f):r.memoizedState=iN(r.type,i.memoizedProps,r.pendingProps,i.memoizedState),null;case 27:return Ot(r),i===null&&qt&&(f=r.stateNode=tN(r.type,r.pendingProps,ht.current),Ie=r,Cn=!0,g=ce,Co(r.type)?(v0=g,ce=Nn(f.firstChild)):ce=g),Be(i,r,r.pendingProps.children,c),uf(i,r),i===null&&(r.flags|=4194304),r.child;case 5:return i===null&&qt&&((g=f=ce)&&(f=S7(f,r.type,r.pendingProps,Cn),f!==null?(r.stateNode=f,Ie=r,ce=Nn(f.firstChild),Cn=!1,g=!0):g=!1),g||uo(r)),Ot(r),g=r.type,v=r.pendingProps,T=i!==null?i.memoizedProps:null,f=v.children,h0(g,v)?f=null:T!==null&&h0(g,T)&&(r.flags|=32),r.memoizedState!==null&&(g=dg(i,r,I9,null,null,c),Rl._currentValue=g),uf(i,r),Be(i,r,f,c),r.child;case 6:return i===null&&qt&&((i=c=ce)&&(c=E7(c,r.pendingProps,Cn),c!==null?(r.stateNode=c,Ie=r,ce=null,i=!0):i=!1),i||uo(r)),null;case 13:return UC(i,r,c);case 4:return ut(r,r.stateNode.containerInfo),f=r.pendingProps,i===null?r.child=yr(r,null,f,c):Be(i,r,f,c),r.child;case 11:return jC(i,r,r.type,r.pendingProps,c);case 7:return Be(i,r,r.pendingProps,c),r.child;case 8:return Be(i,r,r.pendingProps.children,c),r.child;case 12:return Be(i,r,r.pendingProps.children,c),r.child;case 10:return f=r.pendingProps,fo(r,r.type,f.value),Be(i,r,f.children,c),r.child;case 9:return g=r.type._context,f=r.pendingProps.children,hr(r),g=Pe(g),f=f(g),r.flags|=1,Be(i,r,f,c),r.child;case 14:return zC(i,r,r.type,r.pendingProps,c);case 15:return VC(i,r,r.type,r.pendingProps,c);case 19:return qC(i,r,c);case 31:return G9(i,r,c);case 22:return LC(i,r,c,r.pendingProps);case 24:return hr(r),f=Pe(Ee),i===null?(g=ng(),g===null&&(g=oe,v=tg(),g.pooledCache=v,v.refCount++,v!==null&&(g.pooledCacheLanes|=c),g=v),r.memoizedState={parent:f,cache:g},og(r),fo(r,Ee,g)):((i.lanes&c)!==0&&(rg(i,r),ul(r,null,null,c),cl()),g=i.memoizedState,v=r.memoizedState,g.parent!==f?(g={parent:f,cache:f},r.memoizedState=g,r.lanes===0&&(r.memoizedState=r.updateQueue.baseState=g),fo(r,Ee,f)):(f=v.cache,fo(r,Ee,f),f!==g.cache&&Jm(r,[Ee],c,!0))),Be(i,r,r.pendingProps.children,c),r.child;case 29:throw r.pendingProps}throw Error(o(156,r.tag))}function Di(i){i.flags|=4}function Bg(i,r,c,f,g){if((r=(i.mode&32)!==0)&&(r=!1),r){if(i.flags|=16777216,(g&335544128)===g)if(i.stateNode.complete)i.flags|=8192;else if(bT())i.flags|=8192;else throw gr=Xu,ig}else i.flags&=-16777217}function FC(i,r){if(r.type!=="stylesheet"||(r.state.loading&4)!==0)i.flags&=-16777217;else if(i.flags|=16777216,!lN(r))if(bT())i.flags|=8192;else throw gr=Xu,ig}function df(i,r){r!==null&&(i.flags|=4),i.flags&16384&&(r=i.tag!==22?yu():536870912,i.lanes|=r,Os|=r)}function gl(i,r){if(!qt)switch(i.tailMode){case"hidden":r=i.tail;for(var c=null;r!==null;)r.alternate!==null&&(c=r),r=r.sibling;c===null?i.tail=null:c.sibling=null;break;case"collapsed":c=i.tail;for(var f=null;c!==null;)c.alternate!==null&&(f=c),c=c.sibling;f===null?r||i.tail===null?i.tail=null:i.tail.sibling=null:f.sibling=null}}function ue(i){var r=i.alternate!==null&&i.alternate.child===i.child,c=0,f=0;if(r)for(var g=i.child;g!==null;)c|=g.lanes|g.childLanes,f|=g.subtreeFlags&65011712,f|=g.flags&65011712,g.return=i,g=g.sibling;else for(g=i.child;g!==null;)c|=g.lanes|g.childLanes,f|=g.subtreeFlags,f|=g.flags,g.return=i,g=g.sibling;return i.subtreeFlags|=f,i.childLanes=c,r}function X9(i,r,c){var f=r.pendingProps;switch(Xm(r),r.tag){case 16:case 15:case 0:case 11:case 7:case 8:case 12:case 9:case 14:return ue(r),null;case 1:return ue(r),null;case 3:return c=r.stateNode,f=null,i!==null&&(f=i.memoizedState.cache),r.memoizedState.cache!==f&&(r.flags|=2048),Mi(Ee),dt(),c.pendingContext&&(c.context=c.pendingContext,c.pendingContext=null),(i===null||i.child===null)&&(bs(r)?Di(r):i===null||i.memoizedState.isDehydrated&&(r.flags&256)===0||(r.flags|=1024,Km())),ue(r),null;case 26:var g=r.type,v=r.memoizedState;return i===null?(Di(r),v!==null?(ue(r),FC(r,v)):(ue(r),Bg(r,g,null,f,c))):v?v!==i.memoizedState?(Di(r),ue(r),FC(r,v)):(ue(r),r.flags&=-16777217):(i=i.memoizedProps,i!==f&&Di(r),ue(r),Bg(r,g,i,f,c)),null;case 27:if(At(r),c=ht.current,g=r.type,i!==null&&r.stateNode!=null)i.memoizedProps!==f&&Di(r);else{if(!f){if(r.stateNode===null)throw Error(o(166));return ue(r),null}i=rt.current,bs(r)?TE(r):(i=tN(g,f,c),r.stateNode=i,Di(r))}return ue(r),null;case 5:if(At(r),g=r.type,i!==null&&r.stateNode!=null)i.memoizedProps!==f&&Di(r);else{if(!f){if(r.stateNode===null)throw Error(o(166));return ue(r),null}if(v=rt.current,bs(r))TE(r);else{var T=Nf(ht.current);switch(v){case 1:v=T.createElementNS("http://www.w3.org/2000/svg",g);break;case 2:v=T.createElementNS("http://www.w3.org/1998/Math/MathML",g);break;default:switch(g){case"svg":v=T.createElementNS("http://www.w3.org/2000/svg",g);break;case"math":v=T.createElementNS("http://www.w3.org/1998/Math/MathML",g);break;case"script":v=T.createElement("div"),v.innerHTML="<script><\/script>",v=v.removeChild(v.firstChild);break;case"select":v=typeof f.is=="string"?T.createElement("select",{is:f.is}):T.createElement("select"),f.multiple?v.multiple=!0:f.size&&(v.size=f.size);break;default:v=typeof f.is=="string"?T.createElement(g,{is:f.is}):T.createElement(g)}}v[ke]=r,v[Ye]=f;t:for(T=r.child;T!==null;){if(T.tag===5||T.tag===6)v.appendChild(T.stateNode);else if(T.tag!==4&&T.tag!==27&&T.child!==null){T.child.return=T,T=T.child;continue}if(T===r)break t;for(;T.sibling===null;){if(T.return===null||T.return===r)break t;T=T.return}T.sibling.return=T.return,T=T.sibling}r.stateNode=v;t:switch(He(v,g,f),g){case"button":case"input":case"select":case"textarea":f=!!f.autoFocus;break t;case"img":f=!0;break t;default:f=!1}f&&Di(r)}}return ue(r),Bg(r,r.type,i===null?null:i.memoizedProps,r.pendingProps,c),null;case 6:if(i&&r.stateNode!=null)i.memoizedProps!==f&&Di(r);else{if(typeof f!="string"&&r.stateNode===null)throw Error(o(166));if(i=ht.current,bs(r)){if(i=r.stateNode,c=r.memoizedProps,f=null,g=Ie,g!==null)switch(g.tag){case 27:case 5:f=g.memoizedProps}i[ke]=r,i=!!(i.nodeValue===c||f!==null&&f.suppressHydrationWarning===!0||UT(i.nodeValue,c)),i||uo(r,!0)}else i=Nf(i).createTextNode(f),i[ke]=r,r.stateNode=i}return ue(r),null;case 31:if(c=r.memoizedState,i===null||i.memoizedState!==null){if(f=bs(r),c!==null){if(i===null){if(!f)throw Error(o(318));if(i=r.memoizedState,i=i!==null?i.dehydrated:null,!i)throw Error(o(557));i[ke]=r}else fr(),(r.flags&128)===0&&(r.memoizedState=null),r.flags|=4;ue(r),i=!1}else c=Km(),i!==null&&i.memoizedState!==null&&(i.memoizedState.hydrationErrors=c),i=!0;if(!i)return r.flags&256?(dn(r),r):(dn(r),null);if((r.flags&128)!==0)throw Error(o(558))}return ue(r),null;case 13:if(f=r.memoizedState,i===null||i.memoizedState!==null&&i.memoizedState.dehydrated!==null){if(g=bs(r),f!==null&&f.dehydrated!==null){if(i===null){if(!g)throw Error(o(318));if(g=r.memoizedState,g=g!==null?g.dehydrated:null,!g)throw Error(o(317));g[ke]=r}else fr(),(r.flags&128)===0&&(r.memoizedState=null),r.flags|=4;ue(r),g=!1}else g=Km(),i!==null&&i.memoizedState!==null&&(i.memoizedState.hydrationErrors=g),g=!0;if(!g)return r.flags&256?(dn(r),r):(dn(r),null)}return dn(r),(r.flags&128)!==0?(r.lanes=c,r):(c=f!==null,i=i!==null&&i.memoizedState!==null,c&&(f=r.child,g=null,f.alternate!==null&&f.alternate.memoizedState!==null&&f.alternate.memoizedState.cachePool!==null&&(g=f.alternate.memoizedState.cachePool.pool),v=null,f.memoizedState!==null&&f.memoizedState.cachePool!==null&&(v=f.memoizedState.cachePool.pool),v!==g&&(f.flags|=2048)),c!==i&&c&&(r.child.flags|=8192),df(r,r.updateQueue),ue(r),null);case 4:return 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(A common cause is a stray import / variable being passed by mistake, e.g. circuit(React, {...}) — the first argument must be a literal string name.)`)}if(typeof e=="function"){const z=e;return U=>{const G=z(U),L=gt(t,G);L._args=U??{};for(const F of L.circuit.state)if(F.stateType.kind==="bit")F.initialValue=!1;else if(F.stateType.kind==="bus")typeof F.initialValue=="number"&&(F.initialValue=0);else if(F.stateType.kind==="memory"){const et=F.initialValue;F.initialValue={data:new Map,addressWidth:et?.addressWidth??F.stateType.addressWidth,dataWidth:et?.dataWidth??F.stateType.dataWidth}}return L}}const n=e,o=new Map;if(n.inputs)for(const[z,U]of Object.entries(n.inputs))o.set(z,Y0(U));const s=new Map;if(n.outputs)for(const[z,U]of Object.entries(n.outputs))s.set(z,Y0(U));const a=n.nodes??{},l=[],u=new Set;for(const z of o.keys())u.has(z)&&l.push(`Duplicate port name: '${z}'`),u.add(z);for(const z of s.keys())u.has(z)&&l.push(`Port name '${z}' used for both input and output`),u.add(z);if(n.state)for(const z of Object.keys(n.state))o.has(z)&&l.push(`State name '${z}' collides with input port name`),s.has(z)&&l.push(`State name '${z}' collides with output port name`);for(const z of Object.keys(a))(z==="inputs"||z==="outputs"||z==="nodes")&&l.push(`Node name '${z}' is reserved`);n.onTick&&!n.state&&l.push(".onTick() requires state to be defined");let d=[];if(n.connect){const z={};for(const[G,L]of Object.entries(a)){const F=new Map;for(const et of L.circuit.inputs)F.set(et.name,et.portType);for(const et of L.circuit.outputs)F.set(et.name,et.portType);z[G]=Jf(G,F,L.circuit.name)}const U={inputs:Jf("",o),outputs:Jf("",s),nodes:z};try{d=n.connect(U)}catch(G){l.push(G instanceof Error?G.message:String(G))}}for(const z of d){q0(z.source,o,s,a,l);for(const U of z.targets)q0(U,o,s,a,l)}const h=z=>z.nodeId===""?z.portName:`${z.nodeId}.${z.portName}`,p=new Map,m=new Map,y=[];for(const z of d){const U=[];for(const G of z.targets){const L=h(G),F=p.get(L);if(F){if(F.nodeId===z.source.nodeId&&F.portName===z.source.portName)continue;let et=m.get(L);et||(et=new Set([h(F)]),m.set(L,et)),et.add(h(z.source));continue}p.set(L,{nodeId:z.source.nodeId,portName:z.source.portName}),U.push(G)}U.length>0&&y.push({...z,targets:U})}d=y;const b=[...m.keys()].sort();for(const z of b){const U=[...m.get(z)].join(", ");l.push(`${z} has multiple drivers: ${U}`)}if(l.length>0)throw new Error(`Circuit '${t}' validation failed:
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-  - `)}`);const x=n.eval!=null,w=Object.keys(a).length>0;let _,S;x&&!w?(_={kind:"primitive"},S=n.state!=null?"sequential":"combinational"):w?(_={kind:"composite"},S=eA(a,n.state)?"sequential":"combinational"):(_={kind:"primitive"},S="combinational");const k=Array.from(o,([z,U])=>({name:z,portType:U})),C=Array.from(s,([z,U])=>({name:z,portType:U})),E=[];(n.state!=null||n.onTick!=null)&&E.push({name:"clk"});const R=[];if(n.state!=null)for(const[z,U]of Object.entries(n.state))if(QN(U)){const G=Math.ceil(Math.log2(U.depth))||1;R.push({id:`${t}-${z}`,name:z,stateType:{kind:"memory",addressWidth:G,dataWidth:U.width},initialValue:{data:new Map(U.initial),addressWidth:G,dataWidth:U.width},clockRef:"clk",edge:"rising"})}else KN(U)?R.push({id:`${t}-${z}`,name:z,stateType:U.width===1?{kind:"bit"}:{kind:"bus",width:U.width},initialValue:U.initial,clockRef:"clk",edge:"rising"}):U instanceof Map?R.push({id:`${t}-${z}`,name:z,stateType:{kind:"memory",addressWidth:16,dataWidth:8},initialValue:{data:new Map(U),addressWidth:16,dataWidth:8},clockRef:"clk",edge:"rising"}):typeof U=="boolean"?R.push({id:`${t}-${z}`,name:z,stateType:{kind:"bit"},initialValue:U,clockRef:"clk",edge:"rising"}):R.push({id:`${t}-${z}`,name:z,stateType:{kind:"bus",width:32},initialValue:U,clockRef:"clk",edge:"rising"});const A=[];for(const[z,U]of Object.entries(a)){const G=U._args??{};A.push({id:z,componentRef:U.circuit.name,arguments:G,inputs:U.circuit.inputs.map(L=>({id:`${z}.${L.name}`,name:L.name,portType:L.portType})),outputs:U.circuit.outputs.map(L=>({id:`${z}.${L.name}`,name:L.name,portType:L.portType})),clocks:U.circuit.clocks.map(L=>({id:`${z}.${L.name}`,name:L.name}))})}const O=[];let D=0;for(const z of d)for(const U of z.targets)O.push({id:`conn_${D++}`,source:{nodeId:z.source.nodeId,portName:z.source.portName},target:{nodeId:U.nodeId,portName:U.portName},portType:z.portType});const $={timing:S},q=n.meta;q&&(q.description!==void 0&&($.description=q.description),q.category!==void 0&&($.category=q.category),q.icon!==void 0&&($.icon=q.icon),q.tags!==void 0&&($.tags=q.tags),q.author!==void 0&&($.author=q.author),q.version!==void 0&&($.version=q.version),q.synthesizable!==void 0&&($.synthesizable=q.synthesizable),q.interactiveArg!==void 0&&($.interactiveArg=q.interactiveArg));const Y={version:1,name:t,inputs:k,outputs:C,clocks:E,state:R,nodes:A,connections:O,implementation:_,metadata:$};for(const[z,U]of o);for(const[z,U]of s);const K=new Map;for(const[,z]of Object.entries(a))if(K.has(z.circuit.name)||K.set(z.circuit.name,z),z._dependencies)for(const[U,G]of z._dependencies)K.has(U)||K.set(U,G);const W={};for(const z of k)W[z.name]=z;const B={};for(const z of C)B[z.name]=z;const H={};for(const z of A)H[z.id]=z;const j={circuit:Y,inputs:W,outputs:B,nodes:H,_dependencies:K};Object.defineProperty(j,"toJSON",{value:function(){const z={};for(const[U,G]of this._dependencies)z[U]=G;return{circuit:this.circuit,_dependencies:z}},enumerable:!1});const I=n.state?Object.keys(n.state):void 0;return WN(t,{inputNames:Y.inputs.map(z=>z.name),outputNames:Y.outputs.map(z=>z.name),evalFn:n.eval??(()=>({})),stateKeys:I,onTickFn:n.onTick}),j}function q0(t,e,n,o,s){if(t.nodeId==="")!e.has(t.portName)&&!n.has(t.portName)&&s.push(`Circuit port '${t.portName}' does not exist`);else{const a=o[t.nodeId];if(!a){s.push(`Node '${t.nodeId}' does not exist`);return}a.circuit.inputs.some(u=>u.name===t.portName)||a.circuit.outputs.some(u=>u.name===t.portName)||s.push(`Port '${t.portName}' does not exist on node '${t.nodeId}' (${a.circuit.name})`)}}function eA(t,e){if(e!=null)return!0;for(const n of Object.values(t))if(n.circuit.clocks.length>0||n.circuit.state.length>0)return!0;return!1}const G0=gt("And",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"&",description:"Logical AND gate"},eval:({a:t,b:e})=>({out:t&&e?1:0})}),td=gt("Or",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"≥1",description:"Logical OR gate"},eval:({a:t,b:e})=>({out:t||e?1:0})}),F0=gt("Not",{inputs:{in:X},outputs:{out:X},meta:{category:"logic-gates",icon:"¬",description:"Logical NOT gate"},eval:({in:t})=>({out:t?0:1})}),nA=gt("Nand",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"⊼",description:"Logical NAND gate"},eval:({a:t,b:e})=>({out:t&&e?0:1})}),iA=gt("Nor",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"⊽",description:"Logical NOR gate"},eval:({a:t,b:e})=>({out:t||e?0:1})}),oA=gt("Xor",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"⊕",description:"Logical XOR gate"},eval:({a:t,b:e})=>({out:t!==e?1:0})}),rA=gt("Xnor",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"⊙",description:"Logical XNOR gate"},eval:({a:t,b:e})=>({out:t===e?1:0})}),sA=gt("Buffer",{inputs:{in:X},outputs:{out:X},meta:{category:"logic-gates",icon:"▷",description:"Buffer — passes input through unchanged"},eval:({in:t})=>({out:t})}),aA=Object.freeze(Object.defineProperty({__proto__:null,And:G0,Buffer:sA,Nand:nA,Nor:iA,Not:F0,Or:td,Xnor:rA,Xor:oA},Symbol.toStringTag,{value:"Module"})),lA=gt("Incrementer",{inputs:{in:P(8)},outputs:{out:P(8)},meta:{category:"arithmetic",icon:"+1",description:"Adds 1 to the input"},eval:({in:t})=>({out:t+1&255})}),Il=gt("Adder",({width:t=8}={})=>({inputs:{a:P(t),b:P(t),carry_in:X},outputs:{sum:P(t),carry_out:X},meta:{category:"arithmetic",icon:"+",description:"N-bit adder with carry"},eval:({a:e,b:n,carry_in:o,width:s=t})=>{const a=s,l=a>=32?4294967295:(1<<a)-1,u=(e>>>0)+(n>>>0)+o;return{sum:u&l,carry_out:u>l?1:0}}})),cA=gt("Subtractor",({width:t=8}={})=>({inputs:{a:P(t),b:P(t),borrow_in:X},outputs:{difference:P(t),borrow_out:X},meta:{category:"arithmetic",icon:"−",description:"N-bit subtractor with borrow"},eval:({a:e,b:n,borrow_in:o,width:s=t})=>{const a=s,l=a>=32?4294967295:(1<<a)-1,u=(e>>>0)-(n>>>0)-o;return{difference:u&l,borrow_out:u<0?1:0}}})),uA=gt("Multiplier",{inputs:{a:P(8),b:P(8)},outputs:{product:P(16)},meta:{category:"arithmetic",icon:"×",description:"N-bit multiplier"},eval:({a:t,b:e})=>({product:t*e&65535})}),fA=gt("Comparator",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{eq:X,lt:X,gt:X},meta:{category:"arithmetic",icon:"⋚",description:"Unsigned comparator"},eval:({a:e,b:n})=>{const o=e>>>0,s=n>>>0;return{eq:o===s?1:0,lt:o<s?1:0,gt:o>s?1:0}}})),dA=gt("LeftShifter",({width:t=8}={})=>({inputs:{value:P(t),shift:P(t)},outputs:{result:P(t)},meta:{category:"arithmetic",icon:"≪",description:"Left bit shifter"},eval:({value:e,shift:n,width:o=t})=>{const s=o,a=n,l=s>=32?4294967295:(1<<s)-1;return{result:a>=s?0:e<<a&l}}})),hA=gt("RightShifter",({width:t=8}={})=>({inputs:{value:P(t),shift:P(t)},outputs:{result:P(t)},meta:{category:"arithmetic",icon:"≫",description:"Right bit shifter"},eval:({value:e,shift:n,width:o=t})=>{const s=o,a=n;return{result:a>=s?0:e>>>a}}})),pA=gt("SignedAdder",{inputs:{a:P(8),b:P(8),carry_in:X},outputs:{sum:P(8),overflow:X,carry_out:X},meta:{category:"arithmetic",icon:"±+",description:"Signed adder with overflow detection"},eval:({a:t,b:e,carry_in:n})=>{const a=t>>>0,l=e>>>0,u=a+l+n,d=u&255,h=(a&128)!==0,p=(l&128)!==0,m=(d&128)!==0;return{sum:d,overflow:h===p&&h!==m?1:0,carry_out:u>255?1:0}}}),mA=gt("SignedComparator",{inputs:{a:P(8),b:P(8)},outputs:{eq:X,lt:X,gt:X,lte:X,gte:X},meta:{category:"arithmetic",icon:"±⋚",description:"Signed comparator"},eval:({a:t,b:e})=>{const s=t&255,a=e&255,l=s&128?s-256:s,u=a&128?a-256:a;return{eq:l===u?1:0,lt:l<u?1:0,gt:l>u?1:0,lte:l<=u?1:0,gte:l>=u?1:0}}}),gA=gt("SignedMultiplier",{inputs:{a:P(8),b:P(8)},outputs:{product:P(16)},meta:{category:"arithmetic",icon:"±×",description:"Signed multiplier"},eval:({a:t,b:e})=>{const s=t&255,a=e&255,l=s&128?s-256:s,u=a&128?a-256:a,d=l*u;return{product:d>=0?d:d+65536}}}),X0=gt("BusAnd",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{out:P(t)},meta:{category:"bus-operations",icon:"&8",description:"Bitwise AND on buses"},eval:({a:e,b:n})=>({out:e&n})})),yA=gt("BusOr",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{out:P(t)},meta:{category:"bus-operations",icon:"|8",description:"Bitwise OR on buses"},eval:({a:e,b:n})=>({out:(e|n)>>>0})})),vA=gt("BusNot",{inputs:{in:P(8)},outputs:{out:P(8)},meta:{category:"bus-operations",icon:"¬8",description:"Bitwise NOT on bus"},eval:({in:t})=>({out:~t&255})}),bA=gt("BusXor",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{out:P(t)},meta:{category:"bus-operations",icon:"⊕8",description:"Bitwise XOR on buses"},eval:({a:e,b:n})=>({out:(e^n)>>>0})})),xA=Object.freeze(Object.defineProperty({__proto__:null,Adder:Il,BusAnd:X0,BusNot:vA,BusOr:yA,BusXor:bA,Comparator:fA,Incrementer:lA,LeftShifter:dA,Multiplier:uA,RightShifter:hA,SignedAdder:pA,SignedComparator:mA,SignedMultiplier:gA,Subtractor:cA},Symbol.toStringTag,{value:"Module"})),se=gt("Mux",({width:t=1}={})=>({inputs:{in0:t===1?X:P(t),in1:t===1?X:P(t),sel:X},outputs:{out:t===1?X:P(t)},meta:{category:"plexers",icon:"MUX",description:"Multiplexer — sel=0 picks in0, sel=1 picks in1"},eval:({in0:e,in1:n,sel:o})=>({out:o?n:e})})),wA=gt("Decoder",{inputs:{in:P(2)},outputs:{out0:X,out1:X,out2:X,out3:X},meta:{category:"plexers",icon:"DEC",description:"2-to-4 decoder"},eval:({in:t})=>({out0:t===0?1:0,out1:t===1?1:0,out2:t===2?1:0,out3:t===3?1:0})}),_A=gt("Splitter",{inputs:{in:P(8)},outputs:{out0:P(4),out1:P(4)},meta:{category:"utilities",icon:"⊢",description:"Bus splitter"},eval:({in:t})=>({out0:t&15,out1:t>>4&15})}),SA=gt("Splitter8to8",{inputs:{in:P(8)},outputs:{bit0:X,bit1:X,bit2:X,bit3:X,bit4:X,bit5:X,bit6:X,bit7:X},meta:{category:"utilities",icon:"⊢8",description:"Splits 8-bit bus into 8 individual bits"},eval:({in:t})=>({bit0:t>>0&1,bit1:t>>1&1,bit2:t>>2&1,bit3:t>>3&1,bit4:t>>4&1,bit5:t>>5&1,bit6:t>>6&1,bit7:t>>7&1})}),EA=gt("Combiner8to8",{inputs:{bit0:X,bit1:X,bit2:X,bit3:X,bit4:X,bit5:X,bit6:X,bit7:X},outputs:{out:P(8)},meta:{category:"utilities",icon:"⊣8",description:"Combines 8 bits into an 8-bit bus"},eval:({bit0:t,bit1:e,bit2:n,bit3:o,bit4:s,bit5:a,bit6:l,bit7:u})=>({out:t&1|(e&1)<<1|(n&1)<<2|(o&1)<<3|(s&1)<<4|(a&1)<<5|(l&1)<<6|(u&1)<<7})}),CA=gt("Concat",{inputs:{high:P(4),low:P(4)},outputs:{out:P(8)},meta:{category:"utilities",icon:"||",description:"Concatenate two buses"},eval:({high:t,low:e})=>({out:t<<4|e})}),jo=gt("BitSlice",t=>({inputs:{in:P(8)},outputs:{out:P(8)},meta:{category:"utilities",icon:"[]",description:"Extract bits [low..high] from input"},eval:({in:e,low:n=0,high:o=7})=>{const s=n,l=o-s+1,u=l>=32?4294967295:(1<<l)-1;return{out:e>>s&u}}})),TA=gt("AddressCombiner",{inputs:{lo:P(8),hi:P(8)},outputs:{out:P(16)},meta:{category:"utilities",icon:"⊕16",description:"Combines two 8-bit buses into 16-bit"},eval:({lo:t,hi:e})=>({out:(e&255)<<8|t&255})}),NA=gt("Probe",{inputs:{in:X},outputs:{out:X},meta:{category:"utilities",icon:"🔍",description:"Debug observation point"},eval:({in:t})=>({out:t})}),AA=Object.freeze(Object.defineProperty({__proto__:null,AddressCombiner:TA,BitSlice:jo,Combiner8to8:EA,Concat:CA,Decoder:wA,Mux:se,Probe:NA,Splitter:_A,Splitter8to8:SA},Symbol.toStringTag,{value:"Module"})),MA=gt("DFlipFlop",({value:t=!1}={})=>({inputs:{d:X},outputs:{q:X,q_bar:X},state:{value:t},meta:{category:"sequential",icon:"D",description:"D Flip-Flop — stores 1 bit on rising clock edge"},eval:({value:e})=>({q:e?1:0,q_bar:e?0:1}),onTick:({d:e})=>({value:!!e})})),Rt=gt("Register",({width:t=8,value:e=0}={})=>({inputs:{data:P(t),we:X},outputs:{q:P(t)},state:{value:e},meta:{category:"sequential",icon:"REG",description:"N-bit register — stores data on rising clock edge when write-enable is high"},eval:({value:n})=>({q:n}),onTick:({data:n,we:o,value:s})=>({value:o?n:s})})),RA=Object.freeze(Object.defineProperty({__proto__:null,DFlipFlop:MA,Register:Rt},Symbol.toStringTag,{value:"Module"})),kA=gt("ROM",t=>({inputs:{addr:P(16)},outputs:{data_out:P(8)},state:{memory:Do(65536,8)},meta:{category:"memory",icon:"📀",description:"Read-only memory with address decoding"},eval:({addr:e,memory:n})=>({data_out:n[e]}),onTick:({memory:e})=>({memory:e})})),OA=gt("RAM",t=>({inputs:{addr:P(8),data_in:P(8),we:X},outputs:{data_out:P(8)},state:{memory:Do(256,8)},meta:{category:"memory",icon:"📝",description:"Random access memory"},eval:({addr:e,memory:n})=>({data_out:n[e]}),onTick:({addr:e,data_in:n,we:o,memory:s})=>(o&&(s[e]=n),{memory:s})})),DA=gt("DualPortRAM",t=>({inputs:{addrA:P(8),dataA:P(8),weA:X,addrB:P(8)},outputs:{outA:P(8),outB:P(8)},state:{memory:Do(256,8)},meta:{category:"memory",icon:"📝×2",description:"Dual-port RAM"},eval:({addrA:e,addrB:n,memory:o})=>({outA:o[e],outB:o[n]}),onTick:({addrA:e,dataA:n,weA:o,memory:s})=>(o&&(s[e]=n),{memory:s})}));function jA(t){const e={};for(let n=0;n<t.length;n++){const o=t[n]&255;o!==0&&(e[n]=o)}return e}function zA(t,e){if(!Number.isInteger(e)||e<1||e>32)throw new Error(`ROM word width must be an integer in 1..32, got ${e}`);const n=e===32?4294967295:(1<<e)-1>>>0,o={};for(let s=0;s<t.length;s++){const a=(t[s]>>>0&n)>>>0;a!==0&&(o[s]=a)}return o}function VA(t){const e={};for(const[n,o]of t){if(!Number.isInteger(n)||n<0)throw new Error(`ROM address must be a non-negative integer, got ${n}`);o!==0&&(e[n]=o)}return e}const LA=Object.freeze(Object.defineProperty({__proto__:null,DualPortRAM:DA,RAM:OA,ROM:kA,romFromBytes:jA,romFromEntries:VA,romFromWords:zA},Symbol.toStringTag,{value:"Module"})),ed=gt("Switch",t=>({outputs:{out:X},eval:({value:e})=>({out:e?1:0}),meta:{category:"input-output",icon:"⚡",description:"User-controllable 1-bit toggle",interactiveArg:"value"}})),nd=gt("Button",t=>({outputs:{out:X},eval:({value:e})=>({out:e?1:0}),meta:{category:"input-output",icon:"🔘",description:"Push button input (momentary)",interactiveArg:"value"}})),id=gt("Led",{inputs:{in:X},eval:()=>({}),meta:{category:"input-output",icon:"💡",description:"Visual output LED indicator"}}),od=gt("Input",t=>({outputs:{out:P(8)},eval:({value:e})=>({out:typeof e=="number"?e:0}),meta:{category:"input-output",icon:"🔢",description:"Multi-bit numeric input",interactiveArg:"value"}})),rd=gt("Output",{inputs:{in:P(8)},eval:()=>({}),meta:{category:"input-output",icon:"📤",description:"Multi-bit output sink"}}),gn=gt("Constant",({width:t=1}={})=>({outputs:{out:t===1?X:P(t)},eval:({value:e})=>({out:typeof e=="number"?e:0}),meta:{category:"utilities",icon:"K",description:"Fixed value source",interactiveArg:"value"}})),IA=Object.freeze(Object.defineProperty({__proto__:null,Button:nd,Constant:gn,Input:od,Led:id,Output:rd,Switch:ed},Symbol.toStringTag,{value:"Module"})),PA=gt("SevenSegment",{inputs:{in:P(4)},meta:{category:"display",icon:"7",description:"4-bit seven-segment display",synthesizable:!1}}),sd=gt("HexDisplay",{inputs:{in:P(8)},meta:{category:"display",icon:"0xFF",description:"Hexadecimal display",synthesizable:!1}}),BA=gt("Screen",t=>({inputs:{dataIn:P(8)},outputs:{addrB:P(16)},state:{memory:new Map},meta:{category:"display",icon:"🖥️",description:"Pixel display",synthesizable:!1},eval:()=>({addrB:0})})),HA=gt("RasterDisplay",t=>({inputs:{dataIn:P(8)},outputs:{addrB:P(16),scanX:P(8),scanY:P(8),hblank:X,vblank:X},state:{memory:new Map},meta:{category:"display",icon:"📺",description:"Hardware-accurate raster display with scan counters",synthesizable:!1},eval:()=>({addrB:0,scanX:0,scanY:0,hblank:0,vblank:0})})),$A=gt("Console",{inputs:{data:P(8),we:X},state:{text:""},onTick:({data:t,we:e,text:n})=>{if(!e)return{text:n};const o=t&255;if(o===0)return{text:n};if(o===12)return{text:""};const s=(n??"")+String.fromCharCode(o);return{text:s.length>4096?s.slice(-4096):s}},meta:{category:"display",icon:"📟",description:"Text console output",synthesizable:!1}}),UA=Object.freeze(Object.defineProperty({__proto__:null,Console:$A,HexDisplay:sd,RasterDisplay:HA,Screen:BA,SevenSegment:PA},Symbol.toStringTag,{value:"Module"})),ad=gt("RV32I_Decode",{inputs:{instruction:P(32)},outputs:{opcode:P(7),rd:P(5),funct3:P(3),rs1:P(5),rs2:P(5),funct7:P(7)},eval:({instruction:t})=>{const e=t>>>0;return{opcode:e&127,rd:e>>>7&31,funct3:e>>>12&7,rs1:e>>>15&31,rs2:e>>>20&31,funct7:e>>>25&127}},meta:{category:"rv32i",icon:"DEC",description:"RISC-V instruction decoder"}}),Z0=gt("RV32I_ALU",{inputs:{a:P(32),b:P(32),alu_op:P(4)},outputs:{result:P(32),zero:X},eval:({a:t,b:e,alu_op:n})=>{const o=t>>>0,s=e>>>0,a=n&15;let l;switch(a){case 0:l=o+s>>>0;break;case 1:l=o-s>>>0;break;case 2:l=(o&s)>>>0;break;case 3:l=(o|s)>>>0;break;case 4:l=(o^s)>>>0;break;case 5:l=o<<(s&31)>>>0;break;case 6:l=o>>>(s&31);break;case 7:l=(o|0)>>(s&31)>>>0;break;case 8:l=(o|0)<(s|0)?1:0;break;case 9:l=o<s?1:0;break;default:l=0}return{result:l,zero:l===0?1:0}},meta:{category:"rv32i",icon:"ALU",description:"RISC-V ALU"}}),K0=gt("RV32I_ImmGen",{inputs:{instruction:P(32)},outputs:{immediate:P(32)},eval:({instruction:t})=>{const e=t>>>0,n=e&127;let o;switch(n){case 19:case 3:case 103:o=e>>20|0;break;case 35:o=e>>25<<5|e>>>7&31|0,o=o<<20>>20;break;case 99:{const s=e>>>31&1,a=e>>>7&1,l=e>>>25&63,u=e>>>8&15;o=s<<12|a<<11|l<<5|u<<1,o=o<<19>>19;break}case 55:case 23:o=e&4294963200|0;break;case 111:{const s=e>>>31&1,a=e>>>12&255,l=e>>>20&1,u=e>>>21&1023;o=s<<20|a<<12|l<<11|u<<1,o=o<<11>>11;break}default:o=0}return{immediate:o>>>0}},meta:{category:"rv32i",icon:"IMM",description:"RISC-V immediate generator"}}),Q0=gt("RV32I_Control",{inputs:{opcode:P(7),funct3:P(3),funct7_bit:X},outputs:{alu_op:P(4),alu_src:X,mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,branch:X,jump:X,lui:X,auipc:X,is_jalr:X},eval:({opcode:t,funct3:e,funct7_bit:n})=>{const o=t&127,s=e&7,a=n?1:0;let l=0,u=0,d=0,h=0,p=0,m=0,y=0,b=0,x=0,w=0,_=0;switch(o){case 51:switch(p=1,s){case 0:l=a?1:0;break;case 1:l=5;break;case 2:l=8;break;case 3:l=9;break;case 4:l=4;break;case 5:l=a?7:6;break;case 6:l=3;break;case 7:l=2;break}break;case 19:switch(p=1,u=1,s){case 0:l=0;break;case 1:l=5;break;case 2:l=8;break;case 3:l=9;break;case 4:l=4;break;case 5:l=a?7:6;break;case 6:l=3;break;case 7:l=2;break}break;case 3:p=1,u=1,d=1,m=1,l=0;break;case 35:u=1,h=1,l=0;break;case 99:y=1,l=1;break;case 111:p=1,b=1;break;case 103:p=1,b=1,u=1,_=1,l=0;break;case 55:p=1,x=1;break;case 23:p=1,w=1;break}return{alu_op:l,alu_src:u,mem_read:d,mem_write:h,reg_write:p,mem_to_reg:m,branch:y,jump:b,lui:x,auipc:w,is_jalr:_}},meta:{category:"rv32i",icon:"CTL",description:"RISC-V control unit"}}),W0=gt("RV32I_BranchComp",{inputs:{a:P(32),b:P(32),funct3:P(3)},outputs:{take_branch:X},eval:({a:t,b:e,funct3:n})=>{const o=t>>>0,s=e>>>0,a=o|0,l=s|0,u=n&7;let d=0;switch(u){case 0:d=o===s?1:0;break;case 1:d=o!==s?1:0;break;case 4:d=a<l?1:0;break;case 5:d=a>=l?1:0;break;case 6:d=o<s?1:0;break;case 7:d=o>=s?1:0;break}return{take_branch:d}},meta:{category:"rv32i",icon:"CMP",description:"RISC-V branch comparator"}}),J0=gt("RV32I_RegisterFile",{inputs:{rs1:P(5),rs2:P(5),rd:P(5),write_data:P(32),we:X,debug_rs:P(5)},outputs:{read1:P(32),read2:P(32),debug_read:P(32)},state:{memory:Do(32,32)},eval:({rs1:t,rs2:e,debug_rs:n,memory:o})=>{const s=t&31,a=e&31,l=n&31;return{read1:s===0?0:o[s]>>>0,read2:a===0?0:o[a]>>>0,debug_read:l===0?0:o[l]>>>0}},onTick:({rd:t,write_data:e,we:n,memory:o})=>{const s=t&31;return n&&s!==0&&(o[s]=e>>>0),{memory:o}},meta:{category:"rv32i",icon:"RF",description:"RISC-V 32-register file"}}),YA=gt("RV32I_InstrMem",{inputs:{addr:P(32)},outputs:{instruction:P(32)},state:{memory:Do(65536,8)},eval:({addr:t,memory:e})=>{const n=t>>>0&-4,o=e[n],s=e[n+1],a=e[n+2];return{instruction:(e[n+3]<<24|a<<16|s<<8|o)>>>0}},onTick:({memory:t})=>({memory:t}),meta:{category:"rv32i",icon:"IM",description:"RISC-V instruction memory"}}),qA=gt("RV32I_DataMem",{inputs:{addr:P(32),write_data:P(32),mem_read:X,mem_write:X,funct3:P(3)},outputs:{read_data:P(32),misalign:X},state:{memory:Do(65536,8)},eval:({addr:t,mem_read:e,mem_write:n,funct3:o,memory:s})=>{if(!e&&!n)return{read_data:0,misalign:0};const a=t>>>0,l=o&7;let u=0;if(((l===1||l===5)&&(a&1)!==0||l===2&&(a&3)!==0)&&(u=1),!e)return{read_data:0,misalign:u};const d=a&-4;return{read_data:(s[d+3]<<24|s[d+2]<<16|s[d+1]<<8|s[d])>>>0,misalign:u}},onTick:({addr:t,write_data:e,mem_write:n,funct3:o,memory:s})=>{if(!n)return{memory:s};const a=t>>>0,l=e>>>0;switch(o&7){case 0:s[a]=l&255;break;case 1:s[a]=l&255,s[a+1]=l>>>8&255;break;case 2:s[a]=l&255,s[a+1]=l>>>8&255,s[a+2]=l>>>16&255,s[a+3]=l>>>24&255;break}return{memory:s}},meta:{category:"rv32i",icon:"DM",description:"RISC-V data memory with byte/half/word access"}}),ld=gt("RV32I_WritebackMux",{inputs:{alu_result:P(32),load_data:P(32),pc_plus4:P(32),immediate:P(32),pc_plus_imm:P(32),mem_to_reg:X,lui:X,auipc:X,jump:X},outputs:{write_data:P(32)},eval:({alu_result:t,load_data:e,pc_plus4:n,immediate:o,pc_plus_imm:s,mem_to_reg:a,lui:l,auipc:u,jump:d})=>{let h;return d?h=n:u?h=s:l?h=o:a?h=e:h=t,{write_data:(h??0)>>>0}},meta:{category:"rv32i",icon:"WB",description:"RISC-V writeback mux"}}),ty=gt("RV32I_NextPCMux",{inputs:{pc_plus4:P(32),branch_target:P(32),jal_target:P(32),jalr_target:P(32),branch:X,take_branch:X,jump:X,is_jalr:X},outputs:{next_pc:P(32)},eval:({pc_plus4:t,branch_target:e,jal_target:n,jalr_target:o,branch:s,take_branch:a,jump:l,is_jalr:u})=>{let d;return l?d=u?o&-2:n:s&&a?d=e:d=t,{next_pc:(d??0)>>>0}},meta:{category:"rv32i",icon:"PC",description:"RISC-V next PC mux"}}),ey=gt("RV32I_ForwardingUnit",{inputs:{id_rs1:P(5),id_rs2:P(5),ex_rd:P(5),ex_reg_write:X,mem_rd:P(5),mem_reg_write:X},outputs:{forward_a:P(2),forward_b:P(2)},eval:({id_rs1:t,id_rs2:e,ex_rd:n,ex_reg_write:o,mem_rd:s,mem_reg_write:a})=>{const l=t&31,u=e&31,d=n&31,h=s&31;let p=0,m=0;return o&&d!==0&&d===l?p=1:a&&h!==0&&h===l&&(p=2),o&&d!==0&&d===u?m=1:a&&h!==0&&h===u&&(m=2),{forward_a:p,forward_b:m}},meta:{category:"rv32i",icon:"FWD",description:"RISC-V data forwarding unit"}}),cd=gt("RV32I_WBBypass",{inputs:{rs_val:P(32),rs_addr:P(5),wb_val:P(32),wb_rd:P(5),wb_we:X},outputs:{out:P(32)},eval:({rs_val:t,rs_addr:e,wb_val:n,wb_rd:o,wb_we:s})=>{const a=e&31,l=o&31;return{out:(s&&l!==0&&l===a?n:t)>>>0}},meta:{category:"rv32i",icon:"BYP",description:"RISC-V writeback bypass"}}),GA=gt("RV32I_LoadAlign",{inputs:{data:P(32),funct3:P(3)},outputs:{out:P(32)},eval:({data:t,funct3:e})=>{const n=t>>>0,o=e&7;let s;switch(o){case 0:{s=(n&255)<<24>>24>>>0;break}case 1:{s=(n&65535)<<16>>16>>>0;break}case 4:s=n&255;break;case 5:s=n&65535;break;default:s=n}return{out:s}},meta:{category:"rv32i",icon:"LA",description:"RISC-V load alignment (byte/half/word)"}}),ny=gt("RV32I_LoadAlignFull",{inputs:{data:P(32),byte_offset:P(2),funct3:P(3)},outputs:{out:P(32)},eval:({data:t,byte_offset:e,funct3:n})=>{const o=t>>>0,s=e&3,a=n&7,l=o>>>s*8&255,u=o>>>(s&2)*8&65535;let d;switch(a){case 0:d=l<<24>>24>>>0;break;case 1:d=u<<16>>16>>>0;break;case 4:d=l;break;case 5:d=u;break;default:d=o;break}return{out:d}},meta:{category:"rv32i",icon:"LA2",description:"RISC-V full load aligner (raw word + byte offset + funct3)"}}),iy=gt("RV32I_HazardUnit",{inputs:{if_rs1:P(5),if_rs2:P(5),id_rd:P(5),id_mem_read:X,branch_taken:X,jump:X},outputs:{stall:X,flush:X},eval:({if_rs1:t,if_rs2:e,id_rd:n,id_mem_read:o,branch_taken:s,jump:a})=>{const l=t&31,u=e&31,d=n&31;return{stall:o&&d!==0&&(d===l||d===u)?1:0,flush:s||a?1:0}},meta:{category:"rv32i",icon:"HAZ",description:"RISC-V hazard detection unit"}}),FA=gt("DualPortROM",t=>({inputs:{addrA:P(32),addrB:P(32)},outputs:{dataA:P(32),dataB:P(32)},state:{memory:Do(65536,8)},eval:({addrA:e,addrB:n,memory:o})=>{const s=e>>>0&-4,a=n>>>0&-4;return{dataA:(o[s+3]<<24|o[s+2]<<16|o[s+1]<<8|o[s])>>>0,dataB:(o[a+3]<<24|o[a+2]<<16|o[a+1]<<8|o[a])>>>0}},onTick:({memory:e})=>({memory:e}),meta:{category:"memory",description:"Dual-port read-only memory"}})),XA=Object.freeze(Object.defineProperty({__proto__:null,DualPortROM:FA,RV32I_ALU:Z0,RV32I_BranchComp:W0,RV32I_Control:Q0,RV32I_DataMem:qA,RV32I_Decode:ad,RV32I_ForwardingUnit:ey,RV32I_HazardUnit:iy,RV32I_ImmGen:K0,RV32I_InstrMem:YA,RV32I_LoadAlign:GA,RV32I_LoadAlignFull:ny,RV32I_NextPCMux:ty,RV32I_RegisterFile:J0,RV32I_WBBypass:cd,RV32I_WritebackMux:ld},Symbol.toStringTag,{value:"Module"})),ZA=gt("RV32I_IF_Stage",()=>({inputs:{stall_n:X,redirect_taken:X,redirect_target:P(32)},outputs:{pc:P(32),pc4:P(32)},nodes:{pc:Rt({width:32}),four:gn({value:4,width:32}),pc_plus4:Il({width:32}),pc_next_mux:se({width:32})},connect:({inputs:t,outputs:e,nodes:{pc:n,four:o,pc_plus4:s,pc_next_mux:a}})=>[n.q.to(s.a,e.pc),o.out.to(s.b),s.sum.to(a.in0,e.pc4),t.redirect_target.to(a.in1),t.redirect_taken.to(a.sel),a.out.to(n.data),t.stall_n.to(n.we)]})),KA=gt("RV32I_IFID_Regs",()=>({inputs:{instruction_in:P(32),pc_in:P(32),pc4_in:P(32),we:X,flush:X},outputs:{instruction:P(32),pc:P(32),pc4:P(32)},nodes:{zero32:gn({value:0,width:32}),instr_mux:se({width:32}),instr:Rt({width:32}),pc_mux:se({width:32}),pc:Rt({width:32}),pc4_mux:se({width:32}),pc4:Rt({width:32})},connect:({inputs:t,outputs:e,nodes:{zero32:n,instr_mux:o,instr:s,pc_mux:a,pc:l,pc4_mux:u,pc4:d}})=>[t.instruction_in.to(o.in0),t.pc_in.to(a.in0),t.pc4_in.to(u.in0),n.out.to(o.in1,a.in1,u.in1),t.flush.to(o.sel,a.sel,u.sel),o.out.to(s.data),a.out.to(l.data),u.out.to(d.data),t.we.to(s.we,l.we,d.we),s.q.to(e.instruction),l.q.to(e.pc),d.q.to(e.pc4)]})),QA=gt("RV32I_ID_Stage",({debug:t=!1}={})=>{const e={instruction:P(32),wb_write_data:P(32),wb_rd:P(5),wb_we:X,...t?{debug_rs:P(5)}:{}},n={read1:P(32),read2:P(32),imm:P(32),rs1:P(5),rs2:P(5),rd:P(5),funct3:P(3),alu_op:P(4),alu_src:X,mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,branch:X,jump:X,lui:X,auipc:X,is_jalr:X,hazard_rs1:P(5),hazard_rs2:P(5),...t?{debug_read:P(32)}:{}};return{inputs:e,outputs:n,nodes:{decode:ad,immgen:K0,control:Q0,funct7_splitter:jo({low:5,high:5}),regfile:J0,hazard_decode:ad,wb_bypass1:cd,wb_bypass2:cd},connect:({inputs:o,outputs:s,nodes:{decode:a,immgen:l,control:u,funct7_splitter:d,regfile:h,hazard_decode:p,wb_bypass1:m,wb_bypass2:y}})=>{const b=[o.instruction.to(a.instruction,l.instruction,p.instruction),a.opcode.to(u.opcode),a.funct3.to(u.funct3,s.funct3),a.funct7.to(d.in),d.out.to(u.funct7_bit),a.rs1.to(h.rs1,m.rs_addr,s.rs1),a.rs2.to(h.rs2,y.rs_addr,s.rs2),a.rd.to(s.rd),p.rs1.to(s.hazard_rs1),p.rs2.to(s.hazard_rs2),h.read1.to(m.rs_val),h.read2.to(y.rs_val),o.wb_write_data.to(m.wb_val,y.wb_val,h.write_data),o.wb_rd.to(m.wb_rd,y.wb_rd,h.rd),o.wb_we.to(m.wb_we,y.wb_we,h.we),m.out.to(s.read1),y.out.to(s.read2),l.immediate.to(s.imm),u.alu_op.to(s.alu_op),u.alu_src.to(s.alu_src),u.mem_read.to(s.mem_read),u.mem_write.to(s.mem_write),u.reg_write.to(s.reg_write),u.mem_to_reg.to(s.mem_to_reg),u.branch.to(s.branch),u.jump.to(s.jump),u.lui.to(s.lui),u.auipc.to(s.auipc),u.is_jalr.to(s.is_jalr)];return t&&b.push(o.debug_rs.to(h.debug_rs),h.debug_read.to(s.debug_read)),b}}}),WA=gt("RV32I_IDEX_Regs",()=>({inputs:{pc_in:P(32),pc4_in:P(32),read1_in:P(32),read2_in:P(32),imm_in:P(32),rs1_in:P(5),rs2_in:P(5),rd_in:P(5),funct3_in:P(3),alu_op_in:P(4),alu_src_in:X,mem_read_in:X,mem_write_in:X,reg_write_in:X,mem_to_reg_in:X,branch_in:X,jump_in:X,lui_in:X,auipc_in:X,is_jalr_in:X,flush:X,stall:X},outputs:{pc:P(32),pc4:P(32),read1:P(32),read2:P(32),imm:P(32),rs1:P(5),rs2:P(5),rd:P(5),funct3:P(3),alu_op:P(4),alu_src:X,mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,branch:X,jump:X,lui:X,auipc:X,is_jalr:X},nodes:{one1:gn({value:1,width:1}),zero5:gn({value:0,width:5}),zero4:gn({value:0,width:4}),zero3:gn({value:0,width:3}),zero1:gn({value:0,width:1}),flush_or:td,pc:Rt({width:32}),pc4:Rt({width:32}),read1:Rt({width:32}),read2:Rt({width:32}),imm:Rt({width:32}),rs1_mux:se({width:5}),rs1:Rt({width:5}),rs2_mux:se({width:5}),rs2:Rt({width:5}),rd_mux:se({width:5}),rd:Rt({width:5}),funct3_mux:se({width:3}),funct3:Rt({width:3}),alu_op_mux:se({width:4}),alu_op:Rt({width:4}),alu_src_mux:se({width:1}),alu_src:Rt({width:1}),mem_read_mux:se({width:1}),mem_read:Rt({width:1}),mem_write_mux:se({width:1}),mem_write:Rt({width:1}),reg_write_mux:se({width:1}),reg_write:Rt({width:1}),mem_to_reg_mux:se({width:1}),mem_to_reg:Rt({width:1}),branch_mux:se({width:1}),branch:Rt({width:1}),jump_mux:se({width:1}),jump:Rt({width:1}),lui_mux:se({width:1}),lui:Rt({width:1}),auipc_mux:se({width:1}),auipc:Rt({width:1}),is_jalr_mux:se({width:1}),is_jalr:Rt({width:1})},connect:({inputs:t,outputs:e,nodes:n})=>{const{one1:o,zero5:s,zero4:a,zero3:l,zero1:u,flush_or:d}=n,h=[{mux:n.rs1_mux,reg:n.rs1,zero:s,in:t.rs1_in,out:e.rs1},{mux:n.rs2_mux,reg:n.rs2,zero:s,in:t.rs2_in,out:e.rs2},{mux:n.rd_mux,reg:n.rd,zero:s,in:t.rd_in,out:e.rd},{mux:n.funct3_mux,reg:n.funct3,zero:l,in:t.funct3_in,out:e.funct3},{mux:n.alu_op_mux,reg:n.alu_op,zero:a,in:t.alu_op_in,out:e.alu_op},{mux:n.alu_src_mux,reg:n.alu_src,zero:u,in:t.alu_src_in,out:e.alu_src},{mux:n.mem_read_mux,reg:n.mem_read,zero:u,in:t.mem_read_in,out:e.mem_read},{mux:n.mem_write_mux,reg:n.mem_write,zero:u,in:t.mem_write_in,out:e.mem_write},{mux:n.reg_write_mux,reg:n.reg_write,zero:u,in:t.reg_write_in,out:e.reg_write},{mux:n.mem_to_reg_mux,reg:n.mem_to_reg,zero:u,in:t.mem_to_reg_in,out:e.mem_to_reg},{mux:n.branch_mux,reg:n.branch,zero:u,in:t.branch_in,out:e.branch},{mux:n.jump_mux,reg:n.jump,zero:u,in:t.jump_in,out:e.jump},{mux:n.lui_mux,reg:n.lui,zero:u,in:t.lui_in,out:e.lui},{mux:n.auipc_mux,reg:n.auipc,zero:u,in:t.auipc_in,out:e.auipc},{mux:n.is_jalr_mux,reg:n.is_jalr,zero:u,in:t.is_jalr_in,out:e.is_jalr}],p=[{reg:n.pc,in:t.pc_in,out:e.pc},{reg:n.pc4,in:t.pc4_in,out:e.pc4},{reg:n.read1,in:t.read1_in,out:e.read1},{reg:n.read2,in:t.read2_in,out:e.read2},{reg:n.imm,in:t.imm_in,out:e.imm}];return[t.flush.to(d.a),t.stall.to(d.b),...h.flatMap(m=>[m.in.to(m.mux.in0),m.zero.out.to(m.mux.in1),d.out.to(m.mux.sel),m.mux.out.to(m.reg.data),m.reg.q.to(m.out)]),...p.flatMap(m=>[m.in.to(m.reg.data),m.reg.q.to(m.out)]),o.out.to(n.pc.we,n.pc4.we,n.read1.we,n.read2.we,n.imm.we,...h.map(m=>m.reg.we))]}})),JA=gt("RV32I_EX_Stage",()=>({inputs:{pc:P(32),pc4:P(32),read1:P(32),read2:P(32),imm:P(32),alu_op:P(4),alu_src:X,funct3:P(3),branch:X,jump:X,is_jalr:X,lui:X,auipc:X,mem_to_reg:X,forward_a:P(2),forward_b:P(2),mem_fwd:P(32),wb_fwd:P(32)},outputs:{alu_result:P(32),result:P(32),store_data:P(32),pc_plus_imm:P(32),branch_taken:X,redirect_taken:X,redirect_target:P(32)},nodes:{zero32:gn({value:0,width:32}),fwd_a_bit0:jo({low:0,high:0}),fwd_a_bit1:jo({low:1,high:1}),fwd_a_mux1:se({width:32}),fwd_a_mux2:se({width:32}),fwd_b_bit0:jo({low:0,high:0}),fwd_b_bit1:jo({low:1,high:1}),fwd_b_mux1:se({width:32}),fwd_b_mux2:se({width:32}),alu_src_mux:se({width:32}),alu:Z0,branch_comp:W0,branch_target:Il({width:32}),jalr_target:X0({width:32}),jalr_mask:gn({value:4294967294,width:32}),pc_plus_imm:Il({width:32}),ex_result:ld,branch_and:G0,next_pc:ty,pc_src_taken:td},connect:({inputs:t,outputs:e,nodes:{zero32:n,fwd_a_bit0:o,fwd_a_bit1:s,fwd_a_mux1:a,fwd_a_mux2:l,fwd_b_bit0:u,fwd_b_bit1:d,fwd_b_mux1:h,fwd_b_mux2:p,alu_src_mux:m,alu:y,branch_comp:b,branch_target:x,jalr_target:w,jalr_mask:_,pc_plus_imm:S,ex_result:k,branch_and:C,next_pc:E,pc_src_taken:R}})=>[t.forward_a.to(o.in,s.in),t.read1.to(a.in0),t.mem_fwd.to(a.in1,h.in1),o.out.to(a.sel),a.out.to(l.in0),t.wb_fwd.to(l.in1,p.in1),s.out.to(l.sel),t.forward_b.to(u.in,d.in),t.read2.to(h.in0),u.out.to(h.sel),h.out.to(p.in0),d.out.to(p.sel),p.out.to(m.in0,b.b,e.store_data),t.imm.to(m.in1,x.b,S.b,k.immediate),t.alu_src.to(m.sel),l.out.to(y.a,b.a),m.out.to(y.b),t.alu_op.to(y.alu_op),t.funct3.to(b.funct3),t.pc.to(x.a,S.a),y.result.to(w.a,k.alu_result,e.alu_result),_.out.to(w.b),n.out.to(k.load_data),t.pc4.to(k.pc_plus4,E.pc_plus4),S.sum.to(k.pc_plus_imm,e.pc_plus_imm),t.mem_to_reg.to(k.mem_to_reg),t.lui.to(k.lui),t.auipc.to(k.auipc),t.jump.to(k.jump,E.jump,R.b),t.branch.to(C.a,E.branch),b.take_branch.to(C.b,E.take_branch),x.sum.to(E.branch_target,E.jal_target),w.out.to(E.jalr_target),t.is_jalr.to(E.is_jalr),C.out.to(R.a,e.branch_taken),E.next_pc.to(e.redirect_target),R.out.to(e.redirect_taken),k.write_data.to(e.result)]})),tM=gt("RV32I_EXMEM_Regs",()=>({inputs:{alu_result_in:P(32),result_in:P(32),store_data_in:P(32),rd_in:P(5),funct3_in:P(3),pc4_in:P(32),imm_in:P(32),pc_plus_imm_in:P(32),mem_read_in:X,mem_write_in:X,reg_write_in:X,mem_to_reg_in:X,lui_in:X,auipc_in:X,jump_in:X},outputs:{alu_result:P(32),result:P(32),store_data:P(32),rd:P(5),funct3:P(3),pc4:P(32),imm:P(32),pc_plus_imm:P(32),mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,lui:X,auipc:X,jump:X},nodes:{one1:gn({value:1,width:1}),alu_result:Rt({width:32}),result:Rt({width:32}),store_data:Rt({width:32}),rd:Rt({width:5}),funct3:Rt({width:3}),pc4:Rt({width:32}),imm:Rt({width:32}),pc_plus_imm:Rt({width:32}),mem_read:Rt({width:1}),mem_write:Rt({width:1}),reg_write:Rt({width:1}),mem_to_reg:Rt({width:1}),lui:Rt({width:1}),auipc:Rt({width:1}),jump:Rt({width:1})},connect:({inputs:t,outputs:e,nodes:n})=>{const o=[{reg:n.alu_result,in:t.alu_result_in,out:e.alu_result},{reg:n.result,in:t.result_in,out:e.result},{reg:n.store_data,in:t.store_data_in,out:e.store_data},{reg:n.rd,in:t.rd_in,out:e.rd},{reg:n.funct3,in:t.funct3_in,out:e.funct3},{reg:n.pc4,in:t.pc4_in,out:e.pc4},{reg:n.imm,in:t.imm_in,out:e.imm},{reg:n.pc_plus_imm,in:t.pc_plus_imm_in,out:e.pc_plus_imm},{reg:n.mem_read,in:t.mem_read_in,out:e.mem_read},{reg:n.mem_write,in:t.mem_write_in,out:e.mem_write},{reg:n.reg_write,in:t.reg_write_in,out:e.reg_write},{reg:n.mem_to_reg,in:t.mem_to_reg_in,out:e.mem_to_reg},{reg:n.lui,in:t.lui_in,out:e.lui},{reg:n.auipc,in:t.auipc_in,out:e.auipc},{reg:n.jump,in:t.jump_in,out:e.jump}];return[...o.flatMap(s=>[s.in.to(s.reg.data),s.reg.q.to(s.out)]),n.one1.out.to(...o.map(s=>s.reg.we))]}})),eM=gt("RV32I_MEMWB_Regs",()=>({inputs:{alu_result_in:P(32),load_data_in:P(32),rd_in:P(5),funct3_in:P(3),pc4_in:P(32),imm_in:P(32),pc_plus_imm_in:P(32),reg_write_in:X,mem_to_reg_in:X,lui_in:X,auipc_in:X,jump_in:X},outputs:{alu_result:P(32),load_data:P(32),byte_offset:P(2),rd:P(5),funct3:P(3),pc4:P(32),imm:P(32),pc_plus_imm:P(32),reg_write:X,mem_to_reg:X,lui:X,auipc:X,jump:X},nodes:{one1:gn({value:1,width:1}),lo2:jo({low:0,high:1}),alu_result:Rt({width:32}),load_data:Rt({width:32}),byte_offset:Rt({width:2}),rd:Rt({width:5}),funct3:Rt({width:3}),pc4:Rt({width:32}),imm:Rt({width:32}),pc_plus_imm:Rt({width:32}),reg_write:Rt({width:1}),mem_to_reg:Rt({width:1}),lui:Rt({width:1}),auipc:Rt({width:1}),jump:Rt({width:1})},connect:({inputs:t,outputs:e,nodes:n})=>{const o=[{reg:n.alu_result,in:t.alu_result_in,out:e.alu_result},{reg:n.load_data,in:t.load_data_in,out:e.load_data},{reg:n.rd,in:t.rd_in,out:e.rd},{reg:n.funct3,in:t.funct3_in,out:e.funct3},{reg:n.pc4,in:t.pc4_in,out:e.pc4},{reg:n.imm,in:t.imm_in,out:e.imm},{reg:n.pc_plus_imm,in:t.pc_plus_imm_in,out:e.pc_plus_imm},{reg:n.reg_write,in:t.reg_write_in,out:e.reg_write},{reg:n.mem_to_reg,in:t.mem_to_reg_in,out:e.mem_to_reg},{reg:n.lui,in:t.lui_in,out:e.lui},{reg:n.auipc,in:t.auipc_in,out:e.auipc},{reg:n.jump,in:t.jump_in,out:e.jump}];return[...o.flatMap(s=>[s.in.to(s.reg.data),s.reg.q.to(s.out)]),t.alu_result_in.to(n.lo2.in),n.lo2.out.to(n.byte_offset.data),n.byte_offset.q.to(e.byte_offset),n.one1.out.to(...o.map(s=>s.reg.we),n.byte_offset.we)]}})),nM=gt("RV32I_WB_Stage",()=>({inputs:{alu_result:P(32),load_data:P(32),byte_offset:P(2),funct3:P(3),pc4:P(32),imm:P(32),pc_plus_imm:P(32),mem_to_reg:X,lui:X,auipc:X,jump:X},outputs:{write_data:P(32)},nodes:{load_align:ny,wb_mux:ld},connect:({inputs:t,outputs:e,nodes:{load_align:n,wb_mux:o}})=>[t.load_data.to(n.data),t.byte_offset.to(n.byte_offset),t.funct3.to(n.funct3),n.out.to(o.load_data),t.alu_result.to(o.alu_result),t.pc4.to(o.pc_plus4),t.imm.to(o.immediate),t.pc_plus_imm.to(o.pc_plus_imm),t.mem_to_reg.to(o.mem_to_reg),t.lui.to(o.lui),t.auipc.to(o.auipc),t.jump.to(o.jump),o.write_data.to(e.write_data)]})),iM=gt("RV32I_Core",({debug:t=!1}={})=>{const e={instruction:P(32),data_read:P(32),net_rx_data:P(32),net_rx_valid:X,net_rx_frame:X,...t?{debug_addr:P(5)}:{}},n={instr_addr:P(32),data_addr:P(32),data_write:P(32),data_mem_read:X,data_mem_write:X,data_funct3:P(3),net_tx_data:P(32),net_tx_valid:X,net_tx_frame:X,pc_out:P(32),...t?{debug_value:P(32),if_pc:P(32),id_pc:P(32),ex_pc:P(32),mem_pc4:P(32),wb_pc4:P(32)}:{}};return{inputs:e,outputs:n,nodes:{IF:ZA(),IFID:KA(),ID:QA({debug:t}),IDEX:WA(),EX:JA(),EXMEM:tM(),MEMWB:eM(),WB:nM(),hazard:iy,forward:ey,stall_inv:F0},connect:({inputs:o,outputs:s,nodes:{IF:a,IFID:l,ID:u,IDEX:d,EX:h,EXMEM:p,MEMWB:m,WB:y,hazard:b,forward:x,stall_inv:w}})=>{const _=[b.stall.to(w.in,d.stall),b.flush.to(l.flush,d.flush),w.out.to(a.stall_n,l.we),a.pc.to(s.instr_addr,s.pc_out,l.pc_in),a.pc4.to(l.pc4_in),o.instruction.to(l.instruction_in),l.instruction.to(u.instruction),l.pc.to(d.pc_in),l.pc4.to(d.pc4_in),u.hazard_rs1.to(b.if_rs1),u.hazard_rs2.to(b.if_rs2),u.read1.to(d.read1_in),u.read2.to(d.read2_in),u.imm.to(d.imm_in),u.rs1.to(d.rs1_in),u.rs2.to(d.rs2_in),u.rd.to(d.rd_in),u.funct3.to(d.funct3_in),u.alu_op.to(d.alu_op_in),u.alu_src.to(d.alu_src_in),u.mem_read.to(d.mem_read_in),u.mem_write.to(d.mem_write_in),u.reg_write.to(d.reg_write_in),u.mem_to_reg.to(d.mem_to_reg_in),u.branch.to(d.branch_in),u.jump.to(d.jump_in),u.lui.to(d.lui_in),u.auipc.to(d.auipc_in),u.is_jalr.to(d.is_jalr_in),d.pc.to(h.pc),d.pc4.to(h.pc4,p.pc4_in),d.read1.to(h.read1),d.read2.to(h.read2),d.imm.to(h.imm,p.imm_in),d.rs1.to(x.id_rs1),d.rs2.to(x.id_rs2),d.rd.to(b.id_rd,p.rd_in),d.funct3.to(h.funct3,p.funct3_in),d.alu_op.to(h.alu_op),d.alu_src.to(h.alu_src),d.mem_read.to(b.id_mem_read,p.mem_read_in),d.mem_write.to(p.mem_write_in),d.reg_write.to(p.reg_write_in),d.mem_to_reg.to(h.mem_to_reg,p.mem_to_reg_in),d.branch.to(h.branch),d.jump.to(h.jump,b.jump,p.jump_in),d.lui.to(h.lui,p.lui_in),d.auipc.to(h.auipc,p.auipc_in),d.is_jalr.to(h.is_jalr),x.forward_a.to(h.forward_a),x.forward_b.to(h.forward_b),p.result.to(h.mem_fwd),y.write_data.to(h.wb_fwd,u.wb_write_data),h.alu_result.to(p.alu_result_in),h.result.to(p.result_in),h.store_data.to(p.store_data_in),h.pc_plus_imm.to(p.pc_plus_imm_in),h.branch_taken.to(b.branch_taken),h.redirect_taken.to(a.redirect_taken),h.redirect_target.to(a.redirect_target),p.alu_result.to(s.data_addr,m.alu_result_in),p.store_data.to(s.data_write),p.mem_read.to(s.data_mem_read),p.mem_write.to(s.data_mem_write),p.funct3.to(s.data_funct3,m.funct3_in),p.rd.to(x.ex_rd,m.rd_in),p.reg_write.to(x.ex_reg_write,m.reg_write_in),p.pc4.to(m.pc4_in),p.imm.to(m.imm_in),p.pc_plus_imm.to(m.pc_plus_imm_in),p.mem_to_reg.to(m.mem_to_reg_in),p.lui.to(m.lui_in),p.auipc.to(m.auipc_in),p.jump.to(m.jump_in),o.data_read.to(m.load_data_in),m.alu_result.to(y.alu_result),m.load_data.to(y.load_data),m.byte_offset.to(y.byte_offset),m.funct3.to(y.funct3),m.pc4.to(y.pc4),m.imm.to(y.imm),m.pc_plus_imm.to(y.pc_plus_imm),m.mem_to_reg.to(y.mem_to_reg),m.lui.to(y.lui),m.auipc.to(y.auipc),m.jump.to(y.jump),m.rd.to(u.wb_rd,x.mem_rd),m.reg_write.to(u.wb_we,x.mem_reg_write)];return t&&_.push(o.debug_addr.to(u.debug_rs),u.debug_read.to(s.debug_value),a.pc.to(s.if_pc),l.pc.to(s.id_pc),d.pc.to(s.ex_pc),p.pc4.to(s.mem_pc4),m.pc4.to(s.wb_pc4)),_}}}),oM=Object.freeze(Object.defineProperty({__proto__:null,RV32I_Core:iM},Symbol.toStringTag,{value:"Module"})),rM=(()=>{const t=new Array(256);for(let e=0;e<256;e++){let n=e;for(let o=0;o<8;o++)n=n&1?(n>>>1^3988292384)>>>0:n>>>1>>>0;t[e]=n>>>0}return t})(),sM=gt("Eth_ProtocolDecoder",{inputs:{ethertype:P(16)},outputs:{is_ipv4:X,is_ipv6:X,is_arp:X,is_vlan:X,is_mpls:X},eval:({ethertype:t})=>{const e=t&65535;return{is_ipv4:e===2048?1:0,is_ipv6:e===34525?1:0,is_arp:e===2054?1:0,is_vlan:e===33024?1:0,is_mpls:e===34887?1:0}},meta:{category:"networking",icon:"EP",description:"EtherType → protocol flags"}}),aM=gt("Eth_AddrClassifier",{inputs:{dst_mac_hi:P(16),dst_mac_lo:P(32)},outputs:{is_broadcast:X,is_multicast:X,is_unicast:X},eval:({dst_mac_hi:t,dst_mac_lo:e})=>{const n=t&65535,o=(e&4294967295)>>>0,s=n===65535&&o===4294967295?1:0,a=!s&&(o>>>24&1)===1?1:0;return{is_broadcast:s,is_multicast:a,is_unicast:!s&&!a?1:0}},meta:{category:"networking",icon:"EA",description:"MAC address classifier"}}),lM=gt("Eth_FrameInput",{inputs:{enable:X,reset:X},outputs:{tdata:P(32),tkeep:P(4),tvalid:X,tlast:X,byte_offset:P(16)},state:{memory:new Map},eval:({memory:t})=>{const e=t??new Map,n=(e.get(65539)??0)>>>0,o=(e.get(65540)??0)&15,s=(e.get(65541)??0)!==0?1:0,a=(e.get(65542)??0)!==0?1:0,l=(e.get(65543)??0)&65535;return{tdata:n,tkeep:o,tvalid:s,tlast:a,byte_offset:l}},onTick:({enable:t,reset:e,memory:n})=>{const o=n??new Map,s=65536,a=65537,l=65538,u=65539,d=65540,h=65541,p=65542,m=65543;if(e){const E=new Map(o);return E.set(s,0),E.set(l,0),E.set(h,0),E.set(p,0),{memory:E}}if(!t){const E=new Map(o);return E.set(h,0),{memory:E}}const y=new Map(o);if(!(o.get(l)??0)){let E=-1;for(const R of o.keys())R<65536&&R>E&&(E=R);y.set(a,E+1),y.set(l,1)}const b=y.get(a)??0,x=o.get(s)??0;if(x>=b||b===0)return y.set(u,0),y.set(d,0),y.set(h,0),y.set(p,0),y.set(m,x&65535),{memory:y};const w=b-x,_=Math.min(4,w);let S=0,k=0;for(let E=0;E<_;E++)S=(S|((o.get(x+E)??0)&255)<<24-E*8)>>>0,k|=1<<3-E;const C=x+_>=b;return y.set(u,S),y.set(d,k),y.set(h,1),y.set(p,C?1:0),y.set(m,x&65535),y.set(s,x+_),{memory:y}},meta:{category:"networking",icon:"EI",description:"Ethernet frame input (AXI-Stream)"}}),cM=gt("Eth_FrameParser",{inputs:{tdata:P(32),tkeep:P(4),tvalid:X,tlast:X},outputs:{dst_mac_hi:P(16),dst_mac_lo:P(32),dst_mac_valid:X,src_mac_hi:P(16),src_mac_lo:P(32),src_mac_valid:X,ethertype:P(16),ethertype_valid:X,has_vlan:X,vlan_tci:P(16),vlan_valid:X,payload_valid:X,frame_done:X,frame_length:P(16),parse_state:P(4)},state:{memory:new Map},eval:({memory:t})=>{const e=t??new Map,n=e.get(0)??0,o=(e.get(1)??0)>>>0,s=(e.get(2)??0)&65535,a=(e.get(3)??0)>>>0,l=(e.get(4)??0)&65535,u=(e.get(5)??0)&65535,d=(e.get(6)??0)&65535,h=(e.get(7)??0)!==0,p=(e.get(8)??0)&65535;return{dst_mac_hi:s,dst_mac_lo:o,dst_mac_valid:n>=2?1:0,src_mac_hi:l,src_mac_lo:a,src_mac_valid:n>=4?1:0,ethertype:u,ethertype_valid:n>=6?1:0,has_vlan:h?1:0,vlan_tci:d,vlan_valid:h&&n>=6?1:0,payload_valid:n===6||n===7?1:0,frame_done:n===7?1:0,frame_length:p,parse_state:n}},onTick:({tdata:t,tkeep:e,tvalid:n,tlast:o,memory:s})=>{const a=s??new Map;if(!n)return{memory:a};const l=t>>>0,u=e&15,d=!!o,h=0,p=1,m=2,y=3,b=4,x=5,w=6,_=7,S=8,k=0,C=2,E=3,R=4,A=5,O=6,D=7,$=new Map(a);let q=a.get(h)??k;const Y=(u>>3&1)+(u>>2&1)+(u>>1&1)+(u&1),K=a.get(S)??0;$.set(S,K+Y);const W=l>>>24&255,B=l>>>16&255,H=l>>>8&255,j=l&255;switch(q){case k:$.set(p,l),$.set(h,C);break;case C:$.set(m,W<<8|B),$.set(y,H<<8|j),$.set(h,E);break;case E:$.set(b,a.get(y)??0),$.set(y,l),$.set(h,R);break;case R:{const I=(W<<8|B)&65535;I===33024?($.set(w,(H<<8|j)&65535),$.set(_,1),$.set(x,I),$.set(h,A)):($.set(x,I),$.set(h,d?D:O));break}case A:$.set(x,(W<<8|B)&65535),$.set(h,d?D:O);break;case O:d&&$.set(h,D);break}return d&&q!==D&&$.set(S,K+Y),{memory:$}},meta:{category:"networking",icon:"EF",description:"Ethernet frame parser FSM"}}),uM=gt("Eth_CRC32",{inputs:{data:P(32),data_valid:X,tkeep:P(4),tlast:X,reset:X},outputs:{crc:P(32),crc_ok:X},state:{memory:new Map},eval:({memory:t})=>{const e=t??new Map,n=(e.get(0)??4294967295)>>>0,o=(e.get(1)??0)!==0;return{crc:~n>>>0,crc_ok:o&&n===3736805603?1:0}},onTick:({data:t,data_valid:e,tkeep:n,tlast:o,reset:s,memory:a})=>{const l=a??new Map;if(s){const m=new Map(l);return m.set(0,4294967295),m.set(1,0),{memory:m}}if(!e)return{memory:l};const u=t>>>0,d=n&15;let h=(l.get(0)??4294967295)>>>0;for(let m=3;m>=0;m--)if(d>>m&1){const y=u>>>m*8&255;h=(rM[(h^y)&255]^h>>>8)>>>0}const p=new Map(l);return p.set(0,h),o&&p.set(1,1),{memory:p}},meta:{category:"networking",icon:"EC",description:"IEEE 802.3 CRC-32 checker"}}),fM=gt("MemBusMux",{inputs:{addr:P(32),write_data:P(32),mem_read:X,mem_write:X,funct3:P(3),read_data_0:P(32),read_data_1:P(32),read_data_2:P(32),read_data_3:P(32),read_data_4:P(32)},outputs:{local_addr:P(32),write_data_out:P(32),funct3_out:P(3),read_data:P(32),p0_read:X,p0_write:X,p1_read:X,p1_write:X,p2_read:X,p2_write:X,p3_read:X,p3_write:X,p4_read:X,p4_write:X},eval:({addr:t,write_data:e,mem_read:n,mem_write:o,funct3:s,read_data_0:a,read_data_1:l,read_data_2:u,read_data_3:d,read_data_4:h,base0:p,base1:m,base2:y,base3:b,base4:x,end0:w,end1:_,end2:S,end3:k,end4:C})=>{const E=(t??0)>>>0,R=(e??0)>>>0,A=(s??0)&7,O=[{base:(p??65536)>>>0,end:(w??131071)>>>0},{base:(m??2147483648)>>>0,end:(_??2147487743)>>>0},{base:(y??2147487744)>>>0,end:(S??2147491839)>>>0},{base:(b??2147491840)>>>0,end:(k??2147495935)>>>0},{base:(x??0)>>>0,end:(C??65535)>>>0}];let D=-1;for(let B=0;B<5;B++)if(E>=O[B].base&&E<=O[B].end){D=B;break}const $=D>=0?E-O[D].base>>>0:0,q=[a,l,u,d,h].map(B=>(B??0)>>>0),Y=D>=0?q[D]:0,K=!!n,W=!!o;return{local_addr:$,write_data_out:R,funct3_out:A,read_data:Y,p0_read:D===0&&K?1:0,p0_write:D===0&&W?1:0,p1_read:D===1&&K?1:0,p1_write:D===1&&W?1:0,p2_read:D===2&&K?1:0,p2_write:D===2&&W?1:0,p3_read:D===3&&K?1:0,p3_write:D===3&&W?1:0,p4_read:D===4&&K?1:0,p4_write:D===4&&W?1:0}},meta:{category:"rv32i",icon:"BUS",description:"Memory bus multiplexer"}}),dM=gt("UART_TX",{inputs:{addr:P(32),write_data:P(32),mem_read:X,mem_write:X},outputs:{read_data:P(32)},state:{text:""},eval:({mem_read:t})=>({read_data:t?1:0}),onTick:({addr:t,write_data:e,mem_write:n,text:o})=>{if(!n)return{text:o};if(t>>>0!==0)return{text:o};const a=String.fromCharCode(e&255),l=(o??"")+a;return{text:l.length>4096?l.slice(-4096):l}},meta:{category:"io",icon:"TX",description:"UART transmitter",synthesizable:!1}}),hM=gt("NIC_FIFO",{inputs:{tx_addr:P(32),tx_write_data:P(32),tx_mem_read:X,tx_mem_write:X,rx_addr:P(32),rx_mem_read:X,rx_mem_write:X,net_rx_data:P(32),net_rx_valid:X,net_rx_frame:X},outputs:{tx_read_data:P(32),rx_read_data:P(32),net_tx_data:P(32),net_tx_valid:X,net_tx_frame:X},state:{memory:new Map},eval:({tx_mem_read:t,rx_mem_read:e,tx_addr:n,rx_addr:o,memory:s})=>{const a=s??new Map;let l=0;t&&(n??0)>>>0===8&&(l=(a.get(8192)??0)-(a.get(8193)??0));let u=0;if(e){const x=(o??0)>>>0;x===0?u=(a.get(4096+(a.get(8209)??0))??0)>>>0:x===8&&(u=a.get(8210)??0)}const d=a.get(8196)??0,h=a.get(8195)??0,p=a.get(8192)??0;let m=0,y=0,b=0;return d&&h<p&&(m=(a.get(0+h)??0)>>>0,y=1,b=h+1>=p?1:0),{tx_read_data:l,rx_read_data:u,net_tx_data:m,net_tx_valid:y,net_tx_frame:b}},onTick:({tx_addr:t,tx_write_data:e,tx_mem_write:n,rx_addr:o,rx_mem_write:s,net_rx_data:a,net_rx_valid:l,memory:u})=>{const d=u??new Map,h=new Map(d);if(n){const m=(t??0)>>>0,y=(e??0)>>>0;if(m===0){const b=h.get(8192)??0;h.set(0+b,y),h.set(8192,b+1)}else m===12&&(h.set(8194,1),h.set(8195,0),h.set(8196,1))}if(d.get(8196)??0){const m=h.get(8195)??0,y=h.get(8192)??0;m<y&&(h.set(8195,m+1),m+1>=y&&(h.set(8196,0),h.set(8192,0),h.set(8193,0),h.set(8194,0)))}if(l){const m=(a??0)>>>0,y=h.get(8208)??0;h.set(4096+y,m),h.set(8208,y+1),h.set(8210,(h.get(8210)??0)+1)}if(s&&(o??0)>>>0===4){const y=h.get(8209)??0,b=h.get(8210)??0;b>0&&(h.set(8209,y+1),h.set(8210,b-1))}return{memory:h}},meta:{category:"networking",icon:"NIC",description:"Network interface FIFO",synthesizable:!1}}),pM=Object.freeze(Object.defineProperty({__proto__:null,Eth_AddrClassifier:aM,Eth_CRC32:uM,Eth_FrameInput:lM,Eth_FrameParser:cM,Eth_ProtocolDecoder:sM,MemBusMux:fM,NIC_FIFO:hM,UART_TX:dM},Symbol.toStringTag,{value:"Module"})),oy=t=>!!t&&typeof t=="object"&&"circuit"in t,mM=[...Object.values(aA),...Object.values(xA),...Object.values(AA),...Object.values(RA),...Object.values(LA),...Object.values(IA),...Object.values(UA),...Object.values(XA),...Object.values(oM),...Object.values(pM)],gM=t=>{if(oy(t))return t;if(typeof t=="function")try{const e=t();return oy(e)?e:null}catch{return null}return null},yM=Object.freeze(mM.map(gM).filter(t=>t!==null));function vM(t,e){const n=new Map;for(const o of e)n.set(o.name,sy(ry(o,new Map)));return sy(ry(t,n))}function ry(t,e){const n={};for(const a of t.inputs)n[a.name]=a;const o={};for(const a of t.outputs)o[a.name]=a;const s={};for(const a of t.nodes)s[a.id]=a;return{circuit:t,inputs:n,outputs:o,nodes:s,_dependencies:e}}function sy(t){return Object.defineProperty(t,"toJSON",{value:function(){const e={};for(const[n,o]of this._dependencies)e[n]=o;return{circuit:this.circuit,_dependencies:e}},enumerable:!1}),t}function bM(t,e,n){if(t.inputs.length===0&&t.outputs.length===0)return t;e.resolveCircuit(t.name)||e.addCircuit(t);const o=`${t.name}Demo`,s=[],a=[];let l=0;s.push({id:"dut",componentRef:t.name,arguments:{},inputs:t.inputs.map(u=>({id:`dut.${u.name}`,name:u.name,portType:u.portType})),outputs:t.outputs.map(u=>({id:`dut.${u.name}`,name:u.name,portType:u.portType})),clocks:t.clocks.map(u=>({id:`dut.${u.name}`,name:u.name}))});for(const u of t.inputs){const d=u.portType.kind==="bit",h={};!d&&u.portType.kind==="bus"&&(h.width=u.portType.width),n&&u.name in n&&(h.value=n[u.name]),s.push({id:u.name,label:u.name,componentRef:d?"Switch":"Input",arguments:h,inputs:[],outputs:[{id:`${u.name}.out`,name:"out",portType:u.portType}],clocks:[]}),a.push({id:`c${l++}`,source:{nodeId:u.name,portName:"out"},target:{nodeId:"dut",portName:u.name},portType:u.portType})}for(const u of t.outputs){const d=u.portType.kind==="bit",h={};!d&&u.portType.kind==="bus"&&(h.width=u.portType.width),s.push({id:u.name,label:u.name,componentRef:d?"Led":"HexDisplay",arguments:h,inputs:[{id:`${u.name}.in`,name:"in",portType:u.portType}],outputs:[],clocks:[]}),a.push({id:`c${l++}`,source:{nodeId:"dut",portName:u.name},target:{nodeId:u.name,portName:"in"},portType:u.portType})}return{version:1,name:o,inputs:[],outputs:[],clocks:[],state:[],nodes:s,connections:a,implementation:{kind:"composite"},metadata:{description:`Auto-generated harness for ${t.name}`}}}function ud(t,e,n=new Set){if(!t||n.has(t.name))return!1;if(n.add(t.name),t.clocks?.length>0||t.state?.length>0)return!0;for(const o of t.nodes){const s=e(o.componentRef);if(s&&ud(s,e,n))return!0}return!1}const ay=new Set(yM.map(t=>t.circuit.name));class Pl extends Error{constructor(e){super(e),this.name="CircuitToSourceError"}}function xM(t){const e=new Map;for(const[s,a]of t._dependencies)ay.has(s)||e.set(s,a.circuit);for(const s of t.circuit.nodes)if(!ay.has(s.componentRef)&&!e.has(s.componentRef)){const a=t._dependencies.get(s.componentRef);a&&e.set(s.componentRef,a.circuit)}const n=[],o=wM(e);for(const s of o)n.push(ly(s)),n.push("");return n.push(ly(t.circuit)),n.join(`
+  - `)}`);const x=n.eval!=null,w=Object.keys(a).length>0;let _,S;x&&!w?(_={kind:"primitive"},S=n.state!=null?"sequential":"combinational"):w?(_={kind:"composite"},S=eA(a,n.state)?"sequential":"combinational"):(_={kind:"primitive"},S="combinational");const k=Array.from(o,([z,U])=>({name:z,portType:U})),C=Array.from(s,([z,U])=>({name:z,portType:U})),E=[];(n.state!=null||n.onTick!=null)&&E.push({name:"clk"});const R=[];if(n.state!=null)for(const[z,U]of Object.entries(n.state))if(QN(U)){const G=Math.ceil(Math.log2(U.depth))||1;R.push({id:`${t}-${z}`,name:z,stateType:{kind:"memory",addressWidth:G,dataWidth:U.width},initialValue:{data:new Map(U.initial),addressWidth:G,dataWidth:U.width},clockRef:"clk",edge:"rising"})}else KN(U)?R.push({id:`${t}-${z}`,name:z,stateType:U.width===1?{kind:"bit"}:{kind:"bus",width:U.width},initialValue:U.initial,clockRef:"clk",edge:"rising"}):U instanceof Map?R.push({id:`${t}-${z}`,name:z,stateType:{kind:"memory",addressWidth:16,dataWidth:8},initialValue:{data:new Map(U),addressWidth:16,dataWidth:8},clockRef:"clk",edge:"rising"}):typeof U=="boolean"?R.push({id:`${t}-${z}`,name:z,stateType:{kind:"bit"},initialValue:U,clockRef:"clk",edge:"rising"}):R.push({id:`${t}-${z}`,name:z,stateType:{kind:"bus",width:32},initialValue:U,clockRef:"clk",edge:"rising"});const A=[];for(const[z,U]of Object.entries(a)){const G=U._args??{};A.push({id:z,componentRef:U.circuit.name,arguments:G,inputs:U.circuit.inputs.map(L=>({id:`${z}.${L.name}`,name:L.name,portType:L.portType})),outputs:U.circuit.outputs.map(L=>({id:`${z}.${L.name}`,name:L.name,portType:L.portType})),clocks:U.circuit.clocks.map(L=>({id:`${z}.${L.name}`,name:L.name}))})}const O=[];let D=0;for(const z of d)for(const U of z.targets)O.push({id:`conn_${D++}`,source:{nodeId:z.source.nodeId,portName:z.source.portName},target:{nodeId:U.nodeId,portName:U.portName},portType:z.portType});const $={timing:S},q=n.meta;q&&(q.description!==void 0&&($.description=q.description),q.category!==void 0&&($.category=q.category),q.icon!==void 0&&($.icon=q.icon),q.tags!==void 0&&($.tags=q.tags),q.author!==void 0&&($.author=q.author),q.version!==void 0&&($.version=q.version),q.synthesizable!==void 0&&($.synthesizable=q.synthesizable),q.interactiveArg!==void 0&&($.interactiveArg=q.interactiveArg));const Y={version:1,name:t,inputs:k,outputs:C,clocks:E,state:R,nodes:A,connections:O,implementation:_,metadata:$};for(const[z,U]of o);for(const[z,U]of s);const K=new Map;for(const[,z]of Object.entries(a))if(K.has(z.circuit.name)||K.set(z.circuit.name,z),z._dependencies)for(const[U,G]of z._dependencies)K.has(U)||K.set(U,G);const W={};for(const z of k)W[z.name]=z;const B={};for(const z of C)B[z.name]=z;const H={};for(const z of A)H[z.id]=z;const j={circuit:Y,inputs:W,outputs:B,nodes:H,_dependencies:K};Object.defineProperty(j,"toJSON",{value:function(){const z={};for(const[U,G]of this._dependencies)z[U]=G;return{circuit:this.circuit,_dependencies:z}},enumerable:!1});const I=n.state?Object.keys(n.state):void 0;return WN(t,{inputNames:Y.inputs.map(z=>z.name),outputNames:Y.outputs.map(z=>z.name),evalFn:n.eval??(()=>({})),stateKeys:I,onTickFn:n.onTick}),j}function q0(t,e,n,o,s){if(t.nodeId==="")!e.has(t.portName)&&!n.has(t.portName)&&s.push(`Circuit port '${t.portName}' does not exist`);else{const a=o[t.nodeId];if(!a){s.push(`Node '${t.nodeId}' does not exist`);return}a.circuit.inputs.some(u=>u.name===t.portName)||a.circuit.outputs.some(u=>u.name===t.portName)||s.push(`Port '${t.portName}' does not exist on node '${t.nodeId}' (${a.circuit.name})`)}}function eA(t,e){if(e!=null)return!0;for(const n of Object.values(t))if(n.circuit.clocks.length>0||n.circuit.state.length>0)return!0;return!1}const G0=gt("And",{inputs:{a:X,b:X},outputs:{out:X},meta:{category:"logic-gates",icon:"&",description:"Logical AND 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a=s,l=a>=32?4294967295:(1<<a)-1,u=(e>>>0)+(n>>>0)+o;return{sum:u&l,carry_out:u>l?1:0}}})),cA=gt("Subtractor",({width:t=8}={})=>({inputs:{a:P(t),b:P(t),borrow_in:X},outputs:{difference:P(t),borrow_out:X},meta:{category:"arithmetic",icon:"−",description:"N-bit subtractor with borrow"},eval:({a:e,b:n,borrow_in:o,width:s=t})=>{const a=s,l=a>=32?4294967295:(1<<a)-1,u=(e>>>0)-(n>>>0)-o;return{difference:u&l,borrow_out:u<0?1:0}}})),uA=gt("Multiplier",{inputs:{a:P(8),b:P(8)},outputs:{product:P(16)},meta:{category:"arithmetic",icon:"×",description:"N-bit multiplier"},eval:({a:t,b:e})=>({product:t*e&65535})}),fA=gt("Comparator",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{eq:X,lt:X,gt:X},meta:{category:"arithmetic",icon:"⋚",description:"Unsigned comparator"},eval:({a:e,b:n})=>{const o=e>>>0,s=n>>>0;return{eq:o===s?1:0,lt:o<s?1:0,gt:o>s?1:0}}})),dA=gt("LeftShifter",({width:t=8}={})=>({inputs:{value:P(t),shift:P(t)},outputs:{result:P(t)},meta:{category:"arithmetic",icon:"≪",description:"Left bit shifter"},eval:({value:e,shift:n,width:o=t})=>{const s=o,a=n,l=s>=32?4294967295:(1<<s)-1;return{result:a>=s?0:e<<a&l}}})),hA=gt("RightShifter",({width:t=8}={})=>({inputs:{value:P(t),shift:P(t)},outputs:{result:P(t)},meta:{category:"arithmetic",icon:"≫",description:"Right bit shifter"},eval:({value:e,shift:n,width:o=t})=>{const s=o,a=n;return{result:a>=s?0:e>>>a}}})),pA=gt("SignedAdder",{inputs:{a:P(8),b:P(8),carry_in:X},outputs:{sum:P(8),overflow:X,carry_out:X},meta:{category:"arithmetic",icon:"±+",description:"Signed adder with overflow detection"},eval:({a:t,b:e,carry_in:n})=>{const a=t>>>0,l=e>>>0,u=a+l+n,d=u&255,h=(a&128)!==0,p=(l&128)!==0,m=(d&128)!==0;return{sum:d,overflow:h===p&&h!==m?1:0,carry_out:u>255?1:0}}}),mA=gt("SignedComparator",{inputs:{a:P(8),b:P(8)},outputs:{eq:X,lt:X,gt:X,lte:X,gte:X},meta:{category:"arithmetic",icon:"±⋚",description:"Signed comparator"},eval:({a:t,b:e})=>{const s=t&255,a=e&255,l=s&128?s-256:s,u=a&128?a-256:a;return{eq:l===u?1:0,lt:l<u?1:0,gt:l>u?1:0,lte:l<=u?1:0,gte:l>=u?1:0}}}),gA=gt("SignedMultiplier",{inputs:{a:P(8),b:P(8)},outputs:{product:P(16)},meta:{category:"arithmetic",icon:"±×",description:"Signed multiplier"},eval:({a:t,b:e})=>{const s=t&255,a=e&255,l=s&128?s-256:s,u=a&128?a-256:a,d=l*u;return{product:d>=0?d:d+65536}}}),X0=gt("BusAnd",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{out:P(t)},meta:{category:"bus-operations",icon:"&8",description:"Bitwise AND on buses"},eval:({a:e,b:n})=>({out:e&n})})),yA=gt("BusOr",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{out:P(t)},meta:{category:"bus-operations",icon:"|8",description:"Bitwise OR on buses"},eval:({a:e,b:n})=>({out:(e|n)>>>0})})),vA=gt("BusNot",{inputs:{in:P(8)},outputs:{out:P(8)},meta:{category:"bus-operations",icon:"¬8",description:"Bitwise NOT on bus"},eval:({in:t})=>({out:~t&255})}),bA=gt("BusXor",({width:t=8}={})=>({inputs:{a:P(t),b:P(t)},outputs:{out:P(t)},meta:{category:"bus-operations",icon:"⊕8",description:"Bitwise XOR on buses"},eval:({a:e,b:n})=>({out:(e^n)>>>0})})),xA=Object.freeze(Object.defineProperty({__proto__:null,Adder:Il,BusAnd:X0,BusNot:vA,BusOr:yA,BusXor:bA,Comparator:fA,Incrementer:lA,LeftShifter:dA,Multiplier:uA,RightShifter:hA,SignedAdder:pA,SignedComparator:mA,SignedMultiplier:gA,Subtractor:cA},Symbol.toStringTag,{value:"Module"})),se=gt("Mux",({width:t=1}={})=>({inputs:{in0:t===1?X:P(t),in1:t===1?X:P(t),sel:X},outputs:{out:t===1?X:P(t)},meta:{category:"plexers",icon:"MUX",description:"Multiplexer — sel=0 picks in0, sel=1 picks in1"},eval:({in0:e,in1:n,sel:o})=>({out:o?n:e})})),wA=gt("Decoder",{inputs:{in:P(2)},outputs:{out0:X,out1:X,out2:X,out3:X},meta:{category:"plexers",icon:"DEC",description:"2-to-4 decoder"},eval:({in:t})=>({out0:t===0?1:0,out1:t===1?1:0,out2:t===2?1:0,out3:t===3?1:0})}),_A=gt("Splitter",{inputs:{in:P(8)},outputs:{out0:P(4),out1:P(4)},meta:{category:"utilities",icon:"⊢",description:"Bus splitter"},eval:({in:t})=>({out0:t&15,out1:t>>4&15})}),SA=gt("Splitter8to8",{inputs:{in:P(8)},outputs:{bit0:X,bit1:X,bit2:X,bit3:X,bit4:X,bit5:X,bit6:X,bit7:X},meta:{category:"utilities",icon:"⊢8",description:"Splits 8-bit bus into 8 individual bits"},eval:({in:t})=>({bit0:t>>0&1,bit1:t>>1&1,bit2:t>>2&1,bit3:t>>3&1,bit4:t>>4&1,bit5:t>>5&1,bit6:t>>6&1,bit7:t>>7&1})}),EA=gt("Combiner8to8",{inputs:{bit0:X,bit1:X,bit2:X,bit3:X,bit4:X,bit5:X,bit6:X,bit7:X},outputs:{out:P(8)},meta:{category:"utilities",icon:"⊣8",description:"Combines 8 bits into an 8-bit bus"},eval:({bit0:t,bit1:e,bit2:n,bit3:o,bit4:s,bit5:a,bit6:l,bit7:u})=>({out:t&1|(e&1)<<1|(n&1)<<2|(o&1)<<3|(s&1)<<4|(a&1)<<5|(l&1)<<6|(u&1)<<7})}),CA=gt("Concat",{inputs:{high:P(4),low:P(4)},outputs:{out:P(8)},meta:{category:"utilities",icon:"||",description:"Concatenate two buses"},eval:({high:t,low:e})=>({out:t<<4|e})}),jo=gt("BitSlice",t=>({inputs:{in:P(8)},outputs:{out:P(8)},meta:{category:"utilities",icon:"[]",description:"Extract bits [low..high] from input"},eval:({in:e,low:n=0,high:o=7})=>{const s=n,l=o-s+1,u=l>=32?4294967295:(1<<l)-1;return{out:e>>s&u}}})),TA=gt("AddressCombiner",{inputs:{lo:P(8),hi:P(8)},outputs:{out:P(16)},meta:{category:"utilities",icon:"⊕16",description:"Combines two 8-bit buses into 16-bit"},eval:({lo:t,hi:e})=>({out:(e&255)<<8|t&255})}),NA=gt("Probe",{inputs:{in:X},outputs:{out:X},meta:{category:"utilities",icon:"🔍",description:"Debug observation point"},eval:({in:t})=>({out:t})}),AA=Object.freeze(Object.defineProperty({__proto__:null,AddressCombiner:TA,BitSlice:jo,Combiner8to8:EA,Concat:CA,Decoder:wA,Mux:se,Probe:NA,Splitter:_A,Splitter8to8:SA},Symbol.toStringTag,{value:"Module"})),MA=gt("DFlipFlop",({value:t=!1}={})=>({inputs:{d:X},outputs:{q:X,q_bar:X},state:{value:t},meta:{category:"sequential",icon:"D",description:"D Flip-Flop — stores 1 bit on rising clock edge"},eval:({value:e})=>({q:e?1:0,q_bar:e?0:1}),onTick:({d:e})=>({value:!!e})})),Rt=gt("Register",({width:t=8,value:e=0}={})=>({inputs:{data:P(t),we:X},outputs:{q:P(t)},state:{value:e},meta:{category:"sequential",icon:"REG",description:"N-bit register — stores data on rising clock edge when write-enable is high"},eval:({value:n})=>({q:n}),onTick:({data:n,we:o,value:s})=>({value:o?n:s})})),RA=Object.freeze(Object.defineProperty({__proto__:null,DFlipFlop:MA,Register:Rt},Symbol.toStringTag,{value:"Module"})),kA=gt("ROM",t=>({inputs:{addr:P(16)},outputs:{data_out:P(8)},state:{memory:Do(65536,8)},meta:{category:"memory",icon:"📀",description:"Read-only memory with address decoding"},eval:({addr:e,memory:n})=>({data_out:n[e]}),onTick:({memory:e})=>({memory:e})})),OA=gt("RAM",t=>({inputs:{addr:P(8),data_in:P(8),we:X},outputs:{data_out:P(8)},state:{memory:Do(256,8)},meta:{category:"memory",icon:"📝",description:"Random access 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Map},meta:{category:"display",icon:"📺",description:"Hardware-accurate raster display with scan counters",synthesizable:!1},eval:()=>({addrB:0,scanX:0,scanY:0,hblank:0,vblank:0})})),$A=gt("Console",{inputs:{data:P(8),we:X},state:{text:""},onTick:({data:t,we:e,text:n})=>{if(!e)return{text:n};const o=t&255;if(o===0)return{text:n};if(o===12)return{text:""};const s=(n??"")+String.fromCharCode(o);return{text:s.length>4096?s.slice(-4096):s}},meta:{category:"display",icon:"📟",description:"Text console output",synthesizable:!1}}),UA=Object.freeze(Object.defineProperty({__proto__:null,Console:$A,HexDisplay:sd,RasterDisplay:HA,Screen:BA,SevenSegment:PA},Symbol.toStringTag,{value:"Module"})),ad=gt("RV32I_Decode",{inputs:{instruction:P(32)},outputs:{opcode:P(7),rd:P(5),funct3:P(3),rs1:P(5),rs2:P(5),funct7:P(7)},eval:({instruction:t})=>{const e=t>>>0;return{opcode:e&127,rd:e>>>7&31,funct3:e>>>12&7,rs1:e>>>15&31,rs2:e>>>20&31,funct7:e>>>25&127}},meta:{category:"rv32i",icon:"DEC",description:"RISC-V instruction decoder"}}),Z0=gt("RV32I_ALU",{inputs:{a:P(32),b:P(32),alu_op:P(4)},outputs:{result:P(32),zero:X},eval:({a:t,b:e,alu_op:n})=>{const o=t>>>0,s=e>>>0,a=n&15;let l;switch(a){case 0:l=o+s>>>0;break;case 1:l=o-s>>>0;break;case 2:l=(o&s)>>>0;break;case 3:l=(o|s)>>>0;break;case 4:l=(o^s)>>>0;break;case 5:l=o<<(s&31)>>>0;break;case 6:l=o>>>(s&31);break;case 7:l=(o|0)>>(s&31)>>>0;break;case 8:l=(o|0)<(s|0)?1:0;break;case 9:l=o<s?1:0;break;default:l=0}return{result:l,zero:l===0?1:0}},meta:{category:"rv32i",icon:"ALU",description:"RISC-V ALU"}}),K0=gt("RV32I_ImmGen",{inputs:{instruction:P(32)},outputs:{immediate:P(32)},eval:({instruction:t})=>{const e=t>>>0,n=e&127;let o;switch(n){case 19:case 3:case 103:o=e>>20|0;break;case 35:o=e>>25<<5|e>>>7&31|0,o=o<<20>>20;break;case 99:{const s=e>>>31&1,a=e>>>7&1,l=e>>>25&63,u=e>>>8&15;o=s<<12|a<<11|l<<5|u<<1,o=o<<19>>19;break}case 55:case 23:o=e&4294963200|0;break;case 111:{const s=e>>>31&1,a=e>>>12&255,l=e>>>20&1,u=e>>>21&1023;o=s<<20|a<<12|l<<11|u<<1,o=o<<11>>11;break}default:o=0}return{immediate:o>>>0}},meta:{category:"rv32i",icon:"IMM",description:"RISC-V immediate generator"}}),Q0=gt("RV32I_Control",{inputs:{opcode:P(7),funct3:P(3),funct7_bit:X},outputs:{alu_op:P(4),alu_src:X,mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,branch:X,jump:X,lui:X,auipc:X,is_jalr:X},eval:({opcode:t,funct3:e,funct7_bit:n})=>{const o=t&127,s=e&7,a=n?1:0;let l=0,u=0,d=0,h=0,p=0,m=0,y=0,b=0,x=0,w=0,_=0;switch(o){case 51:switch(p=1,s){case 0:l=a?1:0;break;case 1:l=5;break;case 2:l=8;break;case 3:l=9;break;case 4:l=4;break;case 5:l=a?7:6;break;case 6:l=3;break;case 7:l=2;break}break;case 19:switch(p=1,u=1,s){case 0:l=0;break;case 1:l=5;break;case 2:l=8;break;case 3:l=9;break;case 4:l=4;break;case 5:l=a?7:6;break;case 6:l=3;break;case 7:l=2;break}break;case 3:p=1,u=1,d=1,m=1,l=0;break;case 35:u=1,h=1,l=0;break;case 99:y=1,l=1;break;case 111:p=1,b=1;break;case 103:p=1,b=1,u=1,_=1,l=0;break;case 55:p=1,x=1;break;case 23:p=1,w=1;break}return{alu_op:l,alu_src:u,mem_read:d,mem_write:h,reg_write:p,mem_to_reg:m,branch:y,jump:b,lui:x,auipc:w,is_jalr:_}},meta:{category:"rv32i",icon:"CTL",description:"RISC-V control unit"}}),W0=gt("RV32I_BranchComp",{inputs:{a:P(32),b:P(32),funct3:P(3)},outputs:{take_branch:X},eval:({a:t,b:e,funct3:n})=>{const o=t>>>0,s=e>>>0,a=o|0,l=s|0,u=n&7;let d=0;switch(u){case 0:d=o===s?1:0;break;case 1:d=o!==s?1:0;break;case 4:d=a<l?1:0;break;case 5:d=a>=l?1:0;break;case 6:d=o<s?1:0;break;case 7:d=o>=s?1:0;break}return{take_branch:d}},meta:{category:"rv32i",icon:"CMP",description:"RISC-V branch comparator"}}),J0=gt("RV32I_RegisterFile",{inputs:{rs1:P(5),rs2:P(5),rd:P(5),write_data:P(32),we:X,debug_rs:P(5)},outputs:{read1:P(32),read2:P(32),debug_read:P(32)},state:{memory:Do(32,32)},eval:({rs1:t,rs2:e,debug_rs:n,memory:o})=>{const s=t&31,a=e&31,l=n&31;return{read1:s===0?0:o[s]>>>0,read2:a===0?0:o[a]>>>0,debug_read:l===0?0:o[l]>>>0}},onTick:({rd:t,write_data:e,we:n,memory:o})=>{const s=t&31;return n&&s!==0&&(o[s]=e>>>0),{memory:o}},meta:{category:"rv32i",icon:"RF",description:"RISC-V 32-register file"}}),YA=gt("RV32I_InstrMem",{inputs:{addr:P(32)},outputs:{instruction:P(32)},state:{memory:Do(65536,8)},eval:({addr:t,memory:e})=>{const n=t>>>0&-4,o=e[n],s=e[n+1],a=e[n+2];return{instruction:(e[n+3]<<24|a<<16|s<<8|o)>>>0}},onTick:({memory:t})=>({memory:t}),meta:{category:"rv32i",icon:"IM",description:"RISC-V instruction memory"}}),qA=gt("RV32I_DataMem",{inputs:{addr:P(32),write_data:P(32),mem_read:X,mem_write:X,funct3:P(3)},outputs:{read_data:P(32),misalign:X},state:{memory:Do(65536,8)},eval:({addr:t,mem_read:e,mem_write:n,funct3:o,memory:s})=>{if(!e&&!n)return{read_data:0,misalign:0};const a=t>>>0,l=o&7;let u=0;if(((l===1||l===5)&&(a&1)!==0||l===2&&(a&3)!==0)&&(u=1),!e)return{read_data:0,misalign:u};const d=a&-4;return{read_data:(s[d+3]<<24|s[d+2]<<16|s[d+1]<<8|s[d])>>>0,misalign:u}},onTick:({addr:t,write_data:e,mem_write:n,funct3:o,memory:s})=>{if(!n)return{memory:s};const a=t>>>0,l=e>>>0;switch(o&7){case 0:s[a]=l&255;break;case 1:s[a]=l&255,s[a+1]=l>>>8&255;break;case 2:s[a]=l&255,s[a+1]=l>>>8&255,s[a+2]=l>>>16&255,s[a+3]=l>>>24&255;break}return{memory:s}},meta:{category:"rv32i",icon:"DM",description:"RISC-V data memory with byte/half/word access"}}),ld=gt("RV32I_WritebackMux",{inputs:{alu_result:P(32),load_data:P(32),pc_plus4:P(32),immediate:P(32),pc_plus_imm:P(32),mem_to_reg:X,lui:X,auipc:X,jump:X},outputs:{write_data:P(32)},eval:({alu_result:t,load_data:e,pc_plus4:n,immediate:o,pc_plus_imm:s,mem_to_reg:a,lui:l,auipc:u,jump:d})=>{let h;return d?h=n:u?h=s:l?h=o:a?h=e:h=t,{write_data:(h??0)>>>0}},meta:{category:"rv32i",icon:"WB",description:"RISC-V writeback mux"}}),ty=gt("RV32I_NextPCMux",{inputs:{pc_plus4:P(32),branch_target:P(32),jal_target:P(32),jalr_target:P(32),branch:X,take_branch:X,jump:X,is_jalr:X},outputs:{next_pc:P(32)},eval:({pc_plus4:t,branch_target:e,jal_target:n,jalr_target:o,branch:s,take_branch:a,jump:l,is_jalr:u})=>{let d;return l?d=u?o&-2:n:s&&a?d=e:d=t,{next_pc:(d??0)>>>0}},meta:{category:"rv32i",icon:"PC",description:"RISC-V next PC mux"}}),ey=gt("RV32I_ForwardingUnit",{inputs:{id_rs1:P(5),id_rs2:P(5),ex_rd:P(5),ex_reg_write:X,mem_rd:P(5),mem_reg_write:X},outputs:{forward_a:P(2),forward_b:P(2)},eval:({id_rs1:t,id_rs2:e,ex_rd:n,ex_reg_write:o,mem_rd:s,mem_reg_write:a})=>{const l=t&31,u=e&31,d=n&31,h=s&31;let p=0,m=0;return o&&d!==0&&d===l?p=1:a&&h!==0&&h===l&&(p=2),o&&d!==0&&d===u?m=1:a&&h!==0&&h===u&&(m=2),{forward_a:p,forward_b:m}},meta:{category:"rv32i",icon:"FWD",description:"RISC-V data forwarding unit"}}),cd=gt("RV32I_WBBypass",{inputs:{rs_val:P(32),rs_addr:P(5),wb_val:P(32),wb_rd:P(5),wb_we:X},outputs:{out:P(32)},eval:({rs_val:t,rs_addr:e,wb_val:n,wb_rd:o,wb_we:s})=>{const a=e&31,l=o&31;return{out:(s&&l!==0&&l===a?n:t)>>>0}},meta:{category:"rv32i",icon:"BYP",description:"RISC-V writeback bypass"}}),GA=gt("RV32I_LoadAlign",{inputs:{data:P(32),funct3:P(3)},outputs:{out:P(32)},eval:({data:t,funct3:e})=>{const n=t>>>0,o=e&7;let s;switch(o){case 0:{s=(n&255)<<24>>24>>>0;break}case 1:{s=(n&65535)<<16>>16>>>0;break}case 4:s=n&255;break;case 5:s=n&65535;break;default:s=n}return{out:s}},meta:{category:"rv32i",icon:"LA",description:"RISC-V load alignment (byte/half/word)"}}),ny=gt("RV32I_LoadAlignFull",{inputs:{data:P(32),byte_offset:P(2),funct3:P(3)},outputs:{out:P(32)},eval:({data:t,byte_offset:e,funct3:n})=>{const o=t>>>0,s=e&3,a=n&7,l=o>>>s*8&255,u=o>>>(s&2)*8&65535;let d;switch(a){case 0:d=l<<24>>24>>>0;break;case 1:d=u<<16>>16>>>0;break;case 4:d=l;break;case 5:d=u;break;default:d=o;break}return{out:d}},meta:{category:"rv32i",icon:"LA2",description:"RISC-V full load aligner (raw word + byte offset + funct3)"}}),iy=gt("RV32I_HazardUnit",{inputs:{if_rs1:P(5),if_rs2:P(5),id_rd:P(5),id_mem_read:X,branch_taken:X,jump:X},outputs:{stall:X,flush:X},eval:({if_rs1:t,if_rs2:e,id_rd:n,id_mem_read:o,branch_taken:s,jump:a})=>{const l=t&31,u=e&31,d=n&31;return{stall:o&&d!==0&&(d===l||d===u)?1:0,flush:s||a?1:0}},meta:{category:"rv32i",icon:"HAZ",description:"RISC-V hazard detection unit"}}),FA=gt("DualPortROM",t=>({inputs:{addrA:P(32),addrB:P(32)},outputs:{dataA:P(32),dataB:P(32)},state:{memory:Do(65536,8)},eval:({addrA:e,addrB:n,memory:o})=>{const s=e>>>0&-4,a=n>>>0&-4;return{dataA:(o[s+3]<<24|o[s+2]<<16|o[s+1]<<8|o[s])>>>0,dataB:(o[a+3]<<24|o[a+2]<<16|o[a+1]<<8|o[a])>>>0}},onTick:({memory:e})=>({memory:e}),meta:{category:"memory",description:"Dual-port read-only memory"}})),XA=Object.freeze(Object.defineProperty({__proto__:null,DualPortROM:FA,RV32I_ALU:Z0,RV32I_BranchComp:W0,RV32I_Control:Q0,RV32I_DataMem:qA,RV32I_Decode:ad,RV32I_ForwardingUnit:ey,RV32I_HazardUnit:iy,RV32I_ImmGen:K0,RV32I_InstrMem:YA,RV32I_LoadAlign:GA,RV32I_LoadAlignFull:ny,RV32I_NextPCMux:ty,RV32I_RegisterFile:J0,RV32I_WBBypass:cd,RV32I_WritebackMux:ld},Symbol.toStringTag,{value:"Module"})),ZA=gt("RV32I_IF_Stage",()=>({inputs:{stall_n:X,redirect_taken:X,redirect_target:P(32)},outputs:{pc:P(32),pc4:P(32)},nodes:{pc:Rt({width:32}),four:gn({value:4,width:32}),pc_plus4:Il({width:32}),pc_next_mux:se({width:32})},connect:({inputs:t,outputs:e,nodes:{pc:n,four:o,pc_plus4:s,pc_next_mux:a}})=>[n.q.to(s.a,e.pc),o.out.to(s.b),s.sum.to(a.in0,e.pc4),t.redirect_target.to(a.in1),t.redirect_taken.to(a.sel),a.out.to(n.data),t.stall_n.to(n.we)]})),KA=gt("RV32I_IFID_Regs",()=>({inputs:{instruction_in:P(32),pc_in:P(32),pc4_in:P(32),we:X,flush:X},outputs:{instruction:P(32),pc:P(32),pc4:P(32)},nodes:{zero32:gn({value:0,width:32}),instr_mux:se({width:32}),instr:Rt({width:32}),pc_mux:se({width:32}),pc:Rt({width:32}),pc4_mux:se({width:32}),pc4:Rt({width:32})},connect:({inputs:t,outputs:e,nodes:{zero32:n,instr_mux:o,instr:s,pc_mux:a,pc:l,pc4_mux:u,pc4:d}})=>[t.instruction_in.to(o.in0),t.pc_in.to(a.in0),t.pc4_in.to(u.in0),n.out.to(o.in1,a.in1,u.in1),t.flush.to(o.sel,a.sel,u.sel),o.out.to(s.data),a.out.to(l.data),u.out.to(d.data),t.we.to(s.we,l.we,d.we),s.q.to(e.instruction),l.q.to(e.pc),d.q.to(e.pc4)]})),QA=gt("RV32I_ID_Stage",({debug:t=!1}={})=>{const e={instruction:P(32),wb_write_data:P(32),wb_rd:P(5),wb_we:X,...t?{debug_rs:P(5)}:{}},n={read1:P(32),read2:P(32),imm:P(32),rs1:P(5),rs2:P(5),rd:P(5),funct3:P(3),alu_op:P(4),alu_src:X,mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,branch:X,jump:X,lui:X,auipc:X,is_jalr:X,hazard_rs1:P(5),hazard_rs2:P(5),...t?{debug_read:P(32)}:{}};return{inputs:e,outputs:n,nodes:{decode:ad,immgen:K0,control:Q0,funct7_splitter:jo({low:5,high:5}),regfile:J0,hazard_decode:ad,wb_bypass1:cd,wb_bypass2:cd},connect:({inputs:o,outputs:s,nodes:{decode:a,immgen:l,control:u,funct7_splitter:d,regfile:h,hazard_decode:p,wb_bypass1:m,wb_bypass2:y}})=>{const b=[o.instruction.to(a.instruction,l.instruction,p.instruction),a.opcode.to(u.opcode),a.funct3.to(u.funct3,s.funct3),a.funct7.to(d.in),d.out.to(u.funct7_bit),a.rs1.to(h.rs1,m.rs_addr,s.rs1),a.rs2.to(h.rs2,y.rs_addr,s.rs2),a.rd.to(s.rd),p.rs1.to(s.hazard_rs1),p.rs2.to(s.hazard_rs2),h.read1.to(m.rs_val),h.read2.to(y.rs_val),o.wb_write_data.to(m.wb_val,y.wb_val,h.write_data),o.wb_rd.to(m.wb_rd,y.wb_rd,h.rd),o.wb_we.to(m.wb_we,y.wb_we,h.we),m.out.to(s.read1),y.out.to(s.read2),l.immediate.to(s.imm),u.alu_op.to(s.alu_op),u.alu_src.to(s.alu_src),u.mem_read.to(s.mem_read),u.mem_write.to(s.mem_write),u.reg_write.to(s.reg_write),u.mem_to_reg.to(s.mem_to_reg),u.branch.to(s.branch),u.jump.to(s.jump),u.lui.to(s.lui),u.auipc.to(s.auipc),u.is_jalr.to(s.is_jalr)];return t&&b.push(o.debug_rs.to(h.debug_rs),h.debug_read.to(s.debug_read)),b}}}),WA=gt("RV32I_IDEX_Regs",()=>({inputs:{pc_in:P(32),pc4_in:P(32),read1_in:P(32),read2_in:P(32),imm_in:P(32),rs1_in:P(5),rs2_in:P(5),rd_in:P(5),funct3_in:P(3),alu_op_in:P(4),alu_src_in:X,mem_read_in:X,mem_write_in:X,reg_write_in:X,mem_to_reg_in:X,branch_in:X,jump_in:X,lui_in:X,auipc_in:X,is_jalr_in:X,flush:X,stall:X},outputs:{pc:P(32),pc4:P(32),read1:P(32),read2:P(32),imm:P(32),rs1:P(5),rs2:P(5),rd:P(5),funct3:P(3),alu_op:P(4),alu_src:X,mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,branch:X,jump:X,lui:X,auipc:X,is_jalr:X},nodes:{one1:gn({value:1,width:1}),zero5:gn({value:0,width:5}),zero4:gn({value:0,width:4}),zero3:gn({value:0,width:3}),zero1:gn({value:0,width:1}),flush_or:td,pc:Rt({width:32}),pc4:Rt({width:32}),read1:Rt({width:32}),read2:Rt({width:32}),imm:Rt({width:32}),rs1_mux:se({width:5}),rs1:Rt({width:5}),rs2_mux:se({width:5}),rs2:Rt({width:5}),rd_mux:se({width:5}),rd:Rt({width:5}),funct3_mux:se({width:3}),funct3:Rt({width:3}),alu_op_mux:se({width:4}),alu_op:Rt({width:4}),alu_src_mux:se({width:1}),alu_src:Rt({width:1}),mem_read_mux:se({width:1}),mem_read:Rt({width:1}),mem_write_mux:se({width:1}),mem_write:Rt({width:1}),reg_write_mux:se({width:1}),reg_write:Rt({width:1}),mem_to_reg_mux:se({width:1}),mem_to_reg:Rt({width:1}),branch_mux:se({width:1}),branch:Rt({width:1}),jump_mux:se({width:1}),jump:Rt({width:1}),lui_mux:se({width:1}),lui:Rt({width:1}),auipc_mux:se({width:1}),auipc:Rt({width:1}),is_jalr_mux:se({width:1}),is_jalr:Rt({width:1})},connect:({inputs:t,outputs:e,nodes:n})=>{const{one1:o,zero5:s,zero4:a,zero3:l,zero1:u,flush_or:d}=n,h=[{mux:n.rs1_mux,reg:n.rs1,zero:s,in:t.rs1_in,out:e.rs1},{mux:n.rs2_mux,reg:n.rs2,zero:s,in:t.rs2_in,out:e.rs2},{mux:n.rd_mux,reg:n.rd,zero:s,in:t.rd_in,out:e.rd},{mux:n.funct3_mux,reg:n.funct3,zero:l,in:t.funct3_in,out:e.funct3},{mux:n.alu_op_mux,reg:n.alu_op,zero:a,in:t.alu_op_in,out:e.alu_op},{mux:n.alu_src_mux,reg:n.alu_src,zero:u,in:t.alu_src_in,out:e.alu_src},{mux:n.mem_read_mux,reg:n.mem_read,zero:u,in:t.mem_read_in,out:e.mem_read},{mux:n.mem_write_mux,reg:n.mem_write,zero:u,in:t.mem_write_in,out:e.mem_write},{mux:n.reg_write_mux,reg:n.reg_write,zero:u,in:t.reg_write_in,out:e.reg_write},{mux:n.mem_to_reg_mux,reg:n.mem_to_reg,zero:u,in:t.mem_to_reg_in,out:e.mem_to_reg},{mux:n.branch_mux,reg:n.branch,zero:u,in:t.branch_in,out:e.branch},{mux:n.jump_mux,reg:n.jump,zero:u,in:t.jump_in,out:e.jump},{mux:n.lui_mux,reg:n.lui,zero:u,in:t.lui_in,out:e.lui},{mux:n.auipc_mux,reg:n.auipc,zero:u,in:t.auipc_in,out:e.auipc},{mux:n.is_jalr_mux,reg:n.is_jalr,zero:u,in:t.is_jalr_in,out:e.is_jalr}],p=[{reg:n.pc,in:t.pc_in,out:e.pc},{reg:n.pc4,in:t.pc4_in,out:e.pc4},{reg:n.read1,in:t.read1_in,out:e.read1},{reg:n.read2,in:t.read2_in,out:e.read2},{reg:n.imm,in:t.imm_in,out:e.imm}];return[t.flush.to(d.a),t.stall.to(d.b),...h.flatMap(m=>[m.in.to(m.mux.in0),m.zero.out.to(m.mux.in1),d.out.to(m.mux.sel),m.mux.out.to(m.reg.data),m.reg.q.to(m.out)]),...p.flatMap(m=>[m.in.to(m.reg.data),m.reg.q.to(m.out)]),o.out.to(n.pc.we,n.pc4.we,n.read1.we,n.read2.we,n.imm.we,...h.map(m=>m.reg.we))]}})),JA=gt("RV32I_EX_Stage",()=>({inputs:{pc:P(32),pc4:P(32),read1:P(32),read2:P(32),imm:P(32),alu_op:P(4),alu_src:X,funct3:P(3),branch:X,jump:X,is_jalr:X,lui:X,auipc:X,mem_to_reg:X,forward_a:P(2),forward_b:P(2),mem_fwd:P(32),wb_fwd:P(32)},outputs:{alu_result:P(32),result:P(32),store_data:P(32),pc_plus_imm:P(32),branch_taken:X,redirect_taken:X,redirect_target:P(32)},nodes:{zero32:gn({value:0,width:32}),fwd_a_bit0:jo({low:0,high:0}),fwd_a_bit1:jo({low:1,high:1}),fwd_a_mux1:se({width:32}),fwd_a_mux2:se({width:32}),fwd_b_bit0:jo({low:0,high:0}),fwd_b_bit1:jo({low:1,high:1}),fwd_b_mux1:se({width:32}),fwd_b_mux2:se({width:32}),alu_src_mux:se({width:32}),alu:Z0,branch_comp:W0,branch_target:Il({width:32}),jalr_target:X0({width:32}),jalr_mask:gn({value:4294967294,width:32}),pc_plus_imm:Il({width:32}),ex_result:ld,branch_and:G0,next_pc:ty,pc_src_taken:td},connect:({inputs:t,outputs:e,nodes:{zero32:n,fwd_a_bit0:o,fwd_a_bit1:s,fwd_a_mux1:a,fwd_a_mux2:l,fwd_b_bit0:u,fwd_b_bit1:d,fwd_b_mux1:h,fwd_b_mux2:p,alu_src_mux:m,alu:y,branch_comp:b,branch_target:x,jalr_target:w,jalr_mask:_,pc_plus_imm:S,ex_result:k,branch_and:C,next_pc:E,pc_src_taken:R}})=>[t.forward_a.to(o.in,s.in),t.read1.to(a.in0),t.mem_fwd.to(a.in1,h.in1),o.out.to(a.sel),a.out.to(l.in0),t.wb_fwd.to(l.in1,p.in1),s.out.to(l.sel),t.forward_b.to(u.in,d.in),t.read2.to(h.in0),u.out.to(h.sel),h.out.to(p.in0),d.out.to(p.sel),p.out.to(m.in0,b.b,e.store_data),t.imm.to(m.in1,x.b,S.b,k.immediate),t.alu_src.to(m.sel),l.out.to(y.a,b.a),m.out.to(y.b),t.alu_op.to(y.alu_op),t.funct3.to(b.funct3),t.pc.to(x.a,S.a),y.result.to(w.a,k.alu_result,e.alu_result),_.out.to(w.b),n.out.to(k.load_data),t.pc4.to(k.pc_plus4,E.pc_plus4),S.sum.to(k.pc_plus_imm,e.pc_plus_imm),t.mem_to_reg.to(k.mem_to_reg),t.lui.to(k.lui),t.auipc.to(k.auipc),t.jump.to(k.jump,E.jump,R.b),t.branch.to(C.a,E.branch),b.take_branch.to(C.b,E.take_branch),x.sum.to(E.branch_target,E.jal_target),w.out.to(E.jalr_target),t.is_jalr.to(E.is_jalr),C.out.to(R.a,e.branch_taken),E.next_pc.to(e.redirect_target),R.out.to(e.redirect_taken),k.write_data.to(e.result)]})),tM=gt("RV32I_EXMEM_Regs",()=>({inputs:{alu_result_in:P(32),result_in:P(32),store_data_in:P(32),rd_in:P(5),funct3_in:P(3),pc4_in:P(32),imm_in:P(32),pc_plus_imm_in:P(32),mem_read_in:X,mem_write_in:X,reg_write_in:X,mem_to_reg_in:X,lui_in:X,auipc_in:X,jump_in:X},outputs:{alu_result:P(32),result:P(32),store_data:P(32),rd:P(5),funct3:P(3),pc4:P(32),imm:P(32),pc_plus_imm:P(32),mem_read:X,mem_write:X,reg_write:X,mem_to_reg:X,lui:X,auipc:X,jump:X},nodes:{one1:gn({value:1,width:1}),alu_result:Rt({width:32}),result:Rt({width:32}),store_data:Rt({width:32}),rd:Rt({width:5}),funct3:Rt({width:3}),pc4:Rt({width:32}),imm:Rt({width:32}),pc_plus_imm:Rt({width:32}),mem_read:Rt({width:1}),mem_write:Rt({width:1}),reg_write:Rt({width:1}),mem_to_reg:Rt({width:1}),lui:Rt({width:1}),auipc:Rt({width:1}),jump:Rt({width:1})},connect:({inputs:t,outputs:e,nodes:n})=>{const o=[{reg:n.alu_result,in:t.alu_result_in,out:e.alu_result},{reg:n.result,in:t.result_in,out:e.result},{reg:n.store_data,in:t.store_data_in,out:e.store_data},{reg:n.rd,in:t.rd_in,out:e.rd},{reg:n.funct3,in:t.funct3_in,out:e.funct3},{reg:n.pc4,in:t.pc4_in,out:e.pc4},{reg:n.imm,in:t.imm_in,out:e.imm},{reg:n.pc_plus_imm,in:t.pc_plus_imm_in,out:e.pc_plus_imm},{reg:n.mem_read,in:t.mem_read_in,out:e.mem_read},{reg:n.mem_write,in:t.mem_write_in,out:e.mem_write},{reg:n.reg_write,in:t.reg_write_in,out:e.reg_write},{reg:n.mem_to_reg,in:t.mem_to_reg_in,out:e.mem_to_reg},{reg:n.lui,in:t.lui_in,out:e.lui},{reg:n.auipc,in:t.auipc_in,out:e.auipc},{reg:n.jump,in:t.jump_in,out:e.jump}];return[...o.flatMap(s=>[s.in.to(s.reg.data),s.reg.q.to(s.out)]),n.one1.out.to(...o.map(s=>s.reg.we))]}})),eM=gt("RV32I_MEMWB_Regs",()=>({inputs:{alu_result_in:P(32),load_data_in:P(32),rd_in:P(5),funct3_in:P(3),pc4_in:P(32),imm_in:P(32),pc_plus_imm_in:P(32),reg_write_in:X,mem_to_reg_in:X,lui_in:X,auipc_in:X,jump_in:X},outputs:{alu_result:P(32),load_data:P(32),byte_offset:P(2),rd:P(5),funct3:P(3),pc4:P(32),imm:P(32),pc_plus_imm:P(32),reg_write:X,mem_to_reg:X,lui:X,auipc:X,jump:X},nodes:{one1:gn({value:1,width:1}),lo2:jo({low:0,high:1}),alu_result:Rt({width:32}),load_data:Rt({width:32}),byte_offset:Rt({width:2}),rd:Rt({width:5}),funct3:Rt({width:3}),pc4:Rt({width:32}),imm:Rt({width:32}),pc_plus_imm:Rt({width:32}),reg_write:Rt({width:1}),mem_to_reg:Rt({width:1}),lui:Rt({width:1}),auipc:Rt({width:1}),jump:Rt({width:1})},connect:({inputs:t,outputs:e,nodes:n})=>{const o=[{reg:n.alu_result,in:t.alu_result_in,out:e.alu_result},{reg:n.load_data,in:t.load_data_in,out:e.load_data},{reg:n.rd,in:t.rd_in,out:e.rd},{reg:n.funct3,in:t.funct3_in,out:e.funct3},{reg:n.pc4,in:t.pc4_in,out:e.pc4},{reg:n.imm,in:t.imm_in,out:e.imm},{reg:n.pc_plus_imm,in:t.pc_plus_imm_in,out:e.pc_plus_imm},{reg:n.reg_write,in:t.reg_write_in,out:e.reg_write},{reg:n.mem_to_reg,in:t.mem_to_reg_in,out:e.mem_to_reg},{reg:n.lui,in:t.lui_in,out:e.lui},{reg:n.auipc,in:t.auipc_in,out:e.auipc},{reg:n.jump,in:t.jump_in,out:e.jump}];return[...o.flatMap(s=>[s.in.to(s.reg.data),s.reg.q.to(s.out)]),t.alu_result_in.to(n.lo2.in),n.lo2.out.to(n.byte_offset.data),n.byte_offset.q.to(e.byte_offset),n.one1.out.to(...o.map(s=>s.reg.we),n.byte_offset.we)]}})),nM=gt("RV32I_WB_Stage",()=>({inputs:{alu_result:P(32),load_data:P(32),byte_offset:P(2),funct3:P(3),pc4:P(32),imm:P(32),pc_plus_imm:P(32),mem_to_reg:X,lui:X,auipc:X,jump:X},outputs:{write_data:P(32)},nodes:{load_align:ny,wb_mux:ld},connect:({inputs:t,outputs:e,nodes:{load_align:n,wb_mux:o}})=>[t.load_data.to(n.data),t.byte_offset.to(n.byte_offset),t.funct3.to(n.funct3),n.out.to(o.load_data),t.alu_result.to(o.alu_result),t.pc4.to(o.pc_plus4),t.imm.to(o.immediate),t.pc_plus_imm.to(o.pc_plus_imm),t.mem_to_reg.to(o.mem_to_reg),t.lui.to(o.lui),t.auipc.to(o.auipc),t.jump.to(o.jump),o.write_data.to(e.write_data)]})),iM=gt("RV32I_Core",({debug:t=!1}={})=>{const e={instruction:P(32),data_read:P(32),net_rx_data:P(32),net_rx_valid:X,net_rx_frame:X,...t?{debug_addr:P(5)}:{}},n={instr_addr:P(32),data_addr:P(32),data_write:P(32),data_mem_read:X,data_mem_write:X,data_funct3:P(3),net_tx_data:P(32),net_tx_valid:X,net_tx_frame:X,pc_out:P(32),...t?{debug_value:P(32),if_pc:P(32),id_pc:P(32),ex_pc:P(32),mem_pc4:P(32),wb_pc4:P(32)}:{}};return{inputs:e,outputs:n,nodes:{IF:ZA(),IFID:KA(),ID:QA({debug:t}),IDEX:WA(),EX:JA(),EXMEM:tM(),MEMWB:eM(),WB:nM(),hazard:iy,forward:ey,stall_inv:F0},connect:({inputs:o,outputs:s,nodes:{IF:a,IFID:l,ID:u,IDEX:d,EX:h,EXMEM:p,MEMWB:m,WB:y,hazard:b,forward:x,stall_inv:w}})=>{const _=[b.stall.to(w.in,d.stall),b.flush.to(l.flush,d.flush),w.out.to(a.stall_n,l.we),a.pc.to(s.instr_addr,s.pc_out,l.pc_in),a.pc4.to(l.pc4_in),o.instruction.to(l.instruction_in),l.instruction.to(u.instruction),l.pc.to(d.pc_in),l.pc4.to(d.pc4_in),u.hazard_rs1.to(b.if_rs1),u.hazard_rs2.to(b.if_rs2),u.read1.to(d.read1_in),u.read2.to(d.read2_in),u.imm.to(d.imm_in),u.rs1.to(d.rs1_in),u.rs2.to(d.rs2_in),u.rd.to(d.rd_in),u.funct3.to(d.funct3_in),u.alu_op.to(d.alu_op_in),u.alu_src.to(d.alu_src_in),u.mem_read.to(d.mem_read_in),u.mem_write.to(d.mem_write_in),u.reg_write.to(d.reg_write_in),u.mem_to_reg.to(d.mem_to_reg_in),u.branch.to(d.branch_in),u.jump.to(d.jump_in),u.lui.to(d.lui_in),u.auipc.to(d.auipc_in),u.is_jalr.to(d.is_jalr_in),d.pc.to(h.pc),d.pc4.to(h.pc4,p.pc4_in),d.read1.to(h.read1),d.read2.to(h.read2),d.imm.to(h.imm,p.imm_in),d.rs1.to(x.id_rs1),d.rs2.to(x.id_rs2),d.rd.to(b.id_rd,p.rd_in),d.funct3.to(h.funct3,p.funct3_in),d.alu_op.to(h.alu_op),d.alu_src.to(h.alu_src),d.mem_read.to(b.id_mem_read,p.mem_read_in),d.mem_write.to(p.mem_write_in),d.reg_write.to(p.reg_write_in),d.mem_to_reg.to(h.mem_to_reg,p.mem_to_reg_in),d.branch.to(h.branch),d.jump.to(h.jump,b.jump,p.jump_in),d.lui.to(h.lui,p.lui_in),d.auipc.to(h.auipc,p.auipc_in),d.is_jalr.to(h.is_jalr),x.forward_a.to(h.forward_a),x.forward_b.to(h.forward_b),p.result.to(h.mem_fwd),y.write_data.to(h.wb_fwd,u.wb_write_data),h.alu_result.to(p.alu_result_in),h.result.to(p.result_in),h.store_data.to(p.store_data_in),h.pc_plus_imm.to(p.pc_plus_imm_in),h.branch_taken.to(b.branch_taken),h.redirect_taken.to(a.redirect_taken),h.redirect_target.to(a.redirect_target),p.alu_result.to(s.data_addr,m.alu_result_in),p.store_data.to(s.data_write),p.mem_read.to(s.data_mem_read),p.mem_write.to(s.data_mem_write),p.funct3.to(s.data_funct3,m.funct3_in),p.rd.to(x.ex_rd,m.rd_in),p.reg_write.to(x.ex_reg_write,m.reg_write_in),p.pc4.to(m.pc4_in),p.imm.to(m.imm_in),p.pc_plus_imm.to(m.pc_plus_imm_in),p.mem_to_reg.to(m.mem_to_reg_in),p.lui.to(m.lui_in),p.auipc.to(m.auipc_in),p.jump.to(m.jump_in),o.data_read.to(m.load_data_in),m.alu_result.to(y.alu_result),m.load_data.to(y.load_data),m.byte_offset.to(y.byte_offset),m.funct3.to(y.funct3),m.pc4.to(y.pc4),m.imm.to(y.imm),m.pc_plus_imm.to(y.pc_plus_imm),m.mem_to_reg.to(y.mem_to_reg),m.lui.to(y.lui),m.auipc.to(y.auipc),m.jump.to(y.jump),m.rd.to(u.wb_rd,x.mem_rd),m.reg_write.to(u.wb_we,x.mem_reg_write)];return t&&_.push(o.debug_addr.to(u.debug_rs),u.debug_read.to(s.debug_value),a.pc.to(s.if_pc),l.pc.to(s.id_pc),d.pc.to(s.ex_pc),p.pc4.to(s.mem_pc4),m.pc4.to(s.wb_pc4)),_}}}),oM=Object.freeze(Object.defineProperty({__proto__:null,RV32I_Core:iM},Symbol.toStringTag,{value:"Module"})),rM=(()=>{const t=new Array(256);for(let e=0;e<256;e++){let n=e;for(let o=0;o<8;o++)n=n&1?(n>>>1^3988292384)>>>0:n>>>1>>>0;t[e]=n>>>0}return t})(),sM=gt("Eth_ProtocolDecoder",{inputs:{ethertype:P(16)},outputs:{is_ipv4:X,is_ipv6:X,is_arp:X,is_vlan:X,is_mpls:X},eval:({ethertype:t})=>{const e=t&65535;return{is_ipv4:e===2048?1:0,is_ipv6:e===34525?1:0,is_arp:e===2054?1:0,is_vlan:e===33024?1:0,is_mpls:e===34887?1:0}},meta:{category:"networking",icon:"EP",description:"EtherType → protocol flags"}}),aM=gt("Eth_AddrClassifier",{inputs:{dst_mac_hi:P(16),dst_mac_lo:P(32)},outputs:{is_broadcast:X,is_multicast:X,is_unicast:X},eval:({dst_mac_hi:t,dst_mac_lo:e})=>{const n=t&65535,o=(e&4294967295)>>>0,s=n===65535&&o===4294967295?1:0,a=!s&&(o>>>24&1)===1?1:0;return{is_broadcast:s,is_multicast:a,is_unicast:!s&&!a?1:0}},meta:{category:"networking",icon:"EA",description:"MAC address classifier"}}),lM=gt("Eth_FrameInput",{inputs:{enable:X,reset:X},outputs:{tdata:P(32),tkeep:P(4),tvalid:X,tlast:X,byte_offset:P(16)},state:{memory:new Map},eval:({memory:t})=>{const e=t??new Map,n=(e.get(65539)??0)>>>0,o=(e.get(65540)??0)&15,s=(e.get(65541)??0)!==0?1:0,a=(e.get(65542)??0)!==0?1:0,l=(e.get(65543)??0)&65535;return{tdata:n,tkeep:o,tvalid:s,tlast:a,byte_offset:l}},onTick:({enable:t,reset:e,memory:n})=>{const o=n??new Map,s=65536,a=65537,l=65538,u=65539,d=65540,h=65541,p=65542,m=65543;if(e){const E=new Map(o);return E.set(s,0),E.set(l,0),E.set(h,0),E.set(p,0),{memory:E}}if(!t){const E=new Map(o);return E.set(h,0),{memory:E}}const y=new Map(o);if(!(o.get(l)??0)){let E=-1;for(const R of o.keys())R<65536&&R>E&&(E=R);y.set(a,E+1),y.set(l,1)}const b=y.get(a)??0,x=o.get(s)??0;if(x>=b||b===0)return y.set(u,0),y.set(d,0),y.set(h,0),y.set(p,0),y.set(m,x&65535),{memory:y};const w=b-x,_=Math.min(4,w);let S=0,k=0;for(let E=0;E<_;E++)S=(S|((o.get(x+E)??0)&255)<<24-E*8)>>>0,k|=1<<3-E;const C=x+_>=b;return y.set(u,S),y.set(d,k),y.set(h,1),y.set(p,C?1:0),y.set(m,x&65535),y.set(s,x+_),{memory:y}},meta:{category:"networking",icon:"EI",description:"Ethernet frame input (AXI-Stream)"}}),cM=gt("Eth_FrameParser",{inputs:{tdata:P(32),tkeep:P(4),tvalid:X,tlast:X},outputs:{dst_mac_hi:P(16),dst_mac_lo:P(32),dst_mac_valid:X,src_mac_hi:P(16),src_mac_lo:P(32),src_mac_valid:X,ethertype:P(16),ethertype_valid:X,has_vlan:X,vlan_tci:P(16),vlan_valid:X,payload_valid:X,frame_done:X,frame_length:P(16),parse_state:P(4)},state:{memory:new Map},eval:({memory:t})=>{const e=t??new Map,n=e.get(0)??0,o=(e.get(1)??0)>>>0,s=(e.get(2)??0)&65535,a=(e.get(3)??0)>>>0,l=(e.get(4)??0)&65535,u=(e.get(5)??0)&65535,d=(e.get(6)??0)&65535,h=(e.get(7)??0)!==0,p=(e.get(8)??0)&65535;return{dst_mac_hi:s,dst_mac_lo:o,dst_mac_valid:n>=2?1:0,src_mac_hi:l,src_mac_lo:a,src_mac_valid:n>=4?1:0,ethertype:u,ethertype_valid:n>=6?1:0,has_vlan:h?1:0,vlan_tci:d,vlan_valid:h&&n>=6?1:0,payload_valid:n===6||n===7?1:0,frame_done:n===7?1:0,frame_length:p,parse_state:n}},onTick:({tdata:t,tkeep:e,tvalid:n,tlast:o,memory:s})=>{const a=s??new Map;if(!n)return{memory:a};const l=t>>>0,u=e&15,d=!!o,h=0,p=1,m=2,y=3,b=4,x=5,w=6,_=7,S=8,k=0,C=2,E=3,R=4,A=5,O=6,D=7,$=new Map(a);let q=a.get(h)??k;const Y=(u>>3&1)+(u>>2&1)+(u>>1&1)+(u&1),K=a.get(S)??0;$.set(S,K+Y);const W=l>>>24&255,B=l>>>16&255,H=l>>>8&255,j=l&255;switch(q){case k:$.set(p,l),$.set(h,C);break;case C:$.set(m,W<<8|B),$.set(y,H<<8|j),$.set(h,E);break;case E:$.set(b,a.get(y)??0),$.set(y,l),$.set(h,R);break;case R:{const I=(W<<8|B)&65535;I===33024?($.set(w,(H<<8|j)&65535),$.set(_,1),$.set(x,I),$.set(h,A)):($.set(x,I),$.set(h,d?D:O));break}case A:$.set(x,(W<<8|B)&65535),$.set(h,d?D:O);break;case O:d&&$.set(h,D);break}return d&&q!==D&&$.set(S,K+Y),{memory:$}},meta:{category:"networking",icon:"EF",description:"Ethernet frame parser FSM"}}),uM=gt("Eth_CRC32",{inputs:{data:P(32),data_valid:X,tkeep:P(4),tlast:X,reset:X},outputs:{crc:P(32),crc_ok:X},state:{memory:new Map},eval:({memory:t})=>{const e=t??new Map,n=(e.get(0)??4294967295)>>>0,o=(e.get(1)??0)!==0;return{crc:~n>>>0,crc_ok:o&&n===3736805603?1:0}},onTick:({data:t,data_valid:e,tkeep:n,tlast:o,reset:s,memory:a})=>{const l=a??new Map;if(s){const m=new Map(l);return m.set(0,4294967295),m.set(1,0),{memory:m}}if(!e)return{memory:l};const u=t>>>0,d=n&15;let h=(l.get(0)??4294967295)>>>0;for(let m=3;m>=0;m--)if(d>>m&1){const y=u>>>m*8&255;h=(rM[(h^y)&255]^h>>>8)>>>0}const p=new Map(l);return p.set(0,h),o&&p.set(1,1),{memory:p}},meta:{category:"networking",icon:"EC",description:"IEEE 802.3 CRC-32 checker"}}),fM=gt("MemBusMux",{inputs:{addr:P(32),write_data:P(32),mem_read:X,mem_write:X,funct3:P(3),read_data_0:P(32),read_data_1:P(32),read_data_2:P(32),read_data_3:P(32),read_data_4:P(32)},outputs:{local_addr:P(32),write_data_out:P(32),funct3_out:P(3),read_data:P(32),p0_read:X,p0_write:X,p1_read:X,p1_write:X,p2_read:X,p2_write:X,p3_read:X,p3_write:X,p4_read:X,p4_write:X},eval:({addr:t,write_data:e,mem_read:n,mem_write:o,funct3:s,read_data_0:a,read_data_1:l,read_data_2:u,read_data_3:d,read_data_4:h,base0:p,base1:m,base2:y,base3:b,base4:x,end0:w,end1:_,end2:S,end3:k,end4:C})=>{const E=(t??0)>>>0,R=(e??0)>>>0,A=(s??0)&7,O=[{base:(p??65536)>>>0,end:(w??131071)>>>0},{base:(m??2147483648)>>>0,end:(_??2147487743)>>>0},{base:(y??2147487744)>>>0,end:(S??2147491839)>>>0},{base:(b??2147491840)>>>0,end:(k??2147495935)>>>0},{base:(x??0)>>>0,end:(C??65535)>>>0}];let D=-1;for(let B=0;B<5;B++)if(E>=O[B].base&&E<=O[B].end){D=B;break}const $=D>=0?E-O[D].base>>>0:0,q=[a,l,u,d,h].map(B=>(B??0)>>>0),Y=D>=0?q[D]:0,K=!!n,W=!!o;return{local_addr:$,write_data_out:R,funct3_out:A,read_data:Y,p0_read:D===0&&K?1:0,p0_write:D===0&&W?1:0,p1_read:D===1&&K?1:0,p1_write:D===1&&W?1:0,p2_read:D===2&&K?1:0,p2_write:D===2&&W?1:0,p3_read:D===3&&K?1:0,p3_write:D===3&&W?1:0,p4_read:D===4&&K?1:0,p4_write:D===4&&W?1:0}},meta:{category:"rv32i",icon:"BUS",description:"Memory bus multiplexer"}}),dM=gt("UART_TX",{inputs:{addr:P(32),write_data:P(32),mem_read:X,mem_write:X},outputs:{read_data:P(32)},state:{text:""},eval:({mem_read:t})=>({read_data:t?1:0}),onTick:({addr:t,write_data:e,mem_write:n,text:o})=>{if(!n)return{text:o};if(t>>>0!==0)return{text:o};const a=String.fromCharCode(e&255),l=(o??"")+a;return{text:l.length>4096?l.slice(-4096):l}},meta:{category:"io",icon:"TX",description:"UART transmitter",synthesizable:!1}}),hM=gt("NIC_FIFO",{inputs:{tx_addr:P(32),tx_write_data:P(32),tx_mem_read:X,tx_mem_write:X,rx_addr:P(32),rx_mem_read:X,rx_mem_write:X,net_rx_data:P(32),net_rx_valid:X,net_rx_frame:X},outputs:{tx_read_data:P(32),rx_read_data:P(32),net_tx_data:P(32),net_tx_valid:X,net_tx_frame:X},state:{memory:new Map},eval:({tx_mem_read:t,rx_mem_read:e,tx_addr:n,rx_addr:o,memory:s})=>{const a=s??new Map;let l=0;t&&(n??0)>>>0===8&&(l=(a.get(8192)??0)-(a.get(8193)??0));let u=0;if(e){const x=(o??0)>>>0;x===0?u=(a.get(4096+(a.get(8209)??0))??0)>>>0:x===8&&(u=a.get(8210)??0)}const d=a.get(8196)??0,h=a.get(8195)??0,p=a.get(8192)??0;let m=0,y=0,b=0;return d&&h<p&&(m=(a.get(0+h)??0)>>>0,y=1,b=h+1>=p?1:0),{tx_read_data:l,rx_read_data:u,net_tx_data:m,net_tx_valid:y,net_tx_frame:b}},onTick:({tx_addr:t,tx_write_data:e,tx_mem_write:n,rx_addr:o,rx_mem_write:s,net_rx_data:a,net_rx_valid:l,memory:u})=>{const d=u??new Map,h=new Map(d);if(n){const m=(t??0)>>>0,y=(e??0)>>>0;if(m===0){const b=h.get(8192)??0;h.set(0+b,y),h.set(8192,b+1)}else m===12&&(h.set(8194,1),h.set(8195,0),h.set(8196,1))}if(d.get(8196)??0){const m=h.get(8195)??0,y=h.get(8192)??0;m<y&&(h.set(8195,m+1),m+1>=y&&(h.set(8196,0),h.set(8192,0),h.set(8193,0),h.set(8194,0)))}if(l){const m=(a??0)>>>0,y=h.get(8208)??0;h.set(4096+y,m),h.set(8208,y+1),h.set(8210,(h.get(8210)??0)+1)}if(s&&(o??0)>>>0===4){const y=h.get(8209)??0,b=h.get(8210)??0;b>0&&(h.set(8209,y+1),h.set(8210,b-1))}return{memory:h}},meta:{category:"networking",icon:"NIC",description:"Network interface FIFO",synthesizable:!1}}),pM=Object.freeze(Object.defineProperty({__proto__:null,Eth_AddrClassifier:aM,Eth_CRC32:uM,Eth_FrameInput:lM,Eth_FrameParser:cM,Eth_ProtocolDecoder:sM,MemBusMux:fM,NIC_FIFO:hM,UART_TX:dM},Symbol.toStringTag,{value:"Module"})),oy=t=>!!t&&typeof t=="object"&&"circuit"in t,mM=[...Object.values(aA),...Object.values(xA),...Object.values(AA),...Object.values(RA),...Object.values(LA),...Object.values(IA),...Object.values(UA),...Object.values(XA),...Object.values(oM),...Object.values(pM)],gM=t=>{if(oy(t))return t;if(typeof t=="function")try{const e=t();return oy(e)?e:null}catch{return null}return null},yM=Object.freeze(mM.map(gM).filter(t=>t!==null));function vM(t,e){const n=new Map;for(const o of e)n.set(o.name,sy(ry(o,new Map)));return sy(ry(t,n))}function ry(t,e){const n={};for(const a of t.inputs)n[a.name]=a;const o={};for(const a of t.outputs)o[a.name]=a;const s={};for(const a of t.nodes)s[a.id]=a;return{circuit:t,inputs:n,outputs:o,nodes:s,_dependencies:e}}function sy(t){return Object.defineProperty(t,"toJSON",{value:function(){const e={};for(const[n,o]of this._dependencies)e[n]=o;return{circuit:this.circuit,_dependencies:e}},enumerable:!1}),t}function bM(t,e,n){if(t.inputs.length===0&&t.outputs.length===0)return t;e.resolveCircuit(t.name)||e.addCircuit(t);const o=`${t.name}Demo`,s=[],a=[];let l=0;s.push({id:"dut",componentRef:t.name,arguments:{},inputs:t.inputs.map(u=>({id:`dut.${u.name}`,name:u.name,portType:u.portType})),outputs:t.outputs.map(u=>({id:`dut.${u.name}`,name:u.name,portType:u.portType})),clocks:t.clocks.map(u=>({id:`dut.${u.name}`,name:u.name}))});for(const u of t.inputs){const d=u.portType.kind==="bit",h={};!d&&u.portType.kind==="bus"&&(h.width=u.portType.width),n&&u.name in n&&(h.value=n[u.name]),s.push({id:u.name,label:u.name,componentRef:d?"Switch":"Input",arguments:h,inputs:[],outputs:[{id:`${u.name}.out`,name:"out",portType:u.portType}],clocks:[]}),a.push({id:`c${l++}`,source:{nodeId:u.name,portName:"out"},target:{nodeId:"dut",portName:u.name},portType:u.portType})}for(const u of t.outputs){const d=u.portType.kind==="bit",h={};!d&&u.portType.kind==="bus"&&(h.width=u.portType.width),s.push({id:u.name,label:u.name,componentRef:d?"Led":"HexDisplay",arguments:h,inputs:[{id:`${u.name}.in`,name:"in",portType:u.portType}],outputs:[],clocks:[]}),a.push({id:`c${l++}`,source:{nodeId:"dut",portName:u.name},target:{nodeId:u.name,portName:"in"},portType:u.portType})}return{version:1,name:o,inputs:[],outputs:[],clocks:[],state:[],nodes:s,connections:a,implementation:{kind:"composite"},metadata:{description:`Auto-generated harness for ${t.name}`}}}function ud(t,e,n=new Set){if(!t||n.has(t.name))return!1;if(n.add(t.name),t.clocks?.length>0||t.state?.length>0)return!0;for(const o of t.nodes){const s=e(o.componentRef);if(s&&ud(s,e,n))return!0}return!1}const ay=new Set(yM.map(t=>t.circuit.name));class Pl extends Error{constructor(e){super(e),this.name="CircuitToSourceError"}}function xM(t){const e=new Map;for(const[s,a]of t._dependencies)ay.has(s)||e.set(s,a.circuit);for(const s of t.circuit.nodes)if(!ay.has(s.componentRef)&&!e.has(s.componentRef)){const a=t._dependencies.get(s.componentRef);a&&e.set(s.componentRef,a.circuit)}const n=[],o=wM(e);for(const s of o)n.push(ly(s)),n.push("");return n.push(ly(t.circuit)),n.join(`
 `)}function wM(t){const e=new Set,n=[],o=s=>{if(e.has(s))return;e.add(s);const a=t.get(s);if(a){for(const l of a.nodes)t.has(l.componentRef)&&o(l.componentRef);n.push(a)}};for(const s of t.keys())o(s);return n}function ly(t){if(t.implementation.kind==="intrinsic")throw new Pl(`Cannot serialize circuit '${t.name}': intrinsic implementations are not supported.`);if(t.implementation.kind==="primitive"&&Ll(t.name))throw new Pl(`Cannot serialize circuit '${t.name}': primitives with eval/onTick callbacks aren't supported by the v1 fork serializer.`);const e=[];return t.inputs.length>0&&e.push(`  inputs: ${cy(t.inputs)},`),t.outputs.length>0&&e.push(`  outputs: ${cy(t.outputs)},`),t.state.length>0&&e.push(`  state: ${SM(t.state,t.name)},`),t.nodes.length>0&&e.push(`  nodes: ${TM(t.nodes)},`),t.connections.length>0&&e.push(`  connect: ${AM(t)},`),`const ${t.name} = circuit('${t.name}', {
 ${e.join(`
 `)}

package/package.json CHANGED Viewed

@@ -1,6 +1,6 @@
 {
   "name": "@simten/embed",
-  "version": "0.1.13",
+  "version": "0.1.14",
   "description": "Embeddable interactive hardware circuits. Drop live, cycle-accurate simulations into any React app or HTML page.",
   "license": "Apache-2.0",
   "author": "Charles Harris",
@@ -54,8 +54,8 @@
     "clsx": "^2.1.1",
     "elkjs": "^0.9.3",
     "tailwind-merge": "^3.0.0",
-    "@simten/core": "0.6.1",
-    "@simten/ui": "0.1.13"
+    "@simten/core": "0.7.0",
+    "@simten/ui": "0.1.14"
   },
   "peerDependencies": {
     "react": "^18 || ^19",