@rulecad/pcb 0.1.2 → 0.2.0

package/README.md

@@ -1,12 +1,51 @@
 # @rulecad/pcb
 
-Keyboard circuit boards from rules, for `@rulecad/cad` designs with `"engine": "pcb"`. Footprints come from rule sets
+Circuit boards from rules, for `@rulecad/cad` designs with `"engine": "pcb"`. Footprints come from rule sets
 (datasheets, KiCad's library) rather than numbers in code. The keyboard router draws every matrix track by rule, with
 one diode per key on the back. The output is what a fab needs: Gerbers, drill files, a JLCPCB BOM and placement file,
-and KiCad files. Built on [tscircuit](https://github.com/tscircuit/tscircuit).
+and KiCad files.
+
+**No framework.** The board is written directly as [Circuit JSON](https://github.com/tscircuit/circuit-json), an open
+data format, and the work is done by tscircuit's framework-free libraries: footprints (footprinter), the autorouter,
+the design checks, and the Gerber, KiCad and drawing exporters. React, which tscircuit's own board-building layer uses,
+is never loaded. Two of those libraries list tscircuit among their dependencies, so React may be installed alongside
+them, unused; rulecad's tests fail if it's ever loaded.
+
+**Any board.** Place parts from rule sets or any standard footprint, turn them in quarter turns, join their pins with
+nets, and let the autorouter draw the tracks:
+
+```js
+// projects/node/objects/carrier.js: a radio module, two Qwiic sensor sockets, a battery socket and its diode
+export function main(v) {
+  const { xiao, qwiic, jstph, part } = v.pcb;
+  return {
+    center: { x: 7.5, y: -2.2 }, width: 35.5, height: 25.4, thickness: v.thickness, track: v.track, autoroute: true,
+    parts: [
+      xiao('U1', 0, 0, v.xiao),                                  // pins labelled D0..D10, 3V3, GND, 5V from the xiao rules
+      qwiic('J1', v.qwiic_x, v.qwiic_y, v.qwiic),                // plug in from the top edge
+      qwiic('J2', v.j2_x, 0, v.qwiic, { rotation: v.j2_turn }),  // turned to face the right edge
+      jstph('J3', v.qwiic_x, v.bat_y, v.jstph, { labels: { pin1: 'BAT', pin2: 'BATGND' } }),
+      part('D1', 'sod123', v.qwiic_x, v.diode_y, { mpn: 'B5819W' })
+    ],
+    nets: { GND: ['U1.GND', 'J1.GND', 'J2.GND', 'J3.BATGND'], SDA: ['U1.D4', 'J1.SDA', 'J2.SDA'], /* ... */ },
+    traces: [], silk: [], holes: []
+  };
+}
+```
+
+- **Parts:** `xiao`, `qwiic`, `jstph` and `header` take their sizes and pinouts from rule sets in @rulecad/rules (each
+  value with its source); `part(name, footprint, x, y)` takes any footprinter name: `soic8`, `0603`, `sot23`,
+  `jst4_sh`, `pinrow4` (SMD or through-hole). Options: `rotation` (0, 90, 180, 270), `layer`, `mpn`, `labels`.
+- **Nets:** each net's pins are joined by the shortest set of links between them, at `board.track` (or the net's own
+  `{ pins, width }`); pins are named `part.pin` by label, name or number. The schematic labels them by net.
+- **What a board tells the parts around it:** `board_x`, `board_y`, `board_w`, `board_d` and its mounting holes, so
+  a case can read it (`"uses": ["node/carrier"]` in @rulecad/cad) and a holes fit can check the screws find their inserts.
+- **Keyboards** are one recipe built on the same parts: every matrix track drawn by rule, one diode per key.
+
+A keyboard:
 
 ```js
-// projects/macropad/objects/board.js: main(v) returns a tscircuit board, built with v.pcb
+// projects/macropad/objects/board.js: main(v) returns a board, built with v.pcb
 export function main(v) {
   const keys = v.pcb.grid(v.rows, v.cols, v.mx.pitch);
   return v.pcb.keyboard(v, keys);              // { board, matrix }
@@ -21,9 +60,10 @@ npx cad export macropad/board     # <name>-fab.zip for JLCPCB, KiCad files, the
 ```
 
 - The board is also a solid, so it takes part in fit checks: switches on the board, plate over it, board in the case.
-- A Pico under the board has its connections autorouted (that takes minutes, then the build cache keeps it).
+- A Pico under the board has its connections autorouted (that needs Node 22 or newer; boards drawn wholly by rule build on
+  Node 20 too). That takes minutes; then the build cache keeps it.
   Everything else is drawn by rule.
-- tscircuit is pinned (0.0.2895), so a board builds the same until rulecad moves it on; each move is checked against
-  boards built before it (same tracks, same checks). Nothing to add to your package.json: 0.1.1 needed an override
-  on a fresh install, 0.1.2 doesn't.
+- The autorouter and footprint versions are pinned, so a board builds the same until rulecad moves them on; each move is
+  checked against boards built before it (same tracks, same checks, same fab files). Nothing to add to your
+  package.json.
 - Ordering is your click: `cad export` makes the fab zip and never places an order.

package/circuit.mjs

@@ -0,0 +1,315 @@
+// Circuit JSON, the open data format tscircuit's tools read (github.com/tscircuit/circuit-json), built directly from a
+// plain description of a board, with no React. The fab exporters, the design checks, the drawings and KiCad export all
+// read the result. Only two tscircuit libraries are used, and neither needs a framework: footprinter (standard
+// footprints such as SOD-123) and the capacity autorouter (connections a board leaves to it).
+//
+// board: { center: { x, y }, width, height, thickness, parts, traces, nets, track, silk, holes, autoroute }
+//   part   { name, ftype: 'simple_switch' | 'simple_chip' | 'simple_diode', mpn, x, y, layer: 'top' | 'bottom',
+//            rotation: 0 | 90 | 180 | 270 (counter-clockwise, seen from the side the part is on; default 0),
+//            pads: [{ pin, x, y, hole, outer }] (plated, relative to the part) or [{ pin, smd: true, hint, x, y, w, h }],
+//            holes: [{ x, y, d }], courtyard: { w, h } | null,
+//            footprint: 'sod123' | 'jst4_sh' | 'pinrow4' ... (a footprinter string, SMD or through-hole, instead of pads),
+//            sch: { x, y, symbol?, pinLabels? } }
+//   trace  { from: [part, port], to: [part, port], width, path: [{ x, y }] (absolute, between the two ports) }; a trace
+//            without a path is left to the autorouter when board.autoroute is set
+//   nets   { GND: ['U1.GND', 'J1.1', 'J2.1'] } or { GND: { pins: [...], width } }: each net's pins are joined by the
+//            shortest set of connections between them (a minimum spanning tree), left to the autorouter, at the net's
+//            width or board.track; pins are named part.pin, by the pin's label, its name or its number
+//   silk   { rect: { x, y, w, h }, layer } | { text, x, y, size, layer }
+//   holes  [{ x, y, d }] in the board (mounting holes)
+// All positions are in mm, in the board's own frame. A part on the bottom is seen from above: mirrored in x.
+import { fp } from '@tscircuit/footprinter';
+import { symbols } from 'schematic-symbols';
+
+const SUB = 'subcircuit_source_group_0';
+const PASTE = 0.7;
+// Quarter turns, counter-clockwise, as exact cosines and sines (no rounding error in pad positions)
+const QUARTER = { 0: [1, 0], 90: [0, 1], 180: [-1, 0], 270: [0, -1] };
+function quarter(r = 0) {
+  const t = QUARTER[((r % 360) + 360) % 360];
+  if (!t) throw new Error(`a part's rotation is ${r}°: boards take 0, 90, 180 or 270`);
+  return t;
+} // solder paste, as a share of an SMD pad (what tscircuit uses)
+// The board's manufacturing minimums (mm): tscircuit's defaults, within what common fabs make. The router keeps to them.
+const FAB_MINIMUMS = { min_trace_width: 0.1, min_via_hole_diameter: 0.2, min_via_pad_diameter: 0.3, min_via_hole_edge_to_via_hole_edge_clearance: 0.1,
+  min_trace_to_hole_edge_clearance: 0.2, min_trace_to_pad_edge_clearance: 0.1, min_pad_edge_to_pad_edge_clearance: 0.1,
+  min_plated_hole_drill_edge_to_drill_edge_clearance: 0.15, min_board_edge_clearance: 0.2 };
+
+export async function circuitJson(board, { route = defaultRouter } = {}) {
+  const out = [], next = {}, id = (type) => `${type}_${(next[type] = (next[type] ?? -1) + 1)}`;
+  const add = (type, fields) => { const e = { type, [`${type}_id`]: id(type), ...fields }; out.push(e); return e; };
+
+  add('source_project_metadata', { software_used_string: '@rulecad/pcb' });
+  add('source_group', { is_subcircuit: true, was_automatically_named: true, subcircuit_id: SUB });
+  const sourceBoard = add('source_board', { source_group_id: 'source_group_0' });
+
+  // ---- parts: source records, then their footprints on the board ----
+  const ports = new Map(); // `${part}.${port name or hint}` -> { source, pcb, x, y, layers }
+  const placed = [];
+  for (const part of board.parts) {
+    const comp = add('source_component', { ftype: part.ftype, name: part.name, manufacturer_part_number: part.mpn,
+      are_pins_interchangeable: part.ftype === 'simple_switch', source_group_id: 'source_group_0', subcircuit_id: SUB });
+    const fpEls = part.footprint ? fp.string(part.footprint).circuitJson() : [];
+    const mirror = part.layer === 'bottom' ? -1 : 1;
+    const [cos, sin] = quarter(part.rotation), swap = sin !== 0;
+    const at = (x, y) => ({ x: part.x + mirror * (cos * x - sin * y), y: part.y + (sin * x + cos * y) });
+    const size = (w, h) => (swap ? { w: h, h: w } : { w, h }); // a rectangle turned a quarter swaps its sides
+    // Pads: from the description, or a footprint's SMD pads and plated holes (pin n: hints ['n'])
+    const pads = part.footprint
+      ? fpEls.filter((e) => e.type === 'pcb_smtpad' || e.type === 'pcb_plated_hole').map((e) => e.type === 'pcb_smtpad'
+        ? { smd: true, pin: `pin${e.port_hints[0]}`, hint: e.port_hints[0], ...at(e.x, e.y), ...size(e.width, e.height) }
+        : { pin: `pin${e.port_hints[0]}`, hint: e.port_hints[0], ...at(e.x, e.y), hole: e.hole_diameter ?? Math.min(e.hole_width, e.hole_height),
+          outer: e.outer_diameter ?? Math.max(e.rect_pad_width ?? e.outer_width ?? 0, e.rect_pad_height ?? e.outer_height ?? 0) })
+      : part.pads.map((p) => ({ ...p, ...at(p.x, p.y), ...(p.smd ? size(p.w, p.h) : {}) }));
+    const names = portNames(part, pads);
+    const sourcePorts = pads.map((p, i) => add('source_port', { name: names[i].name, pin_number: names[i].n, port_hints: names[i].hints,
+      source_component_id: comp.source_component_id, subcircuit_id: SUB }));
+    if (part.ftype === 'simple_chip') { // pins with the same label are joined inside the part (a Pico's GND pins)
+      const byName = new Map(); for (const sp of sourcePorts) byName.set(sp.name, [...(byName.get(sp.name) || []), sp]); // (Object.groupBy needs Node 21)
+      const groups = [...byName.values()].filter((g) => g.length > 1);
+      if (groups.length) comp.internally_connected_source_port_ids = groups.map((g) => g.map((s) => s.source_port_id));
+      for (const g of groups) add('source_component_internal_connection', { source_component_id: comp.source_component_id, subcircuit_id: SUB, source_port_ids: g.map((s) => s.source_port_id) });
+    }
+    placed.push({ part, comp, pads, sourcePorts, fpEls, at, mirror, size });
+  }
+  add('pcb_board', { source_board_id: sourceBoard.source_board_id, subcircuit_id: SUB, center: board.center, thickness: board.thickness, num_layers: 2,
+    width: board.width, height: board.height, material: 'fr4', ...FAB_MINIMUMS });
+
+  for (const { part, comp, pads, sourcePorts, fpEls, at, mirror, size } of placed) {
+    // The component sits at the middle of its pads and holes (as tscircuit places it: pick-and-place reads this)
+    const extent = [...pads.map((p) => (p.smd ? [p.x - p.w / 2, p.y - p.h / 2, p.x + p.w / 2, p.y + p.h / 2] : [p.x - p.outer / 2, p.y - p.outer / 2, p.x + p.outer / 2, p.y + p.outer / 2])),
+      ...(part.holes || []).map((h) => { const q = at(h.x, h.y); return [q.x - h.d / 2, q.y - h.d / 2, q.x + h.d / 2, q.y + h.d / 2]; })];
+    const box = [Math.min(...extent.map((e) => e[0])), Math.min(...extent.map((e) => e[1])), Math.max(...extent.map((e) => e[2])), Math.max(...extent.map((e) => e[3]))];
+    const pc = add('pcb_component', { center: { x: (box[0] + box[2]) / 2, y: (box[1] + box[3]) / 2 }, width: box[2] - box[0], height: box[3] - box[1],
+      layer: part.layer, rotation: part.rotation ?? 0, source_component_id: comp.source_component_id, subcircuit_id: SUB });
+    const own = { pcb_component_id: pc.pcb_component_id, subcircuit_id: SUB };
+    pads.forEach((p, i) => {
+      const layers = p.smd ? [part.layer] : ['top', 'bottom'];
+      const port = add('pcb_port', { pcb_component_id: pc.pcb_component_id, layers, subcircuit_id: SUB, x: p.x, y: p.y, source_port_id: sourcePorts[i].source_port_id });
+      if (p.smd) {
+        const pad = add('pcb_smtpad', { ...own, pcb_port_id: port.pcb_port_id, layer: part.layer, shape: 'rect', width: p.w, height: p.h, port_hints: [p.hint], is_covered_with_solder_mask: false, x: p.x, y: p.y });
+        add('pcb_solder_paste', { layer: part.layer, shape: 'rect', width: p.w * PASTE, height: p.h * PASTE, x: p.x, y: p.y, pcb_component_id: pc.pcb_component_id, pcb_smtpad_id: pad.pcb_smtpad_id, subcircuit_id: SUB });
+      } else {
+        add('pcb_plated_hole', { ...own, pcb_port_id: port.pcb_port_id, outer_diameter: p.outer, hole_diameter: p.hole, shape: 'circle',
+          port_hints: [`unnamed_platedhole${i + 1}`, p.pin], x: p.x, y: p.y, layers, is_covered_with_solder_mask: false });
+      }
+      Object.assign(sourcePorts[i], { _pcb: port });
+      for (const key of [sourcePorts[i].name, ...sourcePorts[i].port_hints]) ports.set(`${part.name}.${key}`, { source: sourcePorts[i], pcb: port, x: p.x, y: p.y, layers });
+    });
+    for (const h of part.holes || []) { const q = at(h.x, h.y); add('pcb_hole', { ...own, hole_shape: 'circle', hole_diameter: h.d, x: q.x, y: q.y, is_covered_with_solder_mask: false }); }
+    if (part.courtyard) { const c = size(part.courtyard.w, part.courtyard.h); add('pcb_courtyard_rect', { ...own, layer: part.layer, center: { x: part.x, y: part.y }, width: c.w, height: c.h }); }
+    // A footprint's own marks, mirrored with it on the bottom: fab notes, the reference, the courtyard
+    for (const e of fpEls) {
+      if (e.type === 'pcb_fabrication_note_path') add(e.type, { ...own, layer: part.layer, route: e.route.map((q) => at(q.x, q.y)), stroke_width: e.stroke_width });
+      if (e.type === 'pcb_fabrication_note_text' || e.type === 'pcb_silkscreen_text') add(e.type, { anchor_alignment: 'center', anchor_position: at(e.anchor_position.x, e.anchor_position.y),
+        font: e.font, font_size: e.type === 'pcb_silkscreen_text' ? 0.5 : e.font_size, layer: part.layer, ...(e.type === 'pcb_silkscreen_text' ? { text: e.text.replace('{REF}', part.name), ccw_rotation: 0 } : { ccw_rotation: mirror < 0 ? 180 : 0, text: e.text }), ...own });
+      if (e.type === 'pcb_courtyard_rect') { const c = size(e.width, e.height); add(e.type, { ...own, layer: part.layer, center: at(e.center.x, e.center.y), width: c.w, height: c.h }); }
+    }
+  }
+
+  // ---- traces: drawn by rule, or left to the autorouter ----
+  const port = (part, name) => { const p = ports.get(`${part}.${name}`); if (!p) throw new Error(`no port ${part}.${name}`); return p; };
+  const toRoute = [], traces = [...(board.traces || []), ...netTraces(board, port)];
+  for (const t of traces) {
+    const a = port(...t.from), b = port(...t.to);
+    const st = add('source_trace', { connected_source_port_ids: [a.source.source_port_id, b.source.source_port_id], connected_source_net_ids: [], subcircuit_id: SUB,
+      display_name: `.${t.from.join(' > .')} to .${t.to.join(' > .')}`, min_trace_thickness: t.width });
+    if (!t.path) { toRoute.push({ t, a, b, id: st.source_trace_id }); continue; }
+    // A drawn track runs on the layer its first pad is on (a through-hole pad: the front)
+    const layer = a.layers.length === 1 ? a.layers[0] : 'top';
+    const pts = [{ x: a.x, y: a.y }, ...t.path, { x: b.x, y: b.y }];
+    add('pcb_trace', { route: pts.map((q, i) => ({ route_type: 'wire', x: q.x, y: q.y, width: t.width, layer,
+      ...(i === 0 ? { start_pcb_port_id: a.pcb.pcb_port_id } : {}), ...(i === pts.length - 1 ? { end_pcb_port_id: b.pcb.pcb_port_id } : {}) })), source_trace_id: st.source_trace_id, subcircuit_id: SUB });
+  }
+
+  // ---- silkscreen and mounting holes ----
+  for (const s of board.silk) {
+    if (s.rect) add('pcb_silkscreen_rect', { pcb_component_id: null, layer: s.layer, center: { x: s.rect.x, y: s.rect.y }, width: s.rect.w, height: s.rect.h, subcircuit_id: SUB, stroke_width: 0.1, is_filled: false });
+    else add('pcb_silkscreen_text', { anchor_alignment: 'center', anchor_position: { x: s.x, y: s.y }, font: 'tscircuit2024', font_size: s.size, layer: s.layer, text: s.text, ccw_rotation: 0, pcb_component_id: null, subcircuit_id: SUB });
+  }
+  for (const h of board.holes || []) add('pcb_hole', { hole_shape: 'circle', hole_diameter: h.d, x: h.x, y: h.y, is_covered_with_solder_mask: false, subcircuit_id: SUB });
+
+  // ---- the autorouter: what the rules don't draw ----
+  if (toRoute.length) {
+    if (!board.autoroute) throw new Error(`${toRoute.length} connections have no track and the board isn't autorouted`);
+    const routed = await route(out, toRoute, board);
+    for (const r of routed.traces) {
+      const t = add('pcb_trace', { route: r.route, source_trace_id: r.source_trace_id, subcircuit_id: SUB });
+      for (const v of r.vias) add('pcb_via', { pcb_trace_id: t.pcb_trace_id, ...v, subcircuit_id: SUB }); // whose via it is: the checks need it
+    }
+  }
+
+  schematic(out, add, placed, { ...board, traces }, port);
+  return out;
+}
+
+// A part's port names, in pad order: a switch's pin1 and pin2, a diode's anode and cathode, a chip's pins by label
+function portNames(part, pads) {
+  if (part.ftype === 'simple_diode') return [{ name: 'pin1', n: 1, hints: ['pin1', 'pos', 'anode', 'left', '1'] }, { name: 'pin2', n: 2, hints: ['pin2', 'neg', 'cathode', 'right', '2'] }];
+  return (part.pads || pads).map((p) => {
+    const n = Number(p.pin.replace(/\D/g, '')), label = part.sch?.pinLabels?.[p.pin];
+    return { name: label || p.pin, n, hints: label ? [label, p.pin, String(n)] : [p.pin, String(n)] };
+  });
+}
+
+// A net's connections: its pins joined by the shortest set of straight links between them (Prim's minimum spanning
+// tree, ties to the earlier pin), so the router gets short, sensible connections to route rather than a long chain
+function netTraces(board, port) {
+  return Object.entries(board.nets || {}).flatMap(([net, spec]) => {
+    const list = Array.isArray(spec) ? spec : spec.pins, width = (Array.isArray(spec) ? undefined : spec.width) ?? board.track;
+    if (!width) throw new Error(`net ${net}: no track width. Give the board a track width (board.track) or the net one ({ pins, width })`);
+    const pins = list.map((p) => { const i = String(p).indexOf('.'); if (i < 1) throw new Error(`net ${net}: "${p}" should name a part and a pin, like U1.GND`); return [p.slice(0, i), p.slice(i + 1)]; });
+    const at = pins.map((p) => port(...p)), linked = [0], links = [];
+    while (linked.length < pins.length) {
+      let best = null;
+      for (const a of linked) for (let b = 0; b < pins.length; b++) {
+        if (linked.includes(b)) continue;
+        const d = Math.hypot(at[a].x - at[b].x, at[a].y - at[b].y);
+        if (!best || d < best.d) best = { a, b, d };
+      }
+      linked.push(best.b); links.push({ from: pins[best.a], to: pins[best.b], width, net });
+    }
+    return links;
+  });
+}
+
+// ---- the schematic: each part at the place the board gives it, wires between neighbours, labels to the chip ----
+function schematic(out, add, placed, board, port) {
+  const sch = new Map();
+  for (const { part, comp, sourcePorts } of placed) {
+    const s = part.sch || { x: 0, y: 0 };
+    if (part.ftype === 'simple_chip') { // a box: pins 1 to 20 down the left, 21 to 40 up the right, 0.2 apart
+      const half = Math.ceil(sourcePorts.length / 2), size = { width: 1.9, height: (half + 1) * 0.2 };
+      const c = add('schematic_component', { center: { x: s.x, y: s.y }, rotation: 0, size, pin_spacing: 0.2, port_labels: part.sch?.pinLabels || {},
+        source_component_id: comp.source_component_id, is_box_with_pins: true, schematic_group_id: 'schematic_group_0' });
+      add('schematic_text', { text: part.mpn, schematic_component_id: c.schematic_component_id, anchor: 'left', rotation: 0,
+        position: { x: s.x - size.width / 2, y: s.y - size.height / 2 - 0.23 }, color: '#006464', font_size: 0.18 });
+      sourcePorts.forEach((sp, i) => {
+        const left = i < half, k = left ? i : sourcePorts.length - 1 - i, side = left ? 'left' : 'right';
+        const center = { x: s.x + (left ? -1 : 1) * (size.width / 2 + 0.4), y: s.y + size.height / 2 - 0.2 * (k + 1) };
+        sch.set(sp.source_port_id, add('schematic_port', { schematic_component_id: c.schematic_component_id, center, source_port_id: sp.source_port_id,
+          facing_direction: side, distance_from_component_edge: 0.4, side_of_component: side, pin_number: sp.pin_number, true_ccw_index: i, display_pin_label: sp.name }));
+      });
+      continue;
+    }
+    const symbol = symbols[part.ftype === 'simple_diode' ? 'diode_down' : 'spst_switch_right'];
+    const c = add('schematic_component', { center: { x: s.x, y: s.y }, rotation: 0, size: symbol.size, source_component_id: comp.source_component_id,
+      is_box_with_pins: true, symbol_name: part.ftype === 'simple_diode' ? 'diode_down' : 'spst_switch_right', schematic_group_id: 'schematic_group_0' });
+    sourcePorts.forEach((sp, i) => {
+      const q = symbol.ports[i], center = { x: s.x + q.x - symbol.center.x, y: s.y + q.y - symbol.center.y };
+      sch.set(sp.source_port_id, add('schematic_port', { schematic_component_id: c.schematic_component_id, center, source_port_id: sp.source_port_id,
+        facing_direction: part.ftype === 'simple_diode' ? (i ? 'down' : 'up') : (i ? 'right' : 'left'), distance_from_component_edge: 0.4 }));
+    });
+  }
+  // A wire between two parts' pins (L-shaped), or for a connection to the chip, a label at each end naming the pin
+  for (const t of board.traces) {
+    const a = port(...t.from), b = port(...t.to), pa = sch.get(a.source.source_port_id), pb = sch.get(b.source.source_port_id);
+    const chip = [a, b].find((q) => placed.find((p) => p.sourcePorts.includes(q.source)).part.ftype === 'simple_chip');
+    if (chip || t.net) { // a net's ends are labelled with the net's name
+      // At the chip, the label points out from its side of the box; at the matrix, it hangs below the pin
+      for (const [q, sp] of [[pa, a], [pb, b]]) add('schematic_net_label', { text: t.net ?? chip.source.name, anchor_position: q.center, center: q.center,
+        anchor_side: q.side_of_component === 'left' ? 'right' : q.side_of_component === 'right' ? 'left' : 'top', source_port_id: sp.source.source_port_id });
+      continue;
+    }
+    const corner = { x: pb.center.x, y: pa.center.y };
+    add('schematic_trace', { source_trace_id: `${pa.schematic_port_id}-${pb.schematic_port_id}`, junctions: [],
+      edges: [{ from: pa.center, to: corner }, { from: corner, to: pb.center }].filter((e) => e.from.x !== e.to.x || e.from.y !== e.to.y) });
+  }
+  add('schematic_group', { is_subcircuit: true, subcircuit_id: SUB, name: 'board', center: { x: 0, y: 0 }, width: 0, height: 0, schematic_component_ids: [], source_group_id: 'source_group_0' });
+}
+
+// ---- the autorouter ----
+// The connections the rules don't draw, routed by tscircuit's capacity autorouter around everything already on the
+// board. The board is described to it as tscircuit's own core describes it (pads, holes, the drawn tracks, and which
+// of them are connected), and the same solver runs with the same settings, so a board routes as it did there.
+// -> { traces: [{ route, source_trace_id, vias }] }
+export async function routeInput(json, toRoute) {
+  const { getFullConnectivityMapFromCircuitJson } = await import('circuit-json-to-connectivity-map');
+  const conn = getFullConnectivityMapFromCircuitJson(json);
+  const linked = (id) => { const net = conn.getNetConnectedToId(id); return net ? [...new Set([id, net, ...conn.getIdsConnectedToNet(net)])] : [id]; };
+  const comp = Object.fromEntries(json.filter((e) => e.type === 'source_component').map((e) => [e.source_component_id, e.name]));
+  const src = Object.fromEntries(json.filter((e) => e.type === 'source_port').map((e) => [e.source_port_id, e]));
+  const pcbPort = Object.fromEntries(json.filter((e) => e.type === 'pcb_port').map((e) => [e.pcb_port_id, e]));
+  const meta = (e, idKey) => { const sp = src[pcbPort[e.pcb_port_id]?.source_port_id];
+    return { [idKey]: e[idKey], pcb_port_id: e.pcb_port_id, source_component_name: comp[sp?.source_component_id], source_port_name: sp?.name }; };
+  // Pads joined inside their part (a Pico's GND pins) say so: the router may join them on the board too
+  const inside = new Map();
+  for (const e of json.filter((x) => x.type === 'source_component_internal_connection')) for (const id of e.source_port_ids) inside.set(id, [...(inside.get(id) || []), e.source_component_internal_connection_id]);
+  const joined = (e) => { const ids = inside.get(pcbPort[e.pcb_port_id]?.source_port_id); return ids ? { offBoardConnectsTo: ids, netIsAssignable: true } : {}; };
+  const b = json.find((e) => e.type === 'pcb_board'), obstacles = [];
+  for (const kind of ['pcb_smtpad', 'pcb_plated_hole', 'pcb_hole']) for (const e of json.filter((x) => x.type === kind)) { // by kind, as core lists them
+    if (e.type === 'pcb_smtpad') obstacles.push({ circuitJsonMetadata: meta(e, 'pcb_smtpad_id'), componentId: e.pcb_component_id, type: 'rect', layers: [e.layer],
+      center: { x: e.x, y: e.y }, width: e.width, height: e.height, connectedTo: linked(e.pcb_smtpad_id), ...joined(e) });
+    if (e.type === 'pcb_plated_hole') obstacles.push({ circuitJsonMetadata: meta(e, 'pcb_plated_hole_id'), componentId: e.pcb_component_id, type: 'oval', layers: ['top', 'bottom'],
+      center: { x: e.x, y: e.y }, width: e.outer_diameter, height: e.outer_diameter, connectedTo: linked(e.pcb_plated_hole_id), ...joined(e) });
+    if (e.type === 'pcb_hole') obstacles.push({ componentId: e.pcb_component_id, obstacleId: e.pcb_hole_id, isNonPlatedHole: true, type: 'rect', shape: 'circle',
+      layers: ['top', 'bottom'], center: { x: e.x, y: e.y }, width: e.hole_diameter, height: e.hole_diameter, connectedTo: [] });
+  }
+  const traces = json.filter((e) => e.type === 'pcb_trace').map((e) => ({ type: 'pcb_trace', pcb_trace_id: e.pcb_trace_id, source_trace_id: e.source_trace_id,
+    connection_name: e.source_trace_id, connectsTo: [e.route[0].start_pcb_port_id, e.route.at(-1).end_pcb_port_id],
+    route: e.route.map((p) => ({ route_type: p.route_type, x: p.x, y: p.y, width: p.width, layer: p.layer })) }));
+  const connections = toRoute.map(({ t, a, b: z, id }) => ({ name: id, source_trace_id: id, nominalTraceWidth: t.width, width: t.width,
+    pointsToConnect: [a, z].map((q) => ({ x: q.x, y: q.y, layer: q.layers.length === 1 ? q.layers[0] : 'top', pointId: q.pcb.pcb_port_id, pcb_port_id: q.pcb.pcb_port_id,
+      port_selector: `${comp[q.source.source_component_id]}.${q.source.name}` })) }));
+  return fixedTraces({ bounds: { minX: b.center.x - b.width / 2, maxX: b.center.x + b.width / 2, minY: b.center.y - b.height / 2, maxY: b.center.y + b.height / 2 },
+    obstacles, connections, traces, layerCount: 2, allowBlindAndBuriedVias: false, minTraceWidth: 0.15, nominalTraceWidth: 0.15, // tscircuit's defaults
+    // the board's fab minimums, under the names the router reads
+    minViaDiameter: b.min_via_pad_diameter, minViaHoleDiameter: b.min_via_hole_diameter, minViaPadDiameter: b.min_via_pad_diameter,
+    min_via_hole_diameter: b.min_via_hole_diameter, min_via_pad_diameter: b.min_via_pad_diameter,
+    minTraceToPadEdgeClearance: b.min_trace_to_pad_edge_clearance, minTraceToHoleEdgeClearance: b.min_trace_to_hole_edge_clearance,
+    minViaHoleEdgeToViaHoleEdgeClearance: b.min_via_hole_edge_to_via_hole_edge_clearance, minPlatedHoleDrillEdgeToDrillEdgeClearance: b.min_plated_hole_drill_edge_to_drill_edge_clearance,
+    minPadEdgeToPadEdgeClearance: b.min_pad_edge_to_pad_edge_clearance, minBoardEdgeClearance: b.min_board_edge_clearance });
+}
+
+// The drawn tracks become fixed obstacles for the router: each segment a box a track wide (a diagonal one, a run of
+// boxes about a track-width long), each via a square. Ported from tscircuit core's withFixedTraces (MIT licence,
+// github.com/tscircuit/core), so a board is routed around them as it is there.
+function fixedTraces(input) {
+  const obstacles = [];
+  for (const trace of input.traces) {
+    const connectedTo = [trace.connection_name ?? trace.pcb_trace_id, ...(trace.connectsTo ?? [])];
+    trace.route.forEach((p, i) => {
+      if (p.route_type === 'via') {
+        const d = p.via_diameter ?? input.minViaPadDiameter ?? input.minViaDiameter ?? 0.6;
+        obstacles.push({ type: 'rect', center: { x: p.x, y: p.y }, width: d, height: d, layers: ['top', 'bottom'], connectedTo });
+      }
+      const q = trace.route[i + 1];
+      if (!q || !['wire', 'via'].includes(p.route_type) || !['wire', 'via'].includes(q.route_type)) return;
+      const width = p.route_type === 'wire' ? p.width : q.route_type === 'wire' ? q.width : input.minTraceWidth;
+      const layer = p.route_type === 'wire' ? p.layer : p.to_layer;
+      const steps = p.x === q.x || p.y === q.y ? 1 : Math.max(1, Math.ceil(Math.hypot(q.x - p.x, q.y - p.y) / width));
+      for (let k = 0; k < steps; k++) {
+        const x1 = p.x + ((q.x - p.x) * k) / steps, y1 = p.y + ((q.y - p.y) * k) / steps;
+        const x2 = p.x + ((q.x - p.x) * (k + 1)) / steps, y2 = p.y + ((q.y - p.y) * (k + 1)) / steps;
+        obstacles.push({ type: 'rect', center: { x: (x1 + x2) / 2, y: (y1 + y2) / 2 }, width: Math.abs(x2 - x1) + width, height: Math.abs(y2 - y1) + width, layers: [layer], connectedTo });
+      }
+    });
+  }
+  return { ...input, traces: [], obstacles: [...input.obstacles, ...obstacles] };
+}
+
+async function defaultRouter(json, toRoute) {
+  // The autorouter uses JavaScript features from Node 22 (iterator helpers): say so, rather than fail inside it
+  if (Number(process.versions.node.split('.')[0]) < 22) throw new Error(`routing a board's remaining connections needs Node 22 or newer (this is Node ${process.versions.node}); boards drawn wholly by rule build on Node 20`);
+  const { AutoroutingPipelineSolver } = await import('@tscircuit/capacity-autorouter');
+  const srj = await routeInput(json, toRoute);
+  const solver = new AutoroutingPipelineSolver(srj, { cacheProvider: null });
+  solver.solve();
+  if (solver.failed) throw new Error(`the autorouter couldn't route every connection: ${solver.error || 'no reason given'}`);
+  // The routes for the connections asked for (the solver also hands back the fixed ones), each from its first pad to
+  // its second, as tscircuit records them
+  const traces = [], asked = new Map(srj.connections.map((c) => [c.name, c.pointsToConnect]));
+  const far = (p, q) => Math.hypot(p.x - q.x, p.y - q.y);
+  for (const t of solver.getOutputSimplifiedPcbTraces()) {
+    const ends = asked.get(t.connection_name);
+    if (!ends) continue;
+    let route = t.route.map((p) => ({ ...p }));
+    if (far(route[0], ends[0]) > far(route.at(-1), ends[0])) route = route.reverse(); // (a via keeps its layer labels, as in tscircuit)
+    route[0].start_pcb_port_id = ends[0].pcb_port_id;
+    route.at(-1).end_pcb_port_id = ends[1].pcb_port_id;
+    traces.push({ route, source_trace_id: t.connection_name, vias: route.filter((p) => p.route_type === 'via').map((p) => ({ x: p.x, y: p.y,
+      hole_diameter: srj.minViaHoleDiameter, outer_diameter: srj.minViaPadDiameter, layers: ['top', 'bottom'], from_layer: p.from_layer, to_layer: p.to_layer })) });
+  }
+  if (traces.length < srj.connections.length) throw new Error(`the autorouter routed ${traces.length} of ${srj.connections.length} connections`);
+  return { traces };
+}

package/package.json

@@ -1,11 +1,12 @@
 {
   "name": "@rulecad/pcb",
-  "version": "0.1.2",
-  "description": "Keyboard circuit boards from rules: every matrix track drawn by rule, footprints from datasheets, Gerbers, KiCad files and a JLCPCB BOM. Built on tscircuit.",
+  "version": "0.2.0",
+  "description": "Circuit boards from rules: parts from rule sets or any standard footprint, quarter-turn rotation, nets and autorouting; keyboards with every matrix track drawn by rule. Gerbers, KiCad files and a JLCPCB BOM. Circuit JSON written directly: no React.",
   "type": "module",
   "exports": "./pcb.mjs",
   "files": [
     "pcb.mjs",
+    "circuit.mjs",
     "README.md",
     "LICENSE"
   ],
@@ -16,7 +17,9 @@
     "tscircuit",
     "gerber",
     "jlcpcb",
-    "kicad"
+    "kicad",
+    "circuit-board",
+    "autorouter"
   ],
   "engines": {
     "node": ">=20.6"
@@ -27,14 +30,21 @@
     "directory": "packages/pcb"
   },
   "dependencies": {
+    "@flatten-js/core": "1.6.14",
     "@jscad/modeling": "^2.12.0",
     "@resvg/resvg-js": "2.6.2",
-    "@rulecad/cad": "^0.1.0",
+    "@rulecad/cad": "^0.2.0",
+    "@tscircuit/capacity-autorouter": "0.0.982",
+    "@tscircuit/checks": "0.0.253",
+    "@tscircuit/circuit-json-util": "0.0.122",
+    "@tscircuit/footprinter": "0.0.431",
     "@tscircuit/math-utils": "0.0.36",
+    "circuit-json": "0.0.525",
+    "circuit-json-to-connectivity-map": "0.0.34",
     "circuit-json-to-gerber": "0.0.113",
     "circuit-json-to-kicad": "0.0.231",
     "circuit-json-to-pnp-csv": "0.0.20",
     "circuit-to-svg": "0.0.450",
-    "tscircuit": "0.0.2895"
+    "schematic-symbols": "0.0.248"
   }
 }

package/pcb.mjs

@@ -1,6 +1,6 @@
-// Boards: a design whose .json says "engine": "pcb". Its main(v) returns a tscircuit board (circuits as code, from npm:
-// github.com/tscircuit/tscircuit), which this file builds into Circuit JSON, and from that a solid (previews, fits, the
-// on-screen copy), checks and the files a fab needs. Designs get it as v.pcb.
+// Boards: a design whose .json says "engine": "pcb". Its main(v) returns a board, described as plain data (parts, the
+// tracks the rules draw, silkscreen), which circuit.mjs builds into Circuit JSON (tscircuit's open format, no React);
+// from that come a solid (previews, fits, the on-screen copy), checks and the files a fab needs. Designs get it as v.pcb.
 //
 // The keyboard: keys in a matrix, one diode each, and a Pico beside them. Nothing is autorouted: the keyboard router
 // draws every track by rule, from the switch's footprint (mx rules) and our margins (the board's track and clear):
@@ -13,12 +13,10 @@
 // Diodes point from the switch to the row (COL2ROW in QMK's terms).
 import fs from 'node:fs';
 import path from 'node:path';
-import { Circuit, createElement as h } from 'tscircuit';
+import { circuitJson } from './circuit.mjs';
 import { loadRuleSet } from '@rulecad/cad/rules';
 import jscad from '@jscad/modeling';
 
-export { h };
-
 // A rows × cols grid of keys at the key pitch, centred on the origin: [{ r, c, x, y, n }], n counting from 1, row 0
 // at the back (+y)
 export function grid(rows, cols, pitch) {
@@ -28,15 +26,15 @@ export function grid(rows, cols, pitch) {
 }
 
 // ---------- footprints, from rules ----------
-const pad = (pin, x, y, drill, size) => h('platedhole', { portHints: [pin], pcbX: x, pcbY: y, shape: 'circle', holeDiameter: drill, outerDiameter: size });
-const hole = (x, y, d) => h('hole', { pcbX: x, pcbY: y, diameter: d });
+const pad = (pin, x, y, hole, outer) => ({ pin, x, y, hole, outer }); // plated, round, relative to the part
+const hole = (x, y, d) => ({ x, y, d });
 
 // An MX switch, PCB mount: two pins, the centre post and the two fixing pegs
 export function mx(name, x, y, m, sch = {}) {
-  return h('switch', { name, pcbX: x, pcbY: y, ...sch, manufacturerPartNumber: 'Cherry MX (PCB mount)', footprint: h('footprint', {},
-    pad('pin1', m.pcb_pin1_x, m.pcb_pin1_y, m.pcb_pin_drill, m.pcb_pin_pad), pad('pin2', m.pcb_pin2_x, m.pcb_pin2_y, m.pcb_pin_drill, m.pcb_pin_pad),
-    hole(0, 0, m.pcb_centre_hole), hole(-m.pcb_peg_x, 0, m.pcb_peg_hole), hole(m.pcb_peg_x, 0, m.pcb_peg_hole),
-    h('courtyardrect', { pcbX: 0, pcbY: 0, width: m.pcb_body, height: m.pcb_body })) }); // the housing's footprint on the board
+  return { name, ftype: 'simple_switch', mpn: 'Cherry MX (PCB mount)', x, y, layer: 'top', sch,
+    pads: [pad('pin1', m.pcb_pin1_x, m.pcb_pin1_y, m.pcb_pin_drill, m.pcb_pin_pad), pad('pin2', m.pcb_pin2_x, m.pcb_pin2_y, m.pcb_pin_drill, m.pcb_pin_pad)],
+    holes: [hole(0, 0, m.pcb_centre_hole), hole(-m.pcb_peg_x, 0, m.pcb_peg_hole), hole(m.pcb_peg_x, 0, m.pcb_peg_hole)],
+    courtyard: { w: m.pcb_body, h: m.pcb_body } }; // the housing's footprint on the board
 }
 
 // A Raspberry Pi Pico on header pins, USB at the back (+y): pins 1 to 20 down its left edge, 21 to 40 up its right
@@ -46,13 +44,62 @@ export function pico(name, x, y, p, sch = {}) {
     const left = n <= 20, i = left ? n - 1 : 40 - n;
     pins.push(pad(`pin${n}`, (left ? -1 : 1) * p.pin_rows / 2, (19 / 2 - i) * p.pin_pitch, p.pin_hole, p.pin_pad));
   }
-  return h('chip', { name, pcbX: x, pcbY: y, ...sch, manufacturerPartNumber: 'Raspberry Pi Pico', footprint: h('footprint', {}, ...pins, h('courtyardrect', { pcbX: 0, pcbY: 0, width: p.width, height: p.length })) });
+  return { name, ftype: 'simple_chip', mpn: 'Raspberry Pi Pico', x, y, layer: 'top', sch, pads: pins, courtyard: { w: p.width, h: p.length } };
 }
 // Where a Pico pin is, from its centre
 export const picoPin = (n, p) => { const left = n <= 20, i = left ? n - 1 : 40 - n; return { x: (left ? -1 : 1) * p.pin_rows / 2, y: (19 / 2 - i) * p.pin_pitch }; };
 // The Pico's GPIO pins down one edge: [{ pin, gpio }]
 export const picoGpio = (side) => Object.entries(loadRuleSet('pico').rules[`gpio_${side}`].pins).map(([pin, gpio]) => ({ pin: Number(pin), gpio }));
 
+// ---------- any board ----------
+// Parts for any board, not only keyboards. Each returns a part as circuit.mjs describes it: put them in board.parts, join
+// their pins with board.nets, and set board.autoroute. o (all optional): { rotation: 0 | 90 | 180 | 270, layer,
+// mpn, labels: { pin1: 'GND', ... }, sch: { x, y } }. Pin labels name the pins in nets ('U1.GND') and on the schematic.
+const chip = (name, x, y, o, more) => ({ name, ftype: 'simple_chip', x, y, layer: o.layer ?? 'top', rotation: o.rotation ?? 0, mpn: o.mpn,
+  courtyard: o.courtyard ?? null, sch: { x: o.sch?.x ?? x / 2, y: o.sch?.y ?? y / 2, pinLabels: o.labels ?? {} }, ...more });
+const pinNo = (p) => Number(p.pin.replace(/\D/g, ''));
+// A rule set's pin map ({ "1": "GND", ... }) as pin labels ({ pin1: 'GND', ... })
+const labelsFrom = (set, rule) => Object.fromEntries(Object.entries(loadRuleSet(set).rules[rule].pins).map(([n, l]) => [`pin${n}`, l]));
+
+/**
+ * Any standard footprint as a part, by its footprinter name: 'jst4_sh', 'pinrow4', 'soic8', '0603', 'sot23' ...
+ * (SMD and through-hole). Pins are numbered as the footprint numbers them.
+ * @param {string} name @param {string} footprint @param {number} x @param {number} y @param {object} [o]
+ */
+export const part = (name, footprint, x, y, o = {}) => chip(name, x, y, o, { footprint });
+
+/**
+ * A pin header from rules (r: pitch, drill, pad; row_spacing for two rows): o.pins pins per row, o.rows 1 or 2.
+ * Two rows are numbered as a DIP: 1 to n down the left, n + 1 to 2n up the right.
+ */
+export function header(name, x, y, r, o = {}) {
+  const n = o.pins, two = (o.rows ?? 1) === 2, pads = [];
+  for (let i = 0; i < n; i++) {
+    const py = ((n - 1) / 2 - i) * r.pitch;
+    pads.push(pad(`pin${i + 1}`, two ? -r.row_spacing / 2 : 0, py, r.drill, r.pad));
+    if (two) pads.push(pad(`pin${2 * n - i}`, r.row_spacing / 2, py, r.drill, r.pad));
+  }
+  return chip(name, x, y, o, { pads: pads.sort((a, b) => pinNo(a) - pinNo(b)) });
+}
+
+/** A Seeed Studio XIAO module (any of the family) on header pins, USB at +y, from the xiao rules; pins labelled D0..D10, 5V, GND, 3V3. */
+export const xiao = (name, x, y, r, o = {}) =>
+  header(name, x, y, r, { pins: r.pins / 2, rows: 2, mpn: 'Seeed Studio XIAO', courtyard: { w: r.width, h: r.length }, labels: labelsFrom('xiao', 'pins'), ...o });
+
+/** A Qwiic / STEMMA QT socket (JST SH, 4 pins, side entry), from the qwiic rules: the plug goes in from +y, the tabs' side. */
+export function qwiic(name, x, y, r, o = {}) {
+  const n = r.pins, smd = (k, x, y, w, h) => ({ pin: `pin${k}`, smd: true, hint: String(k), x, y, w, h });
+  const pads = Array.from({ length: n }, (_, i) => smd(i + 1, (i - (n - 1) / 2) * r.pitch, r.pad_y, r.pad_w, r.pad_h))
+    .concat([-1, 1].map((side, i) => smd(n + i + 1, side * r.tab_x, r.tab_y, r.tab_w, r.tab_h)));
+  return chip(name, x, y, { mpn: 'JST SM04B-SRSS-TB', labels: { ...labelsFrom('qwiic', 'pins'), pin5: 'TAB1', pin6: 'TAB2' }, ...o }, { pads });
+}
+
+/** A JST PH socket (2.0 mm, through-hole), from the jstph rules: o.pins pins in a row along x (default 2). */
+export function jstph(name, x, y, r, o = {}) {
+  const n = o.pins ?? 2;
+  return chip(name, x, y, { mpn: `JST B${n}B-PH-K-S`, ...o }, { pads: Array.from({ length: n }, (_, i) => pad(`pin${i + 1}`, (i - (n - 1) / 2) * r.pitch, 0, r.drill, r.pad)) });
+}
+
 // ---------- the keyboard ----------
 // Keys from a layout file (lib/layout.mjs keys, in key units) -> [{ r, c, x, y, u, n, label }] in mm. The matrix row is
 // the layout row; the matrix column comes from lining every row up with the widest one: each row's keys take, in order,
@@ -80,7 +127,7 @@ export function fromLayout(list, pitch) {
   return ks;
 }
 
-// keyboard(v, keys) -> { board (a tscircuit <board>), matrix }; v holds the mx, pico, sod123, m2 and jlcpcb rules and
+// keyboard(v, keys) -> { board (as circuit.mjs describes it), matrix }; v holds the mx, pico, sod123, m2 and jlcpcb rules and
 // the board's variables:
 //   track, clear      our track width and the gap we keep to anything
 //   margin            board edge beyond the keys (and the Pico, beside them)
@@ -113,7 +160,7 @@ export function keyboard(v, keys) {
   const other = Object.entries(loadRuleSet('pico').rules.other_pins.pins).map(([pin, name]) => ({ pin: Number(pin), gpio: name }));
   const gpio = [...picoGpio('left'), ...picoGpio('right')];
   const pinLabels = Object.fromEntries([...gpio, ...other].map((g) => [`pin${g.pin}`, g.gpio]));
-  const sch = { schX: (cols.length + 1.5) * SX, schY: -(rows.length - 1) * SY / 2, pinLabels };
+  const sch = { x: (cols.length + 1.5) * SX, y: -(rows.length - 1) * SY / 2, pinLabels };
   let left = keyBox.left - v.margin, right = keyBox.right + v.margin, pico0, pinAt, pinRows = [];
   if (under) {
     // Its pin rows in the gaps below key rows mcu_row and mcu_row + 1: clear of the row line above (back copper), the
@@ -140,15 +187,16 @@ export function keyboard(v, keys) {
     pico0 = { x: cx, y: cy };
     right = cx + p.width / 2 + v.margin;
   }
-  const picoPart = h('chip', { name: 'U1', pcbX: pico0.x, pcbY: pico0.y, ...sch, manufacturerPartNumber: 'Raspberry Pi Pico',
-    footprint: h('footprint', {}, ...Array.from({ length: 40 }, (_, i) => { const q = pinAt(i + 1); return pad(`pin${i + 1}`, q.x - pico0.x, q.y - pico0.y, p.pin_hole, p.pin_pad); }),
-      ...(under ? [] : [h('courtyardrect', { pcbX: 0, pcbY: 0, width: p.width, height: p.length })])) });
+  const picoPart = { name: 'U1', ftype: 'simple_chip', mpn: 'Raspberry Pi Pico', x: pico0.x, y: pico0.y, layer: 'top', sch,
+    pads: Array.from({ length: 40 }, (_, i) => { const q = pinAt(i + 1); return pad(`pin${i + 1}`, q.x - pico0.x, q.y - pico0.y, p.pin_hole, p.pin_pad); }),
+    courtyard: under ? null : { w: p.width, h: p.length } };
 
   const parts = [picoPart], traces = [];
-  const rel = (pts, ox, oy) => pts.map(([x, y]) => ({ x: x - ox, y: y - oy })); // tscircuit paths are relative to the part they start from
+  const pts = (list) => list.map(([x, y]) => ({ x, y })); // a track's corners between its two pads, on the board
   for (const k of keys) {
-    parts.push(mx(`K${k.n}`, k.x, k.y, m, { schX: k.c * SX, schY: -k.r * SY }), h('diode', { name: `D${k.n}`, footprint: 'sod123', schX: k.c * SX + 1, schY: -k.r * SY - 0.8, schRotation: 270, pcbX: k.x + diode.x, pcbY: k.y + diode.y, layer: 'bottom', manufacturerPartNumber: '1N4148W' }));
-    traces.push(h('trace', { from: `.D${k.n} > .anode`, to: `.K${k.n} > .pin1`, thickness: v.track, pcbPath: rel([[k.x + anodeX, k.y + m.pcb_pin1_y]], k.x + diode.x, k.y + diode.y) }));
+    parts.push(mx(`K${k.n}`, k.x, k.y, m, { x: k.c * SX, y: -k.r * SY }),
+      { name: `D${k.n}`, ftype: 'simple_diode', footprint: 'sod123', mpn: '1N4148W', x: k.x + diode.x, y: k.y + diode.y, layer: 'bottom', sch: { x: k.c * SX + 1, y: -k.r * SY - 0.8 } });
+    traces.push({ from: [`D${k.n}`, 'anode'], to: [`K${k.n}`, 'pin1'], width: v.track, path: pts([[k.x + anodeX, k.y + m.pcb_pin1_y]]) });
   }
 
   // ---- rows: cathode to cathode along the back ----
@@ -156,7 +204,7 @@ export function keyboard(v, keys) {
     const ks = keys.filter((k) => k.r === r).sort((a, b) => a.x - b.x);
     for (let i = 1; i < ks.length; i++) {
       const a = ks[i - 1], b = ks[i];
-      traces.push(h('trace', { from: `.D${a.n} > .cathode`, to: `.D${b.n} > .cathode`, thickness: v.track, pcbPath: rel([[a.x + cathodeX, a.y + lineY], [b.x + cathodeX, b.y + lineY]], a.x + diode.x, a.y + diode.y) }));
+      traces.push({ from: [`D${a.n}`, 'cathode'], to: [`D${b.n}`, 'cathode'], width: v.track, path: pts([[a.x + cathodeX, a.y + lineY], [b.x + cathodeX, b.y + lineY]]) });
     }
   }
 
@@ -195,7 +243,7 @@ export function keyboard(v, keys) {
     const ks = keys.filter((k) => k.c === c).sort((a, b) => a.r - b.r);
     for (let j = 1; j < ks.length; j++) {
       const a = ks[j - 1], b = ks[j];
-      traces.push(h('trace', { from: `.K${a.n} > .pin2`, to: `.K${b.n} > .pin2`, thickness: v.track, pcbPath: rel(columnPath(a, b), a.x, a.y) }));
+      traces.push({ from: [`K${a.n}`, 'pin2'], to: [`K${b.n}`, 'pin2'], width: v.track, path: pts(columnPath(a, b)) });
     }
   }
 
@@ -203,8 +251,8 @@ export function keyboard(v, keys) {
   const rowPin = {}, colPin = {};
   if (under) {
     // Each row and column takes the free GPIO nearest it, nearest pairs first; then a track the autorouter finds
-    const ends = [...rows.map((r) => ({ kind: 'row', id: r, at: keys.filter((k) => k.r === r).map((k) => ({ x: k.x + cathodeX, y: k.y + diode.y, sel: `.D${k.n} > .cathode` })) })),
-      ...cols.map((c) => ({ kind: 'col', id: c, at: keys.filter((k) => k.c === c).map((k) => ({ x: k.x + m.pcb_pin2_x, y: k.y + m.pcb_pin2_y, sel: `.K${k.n} > .pin2` })) }))];
+    const ends = [...rows.map((r) => ({ kind: 'row', id: r, at: keys.filter((k) => k.r === r).map((k) => ({ x: k.x + cathodeX, y: k.y + diode.y, sel: [`D${k.n}`, 'cathode'] })) })),
+      ...cols.map((c) => ({ kind: 'col', id: c, at: keys.filter((k) => k.c === c).map((k) => ({ x: k.x + m.pcb_pin2_x, y: k.y + m.pcb_pin2_y, sel: [`K${k.n}`, 'pin2'] })) }))];
     const free = [...gpio];
     const dist = (e, g) => Math.min(...e.at.map((q) => Math.hypot(q.x - pinAt(g.pin).x, q.y - pinAt(g.pin).y)));
     const left_ = [...ends];
@@ -215,7 +263,7 @@ export function keyboard(v, keys) {
       left_.splice(left_.indexOf(best.e), 1); free.splice(free.indexOf(best.g), 1);
       (best.e.kind === 'row' ? rowPin : colPin)[best.e.id] = best.g;
       const q = pinAt(best.g.pin), near = [...best.e.at].sort((a, b) => Math.hypot(a.x - q.x, a.y - q.y) - Math.hypot(b.x - q.x, b.y - q.y))[0];
-      traces.push(h('trace', { from: near.sel, to: `.U1 > .pin${best.g.pin}`, thickness: v.track }));
+      traces.push({ from: near.sel, to: ['U1', `pin${best.g.pin}`], width: v.track }); // no path: the autorouter's
     }
   } else {
     // Beside: rows take the free left-edge pins nearest their row line, columns the lowest of the rest; every track
@@ -232,13 +280,13 @@ export function keyboard(v, keys) {
     cols.forEach((c, i) => { colPin[c] = lowest[i]; });
     for (const r of rows) {
       const last = keys.filter((k) => k.r === r).sort((a, b) => a.x - b.x).at(-1), pinY = pinAt(rowPin[r].pin).y;
-      traces.push(h('trace', { from: `.D${last.n} > .cathode`, to: `.U1 > .pin${rowPin[r].pin}`, thickness: v.track,
-        pcbPath: rel([[last.x + cathodeX, last.y + lineY], [nearPins - lane, last.y + lineY], [nearPins - lane, pinY]], last.x + diode.x, last.y + diode.y) }));
+      traces.push({ from: [`D${last.n}`, 'cathode'], to: ['U1', `pin${rowPin[r].pin}`], width: v.track,
+        path: pts([[last.x + cathodeX, last.y + lineY], [nearPins - lane, last.y + lineY], [nearPins - lane, pinY]]) });
     }
     cols.forEach((c, i) => {
       const last = keys.filter((k) => k.c === c).sort((a, b) => b.r - a.r)[0], depth = keyBox.bottom - (cols.length - i) * lane, laneX = nearPins - i * lane;
-      traces.push(h('trace', { from: `.K${last.n} > .pin2`, to: `.U1 > .pin${colPin[c].pin}`, thickness: v.track,
-        pcbPath: rel([[last.x + jogX, last.y + m.pcb_pin2_y - slant], [last.x + jogX, depth], [laneX, depth], [laneX, pinAt(colPin[c].pin).y]], last.x, last.y) }));
+      traces.push({ from: [`K${last.n}`, 'pin2'], to: ['U1', `pin${colPin[c].pin}`], width: v.track,
+        path: pts([[last.x + jogX, last.y + m.pcb_pin2_y - slant], [last.x + jogX, depth], [laneX, depth], [laneX, pinAt(colPin[c].pin).y]]) });
     });
   }
 
@@ -251,16 +299,16 @@ export function keyboard(v, keys) {
   // Silkscreen for whoever solders it: the Pico's outline (on the side it's fitted) with USB marked, each switch's
   // outline, and a bar at each diode's cathode (on the back, between its pads, next to the cathode)
   const silk = v.jlcpcb.silk_line * 2, text = v.jlcpcb.silk_text * 2;
-  const outline = (x, y, w, ht, layer = 'top') => [h('silkscreenrect', { pcbX: x, pcbY: y + ht / 2, width: w, height: silk, layer }), h('silkscreenrect', { pcbX: x, pcbY: y - ht / 2, width: w, height: silk, layer }),
-    h('silkscreenrect', { pcbX: x - w / 2, pcbY: y, width: silk, height: ht, layer }), h('silkscreenrect', { pcbX: x + w / 2, pcbY: y, width: silk, height: ht, layer })];
+  const rect = (x, y, w, ht, layer) => ({ rect: { x, y, w, h: ht }, layer });
+  const outline = (x, y, w, ht, layer = 'top') => [rect(x, y + ht / 2, w, silk, layer), rect(x, y - ht / 2, w, silk, layer), rect(x - w / 2, y, silk, ht, layer), rect(x + w / 2, y, silk, ht, layer)];
   const usbAt = under ? { x: pico0.x + (pico0.toLeft ? -1 : 1) * (p.length / 2 - text * 1.5), y: pico0.y } : { x: pico0.x, y: pico0.y + p.length / 2 - text };
   const marks = [...(under ? outline(pico0.x, pico0.y, p.length, p.width, 'bottom') : outline(pico0.x, pico0.y, p.width, p.length)),
-    h('silkscreentext', { text: 'USB', pcbX: usbAt.x, pcbY: usbAt.y, fontSize: text, layer: under ? 'bottom' : 'top' }),
+    { text: 'USB', x: usbAt.x, y: usbAt.y, size: text, layer: under ? 'bottom' : 'top' },
     ...keys.flatMap((k) => outline(k.x, k.y, m.pcb_body, m.pcb_body)),
-    ...keys.map((k) => h('silkscreenrect', { pcbX: k.x + cathodeX + d.pad_w / 2 + silk * 2, pcbY: k.y + diode.y, width: silk, height: d.pad_h, layer: 'bottom' })),
-    ...(v.margin >= text * 2 ? [h('silkscreentext', { text: 'rulecad: diodes point to the rows', pcbX: (keyBox.left + keyBox.right) / 2, pcbY: bottom + v.margin / 2, fontSize: text, layer: 'bottom' })] : [])];
-  const board = h('board', { width: right - left, height: top - bottom, pcbX: cx, pcbY: cy, thickness: v.thickness, ...(under ? {} : { autorouter: 'none' }) },
-    ...parts, ...traces, ...marks, ...corners.map(([x, y]) => hole(x, y, v.m2.clearance)));
+    ...keys.map((k) => rect(k.x + cathodeX + d.pad_w / 2 + silk * 2, k.y + diode.y, silk, d.pad_h, 'bottom')),
+    ...(v.margin >= text * 2 ? [{ text: 'rulecad: diodes point to the rows', x: (keyBox.left + keyBox.right) / 2, y: bottom + v.margin / 2, size: text, layer: 'bottom' }] : [])];
+  const board = { center: { x: cx, y: cy }, width: right - left, height: top - bottom, thickness: v.thickness, autoroute: under,
+    parts, traces, silk: marks, holes: corners.map(([x, y]) => hole(x, y, v.m2.clearance)) };
   const matrix = {
     keys: keys.map((k) => ({ key: `K${k.n}`, ...(k.label ? { label: k.label } : {}), row: k.r, col: k.c })),
     rows: Object.fromEntries(rows.map((r) => [r, rowPin[r].gpio])), cols: Object.fromEntries(cols.map((c) => [c, colPin[c].gpio])),
@@ -270,37 +318,13 @@ export function keyboard(v, keys) {
 }
 
 // ---------- building ----------
-// render(board) -> Circuit JSON. A board element's own positions are relative to the board's centre in tscircuit, so
-// the board is wrapped at the origin and its parts placed absolutely.
-export async function render(board) {
-  const circuit = new Circuit();
-  const { pcbX = 0, pcbY = 0, ...props } = board.props, kids = [board.props.children].flat(Infinity).filter(Boolean);
-  // tscircuit places children relative to the board's centre: move them so the numbers given stay absolute
-  const moved = kids.map((k) => h(k.type, { ...k.props, ...(k.props.pcbX != null ? { pcbX: k.props.pcbX - pcbX } : {}), ...(k.props.pcbY != null ? { pcbY: k.props.pcbY - pcbY } : {}) }));
-  const { children, ...rest } = props;
-  circuit.add(h('board', rest, ...moved));
-  await circuit.renderUntilSettled();
-  const json = circuit.getCircuitJson();
-  // Put it back where it was drawn, so the board sits around the numbers in the design
-  return pcbX || pcbY ? json.map((e) => shiftElement(e, pcbX, pcbY)) : json;
-}
-
-// Every x/y in a Circuit JSON element moved by (dx, dy)
-function shiftElement(e, dx, dy) {
-  const move = (o) => {
-    if (Array.isArray(o)) return o.map(move);
-    if (!o || typeof o !== 'object') return o;
-    const out = {};
-    for (const [k, v] of Object.entries(o)) out[k] = (k === 'x' && typeof v === 'number') ? v + dx : (k === 'y' && typeof v === 'number') ? v + dy : move(v);
-    return out;
-  };
-  return e.type?.startsWith('schematic_') ? e : move(e);
-}
+// render(board) -> Circuit JSON (circuit.mjs)
+export const render = (board, options) => circuitJson(board, options); // options.route: a router in place of the autorouter
 
 // The board as a solid (previews, fits, the on-screen copy, the model page): the bare board, drilled, bottom at z = 0. Its
 // copper is drawn in the 2D views (views), not in 3D. The board is a 2D outline with its holes, extruded: its faces
 // triangulate cleanly (cylinders subtracted from a block leave long slivers).
-export function solids(json, { thickness, smooth }) {
+export function solids(json, { thickness, smooth = 16 }) { // smooth: segments per hole (a board without the variable gets 16)
   const { rectangle, circle } = jscad.primitives, { subtract } = jscad.booleans, { extrudeLinear } = jscad.extrusions;
   const b = json.find((e) => e.type === 'pcb_board');
   const drills = json.filter((e) => e.type === 'pcb_hole' || e.type === 'pcb_plated_hole' || e.type === 'pcb_via')
@@ -316,7 +340,14 @@ export function outputs(json, matrix) {
   return { board_x: b.center.x, board_y: b.center.y, board_w: b.width, board_d: b.height, ...(matrix?.pico ? { pico_x: matrix.pico.x, pico_y: matrix.pico.y } : {}) };
 }
 
+/**
+ * A board's mounting holes (the board's own holes, not a part's): [{ x, y, d }] in mm, in the board's frame (as
+ * board_x and board_y). A case reads them to put its bosses under them; a holes fit checks screws find their inserts.
+ */
+export const holes = (json) => json.filter((e) => e.type === 'pcb_hole' && !e.pcb_component_id).map((e) => ({ x: e.x, y: e.y, d: e.hole_diameter }));
+
 // ---------- checks ----------
+const mm = (x) => String(Number(x.toFixed(3))); // 0.30000000000000004 reads as 0.3
 // checks(json, v) -> findings ({ level, text }): tscircuit's own design checks, the fab's limits, and the matrix
 export async function checks(json, v, matrix) {
   const { runAllChecks } = await import('@tscircuit/checks');
@@ -327,7 +358,7 @@ export async function checks(json, v, matrix) {
   const traces = json.filter((e) => e.type === 'pcb_trace'), unrouted = json.filter((e) => e.type === 'source_trace').length - traces.length;
   out.push(unrouted > 0 ? { level: 'fail', text: `${unrouted} connections have no track` } : { level: 'pass', text: `every connection is routed (${traces.length} tracks, ${json.filter((e) => e.type === 'pcb_via').length} vias)` });
   const thin = traces.flatMap((t) => t.route).filter((p) => p.width != null && p.width < j.track_min);
-  out.push(thin.length ? { level: 'fail', text: `tracks under JLCPCB's ${j.track_min} mm` } : { level: 'pass', text: `tracks ${v.track} mm, gaps ${v.clear} mm: over JLCPCB's ${j.track_min} / ${j.gap_min} mm` });
+  out.push(thin.length ? { level: 'fail', text: `tracks under JLCPCB's ${j.track_min} mm` } : { level: 'pass', text: `tracks ${mm(v.track ?? Math.min(...traces.flatMap((t) => t.route).map((p) => p.width).filter((w) => w != null)))} mm${v.clear != null ? `, gaps ${mm(v.clear)} mm` : ''}: over JLCPCB's ${j.track_min} / ${j.gap_min} mm` });
   const drills = json.filter((e) => e.type === 'pcb_hole' || e.type === 'pcb_plated_hole').map((e) => e.hole_diameter ?? e.hole_width);
   out.push(Math.min(...drills) < j.drill_min ? { level: 'fail', text: `a hole under JLCPCB's ${j.drill_min} mm` } : { level: 'pass', text: `${drills.length} holes, smallest ${Math.min(...drills)} mm (JLCPCB: ${j.drill_min} mm)` });
   const b = json.find((e) => e.type === 'pcb_board'), size = `${b.width.toFixed(1)} × ${b.height.toFixed(1)} mm`;