@protoboardai/ext-tscircuit 0.0.0-stage → 0.2.1

package/ops/package.ts

@@ -0,0 +1,156 @@
+/**
+ * Contributions to the Manufacturing Package (@protoboardai/ext-release section
+ * contract) for the boards this provider designs: each board's fabrication
+ * and assembly order in its unit's work order. The fab profile (layers,
+ * thickness, copper, finish, solder mask, silkscreen) comes from
+ * circuit.config.ts, with the defaults below stated as such; the stack-up
+ * follows from the layer count and thickness; the assembly sides and
+ * placements from out/pnp.csv; leadless packages (which want a flat finish,
+ * a stencil and X-ray inspection) from the parts' package facts; the files
+ * are the standard outputs.
+ */
+import { existsSync, readdirSync, readFileSync } from "node:fs";
+import { join } from "node:path";
+import { boardNetlist, boardOptions, parseCsv, type CapabilityBinding, type Project } from "@protoboardai/core";
+import type { Block, SectionContext, SectionFn } from "@protoboardai/ext-release";
+import { perBuild, providerModules } from "@protoboardai/ext-release/helpers";
+import { viasInPads } from "../lib/checks.ts";
+import { boardLands } from "../lib/footprints.ts";
+import { readNative, readOverrides } from "../lib/native.ts";
+
+const PROVIDER = "@protoboardai/ext-tscircuit";
+/** Package names (as the maker states them) with joints under the body. */
+const LEADLESS = /QFN|DFN|LGA|BGA|CSP|\bW?SON\b/i;
+
+export interface FabProfile {
+  layers: number;
+  thickness_mm: number;
+  copper: string;
+  finish: string;
+  finishWhy: string;
+  mask: string;
+  silk: string;
+  assembly: "fab" | "hand";
+  /** Notes for the fabricator: the provider's own (a hold while land patterns are unverified, via-in-pad fill), then circuit.config.ts's. */
+  notes: string[];
+  /** How many of `notes` are the provider's own (they come first). */
+  ownNotes: number;
+  /** Land patterns the board uses, and those not verified against their makers' drawings (entry id: instances). */
+  lands: { total: number; unverified: string[] };
+  /** Vias inside SMD pads in the built board, and what the config says about them. */
+  viaInPad: { count: number; policy: "avoid" | "fill_and_cap" };
+  leadless: string[];
+  sides: Record<string, number>;
+  placed: number;
+  gerbers: string[];
+  drills: string[];
+}
+
+/** The fabrication and assembly profile of one board: its config, its parts and its standard outputs. */
+export function fabProfile(p: Project, b: CapabilityBinding): FabProfile {
+  const c = b.constraints as { layers?: number; thickness_mm?: number; copper_oz?: number; finish?: string; solder_mask?: string; silkscreen?: string; assembly?: "fab" | "hand"; fab_notes?: string[]; via_in_pad?: "avoid" | "fill_and_cap" };
+  const def = p.definitions.get(b.module!)!.def;
+  const netlist = boardNetlist(def, p.lookup, boardOptions(p));
+  const lands = boardLands(netlist.components, b.native ? readOverrides(p.root, b.native).overrides : {});
+  const unverified = lands.filter((l) => l.problems.length).map((l) => `${l.entry.id} (${l.instances.join(", ")})`);
+  const native = b.native ? readNative(p.root, b.native) : undefined;
+  const viaCount = native ? viasInPads(native.circuitJson).length : 0;
+  const policy = c.via_in_pad ?? "avoid";
+  const own: string[] = [];
+  if (unverified.length)
+    own.push(`HOLD: do not order this revision. ${unverified.length} of ${lands.length} land patterns are not verified against the makers' recommended land patterns (circuit:check CIRCUIT_FOOTPRINT_UNVERIFIED): ${unverified.join("; ")}.`);
+  if (viaCount && policy === "fill_and_cap") own.push(`Vias in pads (${viaCount}): fill with non-conductive epoxy and cap-plate them flat (IPC-4761 type VII), so they do not wick solder from the joints.`);
+  const leadless = [...new Set(netlist.components.filter((x) => x.package?.name && LEADLESS.test(x.package.name)).map((x) => `${x.instance} (${x.package!.name})`))];
+  const pnpFile = join(p.root, b.out, "pnp.csv");
+  const sides: Record<string, number> = {};
+  let placed = 0;
+  if (existsSync(pnpFile)) {
+    const [head = [], ...rows] = parseCsv(readFileSync(pnpFile, "utf8")).rows;
+    const k = head.indexOf("side");
+    for (const r of rows.filter((r) => r.length > 1)) {
+      const side = (k >= 0 && r[k]) || "top";
+      sides[side] = (sides[side] ?? 0) + 1;
+      placed++;
+    }
+  }
+  const gdir = join(p.root, b.out, "gerber");
+  const g = existsSync(gdir) ? readdirSync(gdir).sort() : [];
+  return {
+    ownNotes: own.length,
+    layers: c.layers ?? 2,
+    thickness_mm: c.thickness_mm ?? 1.6,
+    copper: c.copper_oz ? `${c.copper_oz} oz outer layers` : "1 oz outer layers (default: the fab's standard)",
+    finish: c.finish ?? (leadless.length ? "ENIG" : "lead-free HASL"),
+    finishWhy: c.finish ? "circuit.config.ts" : leadless.length ? `default: leadless packages want a flat finish (${leadless.length})` : "default: no leadless packages",
+    mask: c.solder_mask ?? "green (default)",
+    silk: c.silkscreen ?? "white (default)",
+    assembly: c.assembly ?? "fab",
+    notes: [...own, ...(c.fab_notes ?? [])],
+    lands: { total: lands.length, unverified },
+    viaInPad: { count: viaCount, policy },
+    leadless,
+    sides,
+    placed,
+    gerbers: g.filter((f) => !/\.(drl|xln)$/i.test(f)),
+    drills: g.filter((f) => /\.(drl|xln)$/i.test(f)),
+  };
+}
+
+function stackup(layers: number, t: number): { layer: string; what: string }[] {
+  if (layers === 4)
+    return [
+      { layer: "Top copper", what: "signal, components" },
+      { layer: "Prepreg", what: "" },
+      { layer: "Inner 1", what: "copper" },
+      { layer: "Core", what: "FR-4" },
+      { layer: "Inner 2", what: "copper" },
+      { layer: "Prepreg", what: "" },
+      { layer: "Bottom copper", what: "signal" },
+    ].map((x) => ({ ...x, what: x.what || `the fab's standard 4-layer build for ${t} mm` }));
+  return [
+    { layer: "Top copper", what: "signal, components" },
+    { layer: "Core", what: `FR-4, ${t} mm finished board` },
+    { layer: "Bottom copper", what: "signal" },
+  ];
+}
+
+export const workOrder: SectionFn = ({ project: p, unit, release }: SectionContext) => {
+  const boards = providerModules(p, unit, PROVIDER);
+  if (!boards.length) return undefined;
+  const builds = unit.perProduct * release.build;
+  const blocks: Block[] = [];
+  for (const b of boards) {
+    const def = p.definitions.get(b.module!)!.def;
+    const f = fabProfile(p, b);
+    const qty = perBuild(unit, def.id) * builds;
+    const sides = Object.entries(f.sides).map(([s, k]) => `${k} ${s}`).join(", ");
+    blocks.push({ kind: "heading", text: def.name ?? def.id });
+    blocks.push({
+      kind: "keyvalues",
+      rows: [
+        { label: "Quantity", value: `${qty} board${qty === 1 ? "" : "s"}`, note: "for every build of this unit; fabs often have a minimum panel, order it" },
+        { label: "Layers", value: `${f.layers} copper`, note: b.config },
+        { label: "Thickness", value: `${f.thickness_mm} mm` },
+        { label: "Copper", value: f.copper },
+        { label: "Finish", value: f.finish, note: f.finishWhy },
+        { label: "Solder mask / silkscreen", value: `${f.mask} / ${f.silk}` },
+        { label: "Assembly", value: f.assembly === "fab" ? `by the fab: ${f.placed} placements${sides ? ` (${sides})` : ""}` : `by hand: ${f.placed} placements${sides ? ` (${sides})` : ""}`, note: Object.keys(f.sides).length > 1 ? "double-sided: two reflow passes" : "single-sided: one reflow pass" },
+        { label: "Land patterns", value: f.lands.unverified.length ? `${f.lands.unverified.length} of ${f.lands.total} not verified` : `${f.lands.total} of ${f.lands.total} verified`, note: "against the makers' recommended land patterns (pads, pitch, holes and slots, courtyard, paste, mask)" },
+        { label: "Vias in pads", value: f.viaInPad.count ? `${f.viaInPad.count}, ${f.viaInPad.policy === "fill_and_cap" ? "filled and capped (IPC-4761 type VII)" : "not allowed: check reports them"}` : "none" },
+        ...(f.leadless.length ? [{ label: "Leadless packages", value: f.leadless.join(", "), note: "stencil paste; X-ray or careful inspection of the hidden joints" }] : []),
+        { label: "Files", value: `files/boards/${def.id}/gerber/ (${f.gerbers.length} layers, ${f.drills.length} drill), bom.csv, pnp.csv, board.step` },
+      ],
+    });
+    if (f.notes.length) blocks.push({ kind: "table", columns: [{ key: "n", label: "No.", align: "right" }, { key: "note", label: "Fabrication notes" }], rows: f.notes.map((note, i) => ({ n: i + 1, note })), caption: `${def.name ?? def.id}: fabrication notes`, note: f.ownNotes ? `${f.ownNotes === f.notes.length ? "the provider's own" : `the provider's own (${f.ownNotes}), then ${b.config}: fab_notes`}` : `${b.config}: fab_notes` });
+    blocks.push({ kind: "table", columns: [{ key: "layer", label: "Stack-up" }, { key: "what", label: "" }], rows: stackup(f.layers, f.thickness_mm), caption: `${def.name ?? def.id}: stack-up` });
+    blocks.push({
+      kind: "list",
+      items: [
+        "Send the fab the Gerber and drill files with the values above and the fabrication notes; for assembly also bom.csv and pnp.csv (rows keyed by the model's instance paths; MPNs from the parts).",
+        "Ask for the fab's DFM report before production and keep it with this release.",
+        ...(f.assembly === "hand" ? ["Hand assembly: stencil and solder paste, place from pnp.csv, reflow; check each leadless part's joints."] : []),
+      ],
+    });
+  }
+  return { title: "Boards", order: 20, blocks };
+};

package/package.json

@@ -1,6 +1,83 @@
 {
   "name": "@protoboardai/ext-tscircuit",
-  "version": "0.0.0-stage",
-  "stub": true,
-  "description": "Temporary package placeholder for staged publishing"
-}
+  "version": "0.2.1",
+  "description": "Protoboard extension: circuit boards from your design, with tscircuit and KiCad export.",
+  "license": "Apache-2.0",
+  "author": "Delta Robotics, Inc.",
+  "repository": {
+    "type": "git",
+    "url": "git+https://github.com/Delta-Robotics-Inc/protoboard-stack.git",
+    "directory": "packages/ext-tscircuit"
+  },
+  "type": "module",
+  "files": [
+    "protoboard-extension.json",
+    "ops",
+    "lib",
+    "skills",
+    "README.md",
+    "evals",
+    "NOTICE",
+    "LICENSE"
+  ],
+  "engines": {
+    "node": ">=22"
+  },
+  "publishConfig": {
+    "access": "public"
+  },
+  "dependencies": {
+    "@resvg/resvg-js": "2.6.2",
+    "@tscircuit/alphabet": "0.0.25",
+    "@tscircuit/capacity-autorouter": "0.0.953",
+    "@tscircuit/checks": "0.0.233",
+    "@tscircuit/circuit-json-util": "0.0.118",
+    "@tscircuit/core": "0.0.2056",
+    "@tscircuit/create-fdm-enclosure": "0.0.4",
+    "@tscircuit/footprinter": "0.0.430",
+    "@tscircuit/image-utils": "0.0.8",
+    "@tscircuit/infgrid-ijump-astar": "0.0.35",
+    "@tscircuit/matchpack": "0.0.97",
+    "@tscircuit/math-utils": "0.0.36",
+    "@tscircuit/props": "0.0.677",
+    "@tscircuit/schematic-match-adapt": "0.0.18",
+    "bpc-graph": "0.0.57",
+    "circuit-json": "0.0.510",
+    "circuit-json-to-bpc": "0.0.13",
+    "circuit-json-to-connectivity-map": "0.0.33",
+    "circuit-json-to-gerber": "0.0.111",
+    "circuit-json-to-gltf": "0.0.141",
+    "circuit-json-to-kicad": "0.0.237",
+    "circuit-json-to-spice": "0.0.45",
+    "circuit-json-to-step": "0.0.43",
+    "circuit-to-svg": "0.0.438",
+    "kicadts": "0.0.58",
+    "polygon-clipping": "0.15.7",
+    "react": "19.3.0",
+    "schematic-symbols": "0.0.248",
+    "spicets": "0.0.4",
+    "sucrase": "3.35.1",
+    "three": "0.179.1"
+  },
+  "peerDependencies": {
+    "@deltarobotics/uhd": ">=0.3.0",
+    "@protoboardai/core": "^0.2.0",
+    "@protoboardai/ext-release": "^0.2.0"
+  },
+  "peerDependenciesMeta": {
+    "@protoboardai/ext-release": {
+      "optional": true
+    }
+  },
+  "keywords": [
+    "protoboard",
+    "hardware",
+    "pcb",
+    "tscircuit",
+    "kicad"
+  ],
+  "homepage": "https://protoboard.ai",
+  "bugs": {
+    "url": "https://github.com/Delta-Robotics-Inc/protoboard-stack/issues"
+  }
+}

package/protoboard-extension.json

@@ -0,0 +1,313 @@
+{
+  "schema": "protoboard.extension/v0",
+  "id": "@protoboardai/ext-tscircuit",
+  "version": "0.2.1",
+  "description": "circuit provider: PCBs from UHD board modules with tscircuit, run in-process under Node and offline (generate, export, extract, check).",
+  "compatibility": {
+    "protoboard": "^0.2.0",
+    "uhd": ">=0.3.0"
+  },
+  "tools": [
+    {
+      "id": "tscircuit-node",
+      "purpose": "tscircuit libraries (@tscircuit/core 0.0.2056 and its converters, exact versions) on Node 22+, run in Protoboard's process; no tsci, no Bun, no account",
+      "probe": [
+        "node",
+        "-e",
+        "require(require.resolve('@protoboardai/ext-tscircuit/lib/probe.cjs', { paths: [process.cwd()] }))"
+      ],
+      "install": "npm install @protoboardai/ext-tscircuit (its package.json pins every tscircuit package)"
+    },
+    {
+      "id": "kicad-cli",
+      "purpose": "KiCad 10's command line: saves the exported KiCad project in KiCad 10's format, and makes a locked board's fabrication outputs (DRC, Gerber, drill, position, STEP, GLB)",
+      "probe": [
+        "node",
+        "-e",
+        "require(require.resolve('@protoboardai/ext-tscircuit/lib/kicad/probe.cjs', { paths: [process.cwd()] }))"
+      ],
+      "install": "install KiCad 10 (kicad.org/download); on Linux the distribution's kicad package, on macOS the KiCad app (its kicad-cli is in KiCad.app/Contents/MacOS; set PROTOBOARD_KICAD_CLI to it)"
+    }
+  ],
+  "skills": [
+    {
+      "id": "circuit-board",
+      "summary": "Design a custom PCB through the circuit capability: the board as a UHD module, circuit.config.ts, circuit:generate/export/extract/check, and what each CIRCUIT_* finding means",
+      "path": "skills/circuit-board/SKILL.md"
+    },
+    {
+      "id": "kicad-layout-review",
+      "summary": "Review and finish a locked board's layout in KiCad 10: what to check, DRC/ERC reports, Update PCB from Schematic keeping placement, and acting on CIRCUIT_KICAD_* findings",
+      "path": "skills/kicad-layout-review/SKILL.md"
+    },
+    {
+      "id": "kicad-cli",
+      "summary": "kicad-cli exports and checks for a KiCad 10 project (DRC, ERC, Gerber, drill, position, STEP/GLB, SVG/PDF, netlist, BOM, upgrade), and the fallback before lock",
+      "path": "skills/kicad-cli/SKILL.md"
+    }
+  ],
+  "capabilities": [
+    {
+      "id": "circuit",
+      "summary": "PCBs from UHD boards with tscircuit: generated source, local autorouting, Gerber/BOM/PnP/GLB/STEP/manifest/netlist and SVG renders, DRC and netlist drift",
+      "native": "tscircuit",
+      "operations": {
+        "generate": {
+          "entry": "./ops/circuit.ts#generate",
+          "requires": [
+            "tscircuit-node"
+          ],
+          "summary": "Write tscircuit/board.gen.tsx from the UHD board and circuit.config.ts, then build and route it locally (circuit.json)",
+          "inputs": {
+            "force": {
+              "description": "true: generate a locked board anyway (rebuilds tscircuit's copy; KiCad stays the layout of record)"
+            }
+          }
+        },
+        "export": {
+          "entry": "./ops/circuit.ts#exportOutputs",
+          "requires": [
+            "tscircuit-node"
+          ],
+          "summary": "Write the standard outputs to out/ (rebuilding first if the native source changed); a locked board's come from KiCad (kicad-cli)",
+          "inputs": {
+            "force": {
+              "description": "true: a locked board's export goes on despite KiCad DRC errors"
+            }
+          }
+        },
+        "extract": {
+          "entry": "./ops/circuit.ts#extract",
+          "requires": [
+            "tscircuit-node"
+          ],
+          "summary": "Frames of the board's exports and interfaces, placements and outline, artifact references"
+        },
+        "check": {
+          "entry": "./ops/circuit.ts#check",
+          "requires": [
+            "tscircuit-node"
+          ],
+          "summary": "tscircuit DRC, netlist drift against the UHD board, unrouted nets, outline, keep-outs and fixed placements; on a locked board, the model, the handoff record and the KiCad files compared"
+        },
+        "kicad": {
+          "entry": "./ops/kicad.ts#kicad",
+          "effect": "export",
+          "requires": [
+            "tscircuit-node",
+            "kicad-cli"
+          ],
+          "summary": "A KiCad 10 project of the current build in tscircuit/kicad/ (a preview; tscircuit stays the layout of record)"
+        },
+        "lock": {
+          "entry": "./ops/kicad.ts#lock",
+          "effect": "export",
+          "requires": [
+            "tscircuit-node",
+            "kicad-cli"
+          ],
+          "summary": "Hand the board to KiCad: the KiCad 10 project into <board>/kicad/ with handoff.json; KiCad is then the layout of record (a human decision: agents ask first)",
+          "inputs": {
+            "refresh": {
+              "description": "true on a locked board: re-record the handoff from the model and the KiCad files as they are now, without exporting"
+            }
+          }
+        },
+        "unlock": {
+          "entry": "./ops/kicad.ts#unlock",
+          "effect": "export",
+          "requires": [
+            "tscircuit-node"
+          ],
+          "summary": "Return a locked board to tscircuit: kicad/ moves to kicad-archive/<stamp>/ (a human decision: agents ask first)"
+        }
+      },
+      "constraints": {
+        "layers": {
+          "description": "copper layers: 2 or 4 (default 2)"
+        },
+        "thickness_mm": {
+          "description": "board thickness (default 1.6)"
+        },
+        "outline": {
+          "description": "{ circle: { diameter_mm } } | { rect: { width_mm, height_mm } } | { polygon: [[x, y], …] } (mm, board frame); default: the board's design_envelope"
+        },
+        "mounting_holes": {
+          "description": "[{ id, at: [x, y], diameter_mm }]"
+        },
+        "placements": {
+          "description": "{ <instance>: { at: [x, y], rotation_deg, side } }: positions the enclosure fixes (connectors, buttons, displays, sensor windows)"
+        },
+        "keepouts": {
+          "description": "[{ name, rect: { at, size } | circle: { at, diameter_mm }, layers?, reason?, allow_bodies? }] copper keep-outs (an antenna clearance); allow_bodies names parts whose body may lie over it (the module whose antenna it clears)"
+        },
+        "pours": {
+          "description": "[{ net, layers: (top|bottom|inner1|inner2)[], clearance_mm?, reason? }] copper pours (a ground plane), filled after routing around other nets' copper and outside the keep-outs"
+        },
+        "rules": {
+          "description": "{ trace_width_mm, power_trace_width_mm, via_drill_mm, via_pad_mm, edge_clearance_mm, hole_clearance_mm? }; hole_clearance_mm: least copper-to-hole distance for non-plated holes (check tests round holes as circles)"
+        },
+        "autorouter": {
+          "description": "local tscircuit autorouter preset: auto_local (default) or sequential_trace; cloud routing is refused"
+        },
+        "copper_oz": {
+          "description": "outer copper weight for the fabrication order (default: the fab's standard, 1 oz)"
+        },
+        "finish": {
+          "description": "surface finish for the fabrication order, e.g. ENIG or lead-free HASL (default: ENIG when a part is leadless, else lead-free HASL)"
+        },
+        "solder_mask": {
+          "description": "solder mask colour for the fabrication order (default green)"
+        },
+        "silkscreen": {
+          "description": "silkscreen colour for the fabrication order (default white)"
+        },
+        "assembly": {
+          "description": "fab (default: the fab places from pnp.csv) or hand"
+        },
+        "fab_notes": {
+          "description": "[string] notes the fabrication order gives the fab, numbered (e.g. fill and cap vias in pads, IPC-4761 type VII; a hold before ordering)"
+        },
+        "via_in_pad": {
+          "description": "vias inside SMD pads: avoid (default; check reports any as an error) or fill_and_cap (allowed; the fabrication order asks for filled and capped vias, IPC-4761 type VII)"
+        },
+        "via_touching_pad": {
+          "description": "vias whose ring touches or overlaps an SMD pad without sitting in it: avoid (check reports each as an error) or allow (default)"
+        },
+        "via_under_body": {
+          "description": "vias under a component's body (inside its courtyard): avoid (check reports each as an error) or allow (default)"
+        },
+        "routing": {
+          "description": "on (default: the local autorouter routes every net) or off (placement only: no autorouting; check reports unrouted nets as info)"
+        },
+        "trace_widths": {
+          "description": "{ nets?: { <UHD net id>: mm }, classes?: { signal?, power?, ground?: mm } } trace width per net, else per net class, else the rules' widths; check reports a net routed narrower"
+        }
+      },
+      "artifacts": [
+        {
+          "id": "board_glb",
+          "name": "Board (GLB)",
+          "type": "3d_model",
+          "role": "body",
+          "format": "glb",
+          "units": "m",
+          "path": "{out}/board.glb",
+          "generatedFrom": "board_source"
+        },
+        {
+          "id": "board_step",
+          "name": "Board (STEP)",
+          "type": "3d_model",
+          "role": "body",
+          "format": "step",
+          "units": "mm",
+          "path": "{out}/board.step",
+          "generatedFrom": "board_source"
+        },
+        {
+          "id": "board_manifest",
+          "name": "Board geometry manifest",
+          "type": "cad",
+          "role": "source",
+          "format": "json",
+          "path": "{out}/board.manifest.json",
+          "generatedFrom": "board_glb"
+        },
+        {
+          "id": "board_gerber",
+          "name": "Gerber and drill files",
+          "type": "pcb",
+          "role": "drawing",
+          "format": "gerber",
+          "path": "{out}/gerber",
+          "generatedFrom": "board_source"
+        },
+        {
+          "id": "board_bom",
+          "name": "Bill of materials",
+          "type": "documentation",
+          "format": "csv",
+          "path": "{out}/bom.csv"
+        },
+        {
+          "id": "board_pnp",
+          "name": "Pick-and-place",
+          "type": "pcb",
+          "format": "csv",
+          "path": "{out}/pnp.csv"
+        },
+        {
+          "id": "board_netlist",
+          "name": "Netlist as laid out",
+          "type": "pcb",
+          "format": "json",
+          "path": "{out}/netlist.json"
+        },
+        {
+          "id": "board_schematic",
+          "name": "Schematic",
+          "type": "schematic",
+          "role": "drawing",
+          "format": "svg",
+          "path": "{out}/schematic.svg"
+        },
+        {
+          "id": "board_pcb_top",
+          "name": "PCB, top",
+          "type": "pcb",
+          "role": "drawing",
+          "format": "svg",
+          "path": "{out}/pcb-top.svg"
+        },
+        {
+          "id": "board_pcb_bottom",
+          "name": "PCB, bottom",
+          "type": "pcb",
+          "role": "drawing",
+          "format": "svg",
+          "path": "{out}/pcb-bottom.svg"
+        },
+        {
+          "id": "board_source",
+          "name": "Board design (tscircuit)",
+          "type": "pcb",
+          "role": "source",
+          "format": "tscircuit",
+          "path": "{native}/board.tsx"
+        },
+        {
+          "id": "board_routed",
+          "name": "Routed board (Circuit JSON)",
+          "type": "pcb",
+          "format": "json",
+          "path": "{native}/circuit.json",
+          "generatedFrom": "board_source"
+        },
+        {
+          "id": "board_build",
+          "name": "Build record (tscircuit names and UHD instances)",
+          "type": "pcb",
+          "format": "json",
+          "path": "{native}/build.json"
+        },
+        {
+          "id": "board_kicad",
+          "name": "KiCad project (the layout of record while locked)",
+          "type": "pcb",
+          "role": "source",
+          "format": "kicad",
+          "path": "{dir}/kicad/{module}.kicad_pro"
+        }
+      ]
+    }
+  ],
+  "operations": [
+    {
+      "id": "package:work-order",
+      "summary": "Manufacturing Package: each board's fabrication and assembly order (layers, thickness, copper, finish, mask, stack-up, assembly sides, leadless parts, files)",
+      "entry": "./ops/package.ts#workOrder",
+      "effect": "pure"
+    }
+  ]
+}