@oasys/oecs 0.5.2 → 0.5.4

package/dist/core/store/command_ring.d.cts

@@ -1,7 +1,6 @@
 /**
  * Command ring — WASM-side producer / TS-side consumer SPSC ring buffer
- * for structural-change intents emitted during `sim.tick()`. Plan §7.5
- * (`docs/ideas/buffer-wasm-sim-plan-2026-05-14T1600.md`).
+ * for structural-change intents emitted during `sim.tick()`.
  *
  * Layout:
  *
@@ -13,13 +12,13 @@
  *   [ slot 1:       16 B ]  ...
  *   ...
  *
- * SPSC contract (Phase 4 scope):
+ * SPSC contract (single host thread):
  *   - Producer: WASM `sim.tick()`. Pushes 0..N commands during one tick;
  *     bumps `write_head` after each.
  *   - Consumer: TS host, immediately after `wasm.tick()` returns. Drains
  *     0..N pending commands; bumps `read_head` after each.
- *   - The two never run concurrently in Phase 4 (single host thread
- *     orchestrates both). Phase 5's worker offload promotes the head
+ *   - The two never run concurrently (one host thread orchestrates
+ *     both). A later worker offload promotes the head
  *     bumps to `Atomics.store`; that's an additive change without
  *     altering the layout.
  *
@@ -29,7 +28,7 @@
  *     a hard error in dev builds; production logs and continues (a command
  *     might be lost rather than crash the host).
  *
- * Slot format (plan §7.5):
+ * Slot format:
  *   byte 0:       opCode (u8). 0 is reserved as the empty-slot marker
  *                 (`COMMAND_OP_EMPTY`); all other codes are consumer-defined.
  *                 The engine never interprets a code — it drains
@@ -52,7 +51,7 @@ export declare const COMMAND_RING_HEADER_BYTES = 16;
 export declare const COMMAND_RING_SLOT_BYTES = 16;
 /** Default ring capacity in slots. 256 × 16 B = 4 KiB of ring data plus
  * 16 B header. Sized for the worst-case burst (peak spawn intents per
- * tick) × small safety margin. Tune up if a Phase 4 burst pushes past it
+ * tick) × small safety margin. Tune up if a burst pushes past it
  * in the bench harness. */
 export declare const COMMAND_RING_DEFAULT_CAPACITY_SLOTS = 256;
 /** Byte offsets within the ring header. Mirrored on the Zig side in

package/dist/core/store/command_ring.d.ts

@@ -1,7 +1,6 @@
 /**
  * Command ring — WASM-side producer / TS-side consumer SPSC ring buffer
- * for structural-change intents emitted during `sim.tick()`. Plan §7.5
- * (`docs/ideas/buffer-wasm-sim-plan-2026-05-14T1600.md`).
+ * for structural-change intents emitted during `sim.tick()`.
  *
  * Layout:
  *
@@ -13,13 +12,13 @@
  *   [ slot 1:       16 B ]  ...
  *   ...
  *
- * SPSC contract (Phase 4 scope):
+ * SPSC contract (single host thread):
  *   - Producer: WASM `sim.tick()`. Pushes 0..N commands during one tick;
  *     bumps `write_head` after each.
  *   - Consumer: TS host, immediately after `wasm.tick()` returns. Drains
  *     0..N pending commands; bumps `read_head` after each.
- *   - The two never run concurrently in Phase 4 (single host thread
- *     orchestrates both). Phase 5's worker offload promotes the head
+ *   - The two never run concurrently (one host thread orchestrates
+ *     both). A later worker offload promotes the head
  *     bumps to `Atomics.store`; that's an additive change without
  *     altering the layout.
  *
@@ -29,7 +28,7 @@
  *     a hard error in dev builds; production logs and continues (a command
  *     might be lost rather than crash the host).
  *
- * Slot format (plan §7.5):
+ * Slot format:
  *   byte 0:       opCode (u8). 0 is reserved as the empty-slot marker
  *                 (`COMMAND_OP_EMPTY`); all other codes are consumer-defined.
  *                 The engine never interprets a code — it drains
@@ -52,7 +51,7 @@ export declare const COMMAND_RING_HEADER_BYTES = 16;
 export declare const COMMAND_RING_SLOT_BYTES = 16;
 /** Default ring capacity in slots. 256 × 16 B = 4 KiB of ring data plus
  * 16 B header. Sized for the worst-case burst (peak spawn intents per
- * tick) × small safety margin. Tune up if a Phase 4 burst pushes past it
+ * tick) × small safety margin. Tune up if a burst pushes past it
  * in the bench harness. */
 export declare const COMMAND_RING_DEFAULT_CAPACITY_SLOTS = 256;
 /** Byte offsets within the ring header. Mirrored on the Zig side in

package/dist/core/store/command_ring.d.ts.map

@@ -1 +1 @@
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package/dist/core/store/descriptor.d.cts

@@ -49,7 +49,7 @@ export declare function readColumnDescriptor(view: DataView, off: number): Colum
  * ≥ this limit would be invisible there while the heap-side `BitSet` stayed
  * correct — silently conflating archetypes that differ only in such a
  * component. `Store.registerComponent` enforces this as a hard registration
- * ceiling so the overflow fails loudly instead (#381). The mask is sized to
+ * ceiling so the overflow fails loudly instead. The mask is sized to
  * the `BitSet`'s `INITIAL_WORD_COUNT`, so a registry within the limit never
  * grows a component mask past its initial words. */
 export declare const STORE_DESCRIPTOR_COMPONENT_LIMIT: number;
@@ -60,7 +60,7 @@ export interface ArchetypeDescriptor {
     readonly componentMask: readonly number[];
     readonly rowCount: number;
     readonly rowCapacity: number;
-    /** Enabled-row count `≤ row_count` (#577 / #599). Per-row entity-scan loops in
+    /** Enabled-row count `≤ row_count`. Per-row entity-scan loops in
      * the WASM sim bound on this so disabled entities (swapped to the tail
      * `[enabled_count, row_count)`) are not simulated; row-indexed cross-entity
      * reads still use `row_count`. */

package/dist/core/store/descriptor.d.ts

@@ -49,7 +49,7 @@ export declare function readColumnDescriptor(view: DataView, off: number): Colum
  * ≥ this limit would be invisible there while the heap-side `BitSet` stayed
  * correct — silently conflating archetypes that differ only in such a
  * component. `Store.registerComponent` enforces this as a hard registration
- * ceiling so the overflow fails loudly instead (#381). The mask is sized to
+ * ceiling so the overflow fails loudly instead. The mask is sized to
  * the `BitSet`'s `INITIAL_WORD_COUNT`, so a registry within the limit never
  * grows a component mask past its initial words. */
 export declare const STORE_DESCRIPTOR_COMPONENT_LIMIT: number;
@@ -60,7 +60,7 @@ export interface ArchetypeDescriptor {
     readonly componentMask: readonly number[];
     readonly rowCount: number;
     readonly rowCapacity: number;
-    /** Enabled-row count `≤ row_count` (#577 / #599). Per-row entity-scan loops in
+    /** Enabled-row count `≤ row_count`. Per-row entity-scan loops in
      * the WASM sim bound on this so disabled entities (swapped to the tail
      * `[enabled_count, row_count)`) are not simulated; row-indexed cross-entity
      * reads still use `row_count`. */

package/dist/core/store/entity_index.d.cts

@@ -1,12 +1,12 @@
 /**
  * Entity-index SAB region — `EntityID` → `(archetype_id, row, generation)`
- * lookup table shared with the Zig sim. (#245 / Phase 4 PR 4B)
+ * lookup table shared with the Zig sim.
  *
  * Every hot fixed-update system that needs to resolve an `EntityID`
  * held in a column (e.g. a component field that points at another
  * entity → that entity's columns) has to do
- * `entityId → archetype + row` translation. The plan forbids
- * WASM-into-TS callbacks during `tick()` (§4 / §5.2), so the lookup
+ * `entityId → archetype + row` translation. WASM-into-TS callbacks
+ * during `tick()` are forbidden, so the lookup
  * tables must live in shared memory.
  *
  * Layout:

package/dist/core/store/entity_index.d.ts

@@ -1,12 +1,12 @@
 /**
  * Entity-index SAB region — `EntityID` → `(archetype_id, row, generation)`
- * lookup table shared with the Zig sim. (#245 / Phase 4 PR 4B)
+ * lookup table shared with the Zig sim.
  *
  * Every hot fixed-update system that needs to resolve an `EntityID`
  * held in a column (e.g. a component field that points at another
  * entity → that entity's columns) has to do
- * `entityId → archetype + row` translation. The plan forbids
- * WASM-into-TS callbacks during `tick()` (§4 / §5.2), so the lookup
+ * `entityId → archetype + row` translation. WASM-into-TS callbacks
+ * during `tick()` are forbidden, so the lookup
  * tables must live in shared memory.
  *
  * Layout:

package/dist/core/store/event_ring.d.cts

@@ -1,6 +1,6 @@
 /**
  * Event ring — SPSC ring buffer for ECS signal/event payloads shared
- * between TS and the Zig sim. (#247 / Phase 4 PR 4C)
+ * between TS and the Zig sim.
  *
  * Same byte layout as the command ring (`command_ring.ts`); the two
  * could share a primitive but keeping them separate makes the
@@ -19,18 +19,18 @@
  *   [ slot 1:        16 B ]  ...
  *
  * Op codes: event-def IDs (assigned by `ECS.registerEvent()` at
- * registration time; #247 plan §required-FFI). The 0 op-code is
+ * registration time). The 0 op-code is
  * reserved as the empty-slot marker so a zero-initialised SAB does not
  * appear to hold a valid event. Event-def registration starts numbering
  * from 1 to honour this; the engine integration in 4D+ enforces it.
  *
- * SPSC contract (Phase 4 scope, single host thread):
+ * SPSC contract (single host thread):
  *   - Producer: Zig sim `tick()` (post-4D) OR TS host (test producers /
  *     existing JS-side emitters bridged into the ring).
  *   - Consumer: TS host drain (post-4D) OR Zig system that reads
  *     queued events from a sibling system.
- *   - The two never run concurrently in Phase 4 (single host thread
- *     orchestrates both). Phase 5's worker offload promotes the head
+ *   - The two never run concurrently (one host thread orchestrates
+ *     both). A later worker offload promotes the head
  *     bumps to `Atomics.store`; that's an additive change without
  *     altering the layout.
  *
@@ -41,8 +41,8 @@
  *
  * Region placement: between the entity-index region and the descriptor
  * region so its offset is stable across descriptor / column growth.
- * `header.event_ring_off` (the field promoted out of `_reserved0` in
- * #245's reservation) carries the offset; 0 means absent.
+ * `header.event_ring_off` (the field promoted out of `_reserved0`)
+ * carries the offset; 0 means absent.
  */
 /** Total bytes for the ring header. Matches command ring exactly. */
 export declare const EVENT_RING_HEADER_BYTES = 16;

package/dist/core/store/event_ring.d.ts

@@ -1,6 +1,6 @@
 /**
  * Event ring — SPSC ring buffer for ECS signal/event payloads shared
- * between TS and the Zig sim. (#247 / Phase 4 PR 4C)
+ * between TS and the Zig sim.
  *
  * Same byte layout as the command ring (`command_ring.ts`); the two
  * could share a primitive but keeping them separate makes the
@@ -19,18 +19,18 @@
  *   [ slot 1:        16 B ]  ...
  *
  * Op codes: event-def IDs (assigned by `ECS.registerEvent()` at
- * registration time; #247 plan §required-FFI). The 0 op-code is
+ * registration time). The 0 op-code is
  * reserved as the empty-slot marker so a zero-initialised SAB does not
  * appear to hold a valid event. Event-def registration starts numbering
  * from 1 to honour this; the engine integration in 4D+ enforces it.
  *
- * SPSC contract (Phase 4 scope, single host thread):
+ * SPSC contract (single host thread):
  *   - Producer: Zig sim `tick()` (post-4D) OR TS host (test producers /
  *     existing JS-side emitters bridged into the ring).
  *   - Consumer: TS host drain (post-4D) OR Zig system that reads
  *     queued events from a sibling system.
- *   - The two never run concurrently in Phase 4 (single host thread
- *     orchestrates both). Phase 5's worker offload promotes the head
+ *   - The two never run concurrently (one host thread orchestrates
+ *     both). A later worker offload promotes the head
  *     bumps to `Atomics.store`; that's an additive change without
  *     altering the layout.
  *
@@ -41,8 +41,8 @@
  *
  * Region placement: between the entity-index region and the descriptor
  * region so its offset is stable across descriptor / column growth.
- * `header.event_ring_off` (the field promoted out of `_reserved0` in
- * #245's reservation) carries the offset; 0 means absent.
+ * `header.event_ring_off` (the field promoted out of `_reserved0`)
+ * carries the offset; 0 means absent.
  */
 /** Total bytes for the ring header. Matches command ring exactly. */
 export declare const EVENT_RING_HEADER_BYTES = 16;

package/dist/core/store/extend.d.cts

@@ -14,7 +14,7 @@ export interface ExtendResult {
     readonly store: ColumnStore;
     readonly oldViewStamp: number;
     readonly newViewStamp: number;
-    /** True when the in-place fast path (#237 Option A) was taken: the SAB
+    /** True when the in-place fast path was taken: the SAB
      * instance is reused, existing column TypedArray views are unchanged,
      * and callers may skip `refreshViews` on every pre-existing
      * Archetype. False when the slow path ran (fresh SAB or wasm-memory
@@ -28,7 +28,7 @@ export declare class StoreExtendError extends Error {
 /** Allocate a new SAB sized for `old` + `plan.newArchetypes`, copy
  * existing rows, bump `view_stamp`.
  *
- * `allocator` (PR 3D / #234): pluggable buffer source forwarded into
+ * `allocator`: pluggable buffer source forwarded into
  * `createColumnStore`. When the allocator is `wasmMemoryAllocator`,
  * `memory.grow` may detach `old`'s typed-array views before the copy
  * runs — so live rows are snapshotted into heap `Uint8Array`s BEFORE the

package/dist/core/store/extend.d.ts

@@ -14,7 +14,7 @@ export interface ExtendResult {
     readonly store: ColumnStore;
     readonly oldViewStamp: number;
     readonly newViewStamp: number;
-    /** True when the in-place fast path (#237 Option A) was taken: the SAB
+    /** True when the in-place fast path was taken: the SAB
      * instance is reused, existing column TypedArray views are unchanged,
      * and callers may skip `refreshViews` on every pre-existing
      * Archetype. False when the slow path ran (fresh SAB or wasm-memory
@@ -28,7 +28,7 @@ export declare class StoreExtendError extends Error {
 /** Allocate a new SAB sized for `old` + `plan.newArchetypes`, copy
  * existing rows, bump `view_stamp`.
  *
- * `allocator` (PR 3D / #234): pluggable buffer source forwarded into
+ * `allocator`: pluggable buffer source forwarded into
  * `createColumnStore`. When the allocator is `wasmMemoryAllocator`,
  * `memory.grow` may detach `old`'s typed-array views before the copy
  * runs — so live rows are snapshotted into heap `Uint8Array`s BEFORE the

package/dist/core/store/extend.d.ts.map

@@ -1 +1 @@
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package/dist/core/store/grow.d.cts

@@ -29,6 +29,6 @@ export declare class StoreGrowError extends Error {
  * the new views. With a `wasmMemoryAllocator`, `old`'s typed-array
  * views may be detached as soon as `createColumnStore` returns — live
  * data is snapshotted before the allocator call to make both code paths
- * behave identically from the caller's perspective. (PR 3D / #234) */
+ * behave identically from the caller's perspective. */
 export declare function growColumnStore(old: ColumnStore, plan: GrowPlan, allocator?: BufferAllocator): GrowResult;
 //# sourceMappingURL=grow.d.ts.map

package/dist/core/store/grow.d.ts

@@ -29,6 +29,6 @@ export declare class StoreGrowError extends Error {
  * the new views. With a `wasmMemoryAllocator`, `old`'s typed-array
  * views may be detached as soon as `createColumnStore` returns — live
  * data is snapshotted before the allocator call to make both code paths
- * behave identically from the caller's perspective. (PR 3D / #234) */
+ * behave identically from the caller's perspective. */
 export declare function growColumnStore(old: ColumnStore, plan: GrowPlan, allocator?: BufferAllocator): GrowResult;
 //# sourceMappingURL=grow.d.ts.map

package/dist/core/store/grow.d.ts.map

@@ -1 +1 @@
-{"version":3,"file":"grow.d.ts","sourceRoot":"","sources":["../../../src/core/store/grow.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;GAiCG;AASH,OAAO,EAIN,KAAK,WAAW,EAGhB,MAAM,gBAAgB,CAAC;AACxB,OAAO,KAAK,EAAE,eAAe,EAAE,MAAM,aAAa,CAAC;AACnD,OAAO,EAIN,KAAK,iBAAiB,EAEtB,MAAM,cAAc,CAAC;AAMtB,YAAY,EAAE,iBAAiB,EAAE,MAAM,cAAc,CAAC;AAEtD,MAAM,WAAW,QAAQ;IACxB,QAAQ,CAAC,UAAU,EAAE,SAAS,iBAAiB,EAAE,CAAC;CAClD;AAED;mEACmE;AACnE,MAAM,WAAW,UAAU;IAC1B,QAAQ,CAAC,KAAK,EAAE,WAAW,CAAC;IAC5B,QAAQ,CAAC,YAAY,EAAE,MAAM,CAAC;IAC9B,QAAQ,CAAC,YAAY,EAAE,MAAM,CAAC;IAC9B;;;6DAGyD;IACzD,QAAQ,CAAC,cAAc,EAAE,OAAO,CAAC;IACjC;2BACuB;IACvB,QAAQ,CAAC,iBAAiB,EAAE,SAAS,MAAM,EAAE,CAAC;CAC9C;AAyJD,qBAAa,cAAe,SAAQ,KAAK;gBAC5B,OAAO,EAAE,MAAM;CAI3B;AAED;;;;;;sEAMsE;AACtE,wBAAgB,eAAe,CAC9B,GAAG,EAAE,WAAW,EAChB,IAAI,EAAE,QAAQ,EACd,SAAS,CAAC,EAAE,eAAe,GACzB,UAAU,CAmGZ"}
+{"version":3,"file":"grow.d.ts","sourceRoot":"","sources":["../../../src/core/store/grow.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;GAgCG;AASH,OAAO,EAIN,KAAK,WAAW,EAGhB,MAAM,gBAAgB,CAAC;AACxB,OAAO,KAAK,EAAE,eAAe,EAAE,MAAM,aAAa,CAAC;AACnD,OAAO,EAKN,KAAK,iBAAiB,EAEtB,MAAM,cAAc,CAAC;AAMtB,YAAY,EAAE,iBAAiB,EAAE,MAAM,cAAc,CAAC;AAEtD,MAAM,WAAW,QAAQ;IACxB,QAAQ,CAAC,UAAU,EAAE,SAAS,iBAAiB,EAAE,CAAC;CAClD;AAED;mEACmE;AACnE,MAAM,WAAW,UAAU;IAC1B,QAAQ,CAAC,KAAK,EAAE,WAAW,CAAC;IAC5B,QAAQ,CAAC,YAAY,EAAE,MAAM,CAAC;IAC9B,QAAQ,CAAC,YAAY,EAAE,MAAM,CAAC;IAC9B;;;6DAGyD;IACzD,QAAQ,CAAC,cAAc,EAAE,OAAO,CAAC;IACjC;2BACuB;IACvB,QAAQ,CAAC,iBAAiB,EAAE,SAAS,MAAM,EAAE,CAAC;CAC9C;AA4JD,qBAAa,cAAe,SAAQ,KAAK;gBAC5B,OAAO,EAAE,MAAM;CAI3B;AAED;;;;;;uDAMuD;AACvD,wBAAgB,eAAe,CAC9B,GAAG,EAAE,WAAW,EAChB,IAAI,EAAE,QAAQ,EACd,SAAS,CAAC,EAAE,eAAe,GACzB,UAAU,CAmGZ"}

package/dist/core/store/header.d.cts

@@ -8,7 +8,7 @@ export interface StoreHeader {
      * the SAB must not be used. */
     readonly simAbiVersion: number;
     /** Monotonic; incremented every time the host reallocates the SAB.
-     * Cached TypedArray views become stale on bump. (#171 §8.1) */
+     * Cached TypedArray views become stale on bump. */
     readonly viewStamp: number;
     /** Total SAB size in bytes. */
     readonly capacity: number;
@@ -16,17 +16,17 @@ export interface StoreHeader {
     readonly archetypeCount: number;
     /** Byte offset into the SAB where the layout descriptor region starts. */
     readonly layoutDescriptorOff: number;
-    /** Byte offset of the WASM→TS command ring header. (#171 §7.5) */
+    /** Byte offset of the WASM→TS command ring header. */
     readonly commandRingOff: number;
-    /** Byte offset of the TS→WASM action ring header. (#171 §7.5, Phase 5) */
+    /** Byte offset of the TS→WASM action ring header. */
     readonly actionRingOff: number;
     /** Byte offset of the entity-index region (entityId → archetype_id,
      * row, generation lookup). 0 means absent — fixtures and bare-SAB
      * tests that don't need the index see the v1 layout (the engine's
-     * `Store` always allocates one). (#245 / Phase 4 PR 4B) */
+     * `Store` always allocates one). */
     readonly entityIndexOff: number;
     /** Byte offset of the event ring region (ECS signal payloads shared
-     * with the Zig sim). 0 means absent. (#247 / Phase 4 PR 4C) */
+     * with the Zig sim). 0 means absent. */
     readonly eventRingOff: number;
     /** Byte offset of the region-table directory — a `RegionTableEntry[]`
      * (`(region_id, byte_offset, byte_length)` triples) holding one entry
@@ -35,9 +35,9 @@ export interface StoreHeader {
      * its region with `findRegionOffset(view, header, id)` (TS) /
      * `abi.find_region(header_addr, id)` (Zig). Replaces the five game-named
      * offset fields (`terrain_off`/`spatial_grid_off`/… ) the SAB header
-     * used to hard-code. (#623 — de-game the SAB substrate; ADR-0018.) */
+     * used to hard-code. This de-games the SAB substrate. */
     readonly regionTableOff: number;
-    /** Number of `RegionTableEntry` records at `region_table_off`. (#623) */
+    /** Number of `RegionTableEntry` records at `region_table_off`. */
     readonly regionTableCount: number;
     /** Byte offset of the sim-bindings region — an opaque block of `u16`
      * `(component_id, field_id)` IDs (layout owned by the game, in
@@ -48,14 +48,14 @@ export interface StoreHeader {
      * them as call args. Present only when the consumer opts into a WASM backend
      * by passing `bindingsRegionBytes` to `createColumnStore`; 0 = absent (a
      * pure-TS game pays nothing for this region). The size is a runtime input,
-     * not an engine ABI constant, since #625. (v5 / "SAB-is-the-interface".) */
+     * not an engine ABI constant. (v5 / "SAB-is-the-interface".) */
     readonly bindingsOff: number;
 }
 export declare function writeStoreHeader(view: DataView, h: StoreHeader): void;
 export declare function readStoreHeader(view: DataView): StoreHeader;
 /** Increment `view_stamp` in place after a host-side SAB reallocation. The
  * monotonic counter is the trigger for cached-view invalidation on the TS
- * side and for re-pointing in WASM. (#171 §8.1) */
+ * side and for re-pointing in WASM. */
 export declare function bumpViewStamp(view: DataView): number;
 /** True iff the buffer's first four bytes are `STORE_MAGIC` AND the ABI
  * version matches the current build. Used by both TS and WASM as a

package/dist/core/store/header.d.ts

@@ -8,7 +8,7 @@ export interface StoreHeader {
      * the SAB must not be used. */
     readonly simAbiVersion: number;
     /** Monotonic; incremented every time the host reallocates the SAB.
-     * Cached TypedArray views become stale on bump. (#171 §8.1) */
+     * Cached TypedArray views become stale on bump. */
     readonly viewStamp: number;
     /** Total SAB size in bytes. */
     readonly capacity: number;
@@ -16,17 +16,17 @@ export interface StoreHeader {
     readonly archetypeCount: number;
     /** Byte offset into the SAB where the layout descriptor region starts. */
     readonly layoutDescriptorOff: number;
-    /** Byte offset of the WASM→TS command ring header. (#171 §7.5) */
+    /** Byte offset of the WASM→TS command ring header. */
     readonly commandRingOff: number;
-    /** Byte offset of the TS→WASM action ring header. (#171 §7.5, Phase 5) */
+    /** Byte offset of the TS→WASM action ring header. */
     readonly actionRingOff: number;
     /** Byte offset of the entity-index region (entityId → archetype_id,
      * row, generation lookup). 0 means absent — fixtures and bare-SAB
      * tests that don't need the index see the v1 layout (the engine's
-     * `Store` always allocates one). (#245 / Phase 4 PR 4B) */
+     * `Store` always allocates one). */
     readonly entityIndexOff: number;
     /** Byte offset of the event ring region (ECS signal payloads shared
-     * with the Zig sim). 0 means absent. (#247 / Phase 4 PR 4C) */
+     * with the Zig sim). 0 means absent. */
     readonly eventRingOff: number;
     /** Byte offset of the region-table directory — a `RegionTableEntry[]`
      * (`(region_id, byte_offset, byte_length)` triples) holding one entry
@@ -35,9 +35,9 @@ export interface StoreHeader {
      * its region with `findRegionOffset(view, header, id)` (TS) /
      * `abi.find_region(header_addr, id)` (Zig). Replaces the five game-named
      * offset fields (`terrain_off`/`spatial_grid_off`/… ) the SAB header
-     * used to hard-code. (#623 — de-game the SAB substrate; ADR-0018.) */
+     * used to hard-code. This de-games the SAB substrate. */
     readonly regionTableOff: number;
-    /** Number of `RegionTableEntry` records at `region_table_off`. (#623) */
+    /** Number of `RegionTableEntry` records at `region_table_off`. */
     readonly regionTableCount: number;
     /** Byte offset of the sim-bindings region — an opaque block of `u16`
      * `(component_id, field_id)` IDs (layout owned by the game, in
@@ -48,14 +48,14 @@ export interface StoreHeader {
      * them as call args. Present only when the consumer opts into a WASM backend
      * by passing `bindingsRegionBytes` to `createColumnStore`; 0 = absent (a
      * pure-TS game pays nothing for this region). The size is a runtime input,
-     * not an engine ABI constant, since #625. (v5 / "SAB-is-the-interface".) */
+     * not an engine ABI constant. (v5 / "SAB-is-the-interface".) */
     readonly bindingsOff: number;
 }
 export declare function writeStoreHeader(view: DataView, h: StoreHeader): void;
 export declare function readStoreHeader(view: DataView): StoreHeader;
 /** Increment `view_stamp` in place after a host-side SAB reallocation. The
  * monotonic counter is the trigger for cached-view invalidation on the TS
- * side and for re-pointing in WASM. (#171 §8.1) */
+ * side and for re-pointing in WASM. */
 export declare function bumpViewStamp(view: DataView): number;
 /** True iff the buffer's first four bytes are `STORE_MAGIC` AND the ABI
  * version matches the current build. Used by both TS and WASM as a

package/dist/core/store/header.d.ts.map

@@ -1 +1 @@
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+{"version":3,"file":"header.d.ts","sourceRoot":"","sources":["../../../src/core/store/header.ts"],"names":[],"mappings":"AAAA;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;GAiFG;AAoBH,OAAO,EACN,WAAW,EACX,eAAe,EACf,kBAAkB,EAClB,oBAAoB,EACpB,wBAAwB,EACxB,0BAA0B,EAC1B,MAAM,oBAAoB,CAAC;AAE5B,OAAO,EACN,WAAW,EACX,eAAe,EACf,kBAAkB,EAClB,oBAAoB,EACpB,wBAAwB,EACxB,0BAA0B,EAC1B,CAAC;AAEF,MAAM,WAAW,WAAW;IAC3B;4CACwC;IACxC,QAAQ,CAAC,KAAK,EAAE,MAAM,CAAC;IACvB;mCAC+B;IAC/B,QAAQ,CAAC,aAAa,EAAE,MAAM,CAAC;IAC/B;uDACmD;IACnD,QAAQ,CAAC,SAAS,EAAE,MAAM,CAAC;IAC3B,+BAA+B;IAC/B,QAAQ,CAAC,QAAQ,EAAE,MAAM,CAAC;IAC1B,sEAAsE;IACtE,QAAQ,CAAC,cAAc,EAAE,MAAM,CAAC;IAChC,0EAA0E;IAC1E,QAAQ,CAAC,mBAAmB,EAAE,MAAM,CAAC;IACrC,sDAAsD;IACtD,QAAQ,CAAC,cAAc,EAAE,MAAM,CAAC;IAChC,qDAAqD;IACrD,QAAQ,CAAC,aAAa,EAAE,MAAM,CAAC;IAC/B;;;wCAGoC;IACpC,QAAQ,CAAC,cAAc,EAAE,MAAM,CAAC;IAChC;4CACwC;IACxC,QAAQ,CAAC,YAAY,EAAE,MAAM,CAAC;IAC9B;;;;;;;6DAOyD;IACzD,QAAQ,CAAC,cAAc,EAAE,MAAM,CAAC;IAChC,kEAAkE;IAClE,QAAQ,CAAC,gBAAgB,EAAE,MAAM,CAAC;IAClC;;;;;;;;;oEASgE;IAChE,QAAQ,CAAC,WAAW,EAAE,MAAM,CAAC;CAC7B;AAED,wBAAgB,gBAAgB,CAAC,IAAI,EAAE,QAAQ,EAAE,CAAC,EAAE,WAAW,GAAG,IAAI,CAcrE;AAED,wBAAgB,eAAe,CAAC,IAAI,EAAE,QAAQ,GAAG,WAAW,CAgB3D;AAED;;uCAEuC;AACvC,wBAAgB,aAAa,CAAC,IAAI,EAAE,QAAQ,GAAG,MAAM,CAIpD;AAED;;+DAE+D;AAC/D,wBAAgB,UAAU,CAAC,IAAI,EAAE,QAAQ,GAAG,OAAO,CAKlD"}

package/dist/core/store/layout_ops.d.cts

@@ -26,7 +26,7 @@ export interface TailArchetypeLayout {
     }[];
 }
 /** Tail-cursor column placement — the single home for the in-place paths'
- * layout rule and the 2³¹ offset cap (#382). Starting at `startCursor`
+ * layout rule and the 2³¹ offset cap. Starting at `startCursor`
  * (the current buffer byteLength), each archetype's columns are placed
  * `alignUp(cursor, stride)` then advanced by `stride * rowCapacity`; the
  * final tail (last column's advance, not re-aligned) becomes the grown
@@ -50,6 +50,24 @@ export declare function growBufferInPlace(old: ColumnStoreInternal, newTotal: nu
     grownBuffer: ArrayBufferLike;
     newView: DataView;
 };
+/**
+ * Byte offset where the next appended column region begins — the tail cursor
+ * the in-place grow/extend paths pass to `layoutColumnsAtTail`.
+ *
+ * For the growable-SAB and wasm backings the buffer is sized to the live extent
+ * (`SharedArrayBuffer.grow` resizes exactly; wasm rounds up to a page, and its
+ * fast path deliberately lands new regions past that page-rounded tail), so
+ * `buffer.byteLength` IS the tail. For the pure-TS **heap** backing (0.5.3) the
+ * buffer is a FIXED `ArrayBuffer` reserved at the full cap for V8 fast-path
+ * element access, so its `byteLength` is `maxBytes`, NOT the used size — the
+ * true tail is the header `capacity` (the logical high-water; new columns land
+ * in still-zero fixed-buffer space just past the last live column).
+ *
+ * A plain (non-shared) `ArrayBuffer` is uniquely the heap profile's fixed
+ * reservation — every other in-place backing is a `SharedArrayBuffer`. Keying
+ * off the backing keeps the SAB/wasm layouts byte-for-byte unchanged.
+ */
+export declare function tailCursorBytes(old: ColumnStoreInternal): number;
 /**
  * Derive `CreateColumnStoreOptions` from an old ColumnStore so a slow-path realloc
  * preserves the same set of optional regions at the same byte offsets in the
@@ -63,12 +81,12 @@ export declare function growBufferInPlace(old: ColumnStoreInternal, newTotal: nu
  * separately via `snapshotPrefixRegions`.
  *
  * Also re-applies the descriptor-region headroom policy
- * (`reservedDescriptorBytes`, #541). Unlike the prefix regions this is NOT
+ * (`reservedDescriptorBytes`). Unlike the prefix regions this is NOT
  * read from the SAB bytes — it's a JS-side policy carried on
  * `ColumnStoreInternal._reservedDescriptorBytes` — but it belongs here for the
  * same reason: without it the realloc'd store drops to zero descriptor
  * headroom and every later `extendColumnStore` takes the slow path forever.
- * Re-reserving the same margin (additive, see `planLayout`) keeps the #237
+ * Re-reserving the same margin (additive, see `planLayout`) keeps the
  * in-place fast path alive across reallocs.
  */
 export declare function optionsFromOld(old: ColumnStore): CreateColumnStoreOptions;
@@ -125,9 +143,9 @@ export declare function restoreColumnSnapshots(newStore: ColumnStore, snapshots:
  *      (command ring, entity-index) BEFORE the allocator call — the
  *      wasmMemoryAllocator may detach `old`'s views on grow, so everything
  *      needed is captured first. The prefix-region preservation is the
- *      contract `Store` relies on to keep its entity table across resizes
- *      (#245); `optionsFromOld` re-reserves regions and descriptor headroom
- *      (#541) so the republished store keeps its layout and fast paths.
+ *      contract `Store` relies on to keep its entity table across resizes;
+ * `optionsFromOld` re-reserves regions and descriptor headroom
+ * so the republished store keeps its layout and fast paths.
  *   2. `createColumnStore` with the derived options (fresh buffer; the same
  *      growable allocator carries forward so the new buffer also grows in
  *      place).
@@ -136,7 +154,7 @@ export declare function restoreColumnSnapshots(newStore: ColumnStore, snapshots:
  *      overwrite the empty state `createColumnStore` initialised.
  *   4. Bump `view_stamp` from the pre-capture value and patch the returned
  *      header so its cached `viewStamp` matches the buffer bytes just
- *      written — `createColumnStore` stamped it 0 (#386). `capacity` /
+ *      written — `createColumnStore` stamped it 0. `capacity` /
  *      `archetype_count` are already correct (createColumnStore sized them),
  *      so the spread carries them — and the internal `_allocator` /
  *      `_regionBytes` fields — through unchanged.

package/dist/core/store/layout_ops.d.ts

@@ -26,7 +26,7 @@ export interface TailArchetypeLayout {
     }[];
 }
 /** Tail-cursor column placement — the single home for the in-place paths'
- * layout rule and the 2³¹ offset cap (#382). Starting at `startCursor`
+ * layout rule and the 2³¹ offset cap. Starting at `startCursor`
  * (the current buffer byteLength), each archetype's columns are placed
  * `alignUp(cursor, stride)` then advanced by `stride * rowCapacity`; the
  * final tail (last column's advance, not re-aligned) becomes the grown
@@ -50,6 +50,24 @@ export declare function growBufferInPlace(old: ColumnStoreInternal, newTotal: nu
     grownBuffer: ArrayBufferLike;
     newView: DataView;
 };
+/**
+ * Byte offset where the next appended column region begins — the tail cursor
+ * the in-place grow/extend paths pass to `layoutColumnsAtTail`.
+ *
+ * For the growable-SAB and wasm backings the buffer is sized to the live extent
+ * (`SharedArrayBuffer.grow` resizes exactly; wasm rounds up to a page, and its
+ * fast path deliberately lands new regions past that page-rounded tail), so
+ * `buffer.byteLength` IS the tail. For the pure-TS **heap** backing (0.5.3) the
+ * buffer is a FIXED `ArrayBuffer` reserved at the full cap for V8 fast-path
+ * element access, so its `byteLength` is `maxBytes`, NOT the used size — the
+ * true tail is the header `capacity` (the logical high-water; new columns land
+ * in still-zero fixed-buffer space just past the last live column).
+ *
+ * A plain (non-shared) `ArrayBuffer` is uniquely the heap profile's fixed
+ * reservation — every other in-place backing is a `SharedArrayBuffer`. Keying
+ * off the backing keeps the SAB/wasm layouts byte-for-byte unchanged.
+ */
+export declare function tailCursorBytes(old: ColumnStoreInternal): number;
 /**
  * Derive `CreateColumnStoreOptions` from an old ColumnStore so a slow-path realloc
  * preserves the same set of optional regions at the same byte offsets in the
@@ -63,12 +81,12 @@ export declare function growBufferInPlace(old: ColumnStoreInternal, newTotal: nu
  * separately via `snapshotPrefixRegions`.
  *
  * Also re-applies the descriptor-region headroom policy
- * (`reservedDescriptorBytes`, #541). Unlike the prefix regions this is NOT
+ * (`reservedDescriptorBytes`). Unlike the prefix regions this is NOT
  * read from the SAB bytes — it's a JS-side policy carried on
  * `ColumnStoreInternal._reservedDescriptorBytes` — but it belongs here for the
  * same reason: without it the realloc'd store drops to zero descriptor
  * headroom and every later `extendColumnStore` takes the slow path forever.
- * Re-reserving the same margin (additive, see `planLayout`) keeps the #237
+ * Re-reserving the same margin (additive, see `planLayout`) keeps the
  * in-place fast path alive across reallocs.
  */
 export declare function optionsFromOld(old: ColumnStore): CreateColumnStoreOptions;
@@ -125,9 +143,9 @@ export declare function restoreColumnSnapshots(newStore: ColumnStore, snapshots:
  *      (command ring, entity-index) BEFORE the allocator call — the
  *      wasmMemoryAllocator may detach `old`'s views on grow, so everything
  *      needed is captured first. The prefix-region preservation is the
- *      contract `Store` relies on to keep its entity table across resizes
- *      (#245); `optionsFromOld` re-reserves regions and descriptor headroom
- *      (#541) so the republished store keeps its layout and fast paths.
+ *      contract `Store` relies on to keep its entity table across resizes;
+ * `optionsFromOld` re-reserves regions and descriptor headroom
+ * so the republished store keeps its layout and fast paths.
  *   2. `createColumnStore` with the derived options (fresh buffer; the same
  *      growable allocator carries forward so the new buffer also grows in
  *      place).
@@ -136,7 +154,7 @@ export declare function restoreColumnSnapshots(newStore: ColumnStore, snapshots:
  *      overwrite the empty state `createColumnStore` initialised.
  *   4. Bump `view_stamp` from the pre-capture value and patch the returned
  *      header so its cached `viewStamp` matches the buffer bytes just
- *      written — `createColumnStore` stamped it 0 (#386). `capacity` /
+ *      written — `createColumnStore` stamped it 0. `capacity` /
  *      `archetype_count` are already correct (createColumnStore sized them),
  *      so the spread carries them — and the internal `_allocator` /
  *      `_regionBytes` fields — through unchanged.

package/dist/core/store/layout_ops.d.ts.map

@@ -1 +1 @@
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