@modular-circuit/transpiler 0.1.8 → 0.1.9
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/dist/index.d.mts +3 -12
- package/dist/index.d.ts +3 -12
- package/dist/index.js +6 -4
- package/dist/index.mjs +6 -4
- package/package.json +1 -1
package/dist/index.d.mts
CHANGED
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@@ -1,5 +1,5 @@
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import { VECTOR2, At, Color, ConnectionGraph, NL_NetList, BOX2 } from '@modular-circuit/electronics-model';
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2
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-
import { SCHEMATIC, PIN_DISPLAY_OPT, LIB_SYMBOL, Drawing, PIN_DEFINITION, SCH_LABEL, SCH_SYMBOL, SCH_LINE, PIN_INSTANCE, SCH_SHEET, SCH_SHEET_PIN, Effects, Justify, SCH_FIELD, Fill, Stroke, Project, IR_Graph, ModuleResolver, ModuleCircuit } from '@modular-circuit/ir';
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+
import { SCHEMATIC, PIN_DISPLAY_OPT, LIB_SYMBOL, Drawing, PIN_DEFINITION, SCH_LABEL, SCH_SYMBOL, SCH_LINE, PIN_INSTANCE, SCH_SHEET, SCH_SHEET_PIN, Effects, Justify, SCH_FIELD, Fill, Stroke, Project, IR_Graph, ModuleResolver, ModuleCircuit, DesignBlockContent } from '@modular-circuit/ir';
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import { CG_SCHEMATIC, CONNECTION_GRAPH_BUILDER_CTX } from '@modular-circuit/perc';
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declare function get_sch_default_drawing_sheet(): string;
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@@ -463,20 +463,11 @@ declare class StringFormatter {
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append_quote(str: string): void;
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}
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interface NamedContent {
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filename: string;
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content: string;
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-
}
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interface DesignBlock {
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main_sch: string;
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sheets: NamedContent[];
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-
pcb?: NamedContent;
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-
}
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declare function collect_sub_sheets_by_id(module_ids: string[], module_resolver: ModuleResolver): Promise<{
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sheets: Record<string, string>;
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module_main_sheet: Record<string, string>;
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modules: Record<string, ModuleCircuit>;
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-
design_blocks:
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design_blocks: DesignBlockContent[];
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}>;
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declare const gen_lib_gnd: (value: string) => LIB_SYMBOL;
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@@ -487,4 +478,4 @@ declare const gen_sch_gnd: (value: string, pwr_number: number, port_id: string,
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declare const gen_sch_vcc: (value: string, pwr_number: number, port_id: string, position: VECTOR2) => SCH_SYMBOL;
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-
export { AllegroNetlistFileExtension, AltiumFootprintLibPathExtension, ArchiveFileExtension, BLOCK_PIN_GAP, BLOCK_PIN_TB_MARGIN, type BlockLabelPadding, type BlockSize, type BoxGeometry, CadstarFootprintLibPathExtension, CadstarNetlistFileExtension, CadstarPartsLibraryFileExtension, CadstarPcbFileExtension, CadstarSchematicFileExtension, type ConnectionGraphMap, type ConvertGraphToKiCadContext, type ConvertGraphToKiCadInput, CsvFileExtension, DEFAULT_PAPER_SIZE, DatabaseLibraryFileExtension,
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+
export { AllegroNetlistFileExtension, AltiumFootprintLibPathExtension, ArchiveFileExtension, BLOCK_PIN_GAP, BLOCK_PIN_TB_MARGIN, type BlockLabelPadding, type BlockSize, type BoxGeometry, CadstarFootprintLibPathExtension, CadstarNetlistFileExtension, CadstarPartsLibraryFileExtension, CadstarPcbFileExtension, CadstarSchematicFileExtension, type ConnectionGraphMap, type ConvertGraphToKiCadContext, type ConvertGraphToKiCadInput, CsvFileExtension, DEFAULT_PAPER_SIZE, DatabaseLibraryFileExtension, DesignRulesFileExtension, DrawingSheetFileExtension, DrillFileExtension, EagleFootprintLibPathExtension, EaglePcbFileExtension, EquFileExtension, FONT_SIZE, FootprintAssignmentFileExtension, FootprintPlaceFileExtension, GENERATOR_NAME, GENERATOR_VERSION, GRID_SIZE, GedaPcbFootprintLibFileExtension, GerberFileExtension, GerberFileExtensionsRegex, GerberJobFileExtension, GltfBinaryFileExtension, GraphConverter, HTTPLibraryFileExtension, HotkeyFileExtension, HtmlFileExtension, Ipc2581FileExtension, IpcD356FileExtension, JpegFileExtension, JsonFileExtension, KICAD_SCH_FRAME, KiCadFootprintFileExtension, KiCadFootprintLibPathExtension, KiCadPcbFileExtension, KiCadProjectArchive, KiCadSchematicFileExtension, KiCadSymbolLibFileExtension, type LabelPadding, Layout, LegacyFootprintLibPathExtension, LegacyPcbFileExtension, LegacyProjectFileExtension, LegacySchematicFileExtension, LegacySymbolDocumentFileExtension, LegacySymbolLibFileExtension, MacrosFileExtension, MarkdownFileExtension, NetListConverter, NetlistFileExtension, type NetlistProject, type NetlistToKicadContext, OrCadPcb2NetlistFileExtension, PAPER, PAPER_SIZE, PdfFileExtension, PngFileExtension, ProjectFileExtension, ProjectLocalSettingsFileExtension, ReportFileExtension, SCHEMATIC_PRINTER, SCH_VERSION, SVGFileExtension, SchematicSymbolFileExtension, type Size, SpecctraDsnFileExtension, SpecctraSessionFileExtension, SpiceFileExtension, StepFileAbrvExtension, StepFileExtension, StringFormatter, TextFileExtension, VrmlFileExtension, WIRE_PADDING, WorkbookFileExtension, XmlFileExtension, collect_sub_sheets, collect_sub_sheets_by_id, convert_graph_to_kicad_project, filterNullOrUndefined, gen_lib_gnd, gen_lib_vcc, gen_sch_gnd, gen_sch_vcc, get_power_pos, get_sch_default_drawing_sheet, tab };
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package/dist/index.d.ts
CHANGED
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@@ -1,5 +1,5 @@
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1
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import { VECTOR2, At, Color, ConnectionGraph, NL_NetList, BOX2 } from '@modular-circuit/electronics-model';
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2
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-
import { SCHEMATIC, PIN_DISPLAY_OPT, LIB_SYMBOL, Drawing, PIN_DEFINITION, SCH_LABEL, SCH_SYMBOL, SCH_LINE, PIN_INSTANCE, SCH_SHEET, SCH_SHEET_PIN, Effects, Justify, SCH_FIELD, Fill, Stroke, Project, IR_Graph, ModuleResolver, ModuleCircuit } from '@modular-circuit/ir';
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2
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import { SCHEMATIC, PIN_DISPLAY_OPT, LIB_SYMBOL, Drawing, PIN_DEFINITION, SCH_LABEL, SCH_SYMBOL, SCH_LINE, PIN_INSTANCE, SCH_SHEET, SCH_SHEET_PIN, Effects, Justify, SCH_FIELD, Fill, Stroke, Project, IR_Graph, ModuleResolver, ModuleCircuit, DesignBlockContent } from '@modular-circuit/ir';
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import { CG_SCHEMATIC, CONNECTION_GRAPH_BUILDER_CTX } from '@modular-circuit/perc';
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declare function get_sch_default_drawing_sheet(): string;
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@@ -463,20 +463,11 @@ declare class StringFormatter {
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append_quote(str: string): void;
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}
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interface NamedContent {
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filename: string;
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content: string;
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}
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interface DesignBlock {
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main_sch: string;
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sheets: NamedContent[];
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pcb?: NamedContent;
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-
}
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declare function collect_sub_sheets_by_id(module_ids: string[], module_resolver: ModuleResolver): Promise<{
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sheets: Record<string, string>;
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module_main_sheet: Record<string, string>;
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modules: Record<string, ModuleCircuit>;
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design_blocks:
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design_blocks: DesignBlockContent[];
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}>;
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declare const gen_lib_gnd: (value: string) => LIB_SYMBOL;
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@@ -487,4 +478,4 @@ declare const gen_sch_gnd: (value: string, pwr_number: number, port_id: string,
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declare const gen_sch_vcc: (value: string, pwr_number: number, port_id: string, position: VECTOR2) => SCH_SYMBOL;
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-
export { AllegroNetlistFileExtension, AltiumFootprintLibPathExtension, ArchiveFileExtension, BLOCK_PIN_GAP, BLOCK_PIN_TB_MARGIN, type BlockLabelPadding, type BlockSize, type BoxGeometry, CadstarFootprintLibPathExtension, CadstarNetlistFileExtension, CadstarPartsLibraryFileExtension, CadstarPcbFileExtension, CadstarSchematicFileExtension, type ConnectionGraphMap, type ConvertGraphToKiCadContext, type ConvertGraphToKiCadInput, CsvFileExtension, DEFAULT_PAPER_SIZE, DatabaseLibraryFileExtension,
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export { AllegroNetlistFileExtension, AltiumFootprintLibPathExtension, ArchiveFileExtension, BLOCK_PIN_GAP, BLOCK_PIN_TB_MARGIN, type BlockLabelPadding, type BlockSize, type BoxGeometry, CadstarFootprintLibPathExtension, CadstarNetlistFileExtension, CadstarPartsLibraryFileExtension, CadstarPcbFileExtension, CadstarSchematicFileExtension, type ConnectionGraphMap, type ConvertGraphToKiCadContext, type ConvertGraphToKiCadInput, CsvFileExtension, DEFAULT_PAPER_SIZE, DatabaseLibraryFileExtension, DesignRulesFileExtension, DrawingSheetFileExtension, DrillFileExtension, EagleFootprintLibPathExtension, EaglePcbFileExtension, EquFileExtension, FONT_SIZE, FootprintAssignmentFileExtension, FootprintPlaceFileExtension, GENERATOR_NAME, GENERATOR_VERSION, GRID_SIZE, GedaPcbFootprintLibFileExtension, GerberFileExtension, GerberFileExtensionsRegex, GerberJobFileExtension, GltfBinaryFileExtension, GraphConverter, HTTPLibraryFileExtension, HotkeyFileExtension, HtmlFileExtension, Ipc2581FileExtension, IpcD356FileExtension, JpegFileExtension, JsonFileExtension, KICAD_SCH_FRAME, KiCadFootprintFileExtension, KiCadFootprintLibPathExtension, KiCadPcbFileExtension, KiCadProjectArchive, KiCadSchematicFileExtension, KiCadSymbolLibFileExtension, type LabelPadding, Layout, LegacyFootprintLibPathExtension, LegacyPcbFileExtension, LegacyProjectFileExtension, LegacySchematicFileExtension, LegacySymbolDocumentFileExtension, LegacySymbolLibFileExtension, MacrosFileExtension, MarkdownFileExtension, NetListConverter, NetlistFileExtension, type NetlistProject, type NetlistToKicadContext, OrCadPcb2NetlistFileExtension, PAPER, PAPER_SIZE, PdfFileExtension, PngFileExtension, ProjectFileExtension, ProjectLocalSettingsFileExtension, ReportFileExtension, SCHEMATIC_PRINTER, SCH_VERSION, SVGFileExtension, SchematicSymbolFileExtension, type Size, SpecctraDsnFileExtension, SpecctraSessionFileExtension, SpiceFileExtension, StepFileAbrvExtension, StepFileExtension, StringFormatter, TextFileExtension, VrmlFileExtension, WIRE_PADDING, WorkbookFileExtension, XmlFileExtension, collect_sub_sheets, collect_sub_sheets_by_id, convert_graph_to_kicad_project, filterNullOrUndefined, gen_lib_gnd, gen_lib_vcc, gen_sch_gnd, gen_sch_vcc, get_power_pos, get_sch_default_drawing_sheet, tab };
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package/dist/index.js
CHANGED
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@@ -313,8 +313,10 @@ async function collect_sub_sheets_by_id(module_ids, module_resolver) {
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module_main_sheet[k] = module_circuit.main;
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modules[k] = module_circuit;
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const design_block = {
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root: module_circuit.main,
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schematics: [],
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pcb: null,
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components: []
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};
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console.log(`Fetching ZIP archive for module ${id} from ${zip_archive_url.toString()}`);
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const zip_archive = await fetch(zip_archive_url).then((res) => res.arrayBuffer());
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@@ -327,10 +329,10 @@ async function collect_sub_sheets_by_id(module_ids, module_resolver) {
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continue;
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}
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sheets[filename] = content;
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design_block.
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design_block.schematics.push({ filename, content });
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} else if (name.endsWith(import_utils2.KICAD_PCB_FILE_EXT)) {
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const filename = (0, import_utils2.remove_filename_path_prefix)(name);
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design_block.pcb = { filename, content };
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design_block.pcb = { pcb: { filename, content } };
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}
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}
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design_blocks.push(design_block);
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package/dist/index.mjs
CHANGED
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@@ -200,8 +200,10 @@ async function collect_sub_sheets_by_id(module_ids, module_resolver) {
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module_main_sheet[k] = module_circuit.main;
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modules[k] = module_circuit;
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const design_block = {
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root: module_circuit.main,
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schematics: [],
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pcb: null,
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components: []
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};
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console.log(`Fetching ZIP archive for module ${id} from ${zip_archive_url.toString()}`);
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const zip_archive = await fetch(zip_archive_url).then((res) => res.arrayBuffer());
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@@ -214,10 +216,10 @@ async function collect_sub_sheets_by_id(module_ids, module_resolver) {
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continue;
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}
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sheets[filename] = content;
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design_block.
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design_block.schematics.push({ filename, content });
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} else if (name.endsWith(KICAD_PCB_FILE_EXT)) {
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const filename = remove_filename_path_prefix2(name);
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design_block.pcb = { filename, content };
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design_block.pcb = { pcb: { filename, content } };
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}
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}
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design_blocks.push(design_block);
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