@modplayjs/fmt-sid 0.0.0-stage → 0.2.2

package/dist/c64types.d.ts

@@ -0,0 +1,209 @@
+export declare function CRSID_BYTE_LOG2(x: number): number;
+export declare enum CRSpecC64 {
+    CRSID_PAL_CPUCLK = 985248,
+    CRSID_NTSC_CPUCLK = 1022727,
+    CRSID_DEFAULT_SAMPLERATE = 44100,
+    CRSID_CLOCK_FRACTIONAL_BITS = 4,
+    CRSID_RESAMPLER_FRACTIONAL_BITS = 12,
+    CRSID_OVERSAMPLING_CYCLES = 4,
+    CRSID_PAL_AUDIO_CLOCK = 246312,
+    CRSID_NTSC_AUDIO_CLOCK = 255681,
+    CRSID_SIDCOUNT_MAX = 4,
+    CRSID_CIACOUNT = 2
+}
+export declare enum CRChannel {
+    CRSID_CHANNEL_LEFT = 1,
+    CRSID_CHANNEL_RIGHT = 2,
+    CRSID_CHANNEL_BOTH = 3,
+    CRSID_CHANNELPANNING_DIVSHIFTS = 2
+}
+export declare enum CRAudioLevels {
+    /** attenuates wave-generator output not to overdrive resampler-input. */
+    CRSID_WAVGEN_PRESHIFT = 3,
+    /** shift-value can be 1..4 (1..16x division). */
+    CRSID_WAVGEN_PREDIV = 8,
+    /** increase cRSID.Attenuation by nom/denom ratio (adjusting of signal-strength
+     *  before saturating sound to 16bit signed short to avoid strong
+     *  multi-channel filter distortions). */
+    CRSID_PRESAT_ATT_NOM = 20,
+    CRSID_PRESAT_ATT_DENOM = 16
+}
+export declare enum CRMemAddresses {
+    CRSID_C64_MEMBANK_SIZE = 65536,
+    CRSID_MEMBANK_SAFETY_ZONE_SIZE = 256,
+    CRSID_SID_SAFETY_ZONE_SIZE = 256,
+    CRSID_MEMBANK_SIZE = 66048,
+    CRSID_SID_SAFE_ADDRESS = 65792
+}
+export interface CRCPUinstance {
+    PC: number;
+    /** short int in C (signed). */
+    A: number;
+    SP: number;
+    X: number;
+    Y: number;
+    /** STATUS-flags: N V - B D I Z C. */
+    ST: number;
+    Addr: number;
+    Cycles: number;
+    SamePage: number;
+    /** used for NMI leading edge detection. */
+    PrevNMI: number;
+}
+export declare function createCPUinstance(): CRCPUinstance;
+export interface CRCIAinstance {
+    /** old or new CIA? (have 1 cycle difference in cases) */
+    ChipModel: number;
+    /** CIA-baseaddress location in C64-memory (IO). */
+    BaseAddress: number;
+    /** CIA-baseaddress location in host's memory for writing — in the TS port
+     *  these become numeric offsets into the shared IO bank arrays. */
+    BasePtrWR: number;
+    BasePtrRD: number;
+}
+export declare function createCIAinstance(): CRCIAinstance;
+export interface CRVICinstance {
+    /** (timing differences between models?) */
+    ChipModel: number;
+    /** VIC-baseaddress location in C64-memory (IO). */
+    BaseAddress: number;
+    BasePtrWR: number;
+    BasePtrRD: number;
+    RasterLines: number;
+    RasterRowCycles: number;
+    RowCycleCnt: number;
+}
+export declare function createVICinstance(): CRVICinstance;
+export interface CRSIDinstance {
+    /** values: 8580 / 6581. */
+    ChipModel: number;
+    /** 1:left, 2:right, 3:both(middle). */
+    Channel: number;
+    /** SID-baseaddress location in C64-memory (IO). */
+    BaseAddress: number;
+    /** In the TS port the C BasePtr/BasePtrRD raw pointers become numeric
+     *  offsets into cRSID_C64.IObankWR / IObankRD (they always alias those
+     *  arrays in C too). */
+    BasePtr: number;
+    BasePtrRD: number;
+    ADSRstate: Uint8Array;
+    RateCounter: Uint16Array;
+    EnvelopeCounter: Uint8Array;
+    ExponentCounter: Uint8Array;
+    /** 28bit precision instead of 24bit. */
+    PhaseAccu: Int32Array;
+    /** (integerized ClockRatio fractionals, WebSID has similar solution) */
+    PrevPhaseAccu: Int32Array;
+    SyncSourceMSBrise: number;
+    RingSourceMSB: number;
+    NoiseLFSR: Uint32Array;
+    PrevSounDemonDigiWF: Int8Array;
+    PrevWavGenOut: Uint32Array;
+    PrevWavData: Uint8Array;
+    PrevLowPass: number;
+    PrevBandPass: number;
+    /** pre-calculated once, used by oversampled/HQ output-emulation many times. */
+    Volume: number;
+    /** pre-calculated once, used by oversampled/HQ output-emulation many times. */
+    Digi: number;
+    Resonance: number;
+    Cutoff: number;
+    HighPassBit: number;
+    BandPassBit: number;
+    LowPassBit: number;
+    NonFiltedSample: number;
+    FilterInputSample: number;
+    PrevNonFiltedSample: number;
+    PrevFilterInputSample: number;
+    /** lowpass-filtered version of Volume-band register (signed int in C). */
+    PrevVolume: number;
+    /** not attenuated (range:0..0xFFFFF depending on SID's main-volume). */
+    Output: number;
+    /** filtered version, good for VU-meter display. */
+    Level: number;
+}
+export declare function createSIDinstance(): CRSIDinstance;
+export interface CRSIDwavOutput {
+    NonFilted: number;
+    FilterInput: number;
+}
+export interface CRC64instance {
+    SampleRate: number;
+    /** calculated (by audio-init) amount of bytes in the buffer. */
+    SampleBufferSize: number;
+    /** malloc-ed/freed by audio init/close routines (unused in the TS port —
+     *  host audio is out of scope; kept for struct parity). */
+    SampleBuffer: Int8Array | null;
+    /** handle to the audio-device (unused in the TS port). */
+    SoundDevice: unknown;
+    SoundStarted: number;
+    /** audio-thread's read-only shadow/cache-register for cRSID.RealSIDmode. */
+    RealSIDmode: number;
+    /** shadow/cache-register for cRSID.Stereo (boolean to set 2SID/3SID/4SID
+     *  tunes as stereo). */
+    Stereo: number;
+    /** shadow/cache-register for cRSID.HighQualitySID (cycle-based waveform
+     *  emulation with oversampling, more CPU usage). */
+    HighQualitySID: number;
+    /** shadow/cache-register for cRSID.HighQualityResampler (Sinc-based FIR
+     *  resampler instead of fast averaging resampler). */
+    HighQualityResampler: number;
+    /** not likely to change during playback, but just in case the audio-thread
+     *  version is used. */
+    SIDchipCount: number;
+    /** audio-thread's read-only shadow/cache-register for SIDchipCount. */
+    AudioThread_SIDchipCount: number;
+    CPUfrequency: number;
+    /** ratio of CPU-clock and samplerate (for CPU/CIA/VIC/ADSR timing). */
+    SampleClockRatio: number;
+    /** ratio of oversampling SID-clock and samplerate (for SID-waveform
+     *  resampling). */
+    OversampleClockRatio: number;
+    OversampleClockRatioReciproc: number;
+    Finished: number;
+    Returned: number;
+    /** collected IRQ line from devices. */
+    IRQ: number;
+    /** collected NMI line from devices. */
+    NMI: number;
+    ResampledOutput: CRSIDOutput;
+    FileNameOnly: string;
+    Attenuation: number;
+    /** this is a substitution in PSID-mode for CIA/VIC counters. */
+    FrameCycleCnt: number;
+    PrevRasterLine: number;
+    SampleCycleCnt: number;
+    OverSampleCycleCnt: number;
+    TenthSecondCnt: number;
+    SecondCnt: number;
+    callBack__autoAdvance: ((subtunestepping: number, data: unknown) => void) | null;
+    callBackData__autoAdvance: unknown;
+    FadeLevel: number;
+    CPU: CRCPUinstance;
+    SID: CRSIDinstance[];
+    CIA: CRCIAinstance[];
+    VIC: CRVICinstance;
+    /** fast lookup for memory-bank address-multiplexing done by the PLA.
+     *  In C these are raw pointers into RAMbank/IObankRD/IObankWR/ROMbanks;
+     *  the TS port stores a bank-selector code (0=RAM,1=IO_RD,2=ROM,3=IO_WR)
+     *  plus a byte offset, resolved at access time. */
+    MemoryBankPointersRD: Int32Array;
+    MemoryBankPointersWR: Int32Array;
+    RAMbank: Uint8Array;
+    IObankWR: Uint8Array;
+    IObankRD: Uint8Array;
+    ROMbanks: Uint8Array;
+}
+/** cRSID_Output (libcRSID.h:128-131) — signed int L/R in C. */
+export interface CRSIDOutput {
+    L: number;
+    R: number;
+}
+export declare function createC64instance(): CRC64instance;
+export declare const BANK_RAM = 0;
+export declare const BANK_IO_RD = 1;
+export declare const BANK_ROM = 2;
+export declare const BANK_IO_WR = 3;
+/** Resolve a C memory-bank pointer to (bankCode). */
+export declare function bankCode(entry: number): number;
+//# sourceMappingURL=c64types.d.ts.map

package/dist/c64types.d.ts.map

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package/dist/c64types.js

@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2026 Bitti09 — modplayjs contributors
+// Ported from: cRSID 1.58 libcRSID/C64/C64.h (structs and constants)
+// (c) Hermit (Mihaly Horvath), license: WTF ("do what the frick you want").
+import { CRSID_OVERSAMPLING_RATIO, } from './config.js';
+// ---------------------------------------------------------------------------
+// cRSID_BYTE_LOG2 (C64.h:10) — C macro, used by the HQ-resampler parameter
+// block. JS-only helper; same value table.
+// ---------------------------------------------------------------------------
+export function CRSID_BYTE_LOG2(x) {
+    return x < 2 ? 0 : x < 4 ? 1 : x < 8 ? 2 : x < 16 ? 3 : x < 32 ? 4 : x < 64 ? 5 : x < 128 ? 6 : x < 256 ? 7 : 8;
+}
+// ---------------------------------------------------------------------------
+// cRSID_Specifications__C64 (C64.h:12-23)
+// ---------------------------------------------------------------------------
+export var CRSpecC64;
+(function (CRSpecC64) {
+    CRSpecC64[CRSpecC64["CRSID_PAL_CPUCLK"] = 985248] = "CRSID_PAL_CPUCLK";
+    CRSpecC64[CRSpecC64["CRSID_NTSC_CPUCLK"] = 1022727] = "CRSID_NTSC_CPUCLK";
+    CRSpecC64[CRSpecC64["CRSID_DEFAULT_SAMPLERATE"] = 44100] = "CRSID_DEFAULT_SAMPLERATE";
+    CRSpecC64[CRSpecC64["CRSID_CLOCK_FRACTIONAL_BITS"] = 4] = "CRSID_CLOCK_FRACTIONAL_BITS";
+    CRSpecC64[CRSpecC64["CRSID_RESAMPLER_FRACTIONAL_BITS"] = 12] = "CRSID_RESAMPLER_FRACTIONAL_BITS";
+    // CRSID_OVERSAMPLING_RATIO comes from Config.h (runtime const import).
+    CRSpecC64[CRSpecC64["CRSID_OVERSAMPLING_CYCLES"] = 4] = "CRSID_OVERSAMPLING_CYCLES";
+    CRSpecC64[CRSpecC64["CRSID_PAL_AUDIO_CLOCK"] = 246312] = "CRSID_PAL_AUDIO_CLOCK";
+    CRSpecC64[CRSpecC64["CRSID_NTSC_AUDIO_CLOCK"] = 255681] = "CRSID_NTSC_AUDIO_CLOCK";
+    CRSpecC64[CRSpecC64["CRSID_SIDCOUNT_MAX"] = 4] = "CRSID_SIDCOUNT_MAX";
+    CRSpecC64[CRSpecC64["CRSID_CIACOUNT"] = 2] = "CRSID_CIACOUNT";
+})(CRSpecC64 || (CRSpecC64 = {}));
+// ---------------------------------------------------------------------------
+// cRSID_Channels (C64.h:24)
+// ---------------------------------------------------------------------------
+export var CRChannel;
+(function (CRChannel) {
+    CRChannel[CRChannel["CRSID_CHANNEL_LEFT"] = 1] = "CRSID_CHANNEL_LEFT";
+    CRChannel[CRChannel["CRSID_CHANNEL_RIGHT"] = 2] = "CRSID_CHANNEL_RIGHT";
+    CRChannel[CRChannel["CRSID_CHANNEL_BOTH"] = 3] = "CRSID_CHANNEL_BOTH";
+    CRChannel[CRChannel["CRSID_CHANNELPANNING_DIVSHIFTS"] = 2] = "CRSID_CHANNELPANNING_DIVSHIFTS";
+})(CRChannel || (CRChannel = {}));
+// ---------------------------------------------------------------------------
+// cRSID_AudioLevels (C64.h:25-33)
+// ---------------------------------------------------------------------------
+export var CRAudioLevels;
+(function (CRAudioLevels) {
+    /** attenuates wave-generator output not to overdrive resampler-input. */
+    CRAudioLevels[CRAudioLevels["CRSID_WAVGEN_PRESHIFT"] = 3] = "CRSID_WAVGEN_PRESHIFT";
+    /** shift-value can be 1..4 (1..16x division). */
+    CRAudioLevels[CRAudioLevels["CRSID_WAVGEN_PREDIV"] = 8] = "CRSID_WAVGEN_PREDIV";
+    /** increase cRSID.Attenuation by nom/denom ratio (adjusting of signal-strength
+     *  before saturating sound to 16bit signed short to avoid strong
+     *  multi-channel filter distortions). */
+    CRAudioLevels[CRAudioLevels["CRSID_PRESAT_ATT_NOM"] = 20] = "CRSID_PRESAT_ATT_NOM";
+    CRAudioLevels[CRAudioLevels["CRSID_PRESAT_ATT_DENOM"] = 16] = "CRSID_PRESAT_ATT_DENOM";
+})(CRAudioLevels || (CRAudioLevels = {}));
+// ---------------------------------------------------------------------------
+// cRSID_MemAddresses (C64.h:34-40)
+// ---------------------------------------------------------------------------
+export var CRMemAddresses;
+(function (CRMemAddresses) {
+    CRMemAddresses[CRMemAddresses["CRSID_C64_MEMBANK_SIZE"] = 65536] = "CRSID_C64_MEMBANK_SIZE";
+    CRMemAddresses[CRMemAddresses["CRSID_MEMBANK_SAFETY_ZONE_SIZE"] = 256] = "CRSID_MEMBANK_SAFETY_ZONE_SIZE";
+    CRMemAddresses[CRMemAddresses["CRSID_SID_SAFETY_ZONE_SIZE"] = 256] = "CRSID_SID_SAFETY_ZONE_SIZE";
+    CRMemAddresses[CRMemAddresses["CRSID_MEMBANK_SIZE"] = 66048] = "CRSID_MEMBANK_SIZE";
+    CRMemAddresses[CRMemAddresses["CRSID_SID_SAFE_ADDRESS"] = 65792] = "CRSID_SID_SAFE_ADDRESS";
+})(CRMemAddresses || (CRMemAddresses = {}));
+export function createCPUinstance() {
+    return { PC: 0, A: 0, SP: 0, X: 0, Y: 0, ST: 0, Addr: 0, Cycles: 0, SamePage: 0, PrevNMI: 0 };
+}
+export function createCIAinstance() {
+    return { ChipModel: 0, BaseAddress: 0, BasePtrWR: 0, BasePtrRD: 0 };
+}
+export function createVICinstance() {
+    return { ChipModel: 0, BaseAddress: 0, BasePtrWR: 0, BasePtrRD: 0, RasterLines: 0, RasterRowCycles: 0, RowCycleCnt: 0 };
+}
+export function createSIDinstance() {
+    return {
+        ChipModel: 0,
+        Channel: 0,
+        BaseAddress: 0,
+        BasePtr: 0,
+        BasePtrRD: 0,
+        ADSRstate: new Uint8Array(15),
+        RateCounter: new Uint16Array(15),
+        EnvelopeCounter: new Uint8Array(15),
+        ExponentCounter: new Uint8Array(15),
+        PhaseAccu: new Int32Array(15),
+        PrevPhaseAccu: new Int32Array(15),
+        SyncSourceMSBrise: 0,
+        RingSourceMSB: 0,
+        NoiseLFSR: new Uint32Array(15),
+        PrevSounDemonDigiWF: new Int8Array(15),
+        PrevWavGenOut: new Uint32Array(15),
+        PrevWavData: new Uint8Array(15),
+        PrevLowPass: 0,
+        PrevBandPass: 0,
+        Volume: 0,
+        Digi: 0,
+        Resonance: 0,
+        Cutoff: 0,
+        HighPassBit: 0,
+        BandPassBit: 0,
+        LowPassBit: 0,
+        NonFiltedSample: 0,
+        FilterInputSample: 0,
+        PrevNonFiltedSample: 0,
+        PrevFilterInputSample: 0,
+        PrevVolume: 0,
+        Output: 0,
+        Level: 0,
+    };
+}
+export function createC64instance() {
+    const SID = [];
+    for (let i = 0; i < CRSpecC64.CRSID_SIDCOUNT_MAX + 1; ++i)
+        SID.push(createSIDinstance());
+    const CIA = [];
+    for (let i = 0; i < CRSpecC64.CRSID_CIACOUNT + 1; ++i)
+        CIA.push(createCIAinstance());
+    return {
+        SampleRate: 0,
+        SampleBufferSize: 0,
+        SampleBuffer: null,
+        SoundDevice: null,
+        SoundStarted: 0,
+        RealSIDmode: 0,
+        Stereo: 0,
+        HighQualitySID: 0,
+        HighQualityResampler: 0,
+        SIDchipCount: 0,
+        AudioThread_SIDchipCount: 0,
+        CPUfrequency: 0,
+        SampleClockRatio: 0,
+        OversampleClockRatio: 0,
+        OversampleClockRatioReciproc: 0,
+        Finished: 0,
+        Returned: 0,
+        IRQ: 0,
+        NMI: 0,
+        ResampledOutput: { L: 0, R: 0 },
+        FileNameOnly: '',
+        Attenuation: 0,
+        FrameCycleCnt: 0,
+        PrevRasterLine: 0,
+        SampleCycleCnt: 0,
+        OverSampleCycleCnt: 0,
+        TenthSecondCnt: 0,
+        SecondCnt: 0,
+        callBack__autoAdvance: null,
+        callBackData__autoAdvance: null,
+        FadeLevel: 0,
+        CPU: createCPUinstance(),
+        SID,
+        CIA,
+        VIC: createVICinstance(),
+        MemoryBankPointersRD: new Int32Array(4 * 256),
+        MemoryBankPointersWR: new Int32Array(4 * 256),
+        RAMbank: new Uint8Array(CRMemAddresses.CRSID_MEMBANK_SIZE),
+        IObankWR: new Uint8Array(CRMemAddresses.CRSID_MEMBANK_SIZE),
+        IObankRD: new Uint8Array(CRMemAddresses.CRSID_MEMBANK_SIZE),
+        ROMbanks: new Uint8Array(CRMemAddresses.CRSID_MEMBANK_SIZE),
+    };
+}
+// ---------------------------------------------------------------------------
+// Memory-bank pointer encoding (TS-port adaptation of the C pointer tables).
+//
+// C: `unsigned char* MemoryBankPointersRD[4][256]` holds one of four base
+// pointers per (bank, page). The C code then compares the fetched pointer
+// against the four bases (`BankPointer != cRSID_C64.IObankRD` etc.). We
+// encode each entry as bankCode<<16 | 0 with bankCode:
+//   0 = RAMbank, 1 = IObankRD, 2 = ROMbanks, 3 = IObankWR
+// (IObankWR appears only in the WR table; the RD table never stores it.)
+// ---------------------------------------------------------------------------
+export const BANK_RAM = 0;
+export const BANK_IO_RD = 1;
+export const BANK_ROM = 2;
+export const BANK_IO_WR = 3;
+/** Resolve a C memory-bank pointer to (bankCode). */
+export function bankCode(entry) {
+    return entry >>> 16;
+}
+//# sourceMappingURL=c64types.js.map

package/dist/c64types.js.map

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package/dist/cia.d.ts

@@ -0,0 +1,19 @@
+import type { CRC64instance, CRCIAinstance } from './c64types.js';
+import { createCIAinstance } from './c64types.js';
+/** cRSID_createCIAchip (CIA.c:6-14). */
+export declare function cRSID_createCIAchip(C64: CRC64instance, CIA: CRCIAinstance, baseaddress: number): void;
+/** cRSID_initCIAchip (CIA.c:16-20). */
+export declare function cRSID_initCIAchip(C64: CRC64instance, CIA: CRCIAinstance): void;
+/** cRSID_emulateCIA (CIA.c:48-119) — returns INTERRUPT_HAPPENED (char in C). */
+export declare function cRSID_emulateCIA(C64: CRC64instance, CIA: CRCIAinstance, cycles: number): number;
+/** cRSID_writeCIAlatchAhi (CIA.c:121-127). */
+export declare function cRSID_writeCIAlatchAhi(C64: CRC64instance, CIA: CRCIAinstance, value: number): void;
+/** cRSID_writeCIAlatchBhi (CIA.c:129-135). */
+export declare function cRSID_writeCIAlatchBhi(C64: CRC64instance, CIA: CRCIAinstance, value: number): void;
+/** cRSID_writeCIAIRQmask (CIA.c:137-141). */
+export declare function cRSID_writeCIAIRQmask(C64: CRC64instance, CIA: CRCIAinstance, value: number): void;
+/** cRSID_acknowledgeCIAIRQ (CIA.c:143-147) — reading a CIA interrupt-register
+ *  clears its read-part and IRQ-flag. */
+export declare function cRSID_acknowledgeCIAIRQ(C64: CRC64instance, CIA: CRCIAinstance): void;
+export { createCIAinstance };
+//# sourceMappingURL=cia.d.ts.map

package/dist/cia.d.ts.map

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package/dist/cia.js

@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: BSD-3-Clause
+// Copyright (c) 2026 Bitti09 — modplayjs contributors
+// Ported from: cRSID 1.58 libcRSID/C64/CIA.c — CIA emulation.
+// (c) Hermit (Mihaly Horvath), license: WTF ("do what the frick you want").
+//
+// C accesses chip registers through CIA->BasePtrWR/BasePtrRD (raw pointers
+// into IObankWR/IObankRD); the TS port keeps numeric offsets and indexes the
+// C64 IO banks directly.
+import { createCIAinstance } from './c64types.js';
+/** cRSID_createCIAchip (CIA.c:6-14). */
+export function cRSID_createCIAchip(C64, CIA, baseaddress) {
+    CIA.ChipModel = 0;
+    CIA.BaseAddress = baseaddress;
+    CIA.BasePtrWR = baseaddress;
+    CIA.BasePtrRD = baseaddress;
+    cRSID_initCIAchip(C64, CIA);
+}
+/** cRSID_initCIAchip (CIA.c:16-20). */
+export function cRSID_initCIAchip(C64, CIA) {
+    for (let i = 0; i < 0x10; ++i) {
+        C64.IObankWR[CIA.BasePtrWR + i] = 0x00;
+        C64.IObankRD[CIA.BasePtrRD + i] = 0x00;
+    }
+}
+// enum CIAregisters (CIA.c:25-29)
+const PORTA = 0, PORTB = 1, DDRA = 2, DDRB = 3;
+const TIMERAL = 4, TIMERAH = 5, TIMERBL = 6, TIMERBH = 7; // Write:Set Timer-latch, Read: read Timer
+const TOD_TENTHSECONDS = 8, TOD_SECONDS = 9, TOD_MINUTES = 0xa, TOD_HOURS = 0xb;
+const SERIAL_DATA = 0xc, INTERRUPTS = 0xd, CONTROLA = 0xe, CONTROLB = 0xf;
+void PORTA;
+void PORTB;
+void DDRA;
+void DDRB;
+void TOD_TENTHSECONDS;
+void TOD_SECONDS;
+void TOD_MINUTES;
+void TOD_HOURS;
+void SERIAL_DATA;
+// enum InterruptBitVal (CIA.c:31-33)
+const INTERRUPT_HAPPENED = 0x80, SET_OR_CLEAR_FLAGS = 0x80; // (Read or Write operation determines which one:)
+const FLAGn = 0x10, SERIALPORT = 0x08, ALARM = 0x04, TIMERB = 0x02, TIMERA = 0x01; // flags/masks of interrupt-sources
+void SET_OR_CLEAR_FLAGS;
+void FLAGn;
+void SERIALPORT;
+void ALARM;
+// enum ControlAbitVal (CIA.c:35-39)
+const ENABLE_TIMERA = 0x01, PORTB6_TIMERA = 0x02, TOGGLED_PORTB6 = 0x04, ONESHOT_TIMERA = 0x08;
+const FORCELOADA_STROBE = 0x10, TIMERA_FROM_CNT = 0x20, SERIALPORT_IS_OUTPUT = 0x40, TIMEOFDAY_50Hz = 0x80;
+void PORTB6_TIMERA;
+void TOGGLED_PORTB6;
+void TIMERA_FROM_CNT;
+void SERIALPORT_IS_OUTPUT;
+void TIMEOFDAY_50Hz;
+// enum ControlBbitVal (CIA.c:41-46)
+const ENABLE_TIMERB = 0x01, PORTB7_TIMERB = 0x02, TOGGLED_PORTB7 = 0x04, ONESHOT_TIMERB = 0x08;
+const FORCELOADB_STROBE = 0x10 /*, TIMERB_FROM_CPUCLK = 0x00*/, TIMERB_FROM_CNT = 0x20, TIMERB_FROM_TIMERA = 0x40;
+const TIMERB_FROM_TIMERA_AND_CNT = 0x60, TIMEOFDAY_WRITE_SETS_ALARM = 0x80;
+void PORTB7_TIMERB;
+void TOGGLED_PORTB7;
+void TIMERB_FROM_CNT;
+void TIMERB_FROM_TIMERA_AND_CNT;
+void TIMEOFDAY_WRITE_SETS_ALARM;
+/** cRSID_emulateCIA (CIA.c:48-119) — returns INTERRUPT_HAPPENED (char in C). */
+export function cRSID_emulateCIA(C64, CIA, cycles) {
+    const wr = CIA.BasePtrWR;
+    const rd = CIA.BasePtrRD;
+    const W = C64.IObankWR;
+    const R = C64.IObankRD;
+    let Tmp;
+    // TimerA
+    if (W[wr + CONTROLA] & FORCELOADA_STROBE) {
+        // force latch into counter (strobe-input)
+        R[rd + TIMERAH] = W[wr + TIMERAH];
+        R[rd + TIMERAL] = W[wr + TIMERAL];
+    }
+    else if ((W[wr + CONTROLA] & (ENABLE_TIMERA | TIMERA_FROM_CNT)) === ENABLE_TIMERA) {
+        // Enabled, counts Phi2
+        Tmp = ((R[rd + TIMERAH] << 8) + R[rd + TIMERAL]) - cycles; // count timer
+        if (Tmp < 0) {
+            // Timer counted down
+            Tmp += (W[wr + TIMERAH] << 8) + W[wr + TIMERAL] + 1; // reload timer (no '+1' causes 50Hz noise in Vortex.sid and similar)
+            if (W[wr + CONTROLA] & ONESHOT_TIMERA)
+                W[wr + CONTROLA] &= ~ENABLE_TIMERA; // disable if one-shot
+            R[rd + INTERRUPTS] |= TIMERA;
+            if (W[wr + INTERRUPTS] & TIMERA) {
+                // generate interrupt if mask allows
+                R[rd + INTERRUPTS] |= INTERRUPT_HAPPENED;
+            }
+        }
+        R[rd + TIMERAH] = Tmp >>> 8;
+        R[rd + TIMERAL] = Tmp & 0xff;
+    }
+    W[wr + CONTROLA] &= ~FORCELOADA_STROBE; // strobe is edge-sensitive
+    R[rd + CONTROLA] = W[wr + CONTROLA]; // control-registers are readable
+    // TimerB
+    if (W[wr + CONTROLB] & FORCELOADB_STROBE) {
+        // force latch into counter (strobe-input)
+        R[rd + TIMERBH] = W[wr + TIMERBH];
+        R[rd + TIMERBL] = W[wr + TIMERBL];
+    } // what about clocking TimerB by TimerA? (maybe not used in any music)
+    else if ((W[wr + CONTROLB] & (ENABLE_TIMERB | TIMERB_FROM_TIMERA)) === ENABLE_TIMERB) {
+        // Enabled, counts Phi2
+        Tmp = ((R[rd + TIMERBH] << 8) + R[rd + TIMERBL]) - cycles; // count timer
+        if (Tmp < 0) {
+            // Timer counted down
+            Tmp += (W[wr + TIMERBH] << 8) + W[wr + TIMERBL] + 1; // reload timer (no '+1' causes 50Hz noise in Vortex.sid and similar)
+            if (W[wr + CONTROLB] & ONESHOT_TIMERB)
+                W[wr + CONTROLB] &= ~ENABLE_TIMERB; // disable if one-shot
+            R[rd + INTERRUPTS] |= TIMERB;
+            if (W[wr + INTERRUPTS] & TIMERB) {
+                // generate interrupt if mask allows
+                R[rd + INTERRUPTS] |= INTERRUPT_HAPPENED;
+            }
+        }
+        R[rd + TIMERBH] = Tmp >>> 8;
+        R[rd + TIMERBL] = Tmp & 0xff;
+    }
+    W[wr + CONTROLB] &= ~FORCELOADB_STROBE; // strobe is edge-sensitive
+    R[rd + CONTROLB] = W[wr + CONTROLB]; // control-registers are readable
+    return R[rd + INTERRUPTS] & INTERRUPT_HAPPENED;
+}
+/** cRSID_writeCIAlatchAhi (CIA.c:121-127). */
+export function cRSID_writeCIAlatchAhi(C64, CIA, value) {
+    void value;
+    const wr = CIA.BasePtrWR;
+    const rd = CIA.BasePtrRD;
+    const W = C64.IObankWR;
+    const R = C64.IObankRD;
+    if (!(W[wr + CONTROLA] & ENABLE_TIMERA)) {
+        R[rd + TIMERAH] = W[wr + TIMERAH];
+        R[rd + TIMERAL] = W[wr + TIMERAL];
+    }
+}
+/** cRSID_writeCIAlatchBhi (CIA.c:129-135). */
+export function cRSID_writeCIAlatchBhi(C64, CIA, value) {
+    void value;
+    const wr = CIA.BasePtrWR;
+    const rd = CIA.BasePtrRD;
+    const W = C64.IObankWR;
+    const R = C64.IObankRD;
+    if (!(W[wr + CONTROLB] & ENABLE_TIMERB)) {
+        R[rd + TIMERBH] = W[wr + TIMERBH];
+        R[rd + TIMERBL] = W[wr + TIMERBL];
+    }
+}
+/** cRSID_writeCIAIRQmask (CIA.c:137-141). */
+export function cRSID_writeCIAIRQmask(C64, CIA, value) {
+    const wr = CIA.BasePtrWR;
+    if (value & 0x80)
+        C64.IObankWR[wr + INTERRUPTS] |= value & 0x1f;
+    else
+        C64.IObankWR[wr + INTERRUPTS] &= ~(value & 0x1f);
+}
+/** cRSID_acknowledgeCIAIRQ (CIA.c:143-147) — reading a CIA interrupt-register
+ *  clears its read-part and IRQ-flag. */
+export function cRSID_acknowledgeCIAIRQ(C64, CIA) {
+    C64.IObankRD[CIA.BasePtrRD + INTERRUPTS] = 0x00;
+}
+export { createCIAinstance };
+//# sourceMappingURL=cia.js.map

package/dist/cia.js.map

@@ -0,0 +1 @@
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package/dist/combiwaves.d.ts

@@ -0,0 +1,9 @@
+/** cRSID_SawTriangle (C: static const unsigned char, 4096 entries). */
+export declare const CRSID_SawTriangle: Uint8Array<ArrayBuffer>;
+/** cRSID_PulseTriangle (C: static const unsigned char, 4096 entries). */
+export declare const CRSID_PulseTriangle: Uint8Array<ArrayBuffer>;
+/** cRSID_PulseSawtooth (C: static const unsigned char, 4096 entries). */
+export declare const CRSID_PulseSawtooth: Uint8Array<ArrayBuffer>;
+/** cRSID_PulseSawTriangle (C: static const unsigned char, 4096 entries). */
+export declare const CRSID_PulseSawTriangle: Uint8Array<ArrayBuffer>;
+//# sourceMappingURL=combiwaves.d.ts.map

package/dist/combiwaves.d.ts.map

@@ -0,0 +1 @@
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