@microbit/microbit-connection 0.9.0-apps.alpha.15 → 0.9.0-apps.alpha.17

package/build/cjs/usb/connection.js.map

@@ -0,0 +1 @@
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package/build/cjs/usb/connection.test.d.ts

@@ -0,0 +1 @@
+export {};

package/build/cjs/usb/connection.test.js

@@ -0,0 +1,266 @@
+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+/**
+ * (c) 2021, Micro:bit Educational Foundation and contributors
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * @jest-environment node
+ *
+ * Without node environment USB code fails with a buffer type check.
+ * It might be we could create a custom environment that was web but
+ * with a tweak to Buffer.
+ */
+const device_js_1 = require("../device.js");
+const connection_js_1 = require("./connection.js");
+const vitest_1 = require("vitest");
+vitest_1.vi.mock("./device-wrapper.js", () => ({
+    USBDeviceWrapper: class USBDeviceWrapper {
+        constructor() {
+            Object.defineProperty(this, "serial", {
+                enumerable: true,
+                configurable: true,
+                writable: true,
+                value: {
+                    getBaudrate: vitest_1.vi.fn().mockResolvedValue(115200),
+                    setBaudrate: vitest_1.vi.fn().mockResolvedValue(undefined),
+                    startPolling: vitest_1.vi.fn().mockResolvedValue(undefined),
+                    stopPolling: vitest_1.vi.fn(),
+                    drain: vitest_1.vi.fn().mockResolvedValue(undefined),
+                }
+            });
+            Object.defineProperty(this, "reconnect", {
+                enumerable: true,
+                configurable: true,
+                writable: true,
+                value: vitest_1.vi.fn().mockResolvedValue({
+                    boardSerialInfo: {
+                        id: { toBoardVersion: () => "V2", toString: () => "9900" },
+                        familyId: "99",
+                        hic: "00",
+                        eq: () => true,
+                    },
+                    deviceId: 1,
+                    pageSize: 1024,
+                    numPages: 256,
+                })
+            });
+            Object.defineProperty(this, "disconnect", {
+                enumerable: true,
+                configurable: true,
+                writable: true,
+                value: vitest_1.vi.fn().mockResolvedValue(undefined)
+            });
+        }
+    },
+}));
+const describeDeviceOnly = process.env.TEST_MODE_DEVICE
+    ? vitest_1.describe
+    : vitest_1.describe.skip;
+(0, vitest_1.describe)("MicrobitUSBConnection (WebUSB unsupported)", () => {
+    (0, vitest_1.it)("checkAvailability returns unsupported when WebUSB isn't available", async () => {
+        vitest_1.vi.stubGlobal("navigator", {});
+        const microbit = (0, connection_js_1.createUSBConnection)();
+        (0, vitest_1.expect)(await microbit.checkAvailability()).toBe("unsupported");
+        vitest_1.vi.unstubAllGlobals();
+    });
+    (0, vitest_1.it)("still triggers afterrequestdevice if requestDevice throws", async () => {
+        vitest_1.vi.stubGlobal("navigator", {
+            usb: {
+                requestDevice: () => {
+                    throw new Error();
+                },
+            },
+        });
+        const microbit = (0, connection_js_1.createUSBConnection)();
+        (0, vitest_1.expect)(microbit.status).toBe(device_js_1.ConnectionStatus.NoAuthorizedDevice);
+        const afterRequestDevice = vitest_1.vi.fn();
+        microbit.addEventListener("afterrequestdevice", afterRequestDevice);
+        await (0, vitest_1.expect)(() => microbit.connect()).rejects.toThrow();
+        (0, vitest_1.expect)(afterRequestDevice.mock.calls.length).toEqual(1);
+        vitest_1.vi.unstubAllGlobals();
+    });
+});
+describeDeviceOnly("MicrobitUSBConnection (WebUSB supported)", () => {
+    (0, vitest_1.beforeAll)(() => {
+        const usb = {
+            addEventListener: vitest_1.vi.fn(),
+            removeEventListener: vitest_1.vi.fn(),
+            requestDevice() {
+                const device = {};
+                return device;
+            },
+        };
+        // Maybe we can move this to a custom jest environment?
+        vitest_1.vi.stubGlobal("navigator", {
+            usb,
+        });
+    });
+    (0, vitest_1.it)("shows no device as initial status", () => {
+        const microbit = (0, connection_js_1.createUSBConnection)();
+        (0, vitest_1.expect)(microbit.status).toBe(device_js_1.ConnectionStatus.NoAuthorizedDevice);
+    });
+    (0, vitest_1.it)("connects and disconnects updating status and events", async () => {
+        const events = [];
+        const connection = (0, connection_js_1.createUSBConnection)();
+        connection.addEventListener("status", (event) => {
+            events.push(event.status);
+        });
+        await connection.connect();
+        (0, vitest_1.expect)(connection.status).toEqual(device_js_1.ConnectionStatus.Connected);
+        (0, vitest_1.expect)(events).toEqual([device_js_1.ConnectionStatus.Connected]);
+        // without this it breaks! something is up!
+        await new Promise((resolve) => setTimeout(resolve, 100));
+        await connection.disconnect();
+        connection.dispose();
+        (0, vitest_1.expect)(connection.status).toEqual(device_js_1.ConnectionStatus.Disconnected);
+        (0, vitest_1.expect)(events).toEqual([
+            device_js_1.ConnectionStatus.Connected,
+            device_js_1.ConnectionStatus.Disconnected,
+        ]);
+    });
+});
+const mockDevice = (config) => ({
+    vendorId: config?.vendorId || 0x2341,
+    productId: config?.productId || 0x0043,
+    serialNumber: config?.serialNumber || "MOCK123456",
+    configuration: {
+        interfaces: config?.interfaces || [
+            {
+                alternates: [
+                    {
+                        alternateSetting: 0,
+                        interfaceClass: config?.interfaceClass || 2,
+                        interfaceSubclass: config?.interfaceSubclass || 2,
+                        interfaceProtocol: config?.interfaceProtocol || 0,
+                    },
+                ],
+            },
+        ],
+    },
+});
+const filter = {
+    classCode: 123,
+    productId: 456,
+    protocolCode: 789,
+    serialNumber: "012",
+    subclassCode: 345,
+    vendorId: 690,
+};
+(0, vitest_1.describe)("Tab visibility and PAUSED state", () => {
+    let visibilityState = "visible";
+    let visibilityListeners = [];
+    (0, vitest_1.beforeAll)(() => {
+        vitest_1.vi.stubGlobal("navigator", {
+            usb: {
+                addEventListener: vitest_1.vi.fn(),
+                removeEventListener: vitest_1.vi.fn(),
+                requestDevice: () => ({}),
+            },
+        });
+        vitest_1.vi.stubGlobal("document", {
+            get visibilityState() {
+                return visibilityState;
+            },
+            addEventListener: (_, listener) => {
+                visibilityListeners.push(listener);
+            },
+            removeEventListener: vitest_1.vi.fn(),
+        });
+        vitest_1.vi.stubGlobal("window", {
+            document,
+            addEventListener: vitest_1.vi.fn(),
+            removeEventListener: vitest_1.vi.fn(),
+        });
+    });
+    (0, vitest_1.beforeEach)(() => {
+        visibilityState = "visible";
+        visibilityListeners = [];
+    });
+    const waitForStatus = (connection, status) => new Promise((resolve) => {
+        if (connection.status === status) {
+            resolve();
+            return;
+        }
+        const listener = (event) => {
+            if (event.status === status) {
+                connection.removeEventListener("status", listener);
+                resolve();
+            }
+        };
+        connection.addEventListener("status", listener);
+    });
+    (0, vitest_1.it)("pauses when tab becomes hidden while connected", async () => {
+        const connection = (0, connection_js_1.createUSBConnection)();
+        await connection.initialize();
+        await connection.connect();
+        (0, vitest_1.expect)(connection.status).toBe(device_js_1.ConnectionStatus.Connected);
+        visibilityState = "hidden";
+        visibilityListeners.forEach((l) => l());
+        await waitForStatus(connection, device_js_1.ConnectionStatus.Paused);
+        (0, vitest_1.expect)(connection.status).toBe(device_js_1.ConnectionStatus.Paused);
+    });
+    (0, vitest_1.it)("reconnects when tab becomes visible while paused", async () => {
+        const connection = (0, connection_js_1.createUSBConnection)();
+        await connection.initialize();
+        await connection.connect();
+        visibilityState = "hidden";
+        visibilityListeners.forEach((l) => l());
+        await waitForStatus(connection, device_js_1.ConnectionStatus.Paused);
+        visibilityState = "visible";
+        visibilityListeners.forEach((l) => l());
+        await waitForStatus(connection, device_js_1.ConnectionStatus.Connected);
+        (0, vitest_1.expect)(connection.status).toBe(device_js_1.ConnectionStatus.Connected);
+    });
+});
+(0, vitest_1.describe)("applyDevicesFilter", () => {
+    (0, vitest_1.it)("has no filter", () => {
+        const device = mockDevice();
+        (0, vitest_1.expect)((0, connection_js_1.applyDeviceFilters)(device, [], [])).toEqual(true);
+    });
+    (0, vitest_1.it)("satisfies filter", () => {
+        const device = mockDevice({
+            interfaceClass: filter.classCode,
+            productId: filter.productId,
+            interfaceProtocol: filter.protocolCode,
+            serialNumber: filter.serialNumber,
+            interfaceSubclass: filter.subclassCode,
+            vendorId: filter.vendorId,
+        });
+        (0, vitest_1.expect)((0, connection_js_1.applyDeviceFilters)(device, [filter], [])).toEqual(true);
+    });
+    (0, vitest_1.it)("does not satisfies filter", () => {
+        const device = mockDevice({
+            interfaceClass: filter.classCode,
+            productId: filter.productId,
+            interfaceProtocol: filter.protocolCode,
+            serialNumber: "something else",
+            interfaceSubclass: filter.subclassCode,
+            vendorId: filter.vendorId,
+        });
+        (0, vitest_1.expect)((0, connection_js_1.applyDeviceFilters)(device, [filter], [])).toEqual(false);
+    });
+    (0, vitest_1.it)("satisfies exclusion filter", () => {
+        const device = mockDevice({
+            interfaceClass: filter.classCode,
+            productId: filter.productId,
+            interfaceProtocol: filter.protocolCode,
+            serialNumber: filter.serialNumber,
+            interfaceSubclass: filter.subclassCode,
+            vendorId: filter.vendorId,
+        });
+        (0, vitest_1.expect)((0, connection_js_1.applyDeviceFilters)(device, [], [filter])).toEqual(false);
+    });
+    (0, vitest_1.it)("satifies filter and does not satisfy exclusion filter", () => {
+        const device = mockDevice({
+            interfaceClass: filter.classCode,
+            productId: filter.productId,
+            interfaceProtocol: filter.protocolCode,
+            serialNumber: filter.serialNumber,
+            interfaceSubclass: filter.subclassCode,
+            vendorId: filter.vendorId,
+        });
+        (0, vitest_1.expect)((0, connection_js_1.applyDeviceFilters)(device, [filter], [{ ...filter, serialNumber: "not satisfied" }])).toEqual(true);
+    });
+});
+//# sourceMappingURL=connection.test.js.map

package/build/cjs/usb/connection.test.js.map

@@ -0,0 +1 @@
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package/build/cjs/usb/cortex-m.d.ts

@@ -0,0 +1,72 @@
+/**
+ * (c) 2026, Micro:bit Educational Foundation and contributors
+ *
+ * Derived from dapjs (https://github.com/ARMmbed/dapjs) which is
+ * Copyright (c) Arm Limited 2018
+ * Copyright (c) Microsoft Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * See arm-debug.ts for the full dapjs license.
+ *
+ * Cortex-M processor control via the ARM Debug Interface.
+ *
+ * CortexM provides high-level operations for controlling an ARM Cortex-M
+ * core over SWD: halting, resuming, reading/writing core registers,
+ * executing code from RAM, and performing software resets.
+ *
+ * It communicates entirely through ArmDebug memory-mapped register
+ * access — the Cortex-M debug registers (DHCSR, DCRSR, DCRDR, etc.) are
+ * memory-mapped in the Private Peripheral Bus region starting at 0xE000_0000.
+ */
+import { type ArmDebug } from "./arm-debug.js";
+export declare const DFSR = 3758157104;
+export declare const DHCSR = 3758157296;
+export declare const DCRSR = 3758157300;
+export declare const DCRDR = 3758157304;
+export declare const C_DEBUGEN: number;
+export declare const C_HALT: number;
+export declare const S_REGRDY: number;
+export declare const S_HALT: number;
+export declare const DBGKEY: number;
+export declare const DFSR_HALTED: number;
+export declare const DFSR_BKPT: number;
+export declare const DFSR_DWTTRAP: number;
+export declare const REGWnR: number;
+export declare const DEMCR = 3758157308;
+export declare const DEMCR_VC_CORERESET: number;
+export declare const NVIC_AIRCR = 3758157068;
+export declare const NVIC_AIRCR_VECTKEY: number;
+export declare const NVIC_AIRCR_SYSRESETREQ: number;
+export declare const S_RESET_ST: number;
+export declare const CoreRegister: {
+    readonly SP: 13;
+    readonly LR: 14;
+    readonly PC: 15;
+    readonly PSR: 16;
+};
+export declare class CortexM {
+    private adi;
+    constructor(adi: ArmDebug);
+    private enableDebug;
+    isHalted(): Promise<boolean>;
+    halt(wait?: boolean, timeout?: number): Promise<void>;
+    resume(wait?: boolean, timeout?: number): Promise<void>;
+    readCoreRegister(register: number): Promise<number>;
+    writeCoreRegister(register: number, value: number): Promise<void>;
+    waitForHalt(timeout?: number): Promise<void>;
+    /**
+     * Upload code to target RAM, set up registers, resume execution,
+     * and wait for the core to halt (typically on a BKPT instruction).
+     */
+    execute(address: number, code: Uint32Array, sp: number, pc: number, lr: number, ...registers: number[]): Promise<void>;
+    /**
+     * Software reset by writing to NVIC_AIRCR.
+     * Waits for the system to come out of reset.
+     */
+    softwareReset(): Promise<void>;
+    /**
+     * Reset the target, optionally halting the core on reset.
+     */
+    reset(halt?: boolean): Promise<void>;
+}

package/build/cjs/usb/cortex-m.js

@@ -0,0 +1,165 @@
+"use strict";
+/**
+ * (c) 2026, Micro:bit Educational Foundation and contributors
+ *
+ * Derived from dapjs (https://github.com/ARMmbed/dapjs) which is
+ * Copyright (c) Arm Limited 2018
+ * Copyright (c) Microsoft Corporation
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * See arm-debug.ts for the full dapjs license.
+ *
+ * Cortex-M processor control via the ARM Debug Interface.
+ *
+ * CortexM provides high-level operations for controlling an ARM Cortex-M
+ * core over SWD: halting, resuming, reading/writing core registers,
+ * executing code from RAM, and performing software resets.
+ *
+ * It communicates entirely through ArmDebug memory-mapped register
+ * access — the Cortex-M debug registers (DHCSR, DCRSR, DCRDR, etc.) are
+ * memory-mapped in the Private Peripheral Bus region starting at 0xE000_0000.
+ */
+Object.defineProperty(exports, "__esModule", { value: true });
+exports.CortexM = exports.CoreRegister = exports.S_RESET_ST = exports.NVIC_AIRCR_SYSRESETREQ = exports.NVIC_AIRCR_VECTKEY = exports.NVIC_AIRCR = exports.DEMCR_VC_CORERESET = exports.DEMCR = exports.REGWnR = exports.DFSR_DWTTRAP = exports.DFSR_BKPT = exports.DFSR_HALTED = exports.DBGKEY = exports.S_HALT = exports.S_REGRDY = exports.C_HALT = exports.C_DEBUGEN = exports.DCRDR = exports.DCRSR = exports.DHCSR = exports.DFSR = void 0;
+const arm_debug_js_1 = require("./arm-debug.js");
+const cmsis_dap_js_1 = require("./cmsis-dap.js");
+// ---------------------------------------------------------------------------
+// Constants
+// ---------------------------------------------------------------------------
+// Debug registers
+exports.DFSR = 0xe000ed30;
+exports.DHCSR = 0xe000edf0;
+exports.DCRSR = 0xe000edf4;
+exports.DCRDR = 0xe000edf8;
+// DHCSR bits
+exports.C_DEBUGEN = 1 << 0;
+exports.C_HALT = 1 << 1;
+exports.S_REGRDY = 1 << 16;
+exports.S_HALT = 1 << 17;
+exports.DBGKEY = 0xa05f << 16;
+// DFSR bits
+exports.DFSR_HALTED = 1 << 0;
+exports.DFSR_BKPT = 1 << 1;
+exports.DFSR_DWTTRAP = 1 << 2;
+// DCRSR bits
+exports.REGWnR = 1 << 16;
+// Debug registers — Cortex-M system control
+exports.DEMCR = 0xe000edfc;
+exports.DEMCR_VC_CORERESET = 1 << 0;
+exports.NVIC_AIRCR = 0xe000ed0c;
+exports.NVIC_AIRCR_VECTKEY = 0x5fa << 16;
+exports.NVIC_AIRCR_SYSRESETREQ = 1 << 2;
+exports.S_RESET_ST = 1 << 25;
+// ---------------------------------------------------------------------------
+// CortexM
+// ---------------------------------------------------------------------------
+// Cortex-M core register indices used with readCoreRegister/writeCoreRegister.
+exports.CoreRegister = { SP: 13, LR: 14, PC: 15, PSR: 16 };
+class CortexM {
+    constructor(adi) {
+        Object.defineProperty(this, "adi", {
+            enumerable: true,
+            configurable: true,
+            writable: true,
+            value: adi
+        });
+    }
+    enableDebug() {
+        return this.adi.writeMem32(exports.DHCSR, exports.DBGKEY | exports.C_DEBUGEN);
+    }
+    async isHalted() {
+        const dhcsr = await this.adi.readMem32(exports.DHCSR);
+        return !!(dhcsr & exports.S_HALT);
+    }
+    async halt(wait = true, timeout = 0) {
+        if (await this.isHalted())
+            return;
+        await this.adi.writeMem32(exports.DHCSR, exports.DBGKEY | exports.C_DEBUGEN | exports.C_HALT);
+        if (wait) {
+            await (0, arm_debug_js_1.waitFor)(() => this.isHalted(), timeout);
+        }
+    }
+    async resume(wait = true, timeout = 0) {
+        if (!(await this.isHalted()))
+            return;
+        await this.adi.writeMem32(exports.DFSR, exports.DFSR_DWTTRAP | exports.DFSR_BKPT | exports.DFSR_HALTED);
+        await this.enableDebug();
+        if (wait) {
+            await (0, arm_debug_js_1.waitFor)(async () => !(await this.isHalted()), timeout);
+        }
+    }
+    async readCoreRegister(register) {
+        const results = await this.adi.transferSequence([
+            this.adi.writeMem32Ops(exports.DCRSR, register),
+            this.adi.readMem32Ops(exports.DHCSR),
+            this.adi.readMem32Ops(exports.DCRDR),
+        ]);
+        if (!(results[0] & exports.S_REGRDY)) {
+            throw new cmsis_dap_js_1.DapError("Register not ready");
+        }
+        return results[1];
+    }
+    async writeCoreRegister(register, value) {
+        const results = await this.adi.transferSequence([
+            this.adi.writeMem32Ops(exports.DCRDR, value),
+            this.adi.writeMem32Ops(exports.DCRSR, register | exports.REGWnR),
+            this.adi.readMem32Ops(exports.DHCSR),
+        ]);
+        if (!(results[0] & exports.S_REGRDY)) {
+            throw new cmsis_dap_js_1.DapError("Register not ready");
+        }
+    }
+    async waitForHalt(timeout = 10_000) {
+        await (0, arm_debug_js_1.waitFor)(() => this.isHalted(), timeout);
+    }
+    /**
+     * Upload code to target RAM, set up registers, resume execution,
+     * and wait for the core to halt (typically on a BKPT instruction).
+     */
+    async execute(address, code, sp, pc, lr, ...registers) {
+        if (registers.length > 12) {
+            throw new cmsis_dap_js_1.DapError(`Only 12 general purpose registers but got ${registers.length} values`);
+        }
+        await this.halt(true);
+        await this.adi.writeBlock(address, code);
+        await this.writeCoreRegister(exports.CoreRegister.PC, pc);
+        await this.writeCoreRegister(exports.CoreRegister.LR, lr);
+        await this.writeCoreRegister(exports.CoreRegister.SP, sp);
+        await this.writeCoreRegister(exports.CoreRegister.PSR, 0x01000000);
+        for (let i = 0; i < registers.length; i++) {
+            await this.writeCoreRegister(i, registers[i]);
+        }
+        await this.resume(false);
+        await this.waitForHalt();
+    }
+    /**
+     * Software reset by writing to NVIC_AIRCR.
+     * Waits for the system to come out of reset.
+     */
+    async softwareReset() {
+        await this.adi.writeMem32(exports.NVIC_AIRCR, exports.NVIC_AIRCR_VECTKEY | exports.NVIC_AIRCR_SYSRESETREQ);
+        await (0, arm_debug_js_1.waitFor)(async () => {
+            const dhcsr = await this.adi.readMem32(exports.DHCSR);
+            return (dhcsr & exports.S_RESET_ST) === 0;
+        }, 5000);
+    }
+    /**
+     * Reset the target, optionally halting the core on reset.
+     */
+    async reset(halt = false) {
+        if (halt) {
+            await this.halt(true);
+            const demcr = await this.adi.readMem32(exports.DEMCR);
+            await this.adi.writeMem32(exports.DEMCR, demcr | exports.DEMCR_VC_CORERESET);
+            await this.softwareReset();
+            await (0, arm_debug_js_1.waitFor)(() => this.isHalted());
+            await this.adi.writeMem32(exports.DEMCR, demcr);
+        }
+        else {
+            await this.softwareReset();
+        }
+    }
+}
+exports.CortexM = CortexM;
+//# sourceMappingURL=cortex-m.js.map

package/build/cjs/usb/cortex-m.js.map

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package/build/cjs/usb/cortex-m.test.d.ts

@@ -0,0 +1 @@
+export {};