@jhlagado/azm 0.1.0

package/dist/src/lowering/asmInstructionLdHelpers.js

@@ -0,0 +1,102 @@
+import { isConstantLayoutCastEa } from '../semantics/layoutCastFold.js';
+export function createAsmInstructionLdHelpers(ctx) {
+    const isUnresolvedLayoutLdOperand = (op) => {
+        if (op.kind === 'Ea') {
+            if (isConstantLayoutCastEa(op.expr))
+                return false;
+            return true;
+        }
+        return false;
+    };
+    const resolveRawLabelName = (name) => ctx.resolveRawAliasTargetName(name) ?? name;
+    const emitAbs16LdFixup = (dst, src, span) => {
+        const dstName = dst.kind === 'Reg' ? dst.name.toUpperCase() : undefined;
+        const srcName = src.kind === 'Reg' ? src.name.toUpperCase() : undefined;
+        const memExpr = dst.kind === 'Mem' ? dst.expr : src.kind === 'Mem' ? src.expr : undefined;
+        if (!memExpr || memExpr.kind !== 'EaName')
+            return false;
+        // Register-indirect `(hl)`, `(bc)`, `(de)`, `(ix)`, `(iy)` use `EaName`; these are not
+        // the absolute-address `ld r/(nn)` forms handled below (see `isRegisterLikeMemEa`).
+        // Labels that spell HL/BC/DE/IX/IY cannot use `(name)` for absolute memory here; `(hl)` is always HL indirect.
+        if (ctx.reg16.has(memExpr.name.toUpperCase()))
+            return false;
+        const baseLower = resolveRawLabelName(memExpr.name).toLowerCase();
+        if (dst.kind === 'Reg' && src.kind === 'Mem') {
+            if (dstName === 'A') {
+                ctx.emitAbs16Fixup(0x3a, baseLower, 0, span);
+                return true;
+            }
+            if (dstName === 'HL') {
+                ctx.emitAbs16Fixup(0x2a, baseLower, 0, span);
+                return true;
+            }
+            if (dstName === 'BC') {
+                ctx.emitAbs16FixupPrefixed(0xed, 0x4b, baseLower, 0, span);
+                return true;
+            }
+            if (dstName === 'DE') {
+                ctx.emitAbs16FixupPrefixed(0xed, 0x5b, baseLower, 0, span);
+                return true;
+            }
+            if (dstName === 'SP') {
+                ctx.emitAbs16FixupPrefixed(0xed, 0x7b, baseLower, 0, span);
+                return true;
+            }
+            if (dstName === 'IX') {
+                ctx.emitAbs16FixupPrefixed(0xdd, 0x2a, baseLower, 0, span);
+                return true;
+            }
+            if (dstName === 'IY') {
+                ctx.emitAbs16FixupPrefixed(0xfd, 0x2a, baseLower, 0, span);
+                return true;
+            }
+        }
+        if (dst.kind === 'Mem' && src.kind === 'Reg') {
+            if (srcName === 'A') {
+                ctx.emitAbs16Fixup(0x32, baseLower, 0, span);
+                return true;
+            }
+            if (srcName === 'HL') {
+                ctx.emitAbs16Fixup(0x22, baseLower, 0, span);
+                return true;
+            }
+            if (srcName === 'BC') {
+                ctx.emitAbs16FixupPrefixed(0xed, 0x43, baseLower, 0, span);
+                return true;
+            }
+            if (srcName === 'DE') {
+                ctx.emitAbs16FixupPrefixed(0xed, 0x53, baseLower, 0, span);
+                return true;
+            }
+            if (srcName === 'SP') {
+                ctx.emitAbs16FixupPrefixed(0xed, 0x73, baseLower, 0, span);
+                return true;
+            }
+            if (srcName === 'IX') {
+                ctx.emitAbs16FixupPrefixed(0xdd, 0x22, baseLower, 0, span);
+                return true;
+            }
+            if (srcName === 'IY') {
+                ctx.emitAbs16FixupPrefixed(0xfd, 0x22, baseLower, 0, span);
+                return true;
+            }
+        }
+        return false;
+    };
+    const isRegisterLikeMemEa = (ea) => {
+        if (ea.kind === 'EaName') {
+            return ctx.reg16.has(ea.name.toUpperCase());
+        }
+        if ((ea.kind === 'EaAdd' || ea.kind === 'EaSub') && ea.base.kind === 'EaName') {
+            const base = ea.base.name.toUpperCase();
+            return base === 'IX' || base === 'IY';
+        }
+        return false;
+    };
+    return {
+        isUnresolvedLayoutLdOperand,
+        resolveRawLabelName,
+        emitAbs16LdFixup,
+        isRegisterLikeMemEa,
+    };
+}

package/dist/src/lowering/asmInstructionLowering.d.ts

@@ -0,0 +1,5 @@
+import type { AsmInstructionNode } from '../frontend/ast.js';
+import type { AsmLoweringHost } from './asmLoweringHost.js';
+export declare function createAsmInstructionLoweringHelpers(host: AsmLoweringHost): {
+    lowerAsmInstructionDispatcher: (asmItem: AsmInstructionNode) => void;
+};

package/dist/src/lowering/asmInstructionLowering.js

@@ -0,0 +1,54 @@
+import { createAsmInstructionLdHelpers } from './asmInstructionLdHelpers.js';
+import { tryLowerBranchCallInstruction } from './asmLoweringBranchCall.js';
+import { tryLowerLdInstruction } from './asmLoweringLd.js';
+export function createAsmInstructionLoweringHelpers(host) {
+    const { isUnresolvedLayoutLdOperand, resolveRawLabelName, emitAbs16LdFixup, isRegisterLikeMemEa, } = createAsmInstructionLdHelpers(host);
+    const lowerAsmInstructionDispatcher = (asmItem) => {
+        const branchResult = tryLowerBranchCallInstruction(asmItem, host);
+        if (branchResult !== undefined) {
+            if (!branchResult)
+                return;
+            return;
+        }
+        const ldResult = tryLowerLdInstruction(asmItem, {
+            diagnostics: host.diagnostics,
+            diagAt: host.diagAt,
+            emitAbs16Fixup: host.emitAbs16Fixup,
+            emitAbs16FixupPrefixed: host.emitAbs16FixupPrefixed,
+            evalImmExpr: host.evalImmExpr,
+            symbolicTargetFromExpr: host.symbolicTargetFromExpr,
+            resolveEa: host.resolveEa,
+            lowerLdWithEa: host.lowerLdWithEa,
+            emitAbs16LdFixup,
+            isUnresolvedLayoutLdOperand,
+            resolveRawLabelName,
+            isRegisterLikeMemEa,
+            syncToFlow: host.syncToFlow,
+        });
+        if (ldResult !== undefined) {
+            if (!ldResult)
+                return;
+            return;
+        }
+        const head = asmItem.head.toLowerCase();
+        if (head !== 'ld' && host.lowerLdWithEa(asmItem)) {
+            host.syncToFlow();
+            return;
+        }
+        if (host.emitVirtualReg16Transfer(asmItem)) {
+            host.syncToFlow();
+            return;
+        }
+        if (!host.emitInstr(asmItem.head, asmItem.operands, asmItem.span))
+            return;
+        if ((head === 'jp' || head === 'jr') && asmItem.operands.length === 1) {
+            host.flowRef.current.reachable = false;
+        }
+        else if ((head === 'ret' || head === 'retn' || head === 'reti') &&
+            asmItem.operands.length === 0) {
+            host.flowRef.current.reachable = false;
+        }
+        host.syncToFlow();
+    };
+    return { lowerAsmInstructionDispatcher };
+}

package/dist/src/lowering/asmInstructionStream.d.ts

@@ -0,0 +1,46 @@
+import { DiagnosticIds } from '../diagnosticTypes.js';
+import type { Diagnostic } from '../diagnosticTypes.js';
+import type { AsmInstructionNode, AsmOperandNode, EaExprNode, ImmExprNode, OpDeclNode, SourceSpan } from '../frontend/ast.js';
+import type { CompileEnv } from '../semantics/env.js';
+import type { SourceSegmentTag } from './loweringTypes.js';
+import type { OpOverloadSelection } from './opMatching.js';
+import type { FlowState, OpExpansionFrame } from './assemblerFlowSetup.js';
+type AsmInstructionStreamAddressingContext = {
+    flattenEaDottedName: (ea: EaExprNode) => string | undefined;
+};
+type AsmInstructionStreamContext = {
+    diagnostics: Diagnostic[];
+    asmItemSpanSourceTag: (span: SourceSpan) => SourceSegmentTag;
+    getCurrentCodeSegmentTag: () => SourceSegmentTag | undefined;
+    setCurrentCodeSegmentTag: (tag: SourceSegmentTag | undefined) => void;
+    appendInvalidOpExpansionDiagnostic: (asmItem: AsmInstructionNode, diagnosticsStart: number, stack: OpExpansionFrame[]) => void;
+    addressing: Readonly<AsmInstructionStreamAddressingContext>;
+    diagAt: (diagnostics: Diagnostic[], span: SourceSpan, message: string) => void;
+    diagAtWithSeverityAndId: (diagnostics: Diagnostic[], span: SourceSpan, id: (typeof DiagnosticIds)[keyof typeof DiagnosticIds], severity: 'error' | 'warning', message: string) => void;
+    env: CompileEnv;
+    emitInstr: (head: string, operands: AsmOperandNode[], span: SourceSpan) => boolean;
+    emitAbs16Fixup: (opcode: number, baseLower: string, addend: number, span: SourceSpan, asmText?: string) => void;
+    syncToFlow: () => void;
+    resolveOpCandidates: (name: string, file: string) => OpDeclNode[] | undefined;
+    opExpansionStack: OpExpansionFrame[];
+    diagAtWithId: (diagnostics: Diagnostic[], span: SourceSpan, id: (typeof DiagnosticIds)[keyof typeof DiagnosticIds], message: string) => void;
+    formatAsmOperandForOpDiag: (operand: AsmOperandNode) => string;
+    selectOpOverload: (overloads: OpDeclNode[], operands: AsmOperandNode[]) => OpOverloadSelection;
+    cloneImmExpr: (expr: ImmExprNode) => ImmExprNode;
+    cloneEaExpr: (expr: EaExprNode) => EaExprNode;
+    cloneOperand: (operand: AsmOperandNode) => AsmOperandNode;
+    normalizeFixedToken: (operand: AsmOperandNode) => string | undefined;
+    inverseConditionName: (name: string) => string | undefined;
+    newHiddenLabel: (prefix: string) => string;
+    lowerAsmInstructionDispatcher: (asmItem: AsmInstructionNode) => void;
+    defineCodeLabel: (name: string, span: SourceSpan, scope: 'global' | 'local') => void;
+    flowRef: {
+        readonly current: FlowState;
+    };
+    syncFromFlow: () => void;
+};
+export declare function createAsmInstructionStreamHelpers(ctx: AsmInstructionStreamContext): {
+    emitAsmInstruction: (asmItem: AsmInstructionNode) => void;
+    lowerAsmRange: (asmItems: readonly import("../frontend/ast.js").AsmItemNode[], startIndex: number, stopKinds: Set<string>) => number;
+};
+export {};

package/dist/src/lowering/asmInstructionStream.js

@@ -0,0 +1,51 @@
+import { createAsmRangeLoweringHelpers } from './asmRangeLowering.js';
+import { createOpExpansionOrchestrationHelpers } from './opExpansionOrchestration.js';
+export function createAsmInstructionStreamHelpers(ctx) {
+    const emitAsmInstruction = (asmItem) => {
+        const prevTag = ctx.getCurrentCodeSegmentTag();
+        const diagnosticsStart = ctx.diagnostics.length;
+        ctx.setCurrentCodeSegmentTag(ctx.asmItemSpanSourceTag(asmItem.span));
+        try {
+            const { tryHandleOpExpansion } = createOpExpansionOrchestrationHelpers({
+                resolveOpCandidates: ctx.resolveOpCandidates,
+                diagnostics: ctx.diagnostics,
+                env: ctx.env,
+                opExpansionStack: ctx.opExpansionStack,
+                diagAt: ctx.diagAt,
+                diagAtWithId: ctx.diagAtWithId,
+                diagAtWithSeverityAndId: ctx.diagAtWithSeverityAndId,
+                formatAsmOperandForOpDiag: ctx.formatAsmOperandForOpDiag,
+                selectOpOverload: ctx.selectOpOverload,
+                cloneImmExpr: ctx.cloneImmExpr,
+                cloneEaExpr: ctx.cloneEaExpr,
+                cloneOperand: ctx.cloneOperand,
+                flattenEaDottedName: ctx.addressing.flattenEaDottedName,
+                normalizeFixedToken: ctx.normalizeFixedToken,
+                inverseConditionName: ctx.inverseConditionName,
+                newHiddenLabel: ctx.newHiddenLabel,
+                lowerAsmRange,
+                syncToFlow: ctx.syncToFlow,
+            });
+            if (tryHandleOpExpansion(asmItem))
+                return;
+            ctx.lowerAsmInstructionDispatcher(asmItem);
+        }
+        finally {
+            ctx.appendInvalidOpExpansionDiagnostic(asmItem, diagnosticsStart, ctx.opExpansionStack);
+            ctx.setCurrentCodeSegmentTag(prevTag);
+        }
+    };
+    const { lowerAsmRange } = createAsmRangeLoweringHelpers({
+        sourceTagForSpan: ctx.asmItemSpanSourceTag,
+        getCurrentCodeSegmentTag: ctx.getCurrentCodeSegmentTag,
+        setCurrentCodeSegmentTag: ctx.setCurrentCodeSegmentTag,
+        defineCodeLabel: ctx.defineCodeLabel,
+        emitAsmInstruction,
+        flowRef: ctx.flowRef,
+        syncFromFlow: ctx.syncFromFlow,
+    });
+    return {
+        emitAsmInstruction,
+        lowerAsmRange,
+    };
+}

package/dist/src/lowering/asmLoweringBranchCall.d.ts

@@ -0,0 +1,43 @@
+import { DiagnosticIds, type Diagnostic } from '../diagnosticTypes.js';
+import type { AsmInstructionNode, AsmOperandNode } from '../frontend/ast.js';
+type DiagAt = (diagnostics: Diagnostic[], span: AsmInstructionNode['span'], message: string) => void;
+type DiagAtWithId = (diagnostics: Diagnostic[], span: AsmInstructionNode['span'], id: (typeof DiagnosticIds)[keyof typeof DiagnosticIds], message: string) => void;
+export type BranchCallLoweringContext = {
+    diagnostics: Diagnostic[];
+    diagAt: DiagAt;
+    diagAtWithId: DiagAtWithId;
+    emitInstr: (head: string, operands: AsmOperandNode[], span: AsmInstructionNode['span']) => boolean;
+    emitRawCodeBytes: (bytes: Uint8Array, file: string, asmText: string) => void;
+    emitAbs16Fixup: (opcode: number, baseLower: string, addend: number, span: AsmInstructionNode['span']) => void;
+    emitRel8Fixup: (opcode: number, baseLower: string, addend: number, span: AsmInstructionNode['span'], mnemonic: string, asmText?: string) => void;
+    conditionOpcodeFromName: (nameRaw: string) => number | undefined;
+    callConditionOpcodeFromName: (nameRaw: string) => number | undefined;
+    jrConditionOpcodeFromName: (nameRaw: string) => number | undefined;
+    conditionOpcode: (op: AsmOperandNode) => number | undefined;
+    symbolicTargetFromExpr: (expr: Extract<AsmOperandNode, {
+        kind: 'Imm';
+    }>['expr']) => {
+        baseLower: string;
+        addend: number;
+    } | undefined;
+    evalImmExpr: (expr: Extract<AsmOperandNode, {
+        kind: 'Imm';
+    }>['expr']) => number | undefined;
+    currentAddress: () => number;
+    evalCurrentTarget?: (expr: Extract<AsmOperandNode, {
+        kind: 'Imm';
+    }>['expr']) => number | undefined;
+    diagIfRetStackImbalanced: (span: AsmInstructionNode['span'], mnemonic?: string) => void;
+    diagIfCallStackUnverifiable: (options: {
+        span: AsmInstructionNode['span'];
+        mnemonic?: string;
+    }) => void;
+    syncToFlow: () => void;
+    flowRef: {
+        current: {
+            reachable: boolean;
+        };
+    };
+};
+export declare function tryLowerBranchCallInstruction(asmItem: AsmInstructionNode, ctx: BranchCallLoweringContext): boolean | undefined;
+export {};

package/dist/src/lowering/asmLoweringBranchCall.js

@@ -0,0 +1,254 @@
+import { DiagnosticIds } from '../diagnosticTypes.js';
+function diagEncode(ctx, asmItem, message) {
+    ctx.diagAtWithId(ctx.diagnostics, asmItem.span, DiagnosticIds.EncodeError, message);
+}
+const emitRel8FromOperand = (ctx, asmItem, operand, opcode, mnemonic) => {
+    if (operand.kind !== 'Imm') {
+        if (mnemonic === 'djnz' || mnemonic.startsWith('jr')) {
+            diagEncode(ctx, asmItem, `${mnemonic} expects disp8`);
+        }
+        else {
+            diagEncode(ctx, asmItem, `${mnemonic} expects an immediate target.`);
+        }
+        return false;
+    }
+    const symbolicTarget = ctx.symbolicTargetFromExpr(operand.expr);
+    if (symbolicTarget) {
+        ctx.emitRel8Fixup(opcode, symbolicTarget.baseLower, symbolicTarget.addend, asmItem.span, mnemonic);
+        return true;
+    }
+    const currentTarget = ctx.evalCurrentTarget?.(operand.expr);
+    if (currentTarget !== undefined) {
+        const currentRelativeValue = currentTarget - (ctx.currentAddress() + 2);
+        if (currentRelativeValue < -128 || currentRelativeValue > 127) {
+            diagEncode(ctx, asmItem, `${mnemonic} relative branch displacement out of range (-128..127): ${currentRelativeValue}.`);
+            return false;
+        }
+        ctx.emitRawCodeBytes(Uint8Array.of(opcode, currentRelativeValue & 0xff), asmItem.span.file, `${mnemonic} ${currentRelativeValue}`);
+        return true;
+    }
+    const value = ctx.evalImmExpr(operand.expr);
+    if (value === undefined) {
+        diagEncode(ctx, asmItem, `Failed to evaluate ${mnemonic} target.`);
+        return false;
+    }
+    if (value < -128 || value > 127) {
+        diagEncode(ctx, asmItem, `${mnemonic} relative branch displacement out of range (-128..127): ${value}.`);
+        return false;
+    }
+    ctx.emitRawCodeBytes(Uint8Array.of(opcode, value & 0xff), asmItem.span.file, `${mnemonic} ${value}`);
+    return true;
+};
+function conditionNameFromOperand(op) {
+    if (op.kind === 'Imm' && op.expr.kind === 'ImmName')
+        return op.expr.name;
+    if (op.kind === 'Reg')
+        return op.name;
+    return undefined;
+}
+function rejectInvalidRel8Target(ctx, asmItem, target, messages) {
+    if (target.kind === 'Mem') {
+        diagEncode(ctx, asmItem, messages.indirect);
+        return true;
+    }
+    if (target.kind === 'Reg') {
+        diagEncode(ctx, asmItem, messages.register);
+        return true;
+    }
+    if (target.kind !== 'Imm') {
+        diagEncode(ctx, asmItem, messages.other);
+        return true;
+    }
+    return false;
+}
+function emitAbs16CurrentTargetFromOperand(ctx, asmItem, target, opcode) {
+    if (target.kind !== 'Imm')
+        return false;
+    const value = ctx.evalCurrentTarget?.(target.expr);
+    if (value === undefined)
+        return false;
+    if (value < 0 || value > 0xffff) {
+        diagEncode(ctx, asmItem, `16-bit branch target out of range: ${value}.`);
+        return true;
+    }
+    ctx.emitRawCodeBytes(Uint8Array.of(opcode, value & 0xff, (value >> 8) & 0xff), asmItem.span.file, `${asmItem.head.toLowerCase()} ${value}`);
+    ctx.syncToFlow();
+    return true;
+}
+function emitAbs16FixupFromOperand(ctx, asmItem, operand, opcode) {
+    if (operand.kind !== 'Imm')
+        return false;
+    const symbolicTarget = ctx.symbolicTargetFromExpr(operand.expr);
+    if (!symbolicTarget)
+        return false;
+    ctx.emitAbs16Fixup(opcode, symbolicTarget.baseLower, symbolicTarget.addend, asmItem.span);
+    ctx.syncToFlow();
+    return true;
+}
+export function tryLowerBranchCallInstruction(asmItem, ctx) {
+    const head = asmItem.head.toLowerCase();
+    if (head === 'call') {
+        ctx.diagIfCallStackUnverifiable({ span: asmItem.span });
+    }
+    if (head === 'jr') {
+        if (asmItem.operands.length === 1) {
+            if (asmItem.operands[0].kind === 'Mem') {
+                diagEncode(ctx, asmItem, `jr does not support indirect targets; expects disp8`);
+                return true;
+            }
+            const single = asmItem.operands[0];
+            const ccSingle = conditionNameFromOperand(single);
+            if (ccSingle && ctx.jrConditionOpcodeFromName(ccSingle) !== undefined) {
+                diagEncode(ctx, asmItem, `jr cc, disp expects two operands (cc, disp8)`);
+                return true;
+            }
+            if (single.kind === 'Imm') {
+                const symbolicTarget = ctx.symbolicTargetFromExpr(single.expr);
+                if (symbolicTarget &&
+                    ctx.jrConditionOpcodeFromName(symbolicTarget.baseLower) !== undefined) {
+                    diagEncode(ctx, asmItem, `jr cc, disp expects two operands (cc, disp8)`);
+                    return true;
+                }
+            }
+            if (single.kind === 'Reg') {
+                diagEncode(ctx, asmItem, `jr does not support register targets; expects disp8`);
+                return true;
+            }
+            if (!emitRel8FromOperand(ctx, asmItem, single, 0x18, 'jr'))
+                return false;
+            ctx.flowRef.current.reachable = false;
+            ctx.syncToFlow();
+            return true;
+        }
+        if (asmItem.operands.length === 2) {
+            const ccOp = asmItem.operands[0];
+            const ccName = conditionNameFromOperand(ccOp);
+            const opcode = ccName ? ctx.jrConditionOpcodeFromName(ccName) : undefined;
+            if (opcode === undefined) {
+                diagEncode(ctx, asmItem, `jr cc expects valid condition code NZ/Z/NC/C`);
+                return true;
+            }
+            const target = asmItem.operands[1];
+            if (rejectInvalidRel8Target(ctx, asmItem, target, {
+                indirect: 'jr cc, disp does not support indirect targets',
+                register: 'jr cc, disp does not support register targets; expects disp8',
+                other: 'jr cc, disp expects disp8',
+            })) {
+                return true;
+            }
+            if (!emitRel8FromOperand(ctx, asmItem, target, opcode, `jr ${ccName.toLowerCase()}`))
+                return false;
+            ctx.syncToFlow();
+            return true;
+        }
+    }
+    if (head === 'djnz') {
+        if (asmItem.operands.length !== 1) {
+            diagEncode(ctx, asmItem, `djnz expects one operand (disp8)`);
+            return true;
+        }
+        const target = asmItem.operands[0];
+        if (rejectInvalidRel8Target(ctx, asmItem, target, {
+            indirect: 'djnz does not support indirect targets; expects disp8',
+            register: 'djnz does not support register targets; expects disp8',
+            other: 'djnz expects disp8',
+        })) {
+            return true;
+        }
+        if (!emitRel8FromOperand(ctx, asmItem, target, 0x10, 'djnz'))
+            return false;
+        ctx.syncToFlow();
+        return true;
+    }
+    if (head === 'rst' && asmItem.operands.length === 1) {
+        ctx.diagIfCallStackUnverifiable({ span: asmItem.span, mnemonic: 'rst' });
+    }
+    if (head === 'ret') {
+        if (asmItem.operands.length === 0) {
+            ctx.diagIfRetStackImbalanced(asmItem.span);
+            ctx.emitInstr('ret', [], asmItem.span);
+            ctx.flowRef.current.reachable = false;
+            ctx.syncToFlow();
+            return true;
+        }
+        if (asmItem.operands.length === 1) {
+            const op = ctx.conditionOpcode(asmItem.operands[0]);
+            if (op === undefined) {
+                diagEncode(ctx, asmItem, `ret cc expects a valid condition code`);
+                return true;
+            }
+            ctx.diagIfRetStackImbalanced(asmItem.span);
+            ctx.emitInstr('ret', [asmItem.operands[0]], asmItem.span);
+            ctx.syncToFlow();
+            return true;
+        }
+    }
+    if ((head === 'retn' || head === 'reti') && asmItem.operands.length === 0) {
+        ctx.diagIfRetStackImbalanced(asmItem.span, head);
+        ctx.emitInstr(head, [], asmItem.span);
+        ctx.flowRef.current.reachable = false;
+        ctx.syncToFlow();
+        return true;
+    }
+    if (head === 'jp' && asmItem.operands.length === 1) {
+        const target = asmItem.operands[0];
+        if (target.kind === 'Imm') {
+            const symbolicTarget = ctx.symbolicTargetFromExpr(target.expr);
+            if (symbolicTarget && ctx.conditionOpcodeFromName(symbolicTarget.baseLower) !== undefined) {
+                diagEncode(ctx, asmItem, `jp cc, nn expects two operands (cc, nn)`);
+                return true;
+            }
+            if (symbolicTarget) {
+                ctx.emitAbs16Fixup(0xc3, symbolicTarget.baseLower, symbolicTarget.addend, asmItem.span);
+                ctx.flowRef.current.reachable = false;
+                ctx.syncToFlow();
+                return true;
+            }
+            if (emitAbs16CurrentTargetFromOperand(ctx, asmItem, target, 0xc3)) {
+                ctx.flowRef.current.reachable = false;
+                return true;
+            }
+        }
+    }
+    if (head === 'jp' && asmItem.operands.length === 2) {
+        const ccOp = asmItem.operands[0];
+        const ccName = conditionNameFromOperand(ccOp);
+        const opcode = ccName ? ctx.conditionOpcodeFromName(ccName) : undefined;
+        const target = asmItem.operands[1];
+        if (opcode !== undefined &&
+            (emitAbs16CurrentTargetFromOperand(ctx, asmItem, target, opcode) ||
+                emitAbs16FixupFromOperand(ctx, asmItem, target, opcode))) {
+            return true;
+        }
+    }
+    if (head === 'call' && asmItem.operands.length === 1) {
+        const target = asmItem.operands[0];
+        if (target.kind === 'Imm') {
+            const symbolicTarget = ctx.symbolicTargetFromExpr(target.expr);
+            if (symbolicTarget &&
+                ctx.callConditionOpcodeFromName(symbolicTarget.baseLower) !== undefined) {
+                diagEncode(ctx, asmItem, `call cc, nn expects two operands (cc, nn)`);
+                return true;
+            }
+            if (symbolicTarget) {
+                ctx.emitAbs16Fixup(0xcd, symbolicTarget.baseLower, symbolicTarget.addend, asmItem.span);
+                ctx.syncToFlow();
+                return true;
+            }
+            if (emitAbs16CurrentTargetFromOperand(ctx, asmItem, target, 0xcd))
+                return true;
+        }
+    }
+    if (head === 'call' && asmItem.operands.length === 2) {
+        const ccOp = asmItem.operands[0];
+        const ccName = conditionNameFromOperand(ccOp);
+        const opcode = ccName ? ctx.callConditionOpcodeFromName(ccName) : undefined;
+        const target = asmItem.operands[1];
+        if (opcode !== undefined &&
+            (emitAbs16CurrentTargetFromOperand(ctx, asmItem, target, opcode) ||
+                emitAbs16FixupFromOperand(ctx, asmItem, target, opcode))) {
+            return true;
+        }
+    }
+    return undefined;
+}

package/dist/src/lowering/asmLoweringHost.d.ts

@@ -0,0 +1,23 @@
+import type { AsmInstructionNode } from '../frontend/ast.js';
+import type { BranchCallLoweringContext } from './asmLoweringBranchCall.js';
+import type { LdHelperContext } from './asmInstructionLdHelpers.js';
+import type { LdLoweringContext } from './asmLoweringLd.js';
+/**
+ * Fields required by {@link createAsmInstructionLdHelpers} beyond what
+ * {@link BranchCallLoweringContext} already provides (`emitInstr`, `emitAbs16Fixup`).
+ */
+type AsmLoweringLdHelperSlice = Omit<LdHelperContext, 'emitInstr' | 'emitAbs16Fixup'>;
+type AsmLoweringLdSlice = Pick<LdLoweringContext, 'resolveEa' | 'symbolicTargetFromExpr'>;
+/**
+ * Dispatcher path shared by the non-`ld` `lowerLdWithEa` fallback.
+ */
+type AsmLoweringDispatcherSlice = {
+    lowerLdWithEa: (asmItem: AsmInstructionNode) => boolean;
+};
+/**
+ * Narrow surface for {@link createAsmInstructionLoweringHelpers}: branch/call, LD helpers,
+ * and raw-instruction fallback. Composed from helper-family contracts plus LD-helper
+ * and dispatcher-only fields.
+ */
+export type AsmLoweringHost = BranchCallLoweringContext & AsmLoweringLdHelperSlice & AsmLoweringLdSlice & AsmLoweringDispatcherSlice;
+export {};

package/dist/src/lowering/asmLoweringHost.js

@@ -0,0 +1 @@
+export {};

package/dist/src/lowering/asmLoweringLd.d.ts

@@ -0,0 +1,28 @@
+import type { Diagnostic } from '../diagnosticTypes.js';
+import type { AsmInstructionNode, AsmOperandNode, EaExprNode, SourceSpan } from '../frontend/ast.js';
+import type { EaResolution } from './eaResolution.js';
+type DiagAt = (diagnostics: Diagnostic[], span: AsmInstructionNode['span'], message: string) => void;
+export type LdLoweringContext = {
+    diagnostics: Diagnostic[];
+    diagAt: DiagAt;
+    emitAbs16Fixup: (opcode: number, baseLower: string, addend: number, span: AsmInstructionNode['span']) => void;
+    emitAbs16FixupPrefixed: (prefix: number, opcode2: number, baseLower: string, addend: number, span: AsmInstructionNode['span']) => void;
+    evalImmExpr: (expr: Extract<AsmOperandNode, {
+        kind: 'Imm';
+    }>['expr']) => number | undefined;
+    symbolicTargetFromExpr: (expr: Extract<AsmOperandNode, {
+        kind: 'Imm';
+    }>['expr']) => {
+        baseLower: string;
+        addend: number;
+    } | undefined;
+    resolveEa: (ea: EaExprNode, span: SourceSpan) => EaResolution | undefined;
+    lowerLdWithEa: (asmItem: AsmInstructionNode) => boolean;
+    emitAbs16LdFixup: (dst: AsmOperandNode, src: AsmOperandNode, span: AsmInstructionNode['span']) => boolean;
+    isUnresolvedLayoutLdOperand: (op: AsmOperandNode) => boolean;
+    resolveRawLabelName: (name: string) => string;
+    isRegisterLikeMemEa: (ea: EaExprNode) => boolean;
+    syncToFlow: () => void;
+};
+export declare function tryLowerLdInstruction(asmItem: AsmInstructionNode, ctx: LdLoweringContext): boolean | undefined;
+export {};