@img/sharp-libvips-dev 1.2.1 → 1.2.2-rc.1

package/include/hwy/targets.h

@@ -82,9 +82,17 @@ HWY_INLINE std::vector<int64_t> SupportedAndGeneratedTargets() {
 
 #endif  // HWY_NO_LIBCXX
 
+// Returns a string that satisfies gtest IsValidParamName(). No longer report
+// targets as "Unknown" if they are for a different architecture, because some
+// users unconditionally disable targets and we want to see which.
 static inline HWY_MAYBE_UNUSED const char* TargetName(int64_t target) {
   switch (target) {
-#if HWY_ARCH_X86
+    case HWY_EMU128:
+      return "EMU128";
+    case HWY_SCALAR:
+      return "SCALAR";
+
+    // X86
     case HWY_SSE2:
       return "SSE2";
     case HWY_SSSE3:
@@ -101,9 +109,10 @@ static inline HWY_MAYBE_UNUSED const char* TargetName(int64_t target) {
       return "AVX3_ZEN4";
     case HWY_AVX3_SPR:
       return "AVX3_SPR";
-#endif
+    case HWY_AVX10_2:
+      return "AVX10_2";
 
-#if HWY_ARCH_ARM
+      // ARM
     case HWY_SVE2_128:
       return "SVE2_128";
     case HWY_SVE_256:
@@ -118,46 +127,71 @@ static inline HWY_MAYBE_UNUSED const char* TargetName(int64_t target) {
       return "NEON";
     case HWY_NEON_WITHOUT_AES:
       return "NEON_WITHOUT_AES";
-#endif
 
-#if HWY_ARCH_PPC
+      // PPC
     case HWY_PPC8:
       return "PPC8";
     case HWY_PPC9:
       return "PPC9";
     case HWY_PPC10:
       return "PPC10";
-#endif
 
-#if HWY_ARCH_S390X
+      // S390X
     case HWY_Z14:
       return "Z14";
     case HWY_Z15:
       return "Z15";
-#endif
 
-#if HWY_ARCH_WASM
+      // WASM
     case HWY_WASM:
       return "WASM";
     case HWY_WASM_EMU256:
       return "WASM_EMU256";
-#endif
 
-#if HWY_ARCH_RISCV
+      // RISCV
     case HWY_RVV:
       return "RVV";
-#endif
-
-    case HWY_EMU128:
-      return "EMU128";
-    case HWY_SCALAR:
-      return "SCALAR";
 
-    default:
-      return "Unknown";  // must satisfy gtest IsValidParamName()
+      // LOONGARCH
+    case HWY_LSX:
+      return "LSX";
+    case HWY_LASX:
+      return "LASX";
   }
+
+  return "Unknown";
 }
 
+// Invokes VISITOR(TARGET, NAMESPACE) for all enabled targets. Alphabetic order.
+#define HWY_VISIT_TARGETS(VISITOR)    \
+  HWY_VISIT_AVX10_2(VISITOR)          \
+  HWY_VISIT_AVX2(VISITOR)             \
+  HWY_VISIT_AVX3(VISITOR)             \
+  HWY_VISIT_AVX3_DL(VISITOR)          \
+  HWY_VISIT_AVX3_SPR(VISITOR)         \
+  HWY_VISIT_AVX3_ZEN4(VISITOR)        \
+  HWY_VISIT_FALLBACK(VISITOR)         \
+  HWY_VISIT_LASX(VISITOR)             \
+  HWY_VISIT_LSX(VISITOR)              \
+  HWY_VISIT_NEON(VISITOR)             \
+  HWY_VISIT_NEON_BF16(VISITOR)        \
+  HWY_VISIT_NEON_WITHOUT_AES(VISITOR) \
+  HWY_VISIT_PPC10(VISITOR)            \
+  HWY_VISIT_PPC8(VISITOR)             \
+  HWY_VISIT_PPC9(VISITOR)             \
+  HWY_VISIT_RVV(VISITOR)              \
+  HWY_VISIT_SSE2(VISITOR)             \
+  HWY_VISIT_SSE4(VISITOR)             \
+  HWY_VISIT_SSSE3(VISITOR)            \
+  HWY_VISIT_SVE(VISITOR)              \
+  HWY_VISIT_SVE2(VISITOR)             \
+  HWY_VISIT_SVE2_128(VISITOR)         \
+  HWY_VISIT_SVE_256(VISITOR)          \
+  HWY_VISIT_WASM(VISITOR)             \
+  HWY_VISIT_WASM_EMU256(VISITOR)      \
+  HWY_VISIT_Z14(VISITOR)              \
+  HWY_VISIT_Z15(VISITOR)
+
 // The maximum number of dynamic targets on any architecture is defined by
 // HWY_MAX_DYNAMIC_TARGETS and depends on the arch.
 
@@ -205,7 +239,7 @@ static inline HWY_MAYBE_UNUSED const char* TargetName(int64_t target) {
   nullptr,                             /* reserved */         \
       nullptr,                         /* reserved */         \
       nullptr,                         /* reserved */         \
-      nullptr,                         /* reserved */         \
+      HWY_CHOOSE_AVX10_2(func_name),   /* AVX10_2 */          \
       HWY_CHOOSE_AVX3_SPR(func_name),  /* AVX3_SPR */         \
       nullptr,                         /* reserved */         \
       HWY_CHOOSE_AVX3_ZEN4(func_name), /* AVX3_ZEN4 */        \
@@ -284,6 +318,14 @@ static inline HWY_MAYBE_UNUSED const char* TargetName(int64_t target) {
       HWY_CHOOSE_WASM(func_name),        /* WASM */        \
       nullptr                            /* reserved */
 
+#elif HWY_ARCH_LOONGARCH
+#define HWY_MAX_DYNAMIC_TARGETS 3
+#define HWY_HIGHEST_TARGET_BIT HWY_HIGHEST_TARGET_BIT_LOONGARCH
+#define HWY_CHOOSE_TARGET_LIST(func_name)        \
+  nullptr,                        /* reserved */ \
+      HWY_CHOOSE_LASX(func_name), /* LASX */     \
+      HWY_CHOOSE_LSX(func_name)   /* LSX */
+
 #else
 // Unknown architecture, will use HWY_SCALAR without dynamic dispatch, though
 // still creating single-entry tables in HWY_EXPORT to ensure portability.

package/include/hwy/timer-inl.h

@@ -13,9 +13,10 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-// High-resolution and high-precision timer
+// DEPRECATED, use timer.h instead.
+
+#include "hwy/timer.h"
 
-// Per-target include guard
 #if defined(HIGHWAY_HWY_TIMER_INL_H_) == defined(HWY_TARGET_TOGGLE)
 #ifdef HIGHWAY_HWY_TIMER_INL_H_
 #undef HIGHWAY_HWY_TIMER_INL_H_
@@ -25,170 +26,17 @@
 
 #include "hwy/highway.h"
 
-#if defined(_WIN32) || defined(_WIN64)
-#ifndef NOMINMAX
-#define NOMINMAX
-#endif  // NOMINMAX
-#include <windows.h>
-#endif
-
-#if defined(__APPLE__)
-#include <mach/mach.h>
-#include <mach/mach_time.h>
-#endif
-
-#if defined(__HAIKU__)
-#include <OS.h>
-#endif
-
-#if HWY_ARCH_PPC && defined(__GLIBC__) && defined(__powerpc64__)
-#include <sys/platform/ppc.h>  // NOLINT __ppc_get_timebase_freq
-#endif
-
-#if HWY_ARCH_X86 && HWY_COMPILER_MSVC
-#include <intrin.h>
-#endif
-
-#include <stdint.h>
-#include <time.h>  // clock_gettime
-
 HWY_BEFORE_NAMESPACE();
 namespace hwy {
 namespace HWY_NAMESPACE {
 namespace timer {
 
-// Ticks := platform-specific timer values (CPU cycles on x86). Must be
-// unsigned to guarantee wraparound on overflow.
-using Ticks = uint64_t;
+// Deprecated aliases so that old code still compiles. Prefer to use
+// `hwy::timer::*` from timer.h because that does not require highway.h.
+using Ticks = hwy::timer::Ticks;
 
-// Start/Stop return absolute timestamps and must be placed immediately before
-// and after the region to measure. We provide separate Start/Stop functions
-// because they use different fences.
-//
-// Background: RDTSC is not 'serializing'; earlier instructions may complete
-// after it, and/or later instructions may complete before it. 'Fences' ensure
-// regions' elapsed times are independent of such reordering. The only
-// documented unprivileged serializing instruction is CPUID, which acts as a
-// full fence (no reordering across it in either direction). Unfortunately
-// the latency of CPUID varies wildly (perhaps made worse by not initializing
-// its EAX input). Because it cannot reliably be deducted from the region's
-// elapsed time, it must not be included in the region to measure (i.e.
-// between the two RDTSC).
-//
-// The newer RDTSCP is sometimes described as serializing, but it actually
-// only serves as a half-fence with release semantics. Although all
-// instructions in the region will complete before the final timestamp is
-// captured, subsequent instructions may leak into the region and increase the
-// elapsed time. Inserting another fence after the final RDTSCP would prevent
-// such reordering without affecting the measured region.
-//
-// Fortunately, such a fence exists. The LFENCE instruction is only documented
-// to delay later loads until earlier loads are visible. However, Intel's
-// reference manual says it acts as a full fence (waiting until all earlier
-// instructions have completed, and delaying later instructions until it
-// completes). AMD assigns the same behavior to MFENCE.
-//
-// We need a fence before the initial RDTSC to prevent earlier instructions
-// from leaking into the region, and arguably another after RDTSC to avoid
-// region instructions from completing before the timestamp is recorded.
-// When surrounded by fences, the additional RDTSCP half-fence provides no
-// benefit, so the initial timestamp can be recorded via RDTSC, which has
-// lower overhead than RDTSCP because it does not read TSC_AUX. In summary,
-// we define Start = LFENCE/RDTSC/LFENCE; Stop = RDTSCP/LFENCE.
-//
-// Using Start+Start leads to higher variance and overhead than Stop+Stop.
-// However, Stop+Stop includes an LFENCE in the region measurements, which
-// adds a delay dependent on earlier loads. The combination of Start+Stop
-// is faster than Start+Start and more consistent than Stop+Stop because
-// the first LFENCE already delayed subsequent loads before the measured
-// region. This combination seems not to have been considered in prior work:
-// http://akaros.cs.berkeley.edu/lxr/akaros/kern/arch/x86/rdtsc_test.c
-//
-// Note: performance counters can measure 'exact' instructions-retired or
-// (unhalted) cycle counts. The RDPMC instruction is not serializing and also
-// requires fences. Unfortunately, it is not accessible on all OSes and we
-// prefer to avoid kernel-mode drivers. Performance counters are also affected
-// by several under/over-count errata, so we use the TSC instead.
-
-// Returns a 64-bit timestamp in unit of 'ticks'; to convert to seconds,
-// divide by InvariantTicksPerSecond.
-inline Ticks Start() {
-  Ticks t;
-#if HWY_ARCH_PPC && defined(__GLIBC__) && defined(__powerpc64__)
-  asm volatile("mfspr %0, %1" : "=r"(t) : "i"(268));
-#elif HWY_ARCH_ARM_A64 && !HWY_COMPILER_MSVC
-  // pmccntr_el0 is privileged but cntvct_el0 is accessible in Linux and QEMU.
-  asm volatile("mrs %0, cntvct_el0" : "=r"(t));
-#elif HWY_ARCH_X86 && HWY_COMPILER_MSVC
-  _ReadWriteBarrier();
-  _mm_lfence();
-  _ReadWriteBarrier();
-  t = __rdtsc();
-  _ReadWriteBarrier();
-  _mm_lfence();
-  _ReadWriteBarrier();
-#elif HWY_ARCH_X86_64
-  asm volatile(
-      "lfence\n\t"
-      "rdtsc\n\t"
-      "shl $32, %%rdx\n\t"
-      "or %%rdx, %0\n\t"
-      "lfence"
-      : "=a"(t)
-      :
-      // "memory" avoids reordering. rdx = TSC >> 32.
-      // "cc" = flags modified by SHL.
-      : "rdx", "memory", "cc");
-#elif HWY_ARCH_RISCV
-  asm volatile("fence; rdtime %0" : "=r"(t));
-#elif defined(_WIN32) || defined(_WIN64)
-  LARGE_INTEGER counter;
-  (void)QueryPerformanceCounter(&counter);
-  t = counter.QuadPart;
-#elif defined(__APPLE__)
-  t = mach_absolute_time();
-#elif defined(__HAIKU__)
-  t = system_time_nsecs();  // since boot
-#else  // POSIX
-  timespec ts;
-  clock_gettime(CLOCK_MONOTONIC, &ts);
-  t = static_cast<Ticks>(ts.tv_sec * 1000000000LL + ts.tv_nsec);
-#endif
-  return t;
-}
-
-// WARNING: on x86, caller must check HasRDTSCP before using this!
-inline Ticks Stop() {
-  uint64_t t;
-#if HWY_ARCH_PPC && defined(__GLIBC__) && defined(__powerpc64__)
-  asm volatile("mfspr %0, %1" : "=r"(t) : "i"(268));
-#elif HWY_ARCH_ARM_A64 && !HWY_COMPILER_MSVC
-  // pmccntr_el0 is privileged but cntvct_el0 is accessible in Linux and QEMU.
-  asm volatile("mrs %0, cntvct_el0" : "=r"(t));
-#elif HWY_ARCH_X86 && HWY_COMPILER_MSVC
-  _ReadWriteBarrier();
-  unsigned aux;
-  t = __rdtscp(&aux);
-  _ReadWriteBarrier();
-  _mm_lfence();
-  _ReadWriteBarrier();
-#elif HWY_ARCH_X86_64
-  // Use inline asm because __rdtscp generates code to store TSC_AUX (ecx).
-  asm volatile(
-      "rdtscp\n\t"
-      "shl $32, %%rdx\n\t"
-      "or %%rdx, %0\n\t"
-      "lfence"
-      : "=a"(t)
-      :
-      // "memory" avoids reordering. rcx = TSC_AUX. rdx = TSC >> 32.
-      // "cc" = flags modified by SHL.
-      : "rcx", "rdx", "memory", "cc");
-#else
-  t = Start();
-#endif
-  return t;
-}
+inline Ticks Start() { return hwy::timer::Start(); }
+inline Ticks Stop() { return hwy::timer::Stop(); }
 
 }  // namespace timer
 

package/include/hwy/timer.h

@@ -17,11 +17,39 @@
 #define HIGHWAY_HWY_TIMER_H_
 
 // Platform-specific timer functions. Provides Now() and functions for
-// interpreting and converting the timer-inl.h Ticks.
+// interpreting and converting Ticks.
 
 #include <stdint.h>
+#include <time.h>  // clock_gettime
 
-#include "hwy/highway_export.h"
+#include "hwy/base.h"
+
+#if defined(_WIN32) || defined(_WIN64)
+#ifndef NOMINMAX
+#define NOMINMAX
+#endif  // NOMINMAX
+#ifndef WIN32_LEAN_AND_MEAN
+#define WIN32_LEAN_AND_MEAN
+#endif  // WIN32_LEAN_AND_MEAN
+#include <windows.h>
+#endif
+
+#if defined(__APPLE__)
+#include <mach/mach.h>
+#include <mach/mach_time.h>
+#endif
+
+#if defined(__HAIKU__)
+#include <OS.h>
+#endif
+
+#if HWY_ARCH_PPC && defined(__GLIBC__) && defined(__powerpc64__)
+#include <sys/platform/ppc.h>  // NOLINT __ppc_get_timebase_freq
+#endif
+
+#if HWY_ARCH_X86 && HWY_COMPILER_MSVC
+#include <intrin.h>
+#endif
 
 namespace hwy {
 namespace platform {
@@ -32,7 +60,7 @@ namespace platform {
 // Uses InvariantTicksPerSecond and the baseline version of timer::Start().
 HWY_DLLEXPORT double Now();
 
-// Functions for use with timer-inl.h:
+// Functions related to `Ticks` below.
 
 // Returns whether it is safe to call timer::Stop without executing an illegal
 // instruction; if false, fills cpu100 (a pointer to a 100 character buffer)
@@ -65,6 +93,145 @@ static inline double SecondsSince(const Timestamp& t0) {
   return t1.t - t0.t;
 }
 
+// Low-level Start/Stop functions, previously in timer-inl.h.
+
+namespace timer {
+
+// Ticks := platform-specific timer values (CPU cycles on x86). Must be
+// unsigned to guarantee wraparound on overflow.
+using Ticks = uint64_t;
+
+// Start/Stop return absolute timestamps and must be placed immediately before
+// and after the region to measure. We provide separate Start/Stop functions
+// because they use different fences.
+//
+// Background: RDTSC is not 'serializing'; earlier instructions may complete
+// after it, and/or later instructions may complete before it. 'Fences' ensure
+// regions' elapsed times are independent of such reordering. The only
+// documented unprivileged serializing instruction is CPUID, which acts as a
+// full fence (no reordering across it in either direction). Unfortunately
+// the latency of CPUID varies wildly (perhaps made worse by not initializing
+// its EAX input). Because it cannot reliably be deducted from the region's
+// elapsed time, it must not be included in the region to measure (i.e.
+// between the two RDTSC).
+//
+// The newer RDTSCP is sometimes described as serializing, but it actually
+// only serves as a half-fence with release semantics. Although all
+// instructions in the region will complete before the final timestamp is
+// captured, subsequent instructions may leak into the region and increase the
+// elapsed time. Inserting another fence after the final `RDTSCP` would prevent
+// such reordering without affecting the measured region.
+//
+// Fortunately, such a fence exists. The LFENCE instruction is only documented
+// to delay later loads until earlier loads are visible. However, Intel's
+// reference manual says it acts as a full fence (waiting until all earlier
+// instructions have completed, and delaying later instructions until it
+// completes). AMD assigns the same behavior to MFENCE.
+//
+// We need a fence before the initial RDTSC to prevent earlier instructions
+// from leaking into the region, and arguably another after RDTSC to avoid
+// region instructions from completing before the timestamp is recorded.
+// When surrounded by fences, the additional `RDTSCP` half-fence provides no
+// benefit, so the initial timestamp can be recorded via RDTSC, which has
+// lower overhead than `RDTSCP` because it does not read TSC_AUX. In summary,
+// we define Start = LFENCE/RDTSC/LFENCE; Stop = RDTSCP/LFENCE.
+//
+// Using Start+Start leads to higher variance and overhead than Stop+Stop.
+// However, Stop+Stop includes an LFENCE in the region measurements, which
+// adds a delay dependent on earlier loads. The combination of Start+Stop
+// is faster than Start+Start and more consistent than Stop+Stop because
+// the first LFENCE already delayed subsequent loads before the measured
+// region. This combination seems not to have been considered in prior work:
+// http://akaros.cs.berkeley.edu/lxr/akaros/kern/arch/x86/rdtsc_test.c
+//
+// Note: performance counters can measure 'exact' instructions-retired or
+// (unhalted) cycle counts. The RDPMC instruction is not serializing and also
+// requires fences. Unfortunately, it is not accessible on all OSes and we
+// prefer to avoid kernel-mode drivers. Performance counters are also affected
+// by several under/over-count errata, so we use the TSC instead.
+
+// Returns a 64-bit timestamp in unit of 'ticks'; to convert to seconds,
+// divide by InvariantTicksPerSecond.
+static HWY_INLINE Ticks Start() {
+  Ticks t;
+#if HWY_ARCH_PPC && defined(__GLIBC__) && defined(__powerpc64__)
+  asm volatile("mfspr %0, %1" : "=r"(t) : "i"(268));
+#elif HWY_ARCH_ARM_A64 && !HWY_COMPILER_MSVC
+  // pmccntr_el0 is privileged but cntvct_el0 is accessible in Linux and QEMU.
+  asm volatile("mrs %0, cntvct_el0" : "=r"(t));
+#elif HWY_ARCH_X86 && HWY_COMPILER_MSVC
+  _ReadWriteBarrier();
+  _mm_lfence();
+  _ReadWriteBarrier();
+  t = __rdtsc();
+  _ReadWriteBarrier();
+  _mm_lfence();
+  _ReadWriteBarrier();
+#elif HWY_ARCH_X86_64
+  asm volatile(
+      "lfence\n\t"
+      "rdtsc\n\t"
+      "shl $32, %%rdx\n\t"
+      "or %%rdx, %0\n\t"
+      "lfence"
+      : "=a"(t)
+      :
+      // "memory" avoids reordering. rdx = TSC >> 32.
+      // "cc" = flags modified by SHL.
+      : "rdx", "memory", "cc");
+#elif HWY_ARCH_RISCV
+  asm volatile("fence; rdtime %0" : "=r"(t));
+#elif defined(_WIN32) || defined(_WIN64)
+  LARGE_INTEGER counter;
+  (void)QueryPerformanceCounter(&counter);
+  t = counter.QuadPart;
+#elif defined(__APPLE__)
+  t = mach_absolute_time();
+#elif defined(__HAIKU__)
+  t = system_time_nsecs();  // since boot
+#else  // POSIX
+  timespec ts;
+  clock_gettime(CLOCK_MONOTONIC, &ts);
+  t = static_cast<Ticks>(ts.tv_sec * 1000000000LL + ts.tv_nsec);
+#endif
+  return t;
+}
+
+// WARNING: on x86, caller must check `HaveTimerStop()` before using this!
+static HWY_INLINE Ticks Stop() {
+  uint64_t t;
+#if HWY_ARCH_PPC && defined(__GLIBC__) && defined(__powerpc64__)
+  asm volatile("mfspr %0, %1" : "=r"(t) : "i"(268));
+#elif HWY_ARCH_ARM_A64 && !HWY_COMPILER_MSVC
+  // pmccntr_el0 is privileged but cntvct_el0 is accessible in Linux and QEMU.
+  asm volatile("mrs %0, cntvct_el0" : "=r"(t));
+#elif HWY_ARCH_X86 && HWY_COMPILER_MSVC
+  _ReadWriteBarrier();
+  unsigned aux;
+  t = __rdtscp(&aux);
+  _ReadWriteBarrier();
+  _mm_lfence();
+  _ReadWriteBarrier();
+#elif HWY_ARCH_X86_64
+  // Use inline asm because __rdtscp generates code to store TSC_AUX (ecx).
+  asm volatile(
+      "rdtscp\n\t"
+      "shl $32, %%rdx\n\t"
+      "or %%rdx, %0\n\t"
+      "lfence"
+      : "=a"(t)
+      :
+      // "memory" avoids reordering. rcx = TSC_AUX. rdx = TSC >> 32.
+      // "cc" = flags modified by SHL.
+      : "rcx", "rdx", "memory", "cc");
+#else
+  t = Start();
+#endif
+  return t;
+}
+
+}  // namespace timer
+
 }  // namespace hwy
 
 #endif  // HIGHWAY_HWY_TIMER_H_

package/include/hwy/x86_cpuid.h

@@ -0,0 +1,81 @@
+// Copyright 2025 Google LLC
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef HIGHWAY_HWY_X86_CPUID_H_
+#define HIGHWAY_HWY_X86_CPUID_H_
+
+// Wrapper for x86 CPUID intrinsics. Empty on other platforms.
+
+#include <stdint.h>
+
+#include "hwy/base.h"
+
+#if HWY_ARCH_X86
+
+#if HWY_COMPILER_MSVC || HWY_COMPILER_CLANGCL
+#include <intrin.h>
+#else
+#include <cpuid.h>
+#endif
+
+namespace hwy {
+namespace x86 {
+
+// Calls CPUID instruction with eax=level and ecx=count and returns the result
+// in abcd array where abcd = {eax, ebx, ecx, edx} (hence the name abcd).
+static inline void Cpuid(const uint32_t level, const uint32_t count,
+                         uint32_t* HWY_RESTRICT abcd) {
+#if HWY_COMPILER_MSVC || HWY_COMPILER_CLANGCL
+  int regs[4];
+  __cpuidex(regs, static_cast<int>(level), static_cast<int>(count));
+  for (int i = 0; i < 4; ++i) {
+    abcd[i] = static_cast<uint32_t>(regs[i]);
+  }
+#else   // HWY_COMPILER_MSVC || HWY_COMPILER_CLANGCL
+  uint32_t a;
+  uint32_t b;
+  uint32_t c;
+  uint32_t d;
+  __cpuid_count(level, count, a, b, c, d);
+  abcd[0] = a;
+  abcd[1] = b;
+  abcd[2] = c;
+  abcd[3] = d;
+#endif  // HWY_COMPILER_MSVC || HWY_COMPILER_CLANGCL
+}
+
+static inline bool IsBitSet(const uint32_t reg, const int index) {
+  return (reg & (1U << index)) != 0;
+}
+
+static inline uint32_t MaxLevel() {
+  uint32_t abcd[4];
+  Cpuid(0, 0, abcd);
+  return abcd[0];
+}
+
+static inline bool IsAMD() {
+  uint32_t abcd[4];
+  Cpuid(0, 0, abcd);
+  const uint32_t max_level = abcd[0];
+  return max_level >= 1 && abcd[1] == 0x68747541 && abcd[2] == 0x444d4163 &&
+         abcd[3] == 0x69746e65;
+}
+
+}  // namespace x86
+}  // namespace hwy
+
+#endif  // HWY_ARCH_X86
+#endif  // HIGHWAY_HWY_X86_CPUID_H_

package/include/libheif/heif_cxx.h

@@ -345,9 +345,15 @@ namespace heif {
 
     bool has_channel(enum heif_channel channel) const noexcept;
 
-    const uint8_t* get_plane(enum heif_channel channel, size_t* out_stride) const noexcept;
+    // DEPRECATED
+    const uint8_t* get_plane(enum heif_channel channel, int* out_stride) const noexcept;
 
-    uint8_t* get_plane(enum heif_channel channel, size_t* out_stride) noexcept;
+    // DEPRECATED
+    uint8_t* get_plane(enum heif_channel channel, int* out_stride) noexcept;
+
+    const uint8_t* get_plane2(enum heif_channel channel, size_t* out_stride) const noexcept;
+
+    uint8_t* get_plane2(enum heif_channel channel, size_t* out_stride) noexcept;
 
     // throws Error
     void set_nclx_color_profile(const ColorProfile_nclx&);
@@ -552,7 +558,11 @@ namespace heif {
           heif_reader_trampoline_get_position,
           heif_reader_trampoline_read,
           heif_reader_trampoline_seek,
-          heif_reader_trampoline_wait_for_file_size
+          heif_reader_trampoline_wait_for_file_size,
+          NULL,
+          NULL,
+          NULL,
+          NULL,
       };
 
   inline void Context::read_from_reader(Reader& reader, const ReadingOptions& /*opts*/)
@@ -906,12 +916,22 @@ namespace heif {
     return heif_image_has_channel(m_image.get(), channel);
   }
 
-  inline const uint8_t* Image::get_plane(enum heif_channel channel, size_t* out_stride) const noexcept
+  inline const uint8_t* Image::get_plane(enum heif_channel channel, int* out_stride) const noexcept
+  {
+    return heif_image_get_plane_readonly(m_image.get(), channel, out_stride);
+  }
+
+  inline uint8_t* Image::get_plane(enum heif_channel channel, int* out_stride) noexcept
+  {
+    return heif_image_get_plane(m_image.get(), channel, out_stride);
+  }
+
+  inline const uint8_t* Image::get_plane2(enum heif_channel channel, size_t* out_stride) const noexcept
   {
     return heif_image_get_plane_readonly2(m_image.get(), channel, out_stride);
   }
 
-  inline uint8_t* Image::get_plane(enum heif_channel channel, size_t* out_stride) noexcept
+  inline uint8_t* Image::get_plane2(enum heif_channel channel, size_t* out_stride) noexcept
   {
     return heif_image_get_plane2(m_image.get(), channel, out_stride);
   }