@fluffylabs/anan-as 1.2.0 → 1.3.0-5cbd3aa

package/dist/build/js/assembly/instructions/misc.d.ts

@@ -0,0 +1,6 @@
+import { InstructionRun } from "./outcome";
+export declare const INVALID: InstructionRun;
+export declare const trap: InstructionRun;
+export declare const fallthrough: InstructionRun;
+export declare const ecalli: InstructionRun;
+export declare const sbrk: InstructionRun;

package/dist/build/js/assembly/instructions/misc.js

@@ -0,0 +1,22 @@
+import { MaybePageFault } from "../memory";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
+const faultRes = new MaybePageFault();
+// INVALID
+export const INVALID = (r) => OutcomeData.panic(r);
+// TRAP
+export const trap = (r) => OutcomeData.panic(r);
+// FALLTHROUGH
+export const fallthrough = (r) => OutcomeData.ok(r);
+// ECALLI
+export const ecalli = (r, args) => OutcomeData.hostCall(r, args.a);
+// SBRK
+export const sbrk = (r, args, registers, memory) => {
+    const res = memory.sbrk(faultRes, u32(registers[Inst.reg(args.a)]));
+    // out of memory
+    if (faultRes.isFault) {
+        return OutcomeData.okOrFault(r, faultRes);
+    }
+    registers[Inst.reg(args.b)] = res;
+    return OutcomeData.ok(r);
+};

package/dist/build/js/assembly/instructions/mov.d.ts

@@ -0,0 +1,6 @@
+import { InstructionRun } from "./outcome";
+export declare const move_reg: InstructionRun;
+export declare const cmov_iz_imm: InstructionRun;
+export declare const cmov_nz_imm: InstructionRun;
+export declare const cmov_iz: InstructionRun;
+export declare const cmov_nz: InstructionRun;

package/dist/build/js/assembly/instructions/mov.js

@@ -0,0 +1,35 @@
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
+// MOVE_REG
+export const move_reg = (r, args, registers) => {
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
+};
+// CMOV_IZ_IMM
+export const cmov_iz_imm = (r, args, registers) => {
+    if (registers[Inst.reg(args.a)] === u64(0)) {
+        registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
+    }
+    return OutcomeData.ok(r);
+};
+// CMOV_NZ_IMM
+export const cmov_nz_imm = (r, args, registers) => {
+    if (registers[Inst.reg(args.a)] !== u64(0)) {
+        registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
+    }
+    return OutcomeData.ok(r);
+};
+// CMOV_IZ
+export const cmov_iz = (r, args, registers) => {
+    if (registers[Inst.reg(args.a)] === u64(0)) {
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
+    }
+    return OutcomeData.ok(r);
+};
+// CMOV_NZ
+export const cmov_nz = (r, args, registers) => {
+    if (registers[Inst.reg(args.a)] !== u64(0)) {
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
+    }
+    return OutcomeData.ok(r);
+};

package/dist/build/js/assembly/instructions/outcome.d.ts

@@ -0,0 +1,30 @@
+import { Args } from "../arguments";
+import { MaybePageFault, Memory } from "../memory";
+import { Registers } from "../registers";
+export type InstructionRun = (o: OutcomeData, args: Args, registers: Registers, memory: Memory) => OutcomeData;
+export declare enum Result {
+    PANIC = 0,
+    FAULT = 1,
+    FAULT_ACCESS = 2,
+    HOST = 3
+}
+export declare enum Outcome {
+    Ok = 0,
+    StaticJump = 1,
+    DynamicJump = 2,
+    Result = 3
+}
+export declare class OutcomeData {
+    outcome: Outcome;
+    staticJump: i32;
+    dJump: u32;
+    result: Result;
+    exitCode: u32;
+    static status(r: OutcomeData, result: Result): OutcomeData;
+    static staticJump(r: OutcomeData, offset: i32): OutcomeData;
+    static dJump(r: OutcomeData, address: u32): OutcomeData;
+    static ok(r: OutcomeData): OutcomeData;
+    static panic(r: OutcomeData): OutcomeData;
+    static hostCall(r: OutcomeData, id: u32): OutcomeData;
+    static okOrFault(r: OutcomeData, pageFault: MaybePageFault): OutcomeData;
+}

package/dist/build/js/assembly/instructions/outcome.js

@@ -0,0 +1,88 @@
+var __decorate = (this && this.__decorate) || function (decorators, target, key, desc) {
+    var c = arguments.length, r = c < 3 ? target : desc === null ? desc = Object.getOwnPropertyDescriptor(target, key) : desc, d;
+    if (typeof Reflect === "object" && typeof Reflect.decorate === "function") r = Reflect.decorate(decorators, target, key, desc);
+    else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;
+    return c > 3 && r && Object.defineProperty(target, key, r), r;
+};
+export var Result;
+(function (Result) {
+    Result[Result["PANIC"] = 0] = "PANIC";
+    Result[Result["FAULT"] = 1] = "FAULT";
+    Result[Result["FAULT_ACCESS"] = 2] = "FAULT_ACCESS";
+    Result[Result["HOST"] = 3] = "HOST";
+})(Result || (Result = {}));
+export var Outcome;
+(function (Outcome) {
+    Outcome[Outcome["Ok"] = 0] = "Ok";
+    Outcome[Outcome["StaticJump"] = 1] = "StaticJump";
+    Outcome[Outcome["DynamicJump"] = 2] = "DynamicJump";
+    Outcome[Outcome["Result"] = 3] = "Result";
+})(Outcome || (Outcome = {}));
+export class OutcomeData {
+    constructor() {
+        this.outcome = Outcome.Ok;
+        this.staticJump = 0;
+        this.dJump = 0;
+        this.result = Result.PANIC;
+        this.exitCode = 0;
+    }
+    static status(r, result) {
+        r.outcome = Outcome.Result;
+        r.result = result;
+        return r;
+    }
+    static staticJump(r, offset) {
+        r.outcome = Outcome.StaticJump;
+        r.staticJump = offset;
+        return r;
+    }
+    static dJump(r, address) {
+        r.outcome = Outcome.DynamicJump;
+        r.dJump = address;
+        return r;
+    }
+    static ok(r) {
+        // outcome is already pre-set to Ok by the interpreter loop
+        return r;
+    }
+    static panic(r) {
+        return OutcomeData.status(r, Result.PANIC);
+    }
+    static hostCall(r, id) {
+        r.outcome = Outcome.Result;
+        r.result = Result.HOST;
+        r.exitCode = id;
+        return r;
+    }
+    static okOrFault(r, pageFault) {
+        if (pageFault.isFault) {
+            r.outcome = Outcome.Result;
+            // not accessible memory does not result in `FAULT`, but rather goes straight to TRAP
+            // yet in gas calculations we still subtract 1, unlike TRAP, but like FAULT.
+            r.result = pageFault.isAccess ? Result.FAULT_ACCESS : Result.FAULT;
+            r.exitCode = pageFault.fault;
+        }
+        return r;
+    }
+}
+__decorate([
+    inline
+], OutcomeData, "status", null);
+__decorate([
+    inline
+], OutcomeData, "staticJump", null);
+__decorate([
+    inline
+], OutcomeData, "dJump", null);
+__decorate([
+    inline
+], OutcomeData, "ok", null);
+__decorate([
+    inline
+], OutcomeData, "panic", null);
+__decorate([
+    inline
+], OutcomeData, "hostCall", null);
+__decorate([
+    inline
+], OutcomeData, "okOrFault", null);

package/dist/build/js/assembly/instructions/rot.d.ts

@@ -0,0 +1,15 @@
+import { InstructionRun } from "./outcome";
+export declare const rot_r_64_imm: InstructionRun;
+export declare const rot_r_64_imm_alt: InstructionRun;
+export declare const rot_r_32_imm: InstructionRun;
+export declare const rot_r_32_imm_alt: InstructionRun;
+export declare const rot_l_64: InstructionRun;
+export declare const rot_l_32: InstructionRun;
+export declare const rot_r_64: InstructionRun;
+export declare const rot_r_32: InstructionRun;
+export declare namespace math {
+    function rot_r(v: u64, shift: u64): u64;
+    function rot_r_32(v: u32, shift: u32): u32;
+    function rot_l(v: u64, shift: u64): u64;
+    function rot_l_32(v: u32, shift: u32): u32;
+}

package/dist/build/js/assembly/instructions/rot.js

@@ -0,0 +1,66 @@
+import { portable } from "../portable";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
+// ROT_R_64_IMM
+export const rot_r_64_imm = (r, args, regs) => {
+    regs[Inst.reg(args.b)] = math.rot_r(regs[Inst.reg(args.a)], Inst.u32SignExtend(args.c));
+    return OutcomeData.ok(r);
+};
+// ROT_R_64_IMM_ALT
+export const rot_r_64_imm_alt = (r, args, regs) => {
+    regs[Inst.reg(args.b)] = math.rot_r(Inst.u32SignExtend(args.c), regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
+};
+// ROT_R_32_IMM
+export const rot_r_32_imm = (r, args, regs) => {
+    regs[Inst.reg(args.b)] = Inst.u32SignExtend(math.rot_r_32(u32(regs[Inst.reg(args.a)]), u32(args.c)));
+    return OutcomeData.ok(r);
+};
+// ROT_R_32_IMM_ALT
+export const rot_r_32_imm_alt = (r, args, regs) => {
+    regs[Inst.reg(args.b)] = Inst.u32SignExtend(math.rot_r_32(u32(args.c), u32(regs[Inst.reg(args.a)])));
+    return OutcomeData.ok(r);
+};
+// ROT_L_64
+export const rot_l_64 = (r, args, regs) => {
+    regs[Inst.reg(args.c)] = math.rot_l(regs[Inst.reg(args.b)], regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
+};
+// ROT_L_32
+export const rot_l_32 = (r, args, regs) => {
+    regs[Inst.reg(args.c)] = Inst.u32SignExtend(math.rot_l_32(u32(regs[Inst.reg(args.b)]), u32(regs[Inst.reg(args.a)])));
+    return OutcomeData.ok(r);
+};
+// ROT_R_64
+export const rot_r_64 = (r, args, regs) => {
+    regs[Inst.reg(args.c)] = math.rot_r(regs[Inst.reg(args.b)], regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
+};
+// ROT_R_32
+export const rot_r_32 = (r, args, regs) => {
+    regs[Inst.reg(args.c)] = Inst.u32SignExtend(math.rot_r_32(u32(regs[Inst.reg(args.b)]), u32(regs[Inst.reg(args.a)])));
+    return OutcomeData.ok(r);
+};
+export var math;
+(function (math) {
+    // @inline
+    function rot_r(v, shift) {
+        return portable.rotr_u64(v, shift);
+    }
+    math.rot_r = rot_r;
+    // @inline
+    function rot_r_32(v, shift) {
+        return portable.rotr_u32(v, shift);
+    }
+    math.rot_r_32 = rot_r_32;
+    // @inline
+    function rot_l(v, shift) {
+        return portable.rotl_u64(v, shift);
+    }
+    math.rot_l = rot_l;
+    // @inline
+    function rot_l_32(v, shift) {
+        return portable.rotl_u32(v, shift);
+    }
+    math.rot_l_32 = rot_l_32;
+})(math || (math = {}));

package/dist/build/js/assembly/instructions/set.d.ts

@@ -0,0 +1,7 @@
+import { InstructionRun } from "./outcome";
+export declare const set_lt_u_imm: InstructionRun;
+export declare const set_lt_s_imm: InstructionRun;
+export declare const set_gt_u_imm: InstructionRun;
+export declare const set_gt_s_imm: InstructionRun;
+export declare const set_lt_u: InstructionRun;
+export declare const set_lt_s: InstructionRun;

package/dist/build/js/assembly/instructions/set.js

@@ -0,0 +1,36 @@
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
+// SET_LT_U_IMM
+export const set_lt_u_imm = (r, args, registers) => {
+    const cond = registers[Inst.reg(args.a)] < u64(Inst.u32SignExtend(args.c));
+    registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
+    return OutcomeData.ok(r);
+};
+// SET_LT_S_IMM
+export const set_lt_s_imm = (r, args, registers) => {
+    const cond = i64(registers[Inst.reg(args.a)]) < i64(Inst.u32SignExtend(args.c));
+    registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
+    return OutcomeData.ok(r);
+};
+// SET_GT_U_IMM
+export const set_gt_u_imm = (r, args, registers) => {
+    const cond = registers[Inst.reg(args.a)] > u64(Inst.u32SignExtend(args.c));
+    registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
+    return OutcomeData.ok(r);
+};
+// SET_GT_S_IMM
+export const set_gt_s_imm = (r, args, registers) => {
+    const cond = i64(registers[Inst.reg(args.a)]) > i64(Inst.u32SignExtend(args.c));
+    registers[Inst.reg(args.b)] = cond ? u64(1) : u64(0);
+    return OutcomeData.ok(r);
+};
+// SET_LT_U
+export const set_lt_u = (r, args, registers) => {
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] < registers[Inst.reg(args.a)] ? u64(1) : u64(0);
+    return OutcomeData.ok(r);
+};
+// SET_LT_S
+export const set_lt_s = (r, args, registers) => {
+    registers[Inst.reg(args.c)] = i64(registers[Inst.reg(args.b)]) < i64(registers[Inst.reg(args.a)]) ? u64(1) : u64(0);
+    return OutcomeData.ok(r);
+};

package/dist/build/js/assembly/instructions/shift.d.ts

@@ -0,0 +1,19 @@
+import { InstructionRun } from "./outcome";
+export declare const shlo_l_imm_32: InstructionRun;
+export declare const shlo_r_imm_32: InstructionRun;
+export declare const shar_r_imm_32: InstructionRun;
+export declare const shlo_l_imm_alt_32: InstructionRun;
+export declare const shlo_r_imm_alt_32: InstructionRun;
+export declare const shar_r_imm_alt_32: InstructionRun;
+export declare const shlo_l_imm: InstructionRun;
+export declare const shlo_r_imm: InstructionRun;
+export declare const shar_r_imm: InstructionRun;
+export declare const shlo_l_imm_alt: InstructionRun;
+export declare const shlo_r_imm_alt: InstructionRun;
+export declare const shar_r_imm_alt: InstructionRun;
+export declare const shlo_l_32: InstructionRun;
+export declare const shlo_r_32: InstructionRun;
+export declare const shar_r_32: InstructionRun;
+export declare const shlo_l: InstructionRun;
+export declare const shlo_r: InstructionRun;
+export declare const shar_r: InstructionRun;

package/dist/build/js/assembly/instructions/shift.js

@@ -0,0 +1,121 @@
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
+const MAX_SHIFT_64 = 64;
+const MAX_SHIFT_32 = 32;
+// SHLO_L_IMM_32
+export const shlo_l_imm_32 = (r, args, registers) => {
+    const shift = u32(args.c % MAX_SHIFT_32);
+    const value = u32(registers[Inst.reg(args.a)]);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(value << shift);
+    return OutcomeData.ok(r);
+};
+// SHLO_R_IMM_32
+export const shlo_r_imm_32 = (r, args, registers) => {
+    const shift = u32(args.c % MAX_SHIFT_32);
+    const value = u32(registers[Inst.reg(args.a)]);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(value >>> shift);
+    return OutcomeData.ok(r);
+};
+// SHAR_R_IMM_32
+export const shar_r_imm_32 = (r, args, registers) => {
+    const shift = u32(args.c % MAX_SHIFT_32);
+    const value = Inst.u32SignExtend(u32(registers[Inst.reg(args.a)]));
+    registers[Inst.reg(args.b)] = u64(i64(value) >> i64(shift));
+    return OutcomeData.ok(r);
+};
+// SHLO_L_IMM_ALT_32
+export const shlo_l_imm_alt_32 = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c << shift);
+    return OutcomeData.ok(r);
+};
+// SHLO_R_IMM_ALT_32
+export const shlo_r_imm_alt_32 = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c >>> shift);
+    return OutcomeData.ok(r);
+};
+// SHAR_R_IMM_ALT_32
+export const shar_r_imm_alt_32 = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
+    const imm = Inst.u32SignExtend(args.c);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(i64(imm) >> i64(shift)));
+    return OutcomeData.ok(r);
+};
+// SHLO_L_IMM
+export const shlo_l_imm = (r, args, registers) => {
+    const shift = u32(args.c % MAX_SHIFT_64);
+    registers[Inst.reg(args.b)] = u64(registers[Inst.reg(args.a)] << u64(shift));
+    return OutcomeData.ok(r);
+};
+// SHLO_R_IMM
+export const shlo_r_imm = (r, args, registers) => {
+    const shift = u32(args.c % MAX_SHIFT_64);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] >> u64(shift);
+    return OutcomeData.ok(r);
+};
+// SHAR_R_IMM
+export const shar_r_imm = (r, args, registers) => {
+    const shift = u32(args.c % MAX_SHIFT_64);
+    const value = i64(registers[Inst.reg(args.a)]);
+    registers[Inst.reg(args.b)] = u64(value >> i64(shift));
+    return OutcomeData.ok(r);
+};
+// SHLO_L_IMM_ALT
+export const shlo_l_imm_alt = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
+    registers[Inst.reg(args.b)] = u64(Inst.u32SignExtend(args.c) << i64(shift));
+    return OutcomeData.ok(r);
+};
+// SHLO_R_IMM_ALT
+export const shlo_r_imm_alt = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
+    registers[Inst.reg(args.b)] = u64(Inst.u32SignExtend(args.c)) >> u64(shift);
+    return OutcomeData.ok(r);
+};
+// SHAR_R_IMM_ALT
+export const shar_r_imm_alt = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
+    const value = Inst.u32SignExtend(args.c);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(value >> i64(shift)));
+    return OutcomeData.ok(r);
+};
+// SHLO_L_32
+export const shlo_l_32 = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
+    const value = u32(registers[Inst.reg(args.b)]);
+    registers[Inst.reg(args.c)] = Inst.u32SignExtend(value << shift);
+    return OutcomeData.ok(r);
+};
+// SHLO_R_32
+export const shlo_r_32 = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
+    const value = u32(registers[Inst.reg(args.b)]);
+    registers[Inst.reg(args.c)] = Inst.u32SignExtend(value >>> shift);
+    return OutcomeData.ok(r);
+};
+// SHAR_R_32
+export const shar_r_32 = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_32));
+    const regValue = Inst.u32SignExtend(u32(registers[Inst.reg(args.b)]));
+    registers[Inst.reg(args.c)] = Inst.u32SignExtend(u32(i64(regValue) >> i64(shift)));
+    return OutcomeData.ok(r);
+};
+// SHLO_L
+export const shlo_l = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
+    registers[Inst.reg(args.c)] = u64(registers[Inst.reg(args.b)] << u64(shift));
+    return OutcomeData.ok(r);
+};
+// SHLO_R
+export const shlo_r = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] >> u64(shift);
+    return OutcomeData.ok(r);
+};
+// SHAR_R
+export const shar_r = (r, args, registers) => {
+    const shift = u32(registers[Inst.reg(args.a)] % u64(MAX_SHIFT_64));
+    registers[Inst.reg(args.c)] = u64(i64(registers[Inst.reg(args.b)]) >> i64(shift));
+    return OutcomeData.ok(r);
+};

package/dist/build/js/assembly/instructions/store.d.ts

@@ -0,0 +1,17 @@
+import { InstructionRun } from "./outcome";
+export declare const store_imm_u8: InstructionRun;
+export declare const store_imm_u16: InstructionRun;
+export declare const store_imm_u32: InstructionRun;
+export declare const store_imm_u64: InstructionRun;
+export declare const store_u8: InstructionRun;
+export declare const store_u16: InstructionRun;
+export declare const store_u32: InstructionRun;
+export declare const store_u64: InstructionRun;
+export declare const store_imm_ind_u8: InstructionRun;
+export declare const store_imm_ind_u16: InstructionRun;
+export declare const store_imm_ind_u32: InstructionRun;
+export declare const store_imm_ind_u64: InstructionRun;
+export declare const store_ind_u8: InstructionRun;
+export declare const store_ind_u16: InstructionRun;
+export declare const store_ind_u32: InstructionRun;
+export declare const store_ind_u64: InstructionRun;

package/dist/build/js/assembly/instructions/store.js

@@ -0,0 +1,101 @@
+import { MaybePageFault } from "../memory";
+import { portable } from "../portable";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
+const faultRes = new MaybePageFault();
+// Helper function to compute effective address from base register and signed 32-bit offset
+function effectiveAddress(registers, baseReg, offset) {
+    return u32(portable.u64_add(registers[Inst.reg(u64(baseReg))], Inst.u32SignExtend(offset)));
+}
+// STORE_IMM_U8
+export const store_imm_u8 = (r, args, _registers, memory) => {
+    const address = args.a;
+    memory.setU8(faultRes, address, (args.b & 0xff));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_U16
+export const store_imm_u16 = (r, args, _registers, memory) => {
+    const address = args.a;
+    memory.setU16(faultRes, address, (args.b & 65535));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_U32
+export const store_imm_u32 = (r, args, _registers, memory) => {
+    const address = args.a;
+    memory.setU32(faultRes, address, args.b);
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_U64
+export const store_imm_u64 = (r, args, _registers, memory) => {
+    const address = args.a;
+    memory.setU64(faultRes, address, Inst.u32SignExtend(args.b));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_U8
+export const store_u8 = (r, args, registers, memory) => {
+    memory.setU8(faultRes, args.b, (registers[Inst.reg(args.a)] & u64(0xff)));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_U16
+export const store_u16 = (r, args, registers, memory) => {
+    memory.setU16(faultRes, args.b, (registers[Inst.reg(args.a)] & u64(65535)));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_U32
+export const store_u32 = (r, args, registers, memory) => {
+    memory.setU32(faultRes, args.b, u32(registers[Inst.reg(args.a)]));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_U64
+export const store_u64 = (r, args, registers, memory) => {
+    memory.setU64(faultRes, args.b, registers[Inst.reg(args.a)]);
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_IND_U8
+export const store_imm_ind_u8 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.b);
+    memory.setU8(faultRes, address, (args.c & 0xff));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_IND_U16
+export const store_imm_ind_u16 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.b);
+    memory.setU16(faultRes, address, (args.c & 65535));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_IND_U32
+export const store_imm_ind_u32 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.b);
+    memory.setU32(faultRes, address, args.c);
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IMM_IND_U64
+export const store_imm_ind_u64 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.b);
+    memory.setU64(faultRes, address, Inst.u32SignExtend(args.c));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IND_U8
+export const store_ind_u8 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.c);
+    memory.setU8(faultRes, address, (registers[Inst.reg(args.b)] & u64(0xff)));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IND_U16
+export const store_ind_u16 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.c);
+    memory.setU16(faultRes, address, (registers[Inst.reg(args.b)] & u64(65535)));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IND_U32
+export const store_ind_u32 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.c);
+    memory.setU32(faultRes, address, u32(registers[Inst.reg(args.b)]));
+    return OutcomeData.okOrFault(r, faultRes);
+};
+// STORE_IND_U64
+export const store_ind_u64 = (r, args, registers, memory) => {
+    const address = effectiveAddress(registers, args.a, args.c);
+    memory.setU64(faultRes, address, registers[Inst.reg(args.b)]);
+    return OutcomeData.okOrFault(r, faultRes);
+};

package/dist/build/js/assembly/instructions/utils.d.ts

@@ -0,0 +1,25 @@
+/**
+ * Multiply two unsigned 64-bit numbers and take the upper 64-bits of the result.
+ *
+ * The result of multiplication is a 128-bits number and we are only interested in the part that lands in the upper 64-bits.
+ * For example (for 32-bit case) if we multiply `0xffffffff * 0xffffffff`, we get:
+
+ * |   32-bits  |   32-bits  |
+ * +------------+------------+
+ * |    upper   |    lower   |
+ * | 0xfffffffe | 0x00000001 |
+ *
+ * So `0xfffffffe` is returned.
+ */
+export declare function mulUpperUnsigned(a: u64, b: u64): u64;
+/**
+ * Same as [mulUpperUnsigned] but treat the arguments as signed (two-complement) 64-bit numbers and the result alike.
+ */
+export declare function mulUpperSigned(a: i64, b: i64): u64;
+export declare function mulUpperSignedUnsigned(a: i64, b: u64): u64;
+export declare class Inst {
+    static u8SignExtend(v: u8): i64;
+    static u16SignExtend(v: u16): i64;
+    static u32SignExtend(v: u32): i64;
+    static reg(v: u64): u32;
+}