@fluffylabs/anan-as 1.2.0-ef04361 → 1.3.0-1ebcf8f

package/dist/build/js/assembly/instructions/load.js

@@ -1,134 +1,134 @@
 import { MaybePageFault } from "../memory";
 import { portable } from "../portable";
-import { ok, okOrFault } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 const faultRes = new MaybePageFault();
 // LOAD_IMM_64
 export const load_imm_64 = (r, args, registers) => {
-    registers[reg(args.a)] = portable.u64_add(u64(args.b), u64(args.c) << u64(32));
-    return ok(r);
+    registers[Inst.reg(args.a)] = portable.u64_add(u64(args.b), u64(args.c) << u64(32));
+    return OutcomeData.ok(r);
 };
 // LOAD_IMM
 export const load_imm = (r, args, registers) => {
-    registers[reg(args.a)] = u32SignExtend(args.b);
-    return ok(r);
+    registers[Inst.reg(args.a)] = Inst.u32SignExtend(args.b);
+    return OutcomeData.ok(r);
 };
 // LOAD_U8
 export const load_u8 = (r, args, registers, memory) => {
     const result = memory.getU8(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_I8
 export const load_i8 = (r, args, registers, memory) => {
     const result = memory.getI8(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_U16
 export const load_u16 = (r, args, registers, memory) => {
     const result = memory.getU16(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_I16
 export const load_i16 = (r, args, registers, memory) => {
     const result = memory.getI16(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_U32
 export const load_u32 = (r, args, registers, memory) => {
     const result = memory.getU32(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_I32
 export const load_i32 = (r, args, registers, memory) => {
     const result = memory.getI32(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_U64
 export const load_u64 = (r, args, registers, memory) => {
     const result = memory.getU64(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U8
 export const load_ind_u8 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU8(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_I8
 export const load_ind_i8 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getI8(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U16
 export const load_ind_u16 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU16(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_I16
 export const load_ind_i16 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getI16(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U32
 export const load_ind_u32 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU32(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_I32
 export const load_ind_i32 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getI32(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U64
 export const load_ind_u64 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU64(faultRes, u32(address));
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };

package/dist/build/js/assembly/instructions/logic.js

@@ -1,47 +1,47 @@
-import { ok } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 // AND_IMM
 export const and_imm = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)] & u32SignExtend(args.c);
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] & Inst.u32SignExtend(args.c);
+    return OutcomeData.ok(r);
 };
 // XOR_IMM
 export const xor_imm = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)] ^ u32SignExtend(args.c);
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] ^ Inst.u32SignExtend(args.c);
+    return OutcomeData.ok(r);
 };
 // OR_IMM
 export const or_imm = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)] | u32SignExtend(args.c);
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] | Inst.u32SignExtend(args.c);
+    return OutcomeData.ok(r);
 };
 // AND
 export const and = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] & registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] & registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // XOR
 export const xor = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] ^ registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] ^ registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // OR
 export const or = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] | registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] | registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // AND_INV
 export const and_inv = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] & ~registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] & ~registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // OR_INV
 export const or_inv = (r, args, registers) => {
-    registers[reg(args.c)] = u64(registers[reg(args.b)] | ~registers[reg(args.a)]);
-    return ok(r);
+    registers[Inst.reg(args.c)] = u64(registers[Inst.reg(args.b)] | ~registers[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // XNOR
 export const xnor = (r, args, registers) => {
-    registers[reg(args.c)] = u64(~(registers[reg(args.b)] ^ registers[reg(args.a)]));
-    return ok(r);
+    registers[Inst.reg(args.c)] = u64(~(registers[Inst.reg(args.b)] ^ registers[Inst.reg(args.a)]));
+    return OutcomeData.ok(r);
 };

package/dist/build/js/assembly/instructions/math.js

@@ -1,225 +1,225 @@
 import { portable } from "../portable";
-import { ok } from "./outcome";
-import { mulUpperSigned, mulUpperSignedUnsigned, mulUpperUnsigned, reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst, mulUpperSigned, mulUpperSignedUnsigned, mulUpperUnsigned } from "./utils";
 // ADD_IMM_32
 export const add_imm_32 = (r, args, registers) => {
-    const a = registers[reg(args.a)];
-    const c = u32SignExtend(args.c);
-    registers[reg(args.b)] = u32SignExtend(u32(portable.u64_add(a, c)));
-    return ok(r);
+    const a = registers[Inst.reg(args.a)];
+    const c = Inst.u32SignExtend(args.c);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(portable.u64_add(a, c)));
+    return OutcomeData.ok(r);
 };
 // MUL_IMM_32
 export const mul_imm_32 = (r, args, registers) => {
-    registers[reg(args.b)] = u32SignExtend(u32(portable.u64_mul(registers[reg(args.a)], u64(args.c))));
-    return ok(r);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(portable.u64_mul(registers[Inst.reg(args.a)], u64(args.c))));
+    return OutcomeData.ok(r);
 };
 // NEG_ADD_IMM_32
 export const neg_add_imm_32 = (r, args, registers) => {
-    const sum = portable.u64_sub(u64(args.c) | u64(4294967296), registers[reg(args.a)]);
-    registers[reg(args.b)] = u32SignExtend(u32(sum));
-    return ok(r);
+    const sum = portable.u64_sub(u64(args.c) | u64(4294967296), registers[Inst.reg(args.a)]);
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(u32(sum));
+    return OutcomeData.ok(r);
 };
 // ADD_IMM
 export const add_imm = (r, args, registers) => {
-    const sum = portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c));
-    registers[reg(args.b)] = sum;
-    return ok(r);
+    const sum = portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c));
+    registers[Inst.reg(args.b)] = sum;
+    return OutcomeData.ok(r);
 };
 // MUL_IMM
 export const mul_imm = (r, args, registers) => {
-    registers[reg(args.b)] = portable.u64_mul(registers[reg(args.a)], u32SignExtend(args.c));
-    return ok(r);
+    registers[Inst.reg(args.b)] = portable.u64_mul(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c));
+    return OutcomeData.ok(r);
 };
 // NEG_ADD_IMM
 export const neg_add_imm = (r, args, registers) => {
-    const sum = portable.u64_sub(u32SignExtend(args.c), registers[reg(args.a)]);
-    registers[reg(args.b)] = sum;
-    return ok(r);
+    const sum = portable.u64_sub(Inst.u32SignExtend(args.c), registers[Inst.reg(args.a)]);
+    registers[Inst.reg(args.b)] = sum;
+    return OutcomeData.ok(r);
 };
 // ADD_32
 export const add_32 = (r, args, registers) => {
-    const a = u32(registers[reg(args.a)]);
-    const b = u32(registers[reg(args.b)]);
-    registers[reg(args.c)] = u32SignExtend(a + b);
-    return ok(r);
+    const a = u32(registers[Inst.reg(args.a)]);
+    const b = u32(registers[Inst.reg(args.b)]);
+    registers[Inst.reg(args.c)] = Inst.u32SignExtend(a + b);
+    return OutcomeData.ok(r);
 };
 // SUB_32
 export const sub_32 = (r, args, registers) => {
-    const a = registers[reg(args.b)];
-    const b = u64(4294967296 - u32(registers[reg(args.a)]));
-    registers[reg(args.c)] = u32SignExtend(u32(portable.u64_add(a, b)));
-    return ok(r);
+    const a = registers[Inst.reg(args.b)];
+    const b = u64(4294967296 - u32(registers[Inst.reg(args.a)]));
+    registers[Inst.reg(args.c)] = Inst.u32SignExtend(u32(portable.u64_add(a, b)));
+    return OutcomeData.ok(r);
 };
 // MUL_32
 export const mul_32 = (r, args, registers) => {
-    registers[reg(args.c)] = u32SignExtend(u32(portable.u64_mul(registers[reg(args.a)], registers[reg(args.b)])));
-    return ok(r);
+    registers[Inst.reg(args.c)] = Inst.u32SignExtend(u32(portable.u64_mul(registers[Inst.reg(args.a)], registers[Inst.reg(args.b)])));
+    return OutcomeData.ok(r);
 };
 // DIV_U_32
 export const div_u_32 = (r, args, registers) => {
-    const a = u32(registers[reg(args.a)]);
+    const a = u32(registers[Inst.reg(args.a)]);
     if (a === 0) {
-        registers[reg(args.c)] = u64.MAX_VALUE;
+        registers[Inst.reg(args.c)] = u64.MAX_VALUE;
     }
     else {
-        const b = u32(registers[reg(args.b)]);
-        registers[reg(args.c)] = u32SignExtend(b / a);
+        const b = u32(registers[Inst.reg(args.b)]);
+        registers[Inst.reg(args.c)] = Inst.u32SignExtend(b / a);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // DIV_S_32
 export const div_s_32 = (r, args, registers) => {
-    const b = i64(u32SignExtend(u32(registers[reg(args.b)])));
-    const a = i64(u32SignExtend(u32(registers[reg(args.a)])));
+    const b = i64(Inst.u32SignExtend(u32(registers[Inst.reg(args.b)])));
+    const a = i64(Inst.u32SignExtend(u32(registers[Inst.reg(args.a)])));
     if (a === i64(0)) {
-        registers[reg(args.c)] = u64.MAX_VALUE;
+        registers[Inst.reg(args.c)] = u64.MAX_VALUE;
     }
     else if (a === i64(-1) && b === i64(i32.MIN_VALUE)) {
-        registers[reg(args.c)] = u64(b);
+        registers[Inst.reg(args.c)] = u64(b);
     }
     else {
-        registers[reg(args.c)] = u64(b / a);
+        registers[Inst.reg(args.c)] = u64(b / a);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // REM_U_32
 export const rem_u_32 = (r, args, registers) => {
-    const a = u32(registers[reg(args.a)]);
-    const b = u32(registers[reg(args.b)]);
+    const a = u32(registers[Inst.reg(args.a)]);
+    const b = u32(registers[Inst.reg(args.b)]);
     if (a === 0) {
-        registers[reg(args.c)] = u32SignExtend(b);
+        registers[Inst.reg(args.c)] = Inst.u32SignExtend(b);
     }
     else {
-        registers[reg(args.c)] = u32SignExtend(b % a);
+        registers[Inst.reg(args.c)] = Inst.u32SignExtend(b % a);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // REM_S_32
 export const rem_s_32 = (r, args, registers) => {
-    const b = i32(registers[reg(args.b)]);
-    const a = i32(registers[reg(args.a)]);
+    const b = i32(registers[Inst.reg(args.b)]);
+    const a = i32(registers[Inst.reg(args.a)]);
     if (a === 0) {
-        registers[reg(args.c)] = u64(i64(b));
+        registers[Inst.reg(args.c)] = u64(i64(b));
     }
     else if (a === -1 && b === i32.MIN_VALUE) {
-        registers[reg(args.c)] = u64(0);
+        registers[Inst.reg(args.c)] = u64(0);
     }
     else {
-        registers[reg(args.c)] = u64(i64(b) % i64(a));
+        registers[Inst.reg(args.c)] = u64(i64(b) % i64(a));
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // ADD_64
 export const add_64 = (r, args, registers) => {
-    const a = registers[reg(args.a)];
-    const b = registers[reg(args.b)];
-    registers[reg(args.c)] = portable.u64_add(a, b);
-    return ok(r);
+    const a = registers[Inst.reg(args.a)];
+    const b = registers[Inst.reg(args.b)];
+    registers[Inst.reg(args.c)] = portable.u64_add(a, b);
+    return OutcomeData.ok(r);
 };
 // SUB
 export const sub = (r, args, registers) => {
-    const a = registers[reg(args.a)];
-    const b = registers[reg(args.b)];
-    registers[reg(args.c)] = portable.u64_sub(b, a);
-    return ok(r);
+    const a = registers[Inst.reg(args.a)];
+    const b = registers[Inst.reg(args.b)];
+    registers[Inst.reg(args.c)] = portable.u64_sub(b, a);
+    return OutcomeData.ok(r);
 };
 // MUL
 export const mul = (r, args, registers) => {
-    const a = registers[reg(args.a)];
-    const b = registers[reg(args.b)];
-    registers[reg(args.c)] = portable.u64_mul(a, b);
-    return ok(r);
+    const a = registers[Inst.reg(args.a)];
+    const b = registers[Inst.reg(args.b)];
+    registers[Inst.reg(args.c)] = portable.u64_mul(a, b);
+    return OutcomeData.ok(r);
 };
 // DIV_U
 export const div_u = (r, args, registers) => {
-    if (registers[reg(args.a)] === u64(0)) {
-        registers[reg(args.c)] = u64.MAX_VALUE;
+    if (registers[Inst.reg(args.a)] === u64(0)) {
+        registers[Inst.reg(args.c)] = u64.MAX_VALUE;
     }
     else {
-        registers[reg(args.c)] = registers[reg(args.b)] / registers[reg(args.a)];
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] / registers[Inst.reg(args.a)];
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // DIV_S
 export const div_s = (r, args, registers) => {
-    const b = i64(registers[reg(args.b)]);
-    const a = i64(registers[reg(args.a)]);
+    const b = i64(registers[Inst.reg(args.b)]);
+    const a = i64(registers[Inst.reg(args.a)]);
     if (a === i64(0)) {
-        registers[reg(args.c)] = u64.MAX_VALUE;
+        registers[Inst.reg(args.c)] = u64.MAX_VALUE;
     }
     else if (a === i64(-1) && b === i64.MIN_VALUE) {
-        registers[reg(args.c)] = u64(b);
+        registers[Inst.reg(args.c)] = u64(b);
     }
     else {
-        registers[reg(args.c)] = u64(b / a);
+        registers[Inst.reg(args.c)] = u64(b / a);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // REM_U
 export const rem_u = (r, args, registers) => {
-    if (registers[reg(args.a)] === u64(0)) {
-        registers[reg(args.c)] = registers[reg(args.b)];
+    if (registers[Inst.reg(args.a)] === u64(0)) {
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
     }
     else {
-        registers[reg(args.c)] = registers[reg(args.b)] % registers[reg(args.a)];
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] % registers[Inst.reg(args.a)];
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // REM_S
 export const rem_s = (r, args, registers) => {
-    const b = i64(registers[reg(args.b)]);
-    const a = i64(registers[reg(args.a)]);
+    const b = i64(registers[Inst.reg(args.b)]);
+    const a = i64(registers[Inst.reg(args.a)]);
     if (a === i64(0)) {
-        registers[reg(args.c)] = u64(b);
+        registers[Inst.reg(args.c)] = u64(b);
     }
     else if (a === i64(-1) && b === i64.MIN_VALUE) {
-        registers[reg(args.c)] = u64(0);
+        registers[Inst.reg(args.c)] = u64(0);
     }
     else {
-        registers[reg(args.c)] = u64(b % a);
+        registers[Inst.reg(args.c)] = u64(b % a);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // MUL_UPPER_S_S
 export const mul_upper_s_s = (r, args, registers) => {
-    registers[reg(args.c)] = mulUpperSigned(i64(registers[reg(args.b)]), i64(registers[reg(args.a)]));
-    return ok(r);
+    registers[Inst.reg(args.c)] = mulUpperSigned(i64(registers[Inst.reg(args.b)]), i64(registers[Inst.reg(args.a)]));
+    return OutcomeData.ok(r);
 };
 // MUL_UPPER_U_U
 export const mul_upper_u_u = (r, args, registers) => {
-    registers[reg(args.c)] = mulUpperUnsigned(registers[reg(args.b)], registers[reg(args.a)]);
-    return ok(r);
+    registers[Inst.reg(args.c)] = mulUpperUnsigned(registers[Inst.reg(args.b)], registers[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // MUL_UPPER_S_U
 export const mul_upper_s_u = (r, args, registers) => {
-    registers[reg(args.c)] = mulUpperSignedUnsigned(i64(registers[reg(args.b)]), registers[reg(args.a)]);
-    return ok(r);
+    registers[Inst.reg(args.c)] = mulUpperSignedUnsigned(i64(registers[Inst.reg(args.b)]), registers[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // MAX
 export const max = (r, args, registers) => {
-    const a = i64(registers[reg(args.a)]);
-    const b = i64(registers[reg(args.b)]);
-    registers[reg(args.c)] = u64(a < b ? b : a);
-    return ok(r);
+    const a = i64(registers[Inst.reg(args.a)]);
+    const b = i64(registers[Inst.reg(args.b)]);
+    registers[Inst.reg(args.c)] = u64(a < b ? b : a);
+    return OutcomeData.ok(r);
 };
 // MAX_U
 export const max_u = (r, args, registers) => {
-    const a = registers[reg(args.a)];
-    const b = registers[reg(args.b)];
-    registers[reg(args.c)] = a < b ? b : a;
-    return ok(r);
+    const a = registers[Inst.reg(args.a)];
+    const b = registers[Inst.reg(args.b)];
+    registers[Inst.reg(args.c)] = a < b ? b : a;
+    return OutcomeData.ok(r);
 };
 // MIN
 export const min = (r, args, registers) => {
-    const a = i64(registers[reg(args.a)]);
-    const b = i64(registers[reg(args.b)]);
-    registers[reg(args.c)] = u64(a > b ? b : a);
-    return ok(r);
+    const a = i64(registers[Inst.reg(args.a)]);
+    const b = i64(registers[Inst.reg(args.b)]);
+    registers[Inst.reg(args.c)] = u64(a > b ? b : a);
+    return OutcomeData.ok(r);
 };
 // MIN_U
 export const min_u = (r, args, registers) => {
-    const a = registers[reg(args.a)];
-    const b = registers[reg(args.b)];
-    registers[reg(args.c)] = a > b ? b : a;
-    return ok(r);
+    const a = registers[Inst.reg(args.a)];
+    const b = registers[Inst.reg(args.b)];
+    registers[Inst.reg(args.c)] = a > b ? b : a;
+    return OutcomeData.ok(r);
 };

package/dist/build/js/assembly/instructions/misc.js

@@ -1,22 +1,22 @@
 import { MaybePageFault } from "../memory";
-import { hostCall, ok, okOrFault, panic } from "./outcome";
-import { reg } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 const faultRes = new MaybePageFault();
 // INVALID
-export const INVALID = (r) => panic(r);
+export const INVALID = (r) => OutcomeData.panic(r);
 // TRAP
-export const trap = (r) => panic(r);
+export const trap = (r) => OutcomeData.panic(r);
 // FALLTHROUGH
-export const fallthrough = (r) => ok(r);
+export const fallthrough = (r) => OutcomeData.ok(r);
 // ECALLI
-export const ecalli = (r, args) => hostCall(r, args.a);
+export const ecalli = (r, args) => OutcomeData.hostCall(r, args.a);
 // SBRK
 export const sbrk = (r, args, registers, memory) => {
-    const res = memory.sbrk(faultRes, u32(registers[reg(args.a)]));
+    const res = memory.sbrk(faultRes, u32(registers[Inst.reg(args.a)]));
     // out of memory
     if (faultRes.isFault) {
-        return okOrFault(r, faultRes);
+        return OutcomeData.okOrFault(r, faultRes);
     }
-    registers[reg(args.b)] = res;
-    return ok(r);
+    registers[Inst.reg(args.b)] = res;
+    return OutcomeData.ok(r);
 };

package/dist/build/js/assembly/instructions/mov.js

@@ -1,35 +1,35 @@
-import { ok } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 // MOVE_REG
 export const move_reg = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // CMOV_IZ_IMM
 export const cmov_iz_imm = (r, args, registers) => {
-    if (registers[reg(args.a)] === u64(0)) {
-        registers[reg(args.b)] = u32SignExtend(args.c);
+    if (registers[Inst.reg(args.a)] === u64(0)) {
+        registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // CMOV_NZ_IMM
 export const cmov_nz_imm = (r, args, registers) => {
-    if (registers[reg(args.a)] !== u64(0)) {
-        registers[reg(args.b)] = u32SignExtend(args.c);
+    if (registers[Inst.reg(args.a)] !== u64(0)) {
+        registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // CMOV_IZ
 export const cmov_iz = (r, args, registers) => {
-    if (registers[reg(args.a)] === u64(0)) {
-        registers[reg(args.c)] = registers[reg(args.b)];
+    if (registers[Inst.reg(args.a)] === u64(0)) {
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // CMOV_NZ
 export const cmov_nz = (r, args, registers) => {
-    if (registers[reg(args.a)] !== u64(0)) {
-        registers[reg(args.c)] = registers[reg(args.b)];
+    if (registers[Inst.reg(args.a)] !== u64(0)) {
+        registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)];
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };