@fluffylabs/anan-as 1.2.0-c2b7f5a → 1.2.0-d2b00f9

package/dist/build/js/assembly/arguments.js

@@ -1,4 +1,4 @@
-import { minI32 } from "./math";
+import { IntMath } from "./math";
 import { portable } from "./portable";
 export var Arguments;
 (function (Arguments) {
@@ -51,7 +51,7 @@ export class Args {
 }
 function twoImm(args, code, offset, end) {
     const low = lowNibble(portable.staticArrayAt(code, offset));
-    const split = minI32(4, low) + 1;
+    const split = IntMath.minI32(4, low) + 1;
     const first = decodeI32(code, offset + 1, offset + split);
     const second = decodeI32(code, offset + split, end);
     return args.fill(first, second, 0, 0);
@@ -86,7 +86,7 @@ export const DECODERS = StaticArray.fromArray([
     (args, data, o, lim) => {
         const h = higNibble(data[o]);
         const l = lowNibble(data[o]);
-        const split = minI32(4, h) + 1;
+        const split = IntMath.minI32(4, h) + 1;
         const immA = decodeI32(data, o + 1, o + split);
         const immB = decodeI32(data, o + split, lim);
         return args.fill(l, immA, immB, 0);
@@ -95,7 +95,7 @@ export const DECODERS = StaticArray.fromArray([
     (args, data, o, lim) => {
         const h = higNibble(data[o]);
         const l = lowNibble(data[o]);
-        const split = minI32(4, h) + 1;
+        const split = IntMath.minI32(4, h) + 1;
         const immA = decodeI32(data, o + 1, o + split);
         const offs = decodeI32(data, o + split, lim);
         return args.fill(l, immA, offs, 0);

package/dist/build/js/assembly/instructions/bit.js

@@ -1,53 +1,53 @@
 import { portable } from "../portable";
-import { ok } from "./outcome";
-import { reg, u8SignExtend, u16SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 // COUNT_SET_BITS_64
 export const count_set_bits_64 = (r, args, regs) => {
-    regs[reg(args.b)] = portable.popcnt_u64(regs[reg(args.a)]);
-    return ok(r);
+    regs[Inst.reg(args.b)] = portable.popcnt_u64(regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // COUNT_SET_BITS_32
 export const count_set_bits_32 = (r, args, regs) => {
-    regs[reg(args.b)] = u64(portable.popcnt_u32(u32(regs[reg(args.a)])));
-    return ok(r);
+    regs[Inst.reg(args.b)] = u64(portable.popcnt_u32(u32(regs[Inst.reg(args.a)])));
+    return OutcomeData.ok(r);
 };
 // LEADING_ZERO_BITS_64
 export const leading_zero_bits_64 = (r, args, regs) => {
-    regs[reg(args.b)] = portable.clz_u64(regs[reg(args.a)]);
-    return ok(r);
+    regs[Inst.reg(args.b)] = portable.clz_u64(regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // LEADING_ZERO_BITS_32
 export const leading_zero_bits_32 = (r, args, regs) => {
-    regs[reg(args.b)] = u64(portable.clz_u32(u32(regs[reg(args.a)])));
-    return ok(r);
+    regs[Inst.reg(args.b)] = u64(portable.clz_u32(u32(regs[Inst.reg(args.a)])));
+    return OutcomeData.ok(r);
 };
 // TRAILING_ZERO_BITS_64
 export const trailing_zero_bits_64 = (r, args, regs) => {
-    regs[reg(args.b)] = portable.ctz_u64(regs[reg(args.a)]);
-    return ok(r);
+    regs[Inst.reg(args.b)] = portable.ctz_u64(regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // TRAILING_ZERO_BITS_32
 export const trailing_zero_bits_32 = (r, args, regs) => {
-    regs[reg(args.b)] = u64(portable.ctz_u32(u32(regs[reg(args.a)])));
-    return ok(r);
+    regs[Inst.reg(args.b)] = u64(portable.ctz_u32(u32(regs[Inst.reg(args.a)])));
+    return OutcomeData.ok(r);
 };
 // SIGN_EXTEND_8
 export const sign_extend_8 = (r, args, regs) => {
-    regs[reg(args.b)] = u8SignExtend(u8(regs[reg(args.a)]));
-    return ok(r);
+    regs[Inst.reg(args.b)] = Inst.u8SignExtend(u8(regs[Inst.reg(args.a)]));
+    return OutcomeData.ok(r);
 };
 // SIGN_EXTEND_16
 export const sign_extend_16 = (r, args, regs) => {
-    regs[reg(args.b)] = u16SignExtend(u16(regs[reg(args.a)]));
-    return ok(r);
+    regs[Inst.reg(args.b)] = Inst.u16SignExtend(u16(regs[Inst.reg(args.a)]));
+    return OutcomeData.ok(r);
 };
 // ZERO_EXTEND_16
 export const zero_extend_16 = (r, args, regs) => {
-    regs[reg(args.b)] = u64(u16(regs[reg(args.a)]));
-    return ok(r);
+    regs[Inst.reg(args.b)] = u64(u16(regs[Inst.reg(args.a)]));
+    return OutcomeData.ok(r);
 };
 // REVERSE_BYTES
 export const reverse_bytes = (r, args, regs) => {
-    regs[reg(args.b)] = portable.bswap_u64(regs[reg(args.a)]);
-    return ok(r);
+    regs[Inst.reg(args.b)] = portable.bswap_u64(regs[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };

package/dist/build/js/assembly/instructions/branch.js

@@ -1,120 +1,120 @@
-import { ok, staticJump } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 // BRANCH_EQ_IMM
 export const branch_eq_imm = (r, args, registers) => {
-    const b = u64(u32SignExtend(args.b));
-    if (registers[reg(args.a)] === b) {
-        return staticJump(r, args.c);
+    const b = u64(Inst.u32SignExtend(args.b));
+    if (registers[Inst.reg(args.a)] === b) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_NE_IMM
 export const branch_ne_imm = (r, args, registers) => {
-    const b = u64(u32SignExtend(args.b));
-    if (registers[reg(args.a)] !== b) {
-        return staticJump(r, args.c);
+    const b = u64(Inst.u32SignExtend(args.b));
+    if (registers[Inst.reg(args.a)] !== b) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_LT_U_IMM
 export const branch_lt_u_imm = (r, args, registers) => {
-    const b = u64(u32SignExtend(args.b));
-    if (registers[reg(args.a)] < b) {
-        return staticJump(r, args.c);
+    const b = u64(Inst.u32SignExtend(args.b));
+    if (registers[Inst.reg(args.a)] < b) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_LE_U_IMM
 export const branch_le_u_imm = (r, args, registers) => {
-    const b = u64(u32SignExtend(args.b));
-    if (registers[reg(args.a)] <= b) {
-        return staticJump(r, args.c);
+    const b = u64(Inst.u32SignExtend(args.b));
+    if (registers[Inst.reg(args.a)] <= b) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_GE_U_IMM
 export const branch_ge_u_imm = (r, args, registers) => {
-    const b = u64(u32SignExtend(args.b));
-    if (registers[reg(args.a)] >= b) {
-        return staticJump(r, args.c);
+    const b = u64(Inst.u32SignExtend(args.b));
+    if (registers[Inst.reg(args.a)] >= b) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_GT_U_IMM
 export const branch_gt_u_imm = (r, args, registers) => {
-    const b = u64(u32SignExtend(args.b));
-    if (registers[reg(args.a)] > b) {
-        return staticJump(r, args.c);
+    const b = u64(Inst.u32SignExtend(args.b));
+    if (registers[Inst.reg(args.a)] > b) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_LT_S_IMM
 export const branch_lt_s_imm = (r, args, registers) => {
-    if (i64(registers[reg(args.a)]) < i64(u32SignExtend(args.b))) {
-        return staticJump(r, args.c);
+    if (i64(registers[Inst.reg(args.a)]) < i64(Inst.u32SignExtend(args.b))) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_LE_S_IMM
 export const branch_le_s_imm = (r, args, registers) => {
-    if (i64(registers[reg(args.a)]) <= i64(u32SignExtend(args.b))) {
-        return staticJump(r, args.c);
+    if (i64(registers[Inst.reg(args.a)]) <= i64(Inst.u32SignExtend(args.b))) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_GE_S_IMM
 export const branch_ge_s_imm = (r, args, registers) => {
-    if (i64(registers[reg(args.a)]) >= i64(u32SignExtend(args.b))) {
-        return staticJump(r, args.c);
+    if (i64(registers[Inst.reg(args.a)]) >= i64(Inst.u32SignExtend(args.b))) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_GT_S_IMM
 export const branch_gt_s_imm = (r, args, registers) => {
-    if (i64(registers[reg(args.a)]) > i64(u32SignExtend(args.b))) {
-        return staticJump(r, args.c);
+    if (i64(registers[Inst.reg(args.a)]) > i64(Inst.u32SignExtend(args.b))) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_EQ
 export const branch_eq = (r, args, registers) => {
-    if (registers[reg(args.a)] === registers[reg(args.b)]) {
-        return staticJump(r, args.c);
+    if (registers[Inst.reg(args.a)] === registers[Inst.reg(args.b)]) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_NE
 export const branch_ne = (r, args, registers) => {
-    if (registers[reg(args.a)] !== registers[reg(args.b)]) {
-        return staticJump(r, args.c);
+    if (registers[Inst.reg(args.a)] !== registers[Inst.reg(args.b)]) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_LT_U
 export const branch_lt_u = (r, args, registers) => {
-    if (registers[reg(args.b)] < registers[reg(args.a)]) {
-        return staticJump(r, args.c);
+    if (registers[Inst.reg(args.b)] < registers[Inst.reg(args.a)]) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_LT_S
 export const branch_lt_s = (r, args, registers) => {
-    if (i64(registers[reg(args.b)]) < i64(registers[reg(args.a)])) {
-        return staticJump(r, args.c);
+    if (i64(registers[Inst.reg(args.b)]) < i64(registers[Inst.reg(args.a)])) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_GE_U
 export const branch_ge_u = (r, args, registers) => {
-    if (registers[reg(args.b)] >= registers[reg(args.a)]) {
-        return staticJump(r, args.c);
+    if (registers[Inst.reg(args.b)] >= registers[Inst.reg(args.a)]) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };
 // BRANCH_GE_S
 export const branch_ge_s = (r, args, registers) => {
-    if (i64(registers[reg(args.b)]) >= i64(registers[reg(args.a)])) {
-        return staticJump(r, args.c);
+    if (i64(registers[Inst.reg(args.b)]) >= i64(registers[Inst.reg(args.a)])) {
+        return OutcomeData.staticJump(r, args.c);
     }
-    return ok(r);
+    return OutcomeData.ok(r);
 };

package/dist/build/js/assembly/instructions/jump.js

@@ -1,21 +1,21 @@
 import { portable } from "../portable";
-import { dJump, staticJump } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 // JUMP
-export const jump = (r, args) => staticJump(r, args.a);
+export const jump = (r, args) => OutcomeData.staticJump(r, args.a);
 // JUMP_IND
 export const jump_ind = (r, args, registers) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.b)));
-    return dJump(r, address);
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.b)));
+    return OutcomeData.dJump(r, address);
 };
 // LOAD_IMM_JUMP
 export const load_imm_jump = (r, args, registers) => {
-    registers[reg(args.a)] = u32SignExtend(args.b);
-    return staticJump(r, args.c);
+    registers[Inst.reg(args.a)] = Inst.u32SignExtend(args.b);
+    return OutcomeData.staticJump(r, args.c);
 };
 // LOAD_IMM_JUMP_IND
 export const load_imm_jump_ind = (r, args, registers) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.d)));
-    registers[reg(args.b)] = u32SignExtend(args.c);
-    return dJump(r, address);
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.d)));
+    registers[Inst.reg(args.b)] = Inst.u32SignExtend(args.c);
+    return OutcomeData.dJump(r, address);
 };

package/dist/build/js/assembly/instructions/load.js

@@ -1,134 +1,134 @@
 import { MaybePageFault } from "../memory";
 import { portable } from "../portable";
-import { ok, okOrFault } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 const faultRes = new MaybePageFault();
 // LOAD_IMM_64
 export const load_imm_64 = (r, args, registers) => {
-    registers[reg(args.a)] = portable.u64_add(u64(args.b), u64(args.c) << u64(32));
-    return ok(r);
+    registers[Inst.reg(args.a)] = portable.u64_add(u64(args.b), u64(args.c) << u64(32));
+    return OutcomeData.ok(r);
 };
 // LOAD_IMM
 export const load_imm = (r, args, registers) => {
-    registers[reg(args.a)] = u32SignExtend(args.b);
-    return ok(r);
+    registers[Inst.reg(args.a)] = Inst.u32SignExtend(args.b);
+    return OutcomeData.ok(r);
 };
 // LOAD_U8
 export const load_u8 = (r, args, registers, memory) => {
     const result = memory.getU8(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_I8
 export const load_i8 = (r, args, registers, memory) => {
     const result = memory.getI8(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_U16
 export const load_u16 = (r, args, registers, memory) => {
     const result = memory.getU16(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_I16
 export const load_i16 = (r, args, registers, memory) => {
     const result = memory.getI16(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_U32
 export const load_u32 = (r, args, registers, memory) => {
     const result = memory.getU32(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_I32
 export const load_i32 = (r, args, registers, memory) => {
     const result = memory.getI32(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_U64
 export const load_u64 = (r, args, registers, memory) => {
     const result = memory.getU64(faultRes, args.b);
     if (!faultRes.isFault) {
-        registers[reg(args.a)] = result;
+        registers[Inst.reg(args.a)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U8
 export const load_ind_u8 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU8(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_I8
 export const load_ind_i8 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getI8(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U16
 export const load_ind_u16 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU16(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_I16
 export const load_ind_i16 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getI16(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U32
 export const load_ind_u32 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU32(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_I32
 export const load_ind_i32 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getI32(faultRes, address);
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };
 // LOAD_IND_U64
 export const load_ind_u64 = (r, args, registers, memory) => {
-    const address = u32(portable.u64_add(registers[reg(args.a)], u32SignExtend(args.c)));
+    const address = u32(portable.u64_add(registers[Inst.reg(args.a)], Inst.u32SignExtend(args.c)));
     const result = memory.getU64(faultRes, u32(address));
     if (!faultRes.isFault) {
-        registers[reg(args.b)] = result;
+        registers[Inst.reg(args.b)] = result;
     }
-    return okOrFault(r, faultRes);
+    return OutcomeData.okOrFault(r, faultRes);
 };

package/dist/build/js/assembly/instructions/logic.js

@@ -1,47 +1,47 @@
-import { ok } from "./outcome";
-import { reg, u32SignExtend } from "./utils";
+import { OutcomeData } from "./outcome";
+import { Inst } from "./utils";
 // AND_IMM
 export const and_imm = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)] & u32SignExtend(args.c);
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] & Inst.u32SignExtend(args.c);
+    return OutcomeData.ok(r);
 };
 // XOR_IMM
 export const xor_imm = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)] ^ u32SignExtend(args.c);
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] ^ Inst.u32SignExtend(args.c);
+    return OutcomeData.ok(r);
 };
 // OR_IMM
 export const or_imm = (r, args, registers) => {
-    registers[reg(args.b)] = registers[reg(args.a)] | u32SignExtend(args.c);
-    return ok(r);
+    registers[Inst.reg(args.b)] = registers[Inst.reg(args.a)] | Inst.u32SignExtend(args.c);
+    return OutcomeData.ok(r);
 };
 // AND
 export const and = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] & registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] & registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // XOR
 export const xor = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] ^ registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] ^ registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // OR
 export const or = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] | registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] | registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // AND_INV
 export const and_inv = (r, args, registers) => {
-    registers[reg(args.c)] = registers[reg(args.b)] & ~registers[reg(args.a)];
-    return ok(r);
+    registers[Inst.reg(args.c)] = registers[Inst.reg(args.b)] & ~registers[Inst.reg(args.a)];
+    return OutcomeData.ok(r);
 };
 // OR_INV
 export const or_inv = (r, args, registers) => {
-    registers[reg(args.c)] = u64(registers[reg(args.b)] | ~registers[reg(args.a)]);
-    return ok(r);
+    registers[Inst.reg(args.c)] = u64(registers[Inst.reg(args.b)] | ~registers[Inst.reg(args.a)]);
+    return OutcomeData.ok(r);
 };
 // XNOR
 export const xnor = (r, args, registers) => {
-    registers[reg(args.c)] = u64(~(registers[reg(args.b)] ^ registers[reg(args.a)]));
-    return ok(r);
+    registers[Inst.reg(args.c)] = u64(~(registers[Inst.reg(args.b)] ^ registers[Inst.reg(args.a)]));
+    return OutcomeData.ok(r);
 };