@elizaos/app-core 2.0.0-beta.3 → 2.0.3-beta.3

package/scripts/bun-riscv64/rust-core/0002-second-wave-riscv64-source-gaps.patch

@@ -0,0 +1,130 @@
+diff --git a/src/bun_core/Global.rs b/src/bun_core/Global.rs
+index b43c309..bcc4587 100644
+--- a/src/bun_core/Global.rs
++++ b/src/bun_core/Global.rs
+@@ -525,6 +525,8 @@ pub const arch_name: &str = if cfg!(target_arch = "x86_64") {
+     "x86"
+ } else if cfg!(target_arch = "aarch64") {
+     "arm64"
++} else if cfg!(target_arch = "riscv64") {
++    "riscv64"
+ } else {
+     "unknown"
+ };
+diff --git a/src/bun_core/env.rs b/src/bun_core/env.rs
+index 85fe5aa..32754b2 100644
+--- a/src/bun_core/env.rs
++++ b/src/bun_core/env.rs
+@@ -41,6 +41,7 @@ pub(crate) const IS_FREEBSD: bool = cfg!(target_os = "freebsd");
+ pub const IS_KQUEUE: bool = IS_MAC || IS_FREEBSD;
+ pub(crate) const IS_AARCH64: bool = cfg!(target_arch = "aarch64");
+ pub(crate) const IS_X64: bool = cfg!(target_arch = "x86_64");
++pub(crate) const IS_RISCV64: bool = cfg!(target_arch = "riscv64");
+ pub const IS_MUSL: bool = cfg!(target_env = "musl");
+ pub const IS_ANDROID: bool = cfg!(target_os = "android");
+ pub const ALLOW_ASSERT: bool = IS_DEBUG || IS_TEST || build_options::RELEASE_SAFE;
+@@ -206,6 +207,7 @@ pub const OS_NAME_NPM: &str = OS.npm_name();
+ pub enum Architecture {
+     X64,
+     Arm64,
++    Riscv64,
+     Wasm,
+ }
+ 
+@@ -215,6 +217,7 @@ impl Architecture {
+         match self {
+             Self::X64 => "x64",
+             Self::Arm64 => "aarch64",
++            Self::Riscv64 => "riscv64",
+             Self::Wasm => "wasm",
+         }
+     }
+@@ -225,6 +228,7 @@ impl Architecture {
+         b"amd64" => Architecture::X64,
+         b"aarch64" => Architecture::Arm64,
+         b"arm64" => Architecture::Arm64,
++        b"riscv64" => Architecture::Riscv64,
+         b"wasm" => Architecture::Wasm,
+     };
+ }
+@@ -235,6 +239,8 @@ pub const ARCH: Architecture = if IS_WASM {
+     Architecture::X64
+ } else if IS_AARCH64 {
+     Architecture::Arm64
++} else if IS_RISCV64 {
++    Architecture::Riscv64
+ } else {
+     panic!("Please add your architecture to the Architecture enum")
+ };
+diff --git a/src/crash_handler/CPUFeatures.rs b/src/crash_handler/CPUFeatures.rs
+index c9deab1..48ad070 100644
+--- a/src/crash_handler/CPUFeatures.rs
++++ b/src/crash_handler/CPUFeatures.rs
+@@ -48,7 +48,24 @@ bitflags::bitflags! {
+     }
+ }
+ 
+-#[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
++// riscv64: `bun_cpu_features()` (CPUFeatures.cpp, CPU(RISCV64)) returns 0 — no
++// feature bits are surfaced in crash diagnostics — so only the NONE sentinel is
++// modeled. Keeps `get()`'s padding assert valid (raw == 0).
++#[cfg(target_arch = "riscv64")]
++bitflags::bitflags! {
++    #[repr(transparent)]
++    #[derive(Copy, Clone)]
++    pub struct Flags: u8 {
++        const NONE = 1 << 0;
++        // bits 1..=7 = padding
++    }
++}
++
++#[cfg(not(any(
++    target_arch = "x86_64",
++    target_arch = "aarch64",
++    target_arch = "riscv64"
++)))]
+ compile_error!("CPUFeatures: unsupported target architecture");
+ 
+ // Zig `inline for (@typeInfo(Flags).@"struct".fields)` — comptime reflection over
+@@ -72,6 +89,9 @@ const NAMED_FLAGS: &[(&str, Flags)] = &[
+     ("sve", Flags::SVE),
+ ];
+ 
++#[cfg(target_arch = "riscv64")]
++const NAMED_FLAGS: &[(&str, Flags)] = &[];
++
+ impl fmt::Display for CPUFeatures {
+     fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+         let mut is_first = true;
+diff --git a/src/perf/hw_timer.rs b/src/perf/hw_timer.rs
+index 736ff3f..a7820b8 100644
+--- a/src/perf/hw_timer.rs
++++ b/src/perf/hw_timer.rs
+@@ -57,7 +57,26 @@ pub fn read_counter() -> u64 {
+         }
+         return ((hi as u64) << 32) | (lo as u64);
+     }
+-    #[cfg(not(any(target_arch = "aarch64", target_arch = "x86_64")))]
++    #[cfg(target_arch = "riscv64")]
++    {
++        let ret: u64;
++        // SAFETY: the `time` CSR (rdtime) is a side-effect-free, userspace-readable
++        // fixed-frequency counter on riscv64 Linux — the direct analog of aarch64's
++        // CNTVCT_EL0. (`rdcycle` is privileged on many kernels; `time` is not.)
++        unsafe {
++            core::arch::asm!(
++                "rdtime {ret}",
++                ret = out(reg) ret,
++                options(nomem, nostack, preserves_flags),
++            );
++        }
++        return ret;
++    }
++    #[cfg(not(any(
++        target_arch = "aarch64",
++        target_arch = "x86_64",
++        target_arch = "riscv64"
++    )))]
+     compile_error!("hw_timer::read_counter: unsupported architecture");
+ }
+ 

package/scripts/bun-riscv64/rust-core/0003-third-wave-riscv64-crash-handler-gaps.patch

@@ -0,0 +1,78 @@
+Subject: [PATCH] riscv64 Rust-core bun: crash_handler riscv64 arms (third wave)
+
+The Rust-core crash_handler (src/crash_handler/lib.rs) has three arch-cfg
+sites that the 0002 second-wave patch did not cover. Of these, `Platform::CURRENT`
+is a HARD compile error on riscv64; the other two are correctness fixes.
+
+- `Platform::CURRENT` (`const CURRENT: u8`): a `#[cfg]` matrix over
+  OS x arch x baseline with NO catch-all arm. On riscv64-linux none of the
+  arms match, so the const-init block has no tail value and fails to compile
+  with `expected u8, found ()`. Add a `(linux/android, riscv64) -> b'r'` arm.
+  riscv64 ships C_LOOP-only (no Baseline JIT), so one non-baseline code is
+  enough; 'r' does not collide with the existing matrix (l/B/L/m/b/M/w/e/W/f/g/F).
+
+- `fault_context_from_ucontext`: add a `(linux, riscv64)` arm that reads
+  `(pc, fp)` from `uc_mcontext.__gregs` (index 0 = PC, index 8 = x8/s0 frame
+  pointer), and add riscv64 to the trailing `not(any(...))` exclusion so the
+  None fallback no longer also compiles on riscv64. Without this arm the code
+  still compiles (riscv64 took the None fallback), but the fault-frame seed for
+  the backtrace was lost; this restores it, mirroring the aarch64 arm.
+
+- `ARCH_DISPLAY_STRING`: add a riscv64 arm so the crash-report metadata line
+  shows "riscv64" instead of falling through to "x64".
+
+All additive; not C_LOOP-specific. Follows the 0002 second-wave pattern.
+
+diff --git a/src/crash_handler/lib.rs b/src/crash_handler/lib.rs
+index 8d79544..9517acd 100644
+--- a/src/crash_handler/lib.rs
++++ b/src/crash_handler/lib.rs
+@@ -1577,6 +1577,8 @@ mod draft {
+         } else {
+             "arm64"
+         }
++    } else if cfg!(target_arch = "riscv64") {
++        "riscv64"
+     } else {
+         "x64"
+     };
+@@ -1641,9 +1643,20 @@ mod draft {
+             }
+             Some(((*mc).__ss.__pc as usize, (*mc).__ss.__fp as usize))
+         }
++        #[cfg(all(target_os = "linux", target_arch = "riscv64"))]
++        // SAFETY: the kernel passes a valid ucontext_t as the handler's 3rd arg.
++        // riscv64 mcontext stores the integer registers in `__gregs[0..32]`:
++        // index 0 is the PC, index 8 is x8/s0 — the frame pointer under the
++        // standard RISC-V calling convention. Analog of the aarch64
++        // (pc, regs[29]) arm above.
++        unsafe {
++            let mc = &(*uc).uc_mcontext;
++            Some((mc.__gregs[0] as usize, mc.__gregs[8] as usize))
++        }
+         #[cfg(not(any(
+             all(target_os = "linux", target_arch = "x86_64"),
+             all(target_os = "linux", target_arch = "aarch64"),
++            all(target_os = "linux", target_arch = "riscv64"),
+             all(target_os = "macos", target_arch = "x86_64"),
+             all(target_os = "macos", target_arch = "aarch64"),
+         )))]
+@@ -2343,6 +2356,18 @@ mod draft {
+             {
+                 b'L'
+             }
++            // riscv64 has no Baseline JIT variant in the shipped artifact (C_LOOP
++            // only), so a single non-baseline code suffices. 'r' is unused by the
++            // existing matrix (l/B/L/m/b/M/w/e/W/f/g/F); bun.report cannot decode
++            // riscv64 traces regardless (no upstream riscv64 build), so this only
++            // needs to be a stable, collision-free single byte.
++            #[cfg(all(
++                any(target_os = "linux", target_os = "android"),
++                target_arch = "riscv64"
++            ))]
++            {
++                b'r'
++            }
+             #[cfg(all(target_os = "macos", target_arch = "x86_64", not(feature = "baseline")))]
+             {
+                 b'm'

package/scripts/bun-riscv64/rust-core/0004-rust-target-cpu-riscv64.patch

@@ -0,0 +1,39 @@
+Subject: [PATCH] riscv64 Rust-core bun: set -Ctarget-cpu=generic-rv64 (not cortex-a72)
+
+scripts/build/rust.ts derives the Rust `-Ctarget-cpu` from the arch so Rust
+codegen matches the C/C++ ISA. The chain was x64 -> nehalem/haswell, darwin ->
+apple-m1, else -> "cortex-a72" (the aarch64 default). riscv64 has no branch, so
+it fell through to "cortex-a72" — an ARM CPU — and rustc aborted while building
+core/compiler_builtins with:
+
+    rustc-LLVM ERROR: RV64 target requires an RV64 CPU
+
+Add a `cfg.riscv64 -> "generic-rv64"` branch. `generic-rv64` is rustc's default
+CPU for riscv64gc-unknown-linux-musl and matches the C/C++ side's
+`-march=rv64gc -mabi=lp64d` (flags.ts / build.sh). This is the build-system
+counterpart to 0001's rustTarget() target-triple fix; kept as a focused hunk so
+it applies cleanly on top of 0001 (0001 leaves this cpuTarget block untouched —
+upstream 9d000561 already carries the riscv64gc target wiring).
+
+diff --git a/scripts/build/rust.ts b/scripts/build/rust.ts
+index a2328ddb..c232f331 100644
+--- a/scripts/build/rust.ts
++++ b/scripts/build/rust.ts
+@@ -467,8 +467,15 @@ export function emitRust(n: Ninja, cfg: Config, inputs: RustBuildInputs): string
+       : "haswell"
+     : cfg.darwin
+       ? "apple-m1"
+-      : // armv8-a+crc isn't a CPU name — closest LLVM model with CRC baseline:
+-        "cortex-a72";
++      : cfg.riscv64
++        ? // LLVM's generic RV64 model — the default CPU for
++          // riscv64gc-unknown-linux-musl; matches the C/C++ side's
++          // `-march=rv64gc -mabi=lp64d`. Without this, riscv64 fell through to
++          // the aarch64 "cortex-a72" branch and rustc aborted while building
++          // core/compiler_builtins: "RV64 target requires an RV64 CPU".
++          "generic-rv64"
++        : // armv8-a+crc isn't a CPU name — closest LLVM model with CRC baseline:
++          "cortex-a72";
+   rustflags.push(`-Ctarget-cpu=${cpuTarget}`);
+   // `bun_core::build_options::ENABLE_ASAN = cfg!(bun_asan)` — must agree with
+   // the C++ `ASAN_ENABLED` macro so Global::exit() picks the same libc exit

package/scripts/bun-riscv64/rust-core/0005-fifth-wave-riscv64-source-gaps.patch

@@ -0,0 +1,96 @@
+Subject: [PATCH] riscv64 Rust-core bun: arch arms for npm Architecture + Windows teb/peb (fifth wave)
+
+Two more Rust source sites that gate on target_arch without a riscv64 arm,
+surfaced once the cargo build reached bun's own crates:
+
+- src/install_types/resolver_hooks.rs — the npm `cpu`-field bitflag
+  `Architecture` (Node os.arch() vocabulary). `CURRENT` and `CURRENT_NAME` had
+  only aarch64/x86_64 arms and no catch-all, so on riscv64 the consts are `()`
+  (E0308; callers in install/PackageManager + install_jsc/npm_jsc use them
+  unconditionally). Add a `RISCV64` bit (1<<12), include it in `ALL_VALUE`, add
+  `b"riscv64" => RISCV64` to the name parser (so a package.json `cpu:
+  ["riscv64"]` resolves), and add the riscv64 `CURRENT`/`CURRENT_NAME` arms.
+
+- src/windows_sys/externs.rs — `teb()`/`peb()` read the Windows TEB/PEB via
+  x86_64 (`gs:`) / aarch64 (`x18`) inline asm with no catch-all, so the bodies
+  are `()` on riscv64 (E0308). `bun_windows_sys` is a workspace member and must
+  compile on every target, but these fns are never called off Windows. Add a
+  `not(any(x86_64, aarch64))` arm that `unreachable!()`s so the fn typechecks.
+
+All additive arch arms; mirror the existing 0002/0003 pattern.
+
+diff --git a/src/install_types/resolver_hooks.rs b/src/install_types/resolver_hooks.rs
+index fa685634..36ef0dc5 100644
+--- a/src/install_types/resolver_hooks.rs
++++ b/src/install_types/resolver_hooks.rs
+@@ -956,6 +956,7 @@ impl Architecture {
+     pub const S390X: u16 = 1 << 9;
+     pub const X32: u16 = 1 << 10;
+     pub const X64: u16 = 1 << 11;
++    pub const RISCV64: u16 = 1 << 12;
+
+     pub const ALL_VALUE: u16 = Self::ARM
+         | Self::ARM64
+@@ -967,17 +968,22 @@ impl Architecture {
+         | Self::S390
+         | Self::S390X
+         | Self::X32
+-        | Self::X64;
++        | Self::X64
++        | Self::RISCV64;
+
+     #[cfg(target_arch = "aarch64")]
+     pub const CURRENT: Self = Self(Self::ARM64);
+     #[cfg(target_arch = "x86_64")]
+     pub const CURRENT: Self = Self(Self::X64);
++    #[cfg(target_arch = "riscv64")]
++    pub const CURRENT: Self = Self(Self::RISCV64);
+
+     #[cfg(target_arch = "aarch64")]
+     pub const CURRENT_NAME: &'static str = "arm64";
+     #[cfg(target_arch = "x86_64")]
+     pub const CURRENT_NAME: &'static str = "x64";
++    #[cfg(target_arch = "riscv64")]
++    pub const CURRENT_NAME: &'static str = "riscv64";
+
+     #[inline]
+     pub const fn none() -> Self {
+@@ -1005,6 +1011,7 @@ negatable_names! { Architecture: u16 => [
+     b"arm" => ARM, b"ppc" => PPC, b"x32" => X32, b"x64" => X64,
+     b"ia32" => IA32, b"mips" => MIPS, b"s390" => S390,
+     b"arm64" => ARM64, b"ppc64" => PPC64, b"s390x" => S390X, b"mipsel" => MIPSEL,
++    b"riscv64" => RISCV64,
+ ] }
+
+ // ─── Repository (data) ────────────────────────────────────────────────────
+diff --git a/src/windows_sys/externs.rs b/src/windows_sys/externs.rs
+index f6c0770a..78ec6974 100644
+--- a/src/windows_sys/externs.rs
++++ b/src/windows_sys/externs.rs
+@@ -1608,6 +1608,14 @@ pub fn teb() -> *mut TEB {
+         core::arch::asm!("mov {}, x18", out(reg) p, options(nostack, pure, readonly));
+         p
+     }
++    // TEB is a Windows-x64/arm64 ABI concept. This crate is a workspace member
++    // so it must compile on every target (e.g. the riscv64-linux cross-build),
++    // but teb() is never called off Windows. Give the otherwise-empty body a
++    // diverging value so the fn typechecks without an x86_64/aarch64 arm.
++    #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
++    {
++        unreachable!("teb() is only valid on Windows x86_64/aarch64")
++    }
+ }
+
+ /// `std.os.windows.peb()` — reads `gs:[0x60]` (x64) / `TEB+0x60` (ARM64).
+@@ -1636,6 +1644,11 @@ pub fn peb() -> *const PEB {
+             .cast::<core::ffi::c_void>()
+             .cast::<*const PEB>()
+     }
++    // PEB is a Windows-x64/arm64 ABI concept; never read off Windows. See teb().
++    #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))]
++    {
++        unreachable!("peb() is only valid on Windows x86_64/aarch64")
++    }
+ }
+
+ // ── Console ctrl-handler dwCtrlType values (`wincon.h`) ───────────────────

package/scripts/bun-riscv64/rust-core/0006-cpp-wasm-and-inspector-guards-riscv64.patch

@@ -0,0 +1,91 @@
+Subject: [PATCH] riscv64 Rust-core bun: C++ guards for no-wasm + no-inspector WebKit
+
+The riscv64 JSCOnly C_LOOP WebKit is built with ENABLE_WEBASSEMBLY=0 (C_LOOP
+forbids wasm) and ENABLE_REMOTE_INSPECTOR=0 (cmakeconfig.h confirms both). Two
+Bun C++ translation units reference symbols that don't exist in that config.
+0001 carried the Zig-era guards for ZigGlobalObject.cpp + the four Inspector*
+agents + the JSWasmStreamingCompiler.cpp glob-exclude, but two were missed:
+
+- src/runtime/bake/BakeGlobalObject.cpp — the "bake" framework moved from
+  src/bake/ to src/runtime/bake/ in the Rust-core tree, so the Zig
+  bun-patches/0009 hunk did not rebase. Its GlobalObjectMethodTable inherits
+  compileStreaming/instantiateStreaming, which are not members of
+  JSC::GlobalObjectMethodTable when ENABLE(WEBASSEMBLY)=0. Guard them with
+  `#if ENABLE(WEBASSEMBLY)` / nullptr, mirroring the parent ZigGlobalObject
+  table (the exact bun-patches/0009 pattern, at the new path).
+
+- src/jsc/bindings/BunDebugger.cpp — defines a class inheriting
+  JSC::JSGlobalObjectDebuggable and uses JSGlobalObject::inspectorController(),
+  both REMOTE_INSPECTOR-only. Wrap the whole TU in `#if defined(__riscv) &&
+  __riscv_xlen == 64` no-op stubs for the C ABI surface the rest of Bun links
+  against (mirrors bun-patches/0010; the rust-core file adds one extra symbol,
+  Bun__InspectorConnection__disconnectAllOnExit, included in the stub set).
+
+All additive guards; no behavioral change off riscv64.
+
+diff --git a/src/jsc/bindings/BunDebugger.cpp b/src/jsc/bindings/BunDebugger.cpp
+index 07de46c8..357e269d 100644
+--- a/src/jsc/bindings/BunDebugger.cpp
++++ b/src/jsc/bindings/BunDebugger.cpp
+@@ -1,3 +1,34 @@
++#if defined(__riscv) && __riscv_xlen == 64
++// riscv64 builds the JSCOnly C_LOOP WebKit with ENABLE_REMOTE_INSPECTOR=0, so
++// JSC::JSGlobalObjectDebuggable and JSGlobalObject::inspectorController() do not
++// exist and this translation unit cannot compile. The remote inspector /
++// debugger is dev-tooling; the runtime functions without it. Replace the whole
++// TU with no-op stubs for the C ABI surface the rest of Bun links against
++// (mirrors the Zig-era bun-patches/0010 approach; adds the rust-core-only
++// Bun__InspectorConnection__disconnectAllOnExit symbol).
++#include "root.h"
++#include "headers-handwritten.h"
++
++namespace JSC {
++class JSGlobalObject;
++}
++namespace Zig {
++class GlobalObject;
++}
++
++using ScriptExecutionContextIdentifier = uint32_t;
++
++extern "C" unsigned int Bun__createJSDebugger(Zig::GlobalObject*) { return 0; }
++extern "C" void Bun__ensureDebugger(ScriptExecutionContextIdentifier, bool) { }
++extern "C" void BunDebugger__willHotReload() { }
++extern "C" void Bun__startJSDebuggerThread(Zig::GlobalObject*, ScriptExecutionContextIdentifier, BunString*, int, bool) { }
++extern "C" void Debugger__didScheduleAsyncCall(JSC::JSGlobalObject*, uint8_t, uint64_t, bool) { }
++extern "C" void Debugger__didCancelAsyncCall(JSC::JSGlobalObject*, uint8_t, uint64_t) { }
++extern "C" void Debugger__didDispatchAsyncCall(JSC::JSGlobalObject*, uint8_t, uint64_t) { }
++extern "C" void Debugger__willDispatchAsyncCall(JSC::JSGlobalObject*, uint8_t, uint64_t) { }
++extern "C" void Bun__InspectorConnection__disconnectAllOnExit(Zig::GlobalObject*) { }
++
++#else
+ #include "root.h"
+
+ #include "ZigGlobalObject.h"
+@@ -751,3 +782,4 @@ extern "C" void Bun__InspectorConnection__disconnectAllOnExit(Zig::GlobalObject*
+     globalObject->m_inspectorController = makeUnique<Inspector::JSGlobalObjectInspectorController>(*globalObject, Bun::BunInjectedScriptHost::create());
+ }
+ }
++#endif // defined(__riscv) && __riscv_xlen == 64
+diff --git a/src/runtime/bake/BakeGlobalObject.cpp b/src/runtime/bake/BakeGlobalObject.cpp
+index ec57b163..495b65b9 100644
+--- a/src/runtime/bake/BakeGlobalObject.cpp
++++ b/src/runtime/bake/BakeGlobalObject.cpp
+@@ -222,8 +222,17 @@ const JSC::GlobalObjectMethodTable& GlobalObject::globalObjectMethodTable()
+         INHERIT_HOOK_METHOD(scriptExecutionStatus),
+         INHERIT_HOOK_METHOD(reportViolationForUnsafeEval),
+         INHERIT_HOOK_METHOD(defaultLanguage),
++#if ENABLE(WEBASSEMBLY)
+         INHERIT_HOOK_METHOD(compileStreaming),
+         INHERIT_HOOK_METHOD(instantiateStreaming),
++#else
++        // WebAssembly is compiled out of the riscv64 C_LOOP WebKit, so the
++        // GlobalObjectMethodTable has no compile/instantiateStreaming slots to
++        // inherit. Mirror the parent table (ZigGlobalObject) which emits nullptr
++        // for these under ENABLE(WEBASSEMBLY)=0.
++        nullptr,
++        nullptr,
++#endif
+         INHERIT_HOOK_METHOD(deriveShadowRealmGlobalObject),
+         INHERIT_HOOK_METHOD(codeForEval),
+         INHERIT_HOOK_METHOD(canCompileStrings),

package/scripts/bun-riscv64/rust-core/0007-bun-alloc-max-align-t-riscv64.patch

@@ -0,0 +1,36 @@
+Subject: [PATCH] riscv64 Rust-core bun: hardcode bun_alloc MAX_ALIGN_T for riscv64
+
+src/bun_alloc/lib.rs computes `MAX_ALIGN_T` from `libc::max_align_t` for all
+non-Windows / non-(freebsd-aarch64) targets. The `libc` crate does not define
+`max_align_t` for `riscv64gc-unknown-linux-musl`, so the cargo build failed:
+
+    error[E0425]: cannot find type `max_align_t` in crate `libc`
+      --> src/bun_alloc/lib.rs:69
+
+The file already hardcodes the ABI value for the targets `libc` misses (Windows,
+freebsd-aarch64). Add a riscv64 arm: on RISC-V LP64D `long double` is IEEE
+binary128 (16-byte aligned), so `max_align_t` is 16 — same as aarch64 — and add
+riscv64 to the `not(any(...))` exclusion so it no longer takes the `libc` branch.
+
+diff --git a/src/bun_alloc/lib.rs b/src/bun_alloc/lib.rs
+index a19e3feb..73f8b6a0 100644
+--- a/src/bun_alloc/lib.rs
++++ b/src/bun_alloc/lib.rs
+@@ -65,7 +65,16 @@ pub const MAX_ALIGN_T: usize = core::mem::align_of::<MaxAlignT>();
+ // for the aarch64 port.
+ #[cfg(all(target_os = "freebsd", target_arch = "aarch64"))]
+ pub const MAX_ALIGN_T: usize = 16;
+-#[cfg(not(any(windows, all(target_os = "freebsd", target_arch = "aarch64"))))]
++// riscv64 LP64D: `long double` is IEEE binary128 (16-byte aligned), so
++// max_align_t = 16 — same as aarch64. The `libc` crate does not define
++// `max_align_t` for riscv64gc-unknown-linux-musl, so hardcode the ABI value.
++#[cfg(target_arch = "riscv64")]
++pub const MAX_ALIGN_T: usize = 16;
++#[cfg(not(any(
++    windows,
++    all(target_os = "freebsd", target_arch = "aarch64"),
++    target_arch = "riscv64"
++)))]
+ pub const MAX_ALIGN_T: usize = core::mem::align_of::<libc::max_align_t>();
+
+ pub struct AllocatorVTable {

package/scripts/bun-riscv64/rust-core/0008-workspace-lints-warn-not-deny-riscv64.patch

@@ -0,0 +1,75 @@
+Subject: [PATCH] riscv64 Rust-core bun: demote warnings-as-errors deny->warn for riscv64
+
+bun's root Cargo.toml [workspace.lints.rust] sets `warnings = "deny"` plus
+dead_code / unreachable_pub / the unused_* + unreachable_* family to "deny". On
+the riscv64gc-unknown-linux-musl cross-build (a target upstream does not
+compile) arch-gated code legitimately leaves items unused on riscv64 — e.g.
+`bun_core::debug::PC_OFFSET` is only read by `return_address()`'s
+`#[cfg(any(target_arch = "x86_64", target_arch = "aarch64"))]` arm — and the
+build fails:
+
+    error: constant `PC_OFFSET` is never used   (src/bun_core/debug.rs:269)
+    = note: `-D dead-code` implied by `-D warnings`
+
+Demoting only the per-lint family to "warn" is NOT enough: the `warnings` group
+at "deny" re-escalates them (the group override beats the per-lint priority in
+this toolchain, contrary to the block's own comment). So demote the `warnings`
+group itself to "warn" as well. These are true for the lint but false for code
+quality (the items ARE used on the supported arches); rather than scatter
+#[cfg]/#[allow] across dozens of upstream sites, relax warnings-as-errors for
+the riscv64 build tree. Warnings are still printed. Off-riscv64 builds use
+upstream prebuilts and never see this patched tree, so their warnings-as-errors
+discipline is unaffected.
+
+diff --git a/Cargo.toml b/Cargo.toml
+index 99eac8be..146aec19 100644
+--- a/Cargo.toml
++++ b/Cargo.toml
+@@ -184,7 +184,12 @@ strip = "symbols"
+ # Every rustc warning is an error. Individual lints below can override this
+ # back to "warn" (their priority 0 beats the group's -1) where a warning level
+ # is intentional.
+-warnings = { level = "deny", priority = -1 }
++# riscv64 cross-build (bun-riscv64 rust-core port): demoted deny->warn. The
++# `warnings` group at deny escalates the per-arch dead_code / unused_* that the
++# riscv64 target legitimately produces (arch-gated code unused on the non-built
++# arch), overriding the per-lint "warn" below. Upstream's supported arches keep
++# warnings-as-errors; this patched tree is only ever built for riscv64.
++warnings = { level = "warn", priority = -1 }
+ # `bun_asan` is set via RUSTFLAGS (`--cfg=bun_asan` + `--check-cfg=cfg(bun_asan)`)
+ # by scripts/build/rust.ts for asan builds; register it here so a plain
+ # `cargo build` / `cargo check` (without those flags) doesn't warn.
+@@ -194,20 +199,19 @@ unexpected_cfgs = { level = "warn", check-cfg = ['cfg(bun_asan)'] }
+ # there is no linker flag to suppress it. The lint already exempts itself
+ # from `-D warnings`, so this only silences the noise.
+ linker_messages = "allow"
+-dead_code = "deny"
+-# Every crate in this workspace is an internal implementation detail of one
+-# binary, so `pub` is a claim that *another crate* imports the item. If it
+-# doesn't, write `pub(crate)` — that keeps the item under `dead_code` analysis
+-# instead of being exempted as an external API root. Macro-generated items that
+-# must stay `pub` carry `#[allow(unreachable_pub)]` at the expansion site.
+-unreachable_pub = "deny"
+-unused_imports = "deny"
+-unused_variables = "deny"
+-unused_mut = "deny"
+-unused_assignments = "deny"
+-unused_macros = "deny"
+-unreachable_code = "deny"
+-unreachable_patterns = "deny"
++# riscv64 cross-build: the arch-sensitive family is "warn" (not "deny") — see the
++# `warnings` note above. Arch-gated code (#[cfg(any(x86_64, aarch64))]) leaves
++# these items unused on riscv64; that is true for the lint but false for code
++# quality (the items ARE used on the supported arches).
++dead_code = "warn"
++unreachable_pub = "warn"
++unused_imports = "warn"
++unused_variables = "warn"
++unused_mut = "warn"
++unused_assignments = "warn"
++unused_macros = "warn"
++unreachable_code = "warn"
++unreachable_patterns = "warn"
+
+ [workspace.lints.clippy]
+ # == provenance-safe pointer casts ==

package/scripts/bun-riscv64/rust-core/0009-zigglobalobject-wasm-streaming-guards-riscv64.patch

@@ -0,0 +1,109 @@
+Subject: [PATCH] riscv64 Rust-core bun: ENABLE(WEBASSEMBLY) guards in ZigGlobalObject
+
+The riscv64 JSCOnly C_LOOP WebKit is built with ENABLE_WEBASSEMBLY=0, so
+JSC::Wasm::StreamingCompiler / JSC::Wasm::CompilerMode and the
+compileStreaming/instantiateStreaming GlobalObjectMethodTable slots do not
+exist. ZigGlobalObject.cpp references all of these unguarded and fails to
+compile (errors in JSWasmStreamingCompiler.h plus ZigGlobalObject.cpp:142,
+936-937, 964-965, 3738-3799). This is the same class the Zig-era
+bun-patches/0009 guarded for ZigGlobalObject; that hunk did not rebase into the
+Rust-core 0001 (the file's line locations diverged), so re-apply it here at the
+Rust-core locations:
+
+- guard the `JSWasmStreamingCompiler.h` include,
+- both GlobalObjectMethodTable initializers (GlobalObject + EvalGlobalObject):
+  compileStreaming/instantiateStreaming -> nullptr under ENABLE(WEBASSEMBLY)=0,
+- the `m_wasmStreamingConsumeStreamFunction` lazy initializer in finishCreation,
+- the extern-C streaming block (getBodyStream..., StreamingCompiler__addBytes,
+  handleResponseOnStreamingAction, compile/instantiateStreaming definitions),
+- the two static declarations in ZigGlobalObject.h.
+
+JSWasmStreamingCompiler.cpp is already excluded from the riscv64 build by 0001's
+glob-sources exclude, and its header is now only included under the guard.
+
+diff --git a/src/jsc/bindings/ZigGlobalObject.cpp b/src/jsc/bindings/ZigGlobalObject.cpp
+index 15858d7b..fb221c3d 100644
+--- a/src/jsc/bindings/ZigGlobalObject.cpp
++++ b/src/jsc/bindings/ZigGlobalObject.cpp
+@@ -139,7 +139,9 @@
+ #include "JSTransformStreamDefaultController.h"
+ #include "JSURLPattern.h"
+ #include "JSURLSearchParams.h"
++#if ENABLE(WEBASSEMBLY)
+ #include "JSWasmStreamingCompiler.h"
++#endif
+ #include <JavaScriptCore/WebAssemblyCompileOptions.h>
+ #include "JSWebSocket.h"
+ #include "JSWorker.h"
+@@ -933,8 +935,13 @@ const JSC::GlobalObjectMethodTable& GlobalObject::globalObjectMethodTable()
+         &scriptExecutionStatus,
+         &unsafeEvalNoop, // reportViolationForUnsafeEval
+         nullptr, // defaultLanguage
++#if ENABLE(WEBASSEMBLY)
+         &compileStreaming,
+         &instantiateStreaming,
++#else
++        nullptr,
++        nullptr,
++#endif
+         &Zig::deriveShadowRealmGlobalObject,
+         &codeForEval, // codeForEval
+         &canCompileStrings, // canCompileStrings
+@@ -961,8 +968,13 @@ const JSC::GlobalObjectMethodTable& EvalGlobalObject::globalObjectMethodTable()
+         &scriptExecutionStatus,
+         &unsafeEvalNoop, // reportViolationForUnsafeEval
+         nullptr, // defaultLanguage
++#if ENABLE(WEBASSEMBLY)
+         &compileStreaming,
+         &instantiateStreaming,
++#else
++        nullptr,
++        nullptr,
++#endif
+         &Zig::deriveShadowRealmGlobalObject,
+         &codeForEval, // codeForEval
+         &canCompileStrings, // canCompileStrings
+@@ -2195,10 +2207,12 @@ void GlobalObject::finishCreation(VM& vm)
+             init.set(JSC::JSFunction::create(init.vm, init.owner, utilInspectStylizeWithNoColorCodeGenerator(init.vm), init.owner));
+         });
+
++#if ENABLE(WEBASSEMBLY)
+     m_wasmStreamingConsumeStreamFunction.initLater(
+         [](const Initializer<JSFunction>& init) {
+             init.set(JSC::JSFunction::create(init.vm, init.owner, wasmStreamingConsumeStreamCodeGenerator(init.vm), init.owner));
+         });
++#endif
+
+     m_nativeMicrotaskTrampoline.initLater(
+         [](const Initializer<JSFunction>& init) {
+@@ -3723,6 +3737,7 @@ JSC::JSValue EvalGlobalObject::moduleLoaderEvaluate(JSGlobalObject* lexicalGloba
+     return result;
+ }
+
++#if ENABLE(WEBASSEMBLY)
+ extern "C" JSC::EncodedJSValue Zig__GlobalObject__getBodyStreamOrBytesForWasmStreaming(JSGlobalObject*, EncodedJSValue response, JSC::Wasm::StreamingCompiler* compiler);
+
+ extern "C" void JSC__Wasm__StreamingCompiler__addBytes(JSC::Wasm::StreamingCompiler* compiler, const uint8_t* spanPtr, size_t spanSize)
+@@ -3785,6 +3800,7 @@ void GlobalObject::instantiateStreaming(JSGlobalObject* globalObject, JSC::JSPro
+ {
+     handleResponseOnStreamingAction(globalObject, promise, source, JSC::Wasm::CompilerMode::FullCompile, importObject, WTF::move(compileOptions));
+ }
++#endif // ENABLE(WEBASSEMBLY)
+
+ GlobalObject::PromiseFunctions GlobalObject::promiseHandlerID(Zig::FFIFunction handler)
+ {
+diff --git a/src/jsc/bindings/ZigGlobalObject.h b/src/jsc/bindings/ZigGlobalObject.h
+index eae5d1cc..dabafe12 100644
+--- a/src/jsc/bindings/ZigGlobalObject.h
++++ b/src/jsc/bindings/ZigGlobalObject.h
+@@ -201,8 +201,10 @@ public:
+     static JSC::JSPromise* moduleLoaderFetch(JSGlobalObject*, JSC::JSModuleLoader*, JSC::JSValue key, RefPtr<JSC::ScriptFetchParameters>, RefPtr<JSC::ScriptFetcher>);
+     static JSC::JSObject* moduleLoaderCreateImportMetaProperties(JSGlobalObject*, JSC::JSModuleLoader*, JSC::JSValue key, JSC::JSModuleRecord*, RefPtr<JSC::ScriptFetcher>);
+     static JSC::JSValue moduleLoaderEvaluate(JSGlobalObject*, JSC::JSModuleLoader*, JSValue key, JSValue moduleRecordValue, RefPtr<JSC::ScriptFetcher>, JSValue sentValue, JSValue resumeMode);
++#if ENABLE(WEBASSEMBLY)
+     static void compileStreaming(JSGlobalObject*, JSC::JSPromise*, JSC::JSValue source, std::optional<JSC::WebAssemblyCompileOptions>&&);
+     static void instantiateStreaming(JSGlobalObject*, JSC::JSPromise*, JSC::JSValue source, JSC::JSObject* importObject, std::optional<JSC::WebAssemblyCompileOptions>&&);
++#endif
+
+     static ScriptExecutionStatus scriptExecutionStatus(JSGlobalObject*, JSObject*);
+     static void promiseRejectionTracker(JSGlobalObject*, JSC::JSPromise*, JSC::JSPromiseRejectionOperation);