@cpp-linter/clang-tidy-win32-x64 14.0.0 → 16.0.3
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/README.md +2 -2
- package/bin/clang-tidy.exe +2 -2
- package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_intrinsics.h +7 -7
- package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_texture_intrinsics.h +2 -0
- package/lib/clang/{14.0.0 → 16}/include/__clang_hip_libdevice_declares.h +5 -0
- package/lib/clang/{14.0.0 → 16}/include/__clang_hip_math.h +10 -13
- package/lib/clang/{14.0.0 → 16}/include/__clang_hip_runtime_wrapper.h +1 -0
- package/lib/clang/16/include/__clang_hip_stdlib.h +43 -0
- package/lib/clang/{14.0.0 → 16}/include/__wmmintrin_pclmul.h +10 -10
- package/lib/clang/{14.0.0 → 16}/include/altivec.h +501 -262
- package/lib/clang/16/include/amxfp16intrin.h +58 -0
- package/lib/clang/{14.0.0 → 16}/include/amxintrin.h +32 -2
- package/lib/clang/{14.0.0 → 16}/include/arm_acle.h +76 -75
- package/lib/clang/{14.0.0 → 16}/include/arm_fp16.h +90 -90
- package/lib/clang/{14.0.0 → 16}/include/arm_neon.h +28468 -28638
- package/lib/clang/{14.0.0 → 16}/include/arm_neon_sve_bridge.h +0 -2
- package/lib/clang/{14.0.0 → 16}/include/arm_sve.h +7848 -7996
- package/lib/clang/{14.0.0 → 16}/include/avx2intrin.h +8 -8
- package/lib/clang/{14.0.0 → 16}/include/avx512bf16intrin.h +18 -15
- package/lib/clang/{14.0.0 → 16}/include/avx512bwintrin.h +12 -12
- package/lib/clang/{14.0.0 → 16}/include/avx512fintrin.h +78 -75
- package/lib/clang/{14.0.0 → 16}/include/avx512fp16intrin.h +6 -9
- package/lib/clang/{14.0.0 → 16}/include/avx512ifmavlintrin.h +13 -27
- package/lib/clang/{14.0.0 → 16}/include/avx512vlbf16intrin.h +31 -38
- package/lib/clang/{14.0.0 → 16}/include/avx512vlbwintrin.h +360 -8
- package/lib/clang/{14.0.0 → 16}/include/avx512vlfp16intrin.h +3 -0
- package/lib/clang/{14.0.0 → 16}/include/avx512vlintrin.h +81 -95
- package/lib/clang/{14.0.0 → 16}/include/avx512vlvnniintrin.h +16 -16
- package/lib/clang/16/include/avxifmaintrin.h +177 -0
- package/lib/clang/{14.0.0 → 16}/include/avxintrin.h +77 -32
- package/lib/clang/16/include/avxneconvertintrin.h +484 -0
- package/lib/clang/16/include/avxvnniint8intrin.h +471 -0
- package/lib/clang/{14.0.0 → 16}/include/avxvnniintrin.h +16 -16
- package/lib/clang/{14.0.0 → 16}/include/bmiintrin.h +6 -2
- package/lib/clang/{14.0.0 → 16}/include/cetintrin.h +12 -6
- package/lib/clang/16/include/cmpccxaddintrin.h +70 -0
- package/lib/clang/{14.0.0 → 16}/include/cpuid.h +12 -1
- package/lib/clang/16/include/cuda_wrappers/cmath +90 -0
- package/lib/clang/{14.0.0 → 16}/include/emmintrin.h +559 -769
- package/lib/clang/{14.0.0 → 16}/include/f16cintrin.h +3 -3
- package/lib/clang/{14.0.0 → 16}/include/float.h +17 -10
- package/lib/clang/{14.0.0 → 16}/include/gfniintrin.h +7 -5
- package/lib/clang/16/include/hlsl/hlsl_basic_types.h +67 -0
- package/lib/clang/16/include/hlsl/hlsl_intrinsics.h +223 -0
- package/lib/clang/16/include/hlsl.h +15 -0
- package/lib/clang/{14.0.0 → 16}/include/hresetintrin.h +2 -2
- package/lib/clang/{14.0.0 → 16}/include/ia32intrin.h +11 -11
- package/lib/clang/{14.0.0 → 16}/include/immintrin.h +56 -24
- package/lib/clang/{14.0.0 → 16}/include/intrin.h +12 -21
- package/lib/clang/{14.0.0 → 16}/include/keylockerintrin.h +22 -22
- package/lib/clang/16/include/larchintrin.h +234 -0
- package/lib/clang/{14.0.0 → 16}/include/limits.h +3 -2
- package/lib/clang/{14.0.0 → 16}/include/mm_malloc.h +3 -3
- package/lib/clang/{14.0.0 → 16}/include/opencl-c-base.h +29 -0
- package/lib/clang/{14.0.0 → 16}/include/opencl-c.h +6904 -7100
- package/lib/clang/{14.0.0 → 16}/include/pmmintrin.h +1 -1
- package/lib/clang/16/include/ppc_wrappers/bmi2intrin.h +134 -0
- package/lib/clang/16/include/ppc_wrappers/bmiintrin.h +165 -0
- package/lib/clang/16/include/ppc_wrappers/emmintrin.h +2268 -0
- package/lib/clang/16/include/ppc_wrappers/immintrin.h +27 -0
- package/lib/clang/{14.0.0 → 16}/include/ppc_wrappers/mm_malloc.h +12 -17
- package/lib/clang/{14.0.0 → 16}/include/ppc_wrappers/mmintrin.h +389 -387
- package/lib/clang/16/include/ppc_wrappers/pmmintrin.h +145 -0
- package/lib/clang/16/include/ppc_wrappers/smmintrin.h +663 -0
- package/lib/clang/16/include/ppc_wrappers/tmmintrin.h +453 -0
- package/lib/clang/{14.0.0/include/stdnoreturn.h → 16/include/ppc_wrappers/x86gprintrin.h} +7 -6
- package/lib/clang/16/include/ppc_wrappers/x86intrin.h +28 -0
- package/lib/clang/16/include/ppc_wrappers/xmmintrin.h +1827 -0
- package/lib/clang/16/include/prfchiintrin.h +61 -0
- package/lib/clang/16/include/raointintrin.h +203 -0
- package/lib/clang/16/include/rdpruintrin.h +57 -0
- package/lib/clang/{14.0.0 → 16}/include/rdseedintrin.h +3 -3
- package/lib/clang/16/include/riscv_vector.h +211 -0
- package/lib/clang/{14.0.0 → 16}/include/rtmintrin.h +1 -1
- package/lib/clang/{14.0.0 → 16}/include/smmintrin.h +236 -259
- package/lib/clang/{14.0.0 → 16}/include/stdarg.h +23 -7
- package/lib/clang/{14.0.0 → 16}/include/stdatomic.h +7 -7
- package/lib/clang/{14.0.0 → 16}/include/stdbool.h +10 -7
- package/lib/clang/{14.0.0 → 16}/include/stddef.h +9 -2
- package/lib/clang/{14.0.0 → 16}/include/stdint.h +158 -40
- package/lib/clang/16/include/stdnoreturn.h +29 -0
- package/lib/clang/{14.0.0 → 16}/include/uintrintrin.h +8 -8
- package/lib/clang/{14.0.0 → 16}/include/unwind.h +10 -6
- package/lib/clang/16/include/velintrin.h +71 -0
- package/lib/clang/16/include/velintrin_approx.h +120 -0
- package/lib/clang/16/include/velintrin_gen.h +1257 -0
- package/lib/clang/{14.0.0 → 16}/include/wasm_simd128.h +2 -2
- package/lib/clang/16/include/x86gprintrin.h +65 -0
- package/lib/clang/{14.0.0 → 16}/include/x86intrin.h +4 -0
- package/lib/clang/{14.0.0 → 16}/include/xmmintrin.h +10 -5
- package/package.json +6 -6
- package/lib/clang/14.0.0/include/ppc_wrappers/emmintrin.h +0 -2325
- package/lib/clang/14.0.0/include/ppc_wrappers/pmmintrin.h +0 -151
- package/lib/clang/14.0.0/include/ppc_wrappers/smmintrin.h +0 -110
- package/lib/clang/14.0.0/include/ppc_wrappers/tmmintrin.h +0 -496
- package/lib/clang/14.0.0/include/ppc_wrappers/xmmintrin.h +0 -1844
- package/lib/clang/14.0.0/include/riscv_vector.h +0 -95423
- package/lib/clang/14.0.0/include/x86gprintrin.h +0 -35
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_builtin_vars.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_cmath.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_complex_builtins.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_device_functions.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_libdevice_declares.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_math.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_math_forward_declares.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_cuda_runtime_wrapper.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__clang_hip_cmath.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__stddef_max_align_t.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/__wmmintrin_aes.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/adxintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/ammintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/arm64intr.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/arm_bf16.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/arm_cde.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/arm_cmse.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/arm_mve.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/armintr.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512bitalgintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512cdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512dqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512erintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512ifmaintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512pfintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vbmi2intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vbmiintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vbmivlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vlbitalgintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vlcdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vldqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vlvbmi2intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vlvp2intersectintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vnniintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vp2intersectintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vpopcntdqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/avx512vpopcntdqvlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/bmi2intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/builtins.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/cet.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/cldemoteintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/clflushoptintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/clwbintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/clzerointrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/crc32intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/cuda_wrappers/algorithm +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/cuda_wrappers/complex +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/cuda_wrappers/new +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/enqcmdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/fma4intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/fmaintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/fxsrintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/hexagon_circ_brev_intrinsics.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/hexagon_protos.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/hexagon_types.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/htmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/htmxlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/hvx_hexagon_protos.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/inttypes.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/invpcidintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/iso646.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/lwpintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/lzcntintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/mm3dnow.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/mmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/module.modulemap +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/movdirintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/msa.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/mwaitxintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/nmmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/__clang_openmp_device_functions.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/cmath +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/complex +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/complex.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/complex_cmath.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/math.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/openmp_wrappers/new +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/pconfigintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/pkuintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/popcntintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/prfchwintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/ptwriteintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/s390intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/serializeintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/sgxintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/shaintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/stdalign.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/tbmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/tgmath.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/tmmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/tsxldtrkintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/vadefs.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/vaesintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/varargs.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/vecintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/vpclmulqdqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/waitpkgintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/wbnoinvdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/wmmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/xopintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/xsavecintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/xsaveintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/xsaveoptintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/xsavesintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 16}/include/xtestintrin.h +0 -0
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@@ -20,16 +20,17 @@ typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
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typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
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typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
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typedef long long __m128i_u
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typedef long long __m128i_u
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__attribute__((__vector_size__(16), __aligned__(1)));
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/* Type defines. */
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typedef double __v2df __attribute__
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typedef long long __v2di __attribute__
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typedef double __v2df __attribute__((__vector_size__(16)));
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typedef long long __v2di __attribute__((__vector_size__(16)));
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typedef short __v8hi __attribute__((__vector_size__(16)));
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typedef char __v16qi __attribute__((__vector_size__(16)));
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/* Unsigned types */
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typedef unsigned long long __v2du __attribute__
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typedef unsigned long long __v2du __attribute__((__vector_size__(16)));
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typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
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typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
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@@ -37,9 +38,23 @@ typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
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* appear in the interface though. */
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typedef signed char __v16qs __attribute__((__vector_size__(16)));
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#ifdef __SSE2__
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/* Both _Float16 and __bf16 require SSE2 being enabled. */
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typedef _Float16 __v8hf __attribute__((__vector_size__(16), __aligned__(16)));
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typedef _Float16 __m128h __attribute__((__vector_size__(16), __aligned__(16)));
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typedef _Float16 __m128h_u __attribute__((__vector_size__(16), __aligned__(1)));
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typedef __bf16 __v8bf __attribute__((__vector_size__(16), __aligned__(16)));
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typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
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#endif
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
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__min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS_MMX \
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__attribute__((__always_inline__, __nodebug__, __target__("mmx,sse2"), \
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__min_vector_width__(64)))
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/// Adds lower double-precision values in both operands and returns the
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/// sum in the lower 64 bits of the result. The upper 64 bits of the result
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// sum of the lower 64 bits of both operands. The upper 64 bits are copied
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/// from the upper 64 bits of the first source operand.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_sd(__m128d __a,
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__m128d __b) {
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__a[0] += __b[0];
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return __a;
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{
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{
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{
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{
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__m128d __b) {
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{
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__m128d __b) {
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_sd(__m128d __a,
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__m128d __b) {
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}
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_pd(__m128d __a,
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__m128d __b) {
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@@ -226,11 +233,10 @@ _mm_div_pd(__m128d __a, __m128d __b)
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// square root of the lower 64 bits of operand \a __b, and whose upper 64
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,
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+
__m128d __b) {
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__m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
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-
return __extension__
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+
return __extension__(__m128d){__c[0], __a[1]};
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}
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/// Calculates the square root of the each of two values stored in a
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@@ -244,9 +250,7 @@ _mm_sqrt_sd(__m128d __a, __m128d __b)
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/// A 128-bit vector of [2 x double].
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/// \returns A 128-bit vector of [2 x double] containing the square roots of the
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/// values in the operand.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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|
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_mm_sqrt_pd(__m128d __a)
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{
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|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {
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|
return __builtin_ia32_sqrtpd((__v2df)__a);
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}
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@@ -268,9 +272,8 @@ _mm_sqrt_pd(__m128d __a)
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// minimum value between both operands. The upper 64 bits are copied from
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/// the upper 64 bits of the first source operand.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,
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+
__m128d __b) {
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return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
|
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}
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@@ -288,9 +291,8 @@ _mm_min_sd(__m128d __a, __m128d __b)
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/// A 128-bit vector of [2 x double] containing one of the operands.
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|
/// \returns A 128-bit vector of [2 x double] containing the minimum values
|
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/// between both operands.
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|
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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|
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{
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|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a,
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295
|
+
__m128d __b) {
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294
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|
return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
|
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}
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@@ -312,9 +314,8 @@ _mm_min_pd(__m128d __a, __m128d __b)
|
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|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
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313
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|
/// maximum value between both operands. The upper 64 bits are copied from
|
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|
/// the upper 64 bits of the first source operand.
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|
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static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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|
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|
|
317
|
-
{
|
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317
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,
|
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318
|
+
__m128d __b) {
|
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318
319
|
return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
|
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319
320
|
}
|
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320
321
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|
@@ -332,9 +333,8 @@ _mm_max_sd(__m128d __a, __m128d __b)
|
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332
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/// A 128-bit vector of [2 x double] containing one of the operands.
|
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333
334
|
/// \returns A 128-bit vector of [2 x double] containing the maximum values
|
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334
335
|
/// between both operands.
|
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335
|
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static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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336
|
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|
|
337
|
-
{
|
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336
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a,
|
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337
|
+
__m128d __b) {
|
|
338
338
|
return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
|
|
339
339
|
}
|
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340
340
|
|
|
@@ -350,9 +350,8 @@ _mm_max_pd(__m128d __a, __m128d __b)
|
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350
350
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
351
351
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
352
352
|
/// values between both operands.
|
|
353
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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354
|
-
|
|
355
|
-
{
|
|
353
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_and_pd(__m128d __a,
|
|
354
|
+
__m128d __b) {
|
|
356
355
|
return (__m128d)((__v2du)__a & (__v2du)__b);
|
|
357
356
|
}
|
|
358
357
|
|
|
@@ -371,9 +370,8 @@ _mm_and_pd(__m128d __a, __m128d __b)
|
|
|
371
370
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
372
371
|
/// values in the second operand and the one's complement of the first
|
|
373
372
|
/// operand.
|
|
374
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
375
|
-
|
|
376
|
-
{
|
|
373
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_andnot_pd(__m128d __a,
|
|
374
|
+
__m128d __b) {
|
|
377
375
|
return (__m128d)(~(__v2du)__a & (__v2du)__b);
|
|
378
376
|
}
|
|
379
377
|
|
|
@@ -389,9 +387,8 @@ _mm_andnot_pd(__m128d __a, __m128d __b)
|
|
|
389
387
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
390
388
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
|
|
391
389
|
/// values between both operands.
|
|
392
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
393
|
-
|
|
394
|
-
{
|
|
390
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_or_pd(__m128d __a,
|
|
391
|
+
__m128d __b) {
|
|
395
392
|
return (__m128d)((__v2du)__a | (__v2du)__b);
|
|
396
393
|
}
|
|
397
394
|
|
|
@@ -407,9 +404,8 @@ _mm_or_pd(__m128d __a, __m128d __b)
|
|
|
407
404
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
408
405
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
|
|
409
406
|
/// values between both operands.
|
|
410
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
411
|
-
|
|
412
|
-
{
|
|
407
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_xor_pd(__m128d __a,
|
|
408
|
+
__m128d __b) {
|
|
413
409
|
return (__m128d)((__v2du)__a ^ (__v2du)__b);
|
|
414
410
|
}
|
|
415
411
|
|
|
@@ -426,9 +422,8 @@ _mm_xor_pd(__m128d __a, __m128d __b)
|
|
|
426
422
|
/// \param __b
|
|
427
423
|
/// A 128-bit vector of [2 x double].
|
|
428
424
|
/// \returns A 128-bit vector containing the comparison results.
|
|
429
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
430
|
-
|
|
431
|
-
{
|
|
425
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_pd(__m128d __a,
|
|
426
|
+
__m128d __b) {
|
|
432
427
|
return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
|
|
433
428
|
}
|
|
434
429
|
|
|
@@ -446,9 +441,8 @@ _mm_cmpeq_pd(__m128d __a, __m128d __b)
|
|
|
446
441
|
/// \param __b
|
|
447
442
|
/// A 128-bit vector of [2 x double].
|
|
448
443
|
/// \returns A 128-bit vector containing the comparison results.
|
|
449
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
450
|
-
|
|
451
|
-
{
|
|
444
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_pd(__m128d __a,
|
|
445
|
+
__m128d __b) {
|
|
452
446
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
|
|
453
447
|
}
|
|
454
448
|
|
|
@@ -467,9 +461,8 @@ _mm_cmplt_pd(__m128d __a, __m128d __b)
|
|
|
467
461
|
/// \param __b
|
|
468
462
|
/// A 128-bit vector of [2 x double].
|
|
469
463
|
/// \returns A 128-bit vector containing the comparison results.
|
|
470
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
471
|
-
|
|
472
|
-
{
|
|
464
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_pd(__m128d __a,
|
|
465
|
+
__m128d __b) {
|
|
473
466
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
|
|
474
467
|
}
|
|
475
468
|
|
|
@@ -488,9 +481,8 @@ _mm_cmple_pd(__m128d __a, __m128d __b)
|
|
|
488
481
|
/// \param __b
|
|
489
482
|
/// A 128-bit vector of [2 x double].
|
|
490
483
|
/// \returns A 128-bit vector containing the comparison results.
|
|
491
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
492
|
-
|
|
493
|
-
{
|
|
484
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_pd(__m128d __a,
|
|
485
|
+
__m128d __b) {
|
|
494
486
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
|
|
495
487
|
}
|
|
496
488
|
|
|
@@ -509,9 +501,8 @@ _mm_cmpgt_pd(__m128d __a, __m128d __b)
|
|
|
509
501
|
/// \param __b
|
|
510
502
|
/// A 128-bit vector of [2 x double].
|
|
511
503
|
/// \returns A 128-bit vector containing the comparison results.
|
|
512
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
513
|
-
|
|
514
|
-
{
|
|
504
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_pd(__m128d __a,
|
|
505
|
+
__m128d __b) {
|
|
515
506
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
|
|
516
507
|
}
|
|
517
508
|
|
|
@@ -532,9 +523,8 @@ _mm_cmpge_pd(__m128d __a, __m128d __b)
|
|
|
532
523
|
/// \param __b
|
|
533
524
|
/// A 128-bit vector of [2 x double].
|
|
534
525
|
/// \returns A 128-bit vector containing the comparison results.
|
|
535
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
536
|
-
|
|
537
|
-
{
|
|
526
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_pd(__m128d __a,
|
|
527
|
+
__m128d __b) {
|
|
538
528
|
return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
|
|
539
529
|
}
|
|
540
530
|
|
|
@@ -556,9 +546,8 @@ _mm_cmpord_pd(__m128d __a, __m128d __b)
|
|
|
556
546
|
/// \param __b
|
|
557
547
|
/// A 128-bit vector of [2 x double].
|
|
558
548
|
/// \returns A 128-bit vector containing the comparison results.
|
|
559
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
560
|
-
|
|
561
|
-
{
|
|
549
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_pd(__m128d __a,
|
|
550
|
+
__m128d __b) {
|
|
562
551
|
return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
|
|
563
552
|
}
|
|
564
553
|
|
|
@@ -577,9 +566,8 @@ _mm_cmpunord_pd(__m128d __a, __m128d __b)
|
|
|
577
566
|
/// \param __b
|
|
578
567
|
/// A 128-bit vector of [2 x double].
|
|
579
568
|
/// \returns A 128-bit vector containing the comparison results.
|
|
580
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
581
|
-
|
|
582
|
-
{
|
|
569
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_pd(__m128d __a,
|
|
570
|
+
__m128d __b) {
|
|
583
571
|
return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
|
|
584
572
|
}
|
|
585
573
|
|
|
@@ -598,9 +586,8 @@ _mm_cmpneq_pd(__m128d __a, __m128d __b)
|
|
|
598
586
|
/// \param __b
|
|
599
587
|
/// A 128-bit vector of [2 x double].
|
|
600
588
|
/// \returns A 128-bit vector containing the comparison results.
|
|
601
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
602
|
-
|
|
603
|
-
{
|
|
589
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_pd(__m128d __a,
|
|
590
|
+
__m128d __b) {
|
|
604
591
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
|
|
605
592
|
}
|
|
606
593
|
|
|
@@ -619,9 +606,8 @@ _mm_cmpnlt_pd(__m128d __a, __m128d __b)
|
|
|
619
606
|
/// \param __b
|
|
620
607
|
/// A 128-bit vector of [2 x double].
|
|
621
608
|
/// \returns A 128-bit vector containing the comparison results.
|
|
622
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
623
|
-
|
|
624
|
-
{
|
|
609
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_pd(__m128d __a,
|
|
610
|
+
__m128d __b) {
|
|
625
611
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
|
|
626
612
|
}
|
|
627
613
|
|
|
@@ -640,9 +626,8 @@ _mm_cmpnle_pd(__m128d __a, __m128d __b)
|
|
|
640
626
|
/// \param __b
|
|
641
627
|
/// A 128-bit vector of [2 x double].
|
|
642
628
|
/// \returns A 128-bit vector containing the comparison results.
|
|
643
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
644
|
-
|
|
645
|
-
{
|
|
629
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_pd(__m128d __a,
|
|
630
|
+
__m128d __b) {
|
|
646
631
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
|
|
647
632
|
}
|
|
648
633
|
|
|
@@ -661,9 +646,8 @@ _mm_cmpngt_pd(__m128d __a, __m128d __b)
|
|
|
661
646
|
/// \param __b
|
|
662
647
|
/// A 128-bit vector of [2 x double].
|
|
663
648
|
/// \returns A 128-bit vector containing the comparison results.
|
|
664
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
665
|
-
|
|
666
|
-
{
|
|
649
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_pd(__m128d __a,
|
|
650
|
+
__m128d __b) {
|
|
667
651
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
|
|
668
652
|
}
|
|
669
653
|
|
|
@@ -684,9 +668,8 @@ _mm_cmpnge_pd(__m128d __a, __m128d __b)
|
|
|
684
668
|
/// compared to the lower double-precision value of \a __a.
|
|
685
669
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
686
670
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
687
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
688
|
-
|
|
689
|
-
{
|
|
671
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_sd(__m128d __a,
|
|
672
|
+
__m128d __b) {
|
|
690
673
|
return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
|
|
691
674
|
}
|
|
692
675
|
|
|
@@ -709,9 +692,8 @@ _mm_cmpeq_sd(__m128d __a, __m128d __b)
|
|
|
709
692
|
/// compared to the lower double-precision value of \a __a.
|
|
710
693
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
711
694
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
712
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
713
|
-
|
|
714
|
-
{
|
|
695
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_sd(__m128d __a,
|
|
696
|
+
__m128d __b) {
|
|
715
697
|
return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
|
|
716
698
|
}
|
|
717
699
|
|
|
@@ -734,9 +716,8 @@ _mm_cmplt_sd(__m128d __a, __m128d __b)
|
|
|
734
716
|
/// compared to the lower double-precision value of \a __a.
|
|
735
717
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
736
718
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
737
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
738
|
-
|
|
739
|
-
{
|
|
719
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_sd(__m128d __a,
|
|
720
|
+
__m128d __b) {
|
|
740
721
|
return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
|
|
741
722
|
}
|
|
742
723
|
|
|
@@ -759,11 +740,10 @@ _mm_cmple_sd(__m128d __a, __m128d __b)
|
|
|
759
740
|
/// compared to the lower double-precision value of \a __a.
|
|
760
741
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
761
742
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
762
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
763
|
-
|
|
764
|
-
{
|
|
743
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_sd(__m128d __a,
|
|
744
|
+
__m128d __b) {
|
|
765
745
|
__m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
|
|
766
|
-
return __extension__
|
|
746
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
767
747
|
}
|
|
768
748
|
|
|
769
749
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -785,11 +765,10 @@ _mm_cmpgt_sd(__m128d __a, __m128d __b)
|
|
|
785
765
|
/// compared to the lower double-precision value of \a __a.
|
|
786
766
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
787
767
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
788
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
789
|
-
|
|
790
|
-
{
|
|
768
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_sd(__m128d __a,
|
|
769
|
+
__m128d __b) {
|
|
791
770
|
__m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
|
|
792
|
-
return __extension__
|
|
771
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
793
772
|
}
|
|
794
773
|
|
|
795
774
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -813,9 +792,8 @@ _mm_cmpge_sd(__m128d __a, __m128d __b)
|
|
|
813
792
|
/// compared to the lower double-precision value of \a __a.
|
|
814
793
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
815
794
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
816
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
817
|
-
|
|
818
|
-
{
|
|
795
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_sd(__m128d __a,
|
|
796
|
+
__m128d __b) {
|
|
819
797
|
return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
|
|
820
798
|
}
|
|
821
799
|
|
|
@@ -841,9 +819,8 @@ _mm_cmpord_sd(__m128d __a, __m128d __b)
|
|
|
841
819
|
/// compared to the lower double-precision value of \a __a.
|
|
842
820
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
843
821
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
844
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
845
|
-
|
|
846
|
-
{
|
|
822
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_sd(__m128d __a,
|
|
823
|
+
__m128d __b) {
|
|
847
824
|
return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
|
|
848
825
|
}
|
|
849
826
|
|
|
@@ -866,9 +843,8 @@ _mm_cmpunord_sd(__m128d __a, __m128d __b)
|
|
|
866
843
|
/// compared to the lower double-precision value of \a __a.
|
|
867
844
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
868
845
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
869
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
870
|
-
|
|
871
|
-
{
|
|
846
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_sd(__m128d __a,
|
|
847
|
+
__m128d __b) {
|
|
872
848
|
return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
|
|
873
849
|
}
|
|
874
850
|
|
|
@@ -891,9 +867,8 @@ _mm_cmpneq_sd(__m128d __a, __m128d __b)
|
|
|
891
867
|
/// compared to the lower double-precision value of \a __a.
|
|
892
868
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
893
869
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
894
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
895
|
-
|
|
896
|
-
{
|
|
870
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_sd(__m128d __a,
|
|
871
|
+
__m128d __b) {
|
|
897
872
|
return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
|
|
898
873
|
}
|
|
899
874
|
|
|
@@ -916,9 +891,8 @@ _mm_cmpnlt_sd(__m128d __a, __m128d __b)
|
|
|
916
891
|
/// compared to the lower double-precision value of \a __a.
|
|
917
892
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
918
893
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
919
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
920
|
-
|
|
921
|
-
{
|
|
894
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_sd(__m128d __a,
|
|
895
|
+
__m128d __b) {
|
|
922
896
|
return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
|
|
923
897
|
}
|
|
924
898
|
|
|
@@ -941,11 +915,10 @@ _mm_cmpnle_sd(__m128d __a, __m128d __b)
|
|
|
941
915
|
/// compared to the lower double-precision value of \a __a.
|
|
942
916
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
943
917
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
944
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
945
|
-
|
|
946
|
-
{
|
|
918
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_sd(__m128d __a,
|
|
919
|
+
__m128d __b) {
|
|
947
920
|
__m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
|
|
948
|
-
return __extension__
|
|
921
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
949
922
|
}
|
|
950
923
|
|
|
951
924
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -967,11 +940,10 @@ _mm_cmpngt_sd(__m128d __a, __m128d __b)
|
|
|
967
940
|
/// compared to the lower double-precision value of \a __a.
|
|
968
941
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
969
942
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
970
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
971
|
-
|
|
972
|
-
{
|
|
943
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_sd(__m128d __a,
|
|
944
|
+
__m128d __b) {
|
|
973
945
|
__m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
|
|
974
|
-
return __extension__
|
|
946
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
975
947
|
}
|
|
976
948
|
|
|
977
949
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -992,9 +964,8 @@ _mm_cmpnge_sd(__m128d __a, __m128d __b)
|
|
|
992
964
|
/// compared to the lower double-precision value of \a __a.
|
|
993
965
|
/// \returns An integer containing the comparison results. If either of the two
|
|
994
966
|
/// lower double-precision values is NaN, 0 is returned.
|
|
995
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
996
|
-
|
|
997
|
-
{
|
|
967
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comieq_sd(__m128d __a,
|
|
968
|
+
__m128d __b) {
|
|
998
969
|
return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
|
|
999
970
|
}
|
|
1000
971
|
|
|
@@ -1018,9 +989,8 @@ _mm_comieq_sd(__m128d __a, __m128d __b)
|
|
|
1018
989
|
/// compared to the lower double-precision value of \a __a.
|
|
1019
990
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1020
991
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1021
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1022
|
-
|
|
1023
|
-
{
|
|
992
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comilt_sd(__m128d __a,
|
|
993
|
+
__m128d __b) {
|
|
1024
994
|
return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
|
|
1025
995
|
}
|
|
1026
996
|
|
|
@@ -1044,9 +1014,8 @@ _mm_comilt_sd(__m128d __a, __m128d __b)
|
|
|
1044
1014
|
/// compared to the lower double-precision value of \a __a.
|
|
1045
1015
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1046
1016
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1047
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1048
|
-
|
|
1049
|
-
{
|
|
1017
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comile_sd(__m128d __a,
|
|
1018
|
+
__m128d __b) {
|
|
1050
1019
|
return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
|
|
1051
1020
|
}
|
|
1052
1021
|
|
|
@@ -1070,9 +1039,8 @@ _mm_comile_sd(__m128d __a, __m128d __b)
|
|
|
1070
1039
|
/// compared to the lower double-precision value of \a __a.
|
|
1071
1040
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1072
1041
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1073
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1074
|
-
|
|
1075
|
-
{
|
|
1042
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comigt_sd(__m128d __a,
|
|
1043
|
+
__m128d __b) {
|
|
1076
1044
|
return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
|
|
1077
1045
|
}
|
|
1078
1046
|
|
|
@@ -1096,9 +1064,8 @@ _mm_comigt_sd(__m128d __a, __m128d __b)
|
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1096
1064
|
/// compared to the lower double-precision value of \a __a.
|
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1097
1065
|
/// \returns An integer containing the comparison results. If either of the two
|
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1098
1066
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1099
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1100
|
-
|
|
1101
|
-
{
|
|
1067
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comige_sd(__m128d __a,
|
|
1068
|
+
__m128d __b) {
|
|
1102
1069
|
return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
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1103
1070
|
}
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1104
1071
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|
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@@ -1122,9 +1089,8 @@ _mm_comige_sd(__m128d __a, __m128d __b)
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1122
1089
|
/// compared to the lower double-precision value of \a __a.
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1123
1090
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/// \returns An integer containing the comparison results. If either of the two
|
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1124
1091
|
/// lower double-precision values is NaN, 1 is returned.
|
|
1125
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
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1126
|
-
|
|
1127
|
-
{
|
|
1092
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comineq_sd(__m128d __a,
|
|
1093
|
+
__m128d __b) {
|
|
1128
1094
|
return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
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1129
1095
|
}
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1130
1096
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|
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@@ -1146,9 +1112,8 @@ _mm_comineq_sd(__m128d __a, __m128d __b)
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1146
1112
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/// compared to the lower double-precision value of \a __a.
|
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1147
1113
|
/// \returns An integer containing the comparison results. If either of the two
|
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1148
1114
|
/// lower double-precision values is NaN, 0 is returned.
|
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1149
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
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1150
|
-
|
|
1151
|
-
{
|
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1115
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomieq_sd(__m128d __a,
|
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1116
|
+
__m128d __b) {
|
|
1152
1117
|
return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
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|
1153
1118
|
}
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1154
1119
|
|
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@@ -1172,9 +1137,8 @@ _mm_ucomieq_sd(__m128d __a, __m128d __b)
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1172
1137
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/// compared to the lower double-precision value of \a __a.
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1173
1138
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/// \returns An integer containing the comparison results. If either of the two
|
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1174
1139
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1175
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
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1176
|
-
|
|
1177
|
-
{
|
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1140
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomilt_sd(__m128d __a,
|
|
1141
|
+
__m128d __b) {
|
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1178
1142
|
return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
|
|
1179
1143
|
}
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1180
1144
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|
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@@ -1198,9 +1162,8 @@ _mm_ucomilt_sd(__m128d __a, __m128d __b)
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1198
1162
|
/// compared to the lower double-precision value of \a __a.
|
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1199
1163
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1200
1164
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1201
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1202
|
-
|
|
1203
|
-
{
|
|
1165
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomile_sd(__m128d __a,
|
|
1166
|
+
__m128d __b) {
|
|
1204
1167
|
return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
|
|
1205
1168
|
}
|
|
1206
1169
|
|
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@@ -1224,9 +1187,8 @@ _mm_ucomile_sd(__m128d __a, __m128d __b)
|
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1224
1187
|
/// compared to the lower double-precision value of \a __a.
|
|
1225
1188
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1226
1189
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1227
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1228
|
-
|
|
1229
|
-
{
|
|
1190
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomigt_sd(__m128d __a,
|
|
1191
|
+
__m128d __b) {
|
|
1230
1192
|
return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
|
|
1231
1193
|
}
|
|
1232
1194
|
|
|
@@ -1250,9 +1212,8 @@ _mm_ucomigt_sd(__m128d __a, __m128d __b)
|
|
|
1250
1212
|
/// compared to the lower double-precision value of \a __a.
|
|
1251
1213
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1252
1214
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1253
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1254
|
-
|
|
1255
|
-
{
|
|
1215
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomige_sd(__m128d __a,
|
|
1216
|
+
__m128d __b) {
|
|
1256
1217
|
return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
|
|
1257
1218
|
}
|
|
1258
1219
|
|
|
@@ -1276,9 +1237,8 @@ _mm_ucomige_sd(__m128d __a, __m128d __b)
|
|
|
1276
1237
|
/// compared to the lower double-precision value of \a __a.
|
|
1277
1238
|
/// \returns An integer containing the comparison result. If either of the two
|
|
1278
1239
|
/// lower double-precision values is NaN, 1 is returned.
|
|
1279
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1280
|
-
|
|
1281
|
-
{
|
|
1240
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,
|
|
1241
|
+
__m128d __b) {
|
|
1282
1242
|
return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
|
|
1283
1243
|
}
|
|
1284
1244
|
|
|
@@ -1295,9 +1255,7 @@ _mm_ucomineq_sd(__m128d __a, __m128d __b)
|
|
|
1295
1255
|
/// A 128-bit vector of [2 x double].
|
|
1296
1256
|
/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
|
|
1297
1257
|
/// converted values. The upper 64 bits are set to zero.
|
|
1298
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1299
|
-
_mm_cvtpd_ps(__m128d __a)
|
|
1300
|
-
{
|
|
1258
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) {
|
|
1301
1259
|
return __builtin_ia32_cvtpd2ps((__v2df)__a);
|
|
1302
1260
|
}
|
|
1303
1261
|
|
|
@@ -1315,9 +1273,7 @@ _mm_cvtpd_ps(__m128d __a)
|
|
|
1315
1273
|
/// floating-point elements are converted to double-precision values. The
|
|
1316
1274
|
/// upper two elements are unused.
|
|
1317
1275
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1318
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1319
|
-
_mm_cvtps_pd(__m128 __a)
|
|
1320
|
-
{
|
|
1276
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtps_pd(__m128 __a) {
|
|
1321
1277
|
return (__m128d) __builtin_convertvector(
|
|
1322
1278
|
__builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
|
|
1323
1279
|
}
|
|
@@ -1338,9 +1294,7 @@ _mm_cvtps_pd(__m128 __a)
|
|
|
1338
1294
|
///
|
|
1339
1295
|
/// The upper two elements are unused.
|
|
1340
1296
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1341
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1342
|
-
_mm_cvtepi32_pd(__m128i __a)
|
|
1343
|
-
{
|
|
1297
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepi32_pd(__m128i __a) {
|
|
1344
1298
|
return (__m128d) __builtin_convertvector(
|
|
1345
1299
|
__builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
|
|
1346
1300
|
}
|
|
@@ -1358,9 +1312,7 @@ _mm_cvtepi32_pd(__m128i __a)
|
|
|
1358
1312
|
/// A 128-bit vector of [2 x double].
|
|
1359
1313
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
1360
1314
|
/// converted values. The upper 64 bits are set to zero.
|
|
1361
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1362
|
-
_mm_cvtpd_epi32(__m128d __a)
|
|
1363
|
-
{
|
|
1315
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {
|
|
1364
1316
|
return __builtin_ia32_cvtpd2dq((__v2df)__a);
|
|
1365
1317
|
}
|
|
1366
1318
|
|
|
@@ -1375,9 +1327,7 @@ _mm_cvtpd_epi32(__m128d __a)
|
|
|
1375
1327
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
1376
1328
|
/// conversion.
|
|
1377
1329
|
/// \returns A 32-bit signed integer containing the converted value.
|
|
1378
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1379
|
-
_mm_cvtsd_si32(__m128d __a)
|
|
1380
|
-
{
|
|
1330
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {
|
|
1381
1331
|
return __builtin_ia32_cvtsd2si((__v2df)__a);
|
|
1382
1332
|
}
|
|
1383
1333
|
|
|
@@ -1400,9 +1350,8 @@ _mm_cvtsd_si32(__m128d __a)
|
|
|
1400
1350
|
/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
|
|
1401
1351
|
/// converted value from the second parameter. The upper 96 bits are copied
|
|
1402
1352
|
/// from the upper 96 bits of the first parameter.
|
|
1403
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1404
|
-
|
|
1405
|
-
{
|
|
1353
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a,
|
|
1354
|
+
__m128d __b) {
|
|
1406
1355
|
return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
|
|
1407
1356
|
}
|
|
1408
1357
|
|
|
@@ -1423,9 +1372,8 @@ _mm_cvtsd_ss(__m128 __a, __m128d __b)
|
|
|
1423
1372
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
1424
1373
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
1425
1374
|
/// from the upper 64 bits of the first parameter.
|
|
1426
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1427
|
-
|
|
1428
|
-
{
|
|
1375
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi32_sd(__m128d __a,
|
|
1376
|
+
int __b) {
|
|
1429
1377
|
__a[0] = __b;
|
|
1430
1378
|
return __a;
|
|
1431
1379
|
}
|
|
@@ -1449,9 +1397,8 @@ _mm_cvtsi32_sd(__m128d __a, int __b)
|
|
|
1449
1397
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
1450
1398
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
1451
1399
|
/// from the upper 64 bits of the first parameter.
|
|
1452
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1453
|
-
|
|
1454
|
-
{
|
|
1400
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a,
|
|
1401
|
+
__m128 __b) {
|
|
1455
1402
|
__a[0] = __b[0];
|
|
1456
1403
|
return __a;
|
|
1457
1404
|
}
|
|
@@ -1473,9 +1420,7 @@ _mm_cvtss_sd(__m128d __a, __m128 __b)
|
|
|
1473
1420
|
/// A 128-bit vector of [2 x double].
|
|
1474
1421
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
1475
1422
|
/// converted values. The upper 64 bits are set to zero.
|
|
1476
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1477
|
-
_mm_cvttpd_epi32(__m128d __a)
|
|
1478
|
-
{
|
|
1423
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {
|
|
1479
1424
|
return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
|
|
1480
1425
|
}
|
|
1481
1426
|
|
|
@@ -1491,9 +1436,7 @@ _mm_cvttpd_epi32(__m128d __a)
|
|
|
1491
1436
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
1492
1437
|
/// conversion.
|
|
1493
1438
|
/// \returns A 32-bit signed integer containing the converted value.
|
|
1494
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1495
|
-
_mm_cvttsd_si32(__m128d __a)
|
|
1496
|
-
{
|
|
1439
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {
|
|
1497
1440
|
return __builtin_ia32_cvttsd2si((__v2df)__a);
|
|
1498
1441
|
}
|
|
1499
1442
|
|
|
@@ -1508,9 +1451,7 @@ _mm_cvttsd_si32(__m128d __a)
|
|
|
1508
1451
|
/// \param __a
|
|
1509
1452
|
/// A 128-bit vector of [2 x double].
|
|
1510
1453
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
|
1511
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
1512
|
-
_mm_cvtpd_pi32(__m128d __a)
|
|
1513
|
-
{
|
|
1454
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvtpd_pi32(__m128d __a) {
|
|
1514
1455
|
return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
|
|
1515
1456
|
}
|
|
1516
1457
|
|
|
@@ -1528,9 +1469,7 @@ _mm_cvtpd_pi32(__m128d __a)
|
|
|
1528
1469
|
/// \param __a
|
|
1529
1470
|
/// A 128-bit vector of [2 x double].
|
|
1530
1471
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
|
1531
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
1532
|
-
_mm_cvttpd_pi32(__m128d __a)
|
|
1533
|
-
{
|
|
1472
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvttpd_pi32(__m128d __a) {
|
|
1534
1473
|
return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
|
|
1535
1474
|
}
|
|
1536
1475
|
|
|
@@ -1545,9 +1484,7 @@ _mm_cvttpd_pi32(__m128d __a)
|
|
|
1545
1484
|
/// \param __a
|
|
1546
1485
|
/// A 64-bit vector of [2 x i32].
|
|
1547
1486
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1548
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX
|
|
1549
|
-
_mm_cvtpi32_pd(__m64 __a)
|
|
1550
|
-
{
|
|
1487
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX _mm_cvtpi32_pd(__m64 __a) {
|
|
1551
1488
|
return __builtin_ia32_cvtpi2pd((__v2si)__a);
|
|
1552
1489
|
}
|
|
1553
1490
|
|
|
@@ -1562,9 +1499,7 @@ _mm_cvtpi32_pd(__m64 __a)
|
|
|
1562
1499
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
|
|
1563
1500
|
/// \returns A double-precision floating-point value copied from the lower 64
|
|
1564
1501
|
/// bits of \a __a.
|
|
1565
|
-
static __inline__ double __DEFAULT_FN_ATTRS
|
|
1566
|
-
_mm_cvtsd_f64(__m128d __a)
|
|
1567
|
-
{
|
|
1502
|
+
static __inline__ double __DEFAULT_FN_ATTRS _mm_cvtsd_f64(__m128d __a) {
|
|
1568
1503
|
return __a[0];
|
|
1569
1504
|
}
|
|
1570
1505
|
|
|
@@ -1579,10 +1514,8 @@ _mm_cvtsd_f64(__m128d __a)
|
|
|
1579
1514
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
1580
1515
|
/// location has to be 16-byte aligned.
|
|
1581
1516
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
|
1582
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1583
|
-
|
|
1584
|
-
{
|
|
1585
|
-
return *(const __m128d*)__dp;
|
|
1517
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_pd(double const *__dp) {
|
|
1518
|
+
return *(const __m128d *)__dp;
|
|
1586
1519
|
}
|
|
1587
1520
|
|
|
1588
1521
|
/// Loads a double-precision floating-point value from a specified memory
|
|
@@ -1597,17 +1530,15 @@ _mm_load_pd(double const *__dp)
|
|
|
1597
1530
|
/// A pointer to a memory location containing a double-precision value.
|
|
1598
1531
|
/// \returns A 128-bit vector of [2 x double] containing the loaded and
|
|
1599
1532
|
/// duplicated values.
|
|
1600
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1601
|
-
_mm_load1_pd(double const *__dp)
|
|
1602
|
-
{
|
|
1533
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load1_pd(double const *__dp) {
|
|
1603
1534
|
struct __mm_load1_pd_struct {
|
|
1604
1535
|
double __u;
|
|
1605
1536
|
} __attribute__((__packed__, __may_alias__));
|
|
1606
|
-
double __u = ((const struct __mm_load1_pd_struct*)__dp)->__u;
|
|
1607
|
-
return __extension__
|
|
1537
|
+
double __u = ((const struct __mm_load1_pd_struct *)__dp)->__u;
|
|
1538
|
+
return __extension__(__m128d){__u, __u};
|
|
1608
1539
|
}
|
|
1609
1540
|
|
|
1610
|
-
#define
|
|
1541
|
+
#define _mm_load_pd1(dp) _mm_load1_pd(dp)
|
|
1611
1542
|
|
|
1612
1543
|
/// Loads two double-precision values, in reverse order, from an aligned
|
|
1613
1544
|
/// memory location into a 128-bit vector of [2 x double].
|
|
@@ -1623,10 +1554,8 @@ _mm_load1_pd(double const *__dp)
|
|
|
1623
1554
|
/// loaded in reverse order.
|
|
1624
1555
|
/// \returns A 128-bit vector of [2 x double] containing the reversed loaded
|
|
1625
1556
|
/// values.
|
|
1626
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1627
|
-
|
|
1628
|
-
{
|
|
1629
|
-
__m128d __u = *(const __m128d*)__dp;
|
|
1557
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadr_pd(double const *__dp) {
|
|
1558
|
+
__m128d __u = *(const __m128d *)__dp;
|
|
1630
1559
|
return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
|
|
1631
1560
|
}
|
|
1632
1561
|
|
|
@@ -1641,13 +1570,11 @@ _mm_loadr_pd(double const *__dp)
|
|
|
1641
1570
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
1642
1571
|
/// location does not have to be aligned.
|
|
1643
1572
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
|
1644
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1645
|
-
_mm_loadu_pd(double const *__dp)
|
|
1646
|
-
{
|
|
1573
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadu_pd(double const *__dp) {
|
|
1647
1574
|
struct __loadu_pd {
|
|
1648
1575
|
__m128d_u __v;
|
|
1649
1576
|
} __attribute__((__packed__, __may_alias__));
|
|
1650
|
-
return ((const struct __loadu_pd*)__dp)->__v;
|
|
1577
|
+
return ((const struct __loadu_pd *)__dp)->__v;
|
|
1651
1578
|
}
|
|
1652
1579
|
|
|
1653
1580
|
/// Loads a 64-bit integer value to the low element of a 128-bit integer
|
|
@@ -1661,14 +1588,12 @@ _mm_loadu_pd(double const *__dp)
|
|
|
1661
1588
|
/// A pointer to a 64-bit memory location. The address of the memory
|
|
1662
1589
|
/// location does not have to be aligned.
|
|
1663
1590
|
/// \returns A 128-bit vector of [2 x i64] containing the loaded value.
|
|
1664
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1665
|
-
_mm_loadu_si64(void const *__a)
|
|
1666
|
-
{
|
|
1591
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si64(void const *__a) {
|
|
1667
1592
|
struct __loadu_si64 {
|
|
1668
1593
|
long long __v;
|
|
1669
1594
|
} __attribute__((__packed__, __may_alias__));
|
|
1670
|
-
long long __u = ((const struct __loadu_si64*)__a)->__v;
|
|
1671
|
-
return __extension__
|
|
1595
|
+
long long __u = ((const struct __loadu_si64 *)__a)->__v;
|
|
1596
|
+
return __extension__(__m128i)(__v2di){__u, 0LL};
|
|
1672
1597
|
}
|
|
1673
1598
|
|
|
1674
1599
|
/// Loads a 32-bit integer value to the low element of a 128-bit integer
|
|
@@ -1682,14 +1607,12 @@ _mm_loadu_si64(void const *__a)
|
|
|
1682
1607
|
/// A pointer to a 32-bit memory location. The address of the memory
|
|
1683
1608
|
/// location does not have to be aligned.
|
|
1684
1609
|
/// \returns A 128-bit vector of [4 x i32] containing the loaded value.
|
|
1685
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1686
|
-
_mm_loadu_si32(void const *__a)
|
|
1687
|
-
{
|
|
1610
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si32(void const *__a) {
|
|
1688
1611
|
struct __loadu_si32 {
|
|
1689
1612
|
int __v;
|
|
1690
1613
|
} __attribute__((__packed__, __may_alias__));
|
|
1691
|
-
int __u = ((const struct __loadu_si32*)__a)->__v;
|
|
1692
|
-
return __extension__
|
|
1614
|
+
int __u = ((const struct __loadu_si32 *)__a)->__v;
|
|
1615
|
+
return __extension__(__m128i)(__v4si){__u, 0, 0, 0};
|
|
1693
1616
|
}
|
|
1694
1617
|
|
|
1695
1618
|
/// Loads a 16-bit integer value to the low element of a 128-bit integer
|
|
@@ -1703,14 +1626,12 @@ _mm_loadu_si32(void const *__a)
|
|
|
1703
1626
|
/// A pointer to a 16-bit memory location. The address of the memory
|
|
1704
1627
|
/// location does not have to be aligned.
|
|
1705
1628
|
/// \returns A 128-bit vector of [8 x i16] containing the loaded value.
|
|
1706
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1707
|
-
_mm_loadu_si16(void const *__a)
|
|
1708
|
-
{
|
|
1629
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si16(void const *__a) {
|
|
1709
1630
|
struct __loadu_si16 {
|
|
1710
1631
|
short __v;
|
|
1711
1632
|
} __attribute__((__packed__, __may_alias__));
|
|
1712
|
-
short __u = ((const struct __loadu_si16*)__a)->__v;
|
|
1713
|
-
return __extension__
|
|
1633
|
+
short __u = ((const struct __loadu_si16 *)__a)->__v;
|
|
1634
|
+
return __extension__(__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};
|
|
1714
1635
|
}
|
|
1715
1636
|
|
|
1716
1637
|
/// Loads a 64-bit double-precision value to the low element of a
|
|
@@ -1724,14 +1645,12 @@ _mm_loadu_si16(void const *__a)
|
|
|
1724
1645
|
/// A pointer to a memory location containing a double-precision value.
|
|
1725
1646
|
/// The address of the memory location does not have to be aligned.
|
|
1726
1647
|
/// \returns A 128-bit vector of [2 x double] containing the loaded value.
|
|
1727
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1728
|
-
_mm_load_sd(double const *__dp)
|
|
1729
|
-
{
|
|
1648
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_sd(double const *__dp) {
|
|
1730
1649
|
struct __mm_load_sd_struct {
|
|
1731
1650
|
double __u;
|
|
1732
1651
|
} __attribute__((__packed__, __may_alias__));
|
|
1733
|
-
double __u = ((const struct __mm_load_sd_struct*)__dp)->__u;
|
|
1734
|
-
return __extension__
|
|
1652
|
+
double __u = ((const struct __mm_load_sd_struct *)__dp)->__u;
|
|
1653
|
+
return __extension__(__m128d){__u, 0};
|
|
1735
1654
|
}
|
|
1736
1655
|
|
|
1737
1656
|
/// Loads a double-precision value into the high-order bits of a 128-bit
|
|
@@ -1751,14 +1670,13 @@ _mm_load_sd(double const *__dp)
|
|
|
1751
1670
|
/// [127:64] of the result. The address of the memory location does not have
|
|
1752
1671
|
/// to be aligned.
|
|
1753
1672
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1754
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1755
|
-
|
|
1756
|
-
{
|
|
1673
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadh_pd(__m128d __a,
|
|
1674
|
+
double const *__dp) {
|
|
1757
1675
|
struct __mm_loadh_pd_struct {
|
|
1758
1676
|
double __u;
|
|
1759
1677
|
} __attribute__((__packed__, __may_alias__));
|
|
1760
|
-
double __u = ((const struct __mm_loadh_pd_struct*)__dp)->__u;
|
|
1761
|
-
return __extension__
|
|
1678
|
+
double __u = ((const struct __mm_loadh_pd_struct *)__dp)->__u;
|
|
1679
|
+
return __extension__(__m128d){__a[0], __u};
|
|
1762
1680
|
}
|
|
1763
1681
|
|
|
1764
1682
|
/// Loads a double-precision value into the low-order bits of a 128-bit
|
|
@@ -1778,14 +1696,13 @@ _mm_loadh_pd(__m128d __a, double const *__dp)
|
|
|
1778
1696
|
/// [63:0] of the result. The address of the memory location does not have to
|
|
1779
1697
|
/// be aligned.
|
|
1780
1698
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1781
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1782
|
-
|
|
1783
|
-
{
|
|
1699
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadl_pd(__m128d __a,
|
|
1700
|
+
double const *__dp) {
|
|
1784
1701
|
struct __mm_loadl_pd_struct {
|
|
1785
1702
|
double __u;
|
|
1786
1703
|
} __attribute__((__packed__, __may_alias__));
|
|
1787
|
-
double __u = ((const struct __mm_loadl_pd_struct*)__dp)->__u;
|
|
1788
|
-
return __extension__
|
|
1704
|
+
double __u = ((const struct __mm_loadl_pd_struct *)__dp)->__u;
|
|
1705
|
+
return __extension__(__m128d){__u, __a[1]};
|
|
1789
1706
|
}
|
|
1790
1707
|
|
|
1791
1708
|
/// Constructs a 128-bit floating-point vector of [2 x double] with
|
|
@@ -1799,9 +1716,7 @@ _mm_loadl_pd(__m128d __a, double const *__dp)
|
|
|
1799
1716
|
///
|
|
1800
1717
|
/// \returns A 128-bit floating-point vector of [2 x double] with unspecified
|
|
1801
1718
|
/// content.
|
|
1802
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1803
|
-
_mm_undefined_pd(void)
|
|
1804
|
-
{
|
|
1719
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_undefined_pd(void) {
|
|
1805
1720
|
return (__m128d)__builtin_ia32_undef128();
|
|
1806
1721
|
}
|
|
1807
1722
|
|
|
@@ -1819,10 +1734,8 @@ _mm_undefined_pd(void)
|
|
|
1819
1734
|
/// \returns An initialized 128-bit floating-point vector of [2 x double]. The
|
|
1820
1735
|
/// lower 64 bits contain the value of the parameter. The upper 64 bits are
|
|
1821
1736
|
/// set to zero.
|
|
1822
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1823
|
-
|
|
1824
|
-
{
|
|
1825
|
-
return __extension__ (__m128d){ __w, 0 };
|
|
1737
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_sd(double __w) {
|
|
1738
|
+
return __extension__(__m128d){__w, 0};
|
|
1826
1739
|
}
|
|
1827
1740
|
|
|
1828
1741
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
|
@@ -1837,10 +1750,8 @@ _mm_set_sd(double __w)
|
|
|
1837
1750
|
/// A double-precision floating-point value used to initialize each vector
|
|
1838
1751
|
/// element of the result.
|
|
1839
1752
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1840
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1841
|
-
|
|
1842
|
-
{
|
|
1843
|
-
return __extension__ (__m128d){ __w, __w };
|
|
1753
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set1_pd(double __w) {
|
|
1754
|
+
return __extension__(__m128d){__w, __w};
|
|
1844
1755
|
}
|
|
1845
1756
|
|
|
1846
1757
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
|
@@ -1855,9 +1766,7 @@ _mm_set1_pd(double __w)
|
|
|
1855
1766
|
/// A double-precision floating-point value used to initialize each vector
|
|
1856
1767
|
/// element of the result.
|
|
1857
1768
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1858
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1859
|
-
_mm_set_pd1(double __w)
|
|
1860
|
-
{
|
|
1769
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd1(double __w) {
|
|
1861
1770
|
return _mm_set1_pd(__w);
|
|
1862
1771
|
}
|
|
1863
1772
|
|
|
@@ -1875,10 +1784,9 @@ _mm_set_pd1(double __w)
|
|
|
1875
1784
|
/// A double-precision floating-point value used to initialize the lower 64
|
|
1876
1785
|
/// bits of the result.
|
|
1877
1786
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1878
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1879
|
-
|
|
1880
|
-
{
|
|
1881
|
-
return __extension__ (__m128d){ __x, __w };
|
|
1787
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd(double __w,
|
|
1788
|
+
double __x) {
|
|
1789
|
+
return __extension__(__m128d){__x, __w};
|
|
1882
1790
|
}
|
|
1883
1791
|
|
|
1884
1792
|
/// Constructs a 128-bit floating-point vector of [2 x double],
|
|
@@ -1896,10 +1804,9 @@ _mm_set_pd(double __w, double __x)
|
|
|
1896
1804
|
/// A double-precision floating-point value used to initialize the upper 64
|
|
1897
1805
|
/// bits of the result.
|
|
1898
1806
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1899
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1900
|
-
|
|
1901
|
-
{
|
|
1902
|
-
return __extension__ (__m128d){ __w, __x };
|
|
1807
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setr_pd(double __w,
|
|
1808
|
+
double __x) {
|
|
1809
|
+
return __extension__(__m128d){__w, __x};
|
|
1903
1810
|
}
|
|
1904
1811
|
|
|
1905
1812
|
/// Constructs a 128-bit floating-point vector of [2 x double]
|
|
@@ -1911,10 +1818,8 @@ _mm_setr_pd(double __w, double __x)
|
|
|
1911
1818
|
///
|
|
1912
1819
|
/// \returns An initialized 128-bit floating-point vector of [2 x double] with
|
|
1913
1820
|
/// all elements set to zero.
|
|
1914
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1915
|
-
|
|
1916
|
-
{
|
|
1917
|
-
return __extension__ (__m128d){ 0, 0 };
|
|
1821
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setzero_pd(void) {
|
|
1822
|
+
return __extension__(__m128d){0.0, 0.0};
|
|
1918
1823
|
}
|
|
1919
1824
|
|
|
1920
1825
|
/// Constructs a 128-bit floating-point vector of [2 x double]. The lower
|
|
@@ -1932,9 +1837,8 @@ _mm_setzero_pd(void)
|
|
|
1932
1837
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
|
|
1933
1838
|
/// lower 64 bits of the result.
|
|
1934
1839
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1935
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1936
|
-
|
|
1937
|
-
{
|
|
1840
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_move_sd(__m128d __a,
|
|
1841
|
+
__m128d __b) {
|
|
1938
1842
|
__a[0] = __b[0];
|
|
1939
1843
|
return __a;
|
|
1940
1844
|
}
|
|
@@ -1950,13 +1854,12 @@ _mm_move_sd(__m128d __a, __m128d __b)
|
|
|
1950
1854
|
/// A pointer to a 64-bit memory location.
|
|
1951
1855
|
/// \param __a
|
|
1952
1856
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
1953
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1954
|
-
|
|
1955
|
-
{
|
|
1857
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_sd(double *__dp,
|
|
1858
|
+
__m128d __a) {
|
|
1956
1859
|
struct __mm_store_sd_struct {
|
|
1957
1860
|
double __u;
|
|
1958
1861
|
} __attribute__((__packed__, __may_alias__));
|
|
1959
|
-
((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
|
|
1862
|
+
((struct __mm_store_sd_struct *)__dp)->__u = __a[0];
|
|
1960
1863
|
}
|
|
1961
1864
|
|
|
1962
1865
|
/// Moves packed double-precision values from a 128-bit vector of
|
|
@@ -1972,10 +1875,9 @@ _mm_store_sd(double *__dp, __m128d __a)
|
|
|
1972
1875
|
/// \param __a
|
|
1973
1876
|
/// A packed 128-bit vector of [2 x double] containing the values to be
|
|
1974
1877
|
/// moved.
|
|
1975
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1976
|
-
|
|
1977
|
-
|
|
1978
|
-
*(__m128d*)__dp = __a;
|
|
1878
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd(double *__dp,
|
|
1879
|
+
__m128d __a) {
|
|
1880
|
+
*(__m128d *)__dp = __a;
|
|
1979
1881
|
}
|
|
1980
1882
|
|
|
1981
1883
|
/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
|
|
@@ -1992,9 +1894,8 @@ _mm_store_pd(double *__dp, __m128d __a)
|
|
|
1992
1894
|
/// \param __a
|
|
1993
1895
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
1994
1896
|
/// of the values in \a __dp.
|
|
1995
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1996
|
-
|
|
1997
|
-
{
|
|
1897
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store1_pd(double *__dp,
|
|
1898
|
+
__m128d __a) {
|
|
1998
1899
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
|
|
1999
1900
|
_mm_store_pd(__dp, __a);
|
|
2000
1901
|
}
|
|
@@ -2013,9 +1914,8 @@ _mm_store1_pd(double *__dp, __m128d __a)
|
|
|
2013
1914
|
/// \param __a
|
|
2014
1915
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
2015
1916
|
/// of the values in \a __dp.
|
|
2016
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2017
|
-
|
|
2018
|
-
{
|
|
1917
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd1(double *__dp,
|
|
1918
|
+
__m128d __a) {
|
|
2019
1919
|
_mm_store1_pd(__dp, __a);
|
|
2020
1920
|
}
|
|
2021
1921
|
|
|
@@ -2031,13 +1931,12 @@ _mm_store_pd1(double *__dp, __m128d __a)
|
|
|
2031
1931
|
/// location does not have to be aligned.
|
|
2032
1932
|
/// \param __a
|
|
2033
1933
|
/// A 128-bit vector of [2 x double] containing the values to be stored.
|
|
2034
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2035
|
-
|
|
2036
|
-
{
|
|
1934
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_pd(double *__dp,
|
|
1935
|
+
__m128d __a) {
|
|
2037
1936
|
struct __storeu_pd {
|
|
2038
1937
|
__m128d_u __v;
|
|
2039
1938
|
} __attribute__((__packed__, __may_alias__));
|
|
2040
|
-
((struct __storeu_pd*)__dp)->__v = __a;
|
|
1939
|
+
((struct __storeu_pd *)__dp)->__v = __a;
|
|
2041
1940
|
}
|
|
2042
1941
|
|
|
2043
1942
|
/// Stores two double-precision values, in reverse order, from a 128-bit
|
|
@@ -2054,9 +1953,8 @@ _mm_storeu_pd(double *__dp, __m128d __a)
|
|
|
2054
1953
|
/// \param __a
|
|
2055
1954
|
/// A 128-bit vector of [2 x double] containing the values to be reversed and
|
|
2056
1955
|
/// stored.
|
|
2057
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2058
|
-
|
|
2059
|
-
{
|
|
1956
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storer_pd(double *__dp,
|
|
1957
|
+
__m128d __a) {
|
|
2060
1958
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
|
|
2061
1959
|
*(__m128d *)__dp = __a;
|
|
2062
1960
|
}
|
|
@@ -2072,13 +1970,12 @@ _mm_storer_pd(double *__dp, __m128d __a)
|
|
|
2072
1970
|
/// A pointer to a 64-bit memory location.
|
|
2073
1971
|
/// \param __a
|
|
2074
1972
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
2075
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2076
|
-
|
|
2077
|
-
{
|
|
1973
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeh_pd(double *__dp,
|
|
1974
|
+
__m128d __a) {
|
|
2078
1975
|
struct __mm_storeh_pd_struct {
|
|
2079
1976
|
double __u;
|
|
2080
1977
|
} __attribute__((__packed__, __may_alias__));
|
|
2081
|
-
((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
|
|
1978
|
+
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[1];
|
|
2082
1979
|
}
|
|
2083
1980
|
|
|
2084
1981
|
/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
|
|
@@ -2092,13 +1989,12 @@ _mm_storeh_pd(double *__dp, __m128d __a)
|
|
|
2092
1989
|
/// A pointer to a 64-bit memory location.
|
|
2093
1990
|
/// \param __a
|
|
2094
1991
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
2095
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2096
|
-
|
|
2097
|
-
{
|
|
1992
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,
|
|
1993
|
+
__m128d __a) {
|
|
2098
1994
|
struct __mm_storeh_pd_struct {
|
|
2099
1995
|
double __u;
|
|
2100
1996
|
} __attribute__((__packed__, __may_alias__));
|
|
2101
|
-
((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
|
|
1997
|
+
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[0];
|
|
2102
1998
|
}
|
|
2103
1999
|
|
|
2104
2000
|
/// Adds the corresponding elements of two 128-bit vectors of [16 x i8],
|
|
@@ -2117,9 +2013,8 @@ _mm_storel_pd(double *__dp, __m128d __a)
|
|
|
2117
2013
|
/// A 128-bit vector of [16 x i8].
|
|
2118
2014
|
/// \returns A 128-bit vector of [16 x i8] containing the sums of both
|
|
2119
2015
|
/// parameters.
|
|
2120
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2121
|
-
|
|
2122
|
-
{
|
|
2016
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,
|
|
2017
|
+
__m128i __b) {
|
|
2123
2018
|
return (__m128i)((__v16qu)__a + (__v16qu)__b);
|
|
2124
2019
|
}
|
|
2125
2020
|
|
|
@@ -2139,9 +2034,8 @@ _mm_add_epi8(__m128i __a, __m128i __b)
|
|
|
2139
2034
|
/// A 128-bit vector of [8 x i16].
|
|
2140
2035
|
/// \returns A 128-bit vector of [8 x i16] containing the sums of both
|
|
2141
2036
|
/// parameters.
|
|
2142
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2143
|
-
|
|
2144
|
-
{
|
|
2037
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a,
|
|
2038
|
+
__m128i __b) {
|
|
2145
2039
|
return (__m128i)((__v8hu)__a + (__v8hu)__b);
|
|
2146
2040
|
}
|
|
2147
2041
|
|
|
@@ -2161,9 +2055,8 @@ _mm_add_epi16(__m128i __a, __m128i __b)
|
|
|
2161
2055
|
/// A 128-bit vector of [4 x i32].
|
|
2162
2056
|
/// \returns A 128-bit vector of [4 x i32] containing the sums of both
|
|
2163
2057
|
/// parameters.
|
|
2164
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2165
|
-
|
|
2166
|
-
{
|
|
2058
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi32(__m128i __a,
|
|
2059
|
+
__m128i __b) {
|
|
2167
2060
|
return (__m128i)((__v4su)__a + (__v4su)__b);
|
|
2168
2061
|
}
|
|
2169
2062
|
|
|
@@ -2179,9 +2072,8 @@ _mm_add_epi32(__m128i __a, __m128i __b)
|
|
|
2179
2072
|
/// \param __b
|
|
2180
2073
|
/// A 64-bit integer.
|
|
2181
2074
|
/// \returns A 64-bit integer containing the sum of both parameters.
|
|
2182
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2183
|
-
|
|
2184
|
-
{
|
|
2075
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_add_si64(__m64 __a,
|
|
2076
|
+
__m64 __b) {
|
|
2185
2077
|
return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
|
|
2186
2078
|
}
|
|
2187
2079
|
|
|
@@ -2201,9 +2093,8 @@ _mm_add_si64(__m64 __a, __m64 __b)
|
|
|
2201
2093
|
/// A 128-bit vector of [2 x i64].
|
|
2202
2094
|
/// \returns A 128-bit vector of [2 x i64] containing the sums of both
|
|
2203
2095
|
/// parameters.
|
|
2204
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2205
|
-
|
|
2206
|
-
{
|
|
2096
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a,
|
|
2097
|
+
__m128i __b) {
|
|
2207
2098
|
return (__m128i)((__v2du)__a + (__v2du)__b);
|
|
2208
2099
|
}
|
|
2209
2100
|
|
|
@@ -2222,10 +2113,9 @@ _mm_add_epi64(__m128i __a, __m128i __b)
|
|
|
2222
2113
|
/// A 128-bit signed [16 x i8] vector.
|
|
2223
2114
|
/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
|
|
2224
2115
|
/// both parameters.
|
|
2225
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2226
|
-
|
|
2227
|
-
|
|
2228
|
-
return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
|
|
2116
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,
|
|
2117
|
+
__m128i __b) {
|
|
2118
|
+
return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);
|
|
2229
2119
|
}
|
|
2230
2120
|
|
|
2231
2121
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2244,10 +2134,9 @@ _mm_adds_epi8(__m128i __a, __m128i __b)
|
|
|
2244
2134
|
/// A 128-bit signed [8 x i16] vector.
|
|
2245
2135
|
/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
|
|
2246
2136
|
/// both parameters.
|
|
2247
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2248
|
-
|
|
2249
|
-
|
|
2250
|
-
return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
|
|
2137
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,
|
|
2138
|
+
__m128i __b) {
|
|
2139
|
+
return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);
|
|
2251
2140
|
}
|
|
2252
2141
|
|
|
2253
2142
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2265,10 +2154,9 @@ _mm_adds_epi16(__m128i __a, __m128i __b)
|
|
|
2265
2154
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2266
2155
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
|
|
2267
2156
|
/// of both parameters.
|
|
2268
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2269
|
-
|
|
2270
|
-
|
|
2271
|
-
return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
|
|
2157
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,
|
|
2158
|
+
__m128i __b) {
|
|
2159
|
+
return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);
|
|
2272
2160
|
}
|
|
2273
2161
|
|
|
2274
2162
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2286,10 +2174,9 @@ _mm_adds_epu8(__m128i __a, __m128i __b)
|
|
|
2286
2174
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2287
2175
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
|
|
2288
2176
|
/// of both parameters.
|
|
2289
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2290
|
-
|
|
2291
|
-
|
|
2292
|
-
return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
|
|
2177
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,
|
|
2178
|
+
__m128i __b) {
|
|
2179
|
+
return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);
|
|
2293
2180
|
}
|
|
2294
2181
|
|
|
2295
2182
|
/// Computes the rounded averages of corresponding elements of two
|
|
@@ -2306,9 +2193,8 @@ _mm_adds_epu16(__m128i __a, __m128i __b)
|
|
|
2306
2193
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2307
2194
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
|
|
2308
2195
|
/// averages of both parameters.
|
|
2309
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2310
|
-
|
|
2311
|
-
{
|
|
2196
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,
|
|
2197
|
+
__m128i __b) {
|
|
2312
2198
|
return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);
|
|
2313
2199
|
}
|
|
2314
2200
|
|
|
@@ -2326,9 +2212,8 @@ _mm_avg_epu8(__m128i __a, __m128i __b)
|
|
|
2326
2212
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2327
2213
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
|
|
2328
2214
|
/// averages of both parameters.
|
|
2329
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2330
|
-
|
|
2331
|
-
{
|
|
2215
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,
|
|
2216
|
+
__m128i __b) {
|
|
2332
2217
|
return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);
|
|
2333
2218
|
}
|
|
2334
2219
|
|
|
@@ -2352,9 +2237,8 @@ _mm_avg_epu16(__m128i __a, __m128i __b)
|
|
|
2352
2237
|
/// A 128-bit signed [8 x i16] vector.
|
|
2353
2238
|
/// \returns A 128-bit signed [4 x i32] vector containing the sums of products
|
|
2354
2239
|
/// of both parameters.
|
|
2355
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2356
|
-
|
|
2357
|
-
{
|
|
2240
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,
|
|
2241
|
+
__m128i __b) {
|
|
2358
2242
|
return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
|
|
2359
2243
|
}
|
|
2360
2244
|
|
|
@@ -2372,9 +2256,8 @@ _mm_madd_epi16(__m128i __a, __m128i __b)
|
|
|
2372
2256
|
/// A 128-bit signed [8 x i16] vector.
|
|
2373
2257
|
/// \returns A 128-bit signed [8 x i16] vector containing the greater value of
|
|
2374
2258
|
/// each comparison.
|
|
2375
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2376
|
-
|
|
2377
|
-
{
|
|
2259
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,
|
|
2260
|
+
__m128i __b) {
|
|
2378
2261
|
return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);
|
|
2379
2262
|
}
|
|
2380
2263
|
|
|
@@ -2392,9 +2275,8 @@ _mm_max_epi16(__m128i __a, __m128i __b)
|
|
|
2392
2275
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2393
2276
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
|
|
2394
2277
|
/// each comparison.
|
|
2395
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2396
|
-
|
|
2397
|
-
{
|
|
2278
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,
|
|
2279
|
+
__m128i __b) {
|
|
2398
2280
|
return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);
|
|
2399
2281
|
}
|
|
2400
2282
|
|
|
@@ -2412,9 +2294,8 @@ _mm_max_epu8(__m128i __a, __m128i __b)
|
|
|
2412
2294
|
/// A 128-bit signed [8 x i16] vector.
|
|
2413
2295
|
/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
|
|
2414
2296
|
/// each comparison.
|
|
2415
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2416
|
-
|
|
2417
|
-
{
|
|
2297
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,
|
|
2298
|
+
__m128i __b) {
|
|
2418
2299
|
return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);
|
|
2419
2300
|
}
|
|
2420
2301
|
|
|
@@ -2432,9 +2313,8 @@ _mm_min_epi16(__m128i __a, __m128i __b)
|
|
|
2432
2313
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2433
2314
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
|
|
2434
2315
|
/// each comparison.
|
|
2435
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2436
|
-
|
|
2437
|
-
{
|
|
2316
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,
|
|
2317
|
+
__m128i __b) {
|
|
2438
2318
|
return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);
|
|
2439
2319
|
}
|
|
2440
2320
|
|
|
@@ -2452,9 +2332,8 @@ _mm_min_epu8(__m128i __a, __m128i __b)
|
|
|
2452
2332
|
/// A 128-bit signed [8 x i16] vector.
|
|
2453
2333
|
/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
|
|
2454
2334
|
/// each of the eight 32-bit products.
|
|
2455
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2456
|
-
|
|
2457
|
-
{
|
|
2335
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
|
|
2336
|
+
__m128i __b) {
|
|
2458
2337
|
return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
|
|
2459
2338
|
}
|
|
2460
2339
|
|
|
@@ -2472,9 +2351,8 @@ _mm_mulhi_epi16(__m128i __a, __m128i __b)
|
|
|
2472
2351
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2473
2352
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
|
|
2474
2353
|
/// of each of the eight 32-bit products.
|
|
2475
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2476
|
-
|
|
2477
|
-
{
|
|
2354
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
|
|
2355
|
+
__m128i __b) {
|
|
2478
2356
|
return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
|
|
2479
2357
|
}
|
|
2480
2358
|
|
|
@@ -2492,9 +2370,8 @@ _mm_mulhi_epu16(__m128i __a, __m128i __b)
|
|
|
2492
2370
|
/// A 128-bit signed [8 x i16] vector.
|
|
2493
2371
|
/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
|
|
2494
2372
|
/// each of the eight 32-bit products.
|
|
2495
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2496
|
-
|
|
2497
|
-
{
|
|
2373
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,
|
|
2374
|
+
__m128i __b) {
|
|
2498
2375
|
return (__m128i)((__v8hu)__a * (__v8hu)__b);
|
|
2499
2376
|
}
|
|
2500
2377
|
|
|
@@ -2511,9 +2388,8 @@ _mm_mullo_epi16(__m128i __a, __m128i __b)
|
|
|
2511
2388
|
/// \param __b
|
|
2512
2389
|
/// A 64-bit integer containing one of the source operands.
|
|
2513
2390
|
/// \returns A 64-bit integer vector containing the product of both operands.
|
|
2514
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2515
|
-
|
|
2516
|
-
{
|
|
2391
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_mul_su32(__m64 __a,
|
|
2392
|
+
__m64 __b) {
|
|
2517
2393
|
return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
|
|
2518
2394
|
}
|
|
2519
2395
|
|
|
@@ -2530,9 +2406,8 @@ _mm_mul_su32(__m64 __a, __m64 __b)
|
|
|
2530
2406
|
/// \param __b
|
|
2531
2407
|
/// A [2 x i64] vector containing one of the source operands.
|
|
2532
2408
|
/// \returns A [2 x i64] vector containing the product of both operands.
|
|
2533
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2534
|
-
|
|
2535
|
-
{
|
|
2409
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a,
|
|
2410
|
+
__m128i __b) {
|
|
2536
2411
|
return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
|
|
2537
2412
|
}
|
|
2538
2413
|
|
|
@@ -2552,9 +2427,8 @@ _mm_mul_epu32(__m128i __a, __m128i __b)
|
|
|
2552
2427
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2553
2428
|
/// \returns A [2 x i64] vector containing the sums of the sets of absolute
|
|
2554
2429
|
/// differences between both operands.
|
|
2555
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2556
|
-
|
|
2557
|
-
{
|
|
2430
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,
|
|
2431
|
+
__m128i __b) {
|
|
2558
2432
|
return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
|
|
2559
2433
|
}
|
|
2560
2434
|
|
|
@@ -2570,9 +2444,8 @@ _mm_sad_epu8(__m128i __a, __m128i __b)
|
|
|
2570
2444
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2571
2445
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2572
2446
|
/// in the operands.
|
|
2573
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2574
|
-
|
|
2575
|
-
{
|
|
2447
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,
|
|
2448
|
+
__m128i __b) {
|
|
2576
2449
|
return (__m128i)((__v16qu)__a - (__v16qu)__b);
|
|
2577
2450
|
}
|
|
2578
2451
|
|
|
@@ -2588,9 +2461,8 @@ _mm_sub_epi8(__m128i __a, __m128i __b)
|
|
|
2588
2461
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2589
2462
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2590
2463
|
/// in the operands.
|
|
2591
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2592
|
-
|
|
2593
|
-
{
|
|
2464
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a,
|
|
2465
|
+
__m128i __b) {
|
|
2594
2466
|
return (__m128i)((__v8hu)__a - (__v8hu)__b);
|
|
2595
2467
|
}
|
|
2596
2468
|
|
|
@@ -2606,9 +2478,8 @@ _mm_sub_epi16(__m128i __a, __m128i __b)
|
|
|
2606
2478
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2607
2479
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2608
2480
|
/// in the operands.
|
|
2609
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2610
|
-
|
|
2611
|
-
{
|
|
2481
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi32(__m128i __a,
|
|
2482
|
+
__m128i __b) {
|
|
2612
2483
|
return (__m128i)((__v4su)__a - (__v4su)__b);
|
|
2613
2484
|
}
|
|
2614
2485
|
|
|
@@ -2625,9 +2496,8 @@ _mm_sub_epi32(__m128i __a, __m128i __b)
|
|
|
2625
2496
|
/// A 64-bit integer vector containing the subtrahend.
|
|
2626
2497
|
/// \returns A 64-bit integer vector containing the difference of the values in
|
|
2627
2498
|
/// the operands.
|
|
2628
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2629
|
-
|
|
2630
|
-
{
|
|
2499
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sub_si64(__m64 __a,
|
|
2500
|
+
__m64 __b) {
|
|
2631
2501
|
return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
|
|
2632
2502
|
}
|
|
2633
2503
|
|
|
@@ -2643,9 +2513,8 @@ _mm_sub_si64(__m64 __a, __m64 __b)
|
|
|
2643
2513
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2644
2514
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2645
2515
|
/// in the operands.
|
|
2646
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2647
|
-
|
|
2648
|
-
{
|
|
2516
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi64(__m128i __a,
|
|
2517
|
+
__m128i __b) {
|
|
2649
2518
|
return (__m128i)((__v2du)__a - (__v2du)__b);
|
|
2650
2519
|
}
|
|
2651
2520
|
|
|
@@ -2664,10 +2533,9 @@ _mm_sub_epi64(__m128i __a, __m128i __b)
|
|
|
2664
2533
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2665
2534
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2666
2535
|
/// in the operands.
|
|
2667
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2668
|
-
|
|
2669
|
-
|
|
2670
|
-
return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
|
|
2536
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,
|
|
2537
|
+
__m128i __b) {
|
|
2538
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);
|
|
2671
2539
|
}
|
|
2672
2540
|
|
|
2673
2541
|
/// Subtracts corresponding 16-bit signed integer values in the input and
|
|
@@ -2685,10 +2553,9 @@ _mm_subs_epi8(__m128i __a, __m128i __b)
|
|
|
2685
2553
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2686
2554
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2687
2555
|
/// in the operands.
|
|
2688
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2689
|
-
|
|
2690
|
-
|
|
2691
|
-
return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
|
|
2556
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,
|
|
2557
|
+
__m128i __b) {
|
|
2558
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);
|
|
2692
2559
|
}
|
|
2693
2560
|
|
|
2694
2561
|
/// Subtracts corresponding 8-bit unsigned integer values in the input
|
|
@@ -2705,10 +2572,9 @@ _mm_subs_epi16(__m128i __a, __m128i __b)
|
|
|
2705
2572
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2706
2573
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
2707
2574
|
/// differences of the values in the operands.
|
|
2708
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2709
|
-
|
|
2710
|
-
|
|
2711
|
-
return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
|
|
2575
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,
|
|
2576
|
+
__m128i __b) {
|
|
2577
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);
|
|
2712
2578
|
}
|
|
2713
2579
|
|
|
2714
2580
|
/// Subtracts corresponding 16-bit unsigned integer values in the input
|
|
@@ -2725,10 +2591,9 @@ _mm_subs_epu8(__m128i __a, __m128i __b)
|
|
|
2725
2591
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2726
2592
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
2727
2593
|
/// differences of the values in the operands.
|
|
2728
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2729
|
-
|
|
2730
|
-
|
|
2731
|
-
return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
|
|
2594
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,
|
|
2595
|
+
__m128i __b) {
|
|
2596
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);
|
|
2732
2597
|
}
|
|
2733
2598
|
|
|
2734
2599
|
/// Performs a bitwise AND of two 128-bit integer vectors.
|
|
@@ -2743,9 +2608,8 @@ _mm_subs_epu16(__m128i __a, __m128i __b)
|
|
|
2743
2608
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2744
2609
|
/// \returns A 128-bit integer vector containing the bitwise AND of the values
|
|
2745
2610
|
/// in both operands.
|
|
2746
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2747
|
-
|
|
2748
|
-
{
|
|
2611
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,
|
|
2612
|
+
__m128i __b) {
|
|
2749
2613
|
return (__m128i)((__v2du)__a & (__v2du)__b);
|
|
2750
2614
|
}
|
|
2751
2615
|
|
|
@@ -2763,9 +2627,8 @@ _mm_and_si128(__m128i __a, __m128i __b)
|
|
|
2763
2627
|
/// A 128-bit vector containing the right source operand.
|
|
2764
2628
|
/// \returns A 128-bit integer vector containing the bitwise AND of the one's
|
|
2765
2629
|
/// complement of the first operand and the values in the second operand.
|
|
2766
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2767
|
-
|
|
2768
|
-
{
|
|
2630
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,
|
|
2631
|
+
__m128i __b) {
|
|
2769
2632
|
return (__m128i)(~(__v2du)__a & (__v2du)__b);
|
|
2770
2633
|
}
|
|
2771
2634
|
/// Performs a bitwise OR of two 128-bit integer vectors.
|
|
@@ -2780,9 +2643,8 @@ _mm_andnot_si128(__m128i __a, __m128i __b)
|
|
|
2780
2643
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2781
2644
|
/// \returns A 128-bit integer vector containing the bitwise OR of the values
|
|
2782
2645
|
/// in both operands.
|
|
2783
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2784
|
-
|
|
2785
|
-
{
|
|
2646
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,
|
|
2647
|
+
__m128i __b) {
|
|
2786
2648
|
return (__m128i)((__v2du)__a | (__v2du)__b);
|
|
2787
2649
|
}
|
|
2788
2650
|
|
|
@@ -2798,9 +2660,8 @@ _mm_or_si128(__m128i __a, __m128i __b)
|
|
|
2798
2660
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2799
2661
|
/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
|
|
2800
2662
|
/// values in both operands.
|
|
2801
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2802
|
-
|
|
2803
|
-
{
|
|
2663
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,
|
|
2664
|
+
__m128i __b) {
|
|
2804
2665
|
return (__m128i)((__v2du)__a ^ (__v2du)__b);
|
|
2805
2666
|
}
|
|
2806
2667
|
|
|
@@ -2821,11 +2682,13 @@ _mm_xor_si128(__m128i __a, __m128i __b)
|
|
|
2821
2682
|
/// An immediate value specifying the number of bytes to left-shift operand
|
|
2822
2683
|
/// \a a.
|
|
2823
2684
|
/// \returns A 128-bit integer vector containing the left-shifted value.
|
|
2824
|
-
#define _mm_slli_si128(a, imm)
|
|
2825
|
-
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2685
|
+
#define _mm_slli_si128(a, imm) \
|
|
2686
|
+
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2687
|
+
(int)(imm)))
|
|
2826
2688
|
|
|
2827
|
-
#define _mm_bslli_si128(a, imm)
|
|
2828
|
-
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2689
|
+
#define _mm_bslli_si128(a, imm) \
|
|
2690
|
+
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2691
|
+
(int)(imm)))
|
|
2829
2692
|
|
|
2830
2693
|
/// Left-shifts each 16-bit value in the 128-bit integer vector operand
|
|
2831
2694
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
@@ -2840,9 +2703,8 @@ _mm_xor_si128(__m128i __a, __m128i __b)
|
|
|
2840
2703
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2841
2704
|
/// in operand \a __a.
|
|
2842
2705
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2843
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2844
|
-
|
|
2845
|
-
{
|
|
2706
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,
|
|
2707
|
+
int __count) {
|
|
2846
2708
|
return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
|
|
2847
2709
|
}
|
|
2848
2710
|
|
|
@@ -2859,9 +2721,8 @@ _mm_slli_epi16(__m128i __a, int __count)
|
|
|
2859
2721
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2860
2722
|
/// to left-shift each value in operand \a __a.
|
|
2861
2723
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2862
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2863
|
-
|
|
2864
|
-
{
|
|
2724
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,
|
|
2725
|
+
__m128i __count) {
|
|
2865
2726
|
return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
|
|
2866
2727
|
}
|
|
2867
2728
|
|
|
@@ -2878,9 +2739,8 @@ _mm_sll_epi16(__m128i __a, __m128i __count)
|
|
|
2878
2739
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2879
2740
|
/// in operand \a __a.
|
|
2880
2741
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2881
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2882
|
-
|
|
2883
|
-
{
|
|
2742
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,
|
|
2743
|
+
int __count) {
|
|
2884
2744
|
return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
|
|
2885
2745
|
}
|
|
2886
2746
|
|
|
@@ -2897,9 +2757,8 @@ _mm_slli_epi32(__m128i __a, int __count)
|
|
|
2897
2757
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2898
2758
|
/// to left-shift each value in operand \a __a.
|
|
2899
2759
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2900
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2901
|
-
|
|
2902
|
-
{
|
|
2760
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,
|
|
2761
|
+
__m128i __count) {
|
|
2903
2762
|
return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
|
|
2904
2763
|
}
|
|
2905
2764
|
|
|
@@ -2916,9 +2775,8 @@ _mm_sll_epi32(__m128i __a, __m128i __count)
|
|
|
2916
2775
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2917
2776
|
/// in operand \a __a.
|
|
2918
2777
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2919
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2920
|
-
|
|
2921
|
-
{
|
|
2778
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,
|
|
2779
|
+
int __count) {
|
|
2922
2780
|
return __builtin_ia32_psllqi128((__v2di)__a, __count);
|
|
2923
2781
|
}
|
|
2924
2782
|
|
|
@@ -2935,9 +2793,8 @@ _mm_slli_epi64(__m128i __a, int __count)
|
|
|
2935
2793
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2936
2794
|
/// to left-shift each value in operand \a __a.
|
|
2937
2795
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2938
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2939
|
-
|
|
2940
|
-
{
|
|
2796
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,
|
|
2797
|
+
__m128i __count) {
|
|
2941
2798
|
return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
|
|
2942
2799
|
}
|
|
2943
2800
|
|
|
@@ -2955,9 +2812,8 @@ _mm_sll_epi64(__m128i __a, __m128i __count)
|
|
|
2955
2812
|
/// An integer value specifying the number of bits to right-shift each value
|
|
2956
2813
|
/// in operand \a __a.
|
|
2957
2814
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2958
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2959
|
-
|
|
2960
|
-
{
|
|
2815
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,
|
|
2816
|
+
int __count) {
|
|
2961
2817
|
return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
|
|
2962
2818
|
}
|
|
2963
2819
|
|
|
@@ -2975,9 +2831,8 @@ _mm_srai_epi16(__m128i __a, int __count)
|
|
|
2975
2831
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2976
2832
|
/// to right-shift each value in operand \a __a.
|
|
2977
2833
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2978
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2979
|
-
|
|
2980
|
-
{
|
|
2834
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,
|
|
2835
|
+
__m128i __count) {
|
|
2981
2836
|
return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
|
|
2982
2837
|
}
|
|
2983
2838
|
|
|
@@ -2995,9 +2850,8 @@ _mm_sra_epi16(__m128i __a, __m128i __count)
|
|
|
2995
2850
|
/// An integer value specifying the number of bits to right-shift each value
|
|
2996
2851
|
/// in operand \a __a.
|
|
2997
2852
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2998
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2999
|
-
|
|
3000
|
-
{
|
|
2853
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,
|
|
2854
|
+
int __count) {
|
|
3001
2855
|
return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
|
|
3002
2856
|
}
|
|
3003
2857
|
|
|
@@ -3015,9 +2869,8 @@ _mm_srai_epi32(__m128i __a, int __count)
|
|
|
3015
2869
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3016
2870
|
/// to right-shift each value in operand \a __a.
|
|
3017
2871
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3018
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3019
|
-
|
|
3020
|
-
{
|
|
2872
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,
|
|
2873
|
+
__m128i __count) {
|
|
3021
2874
|
return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
|
|
3022
2875
|
}
|
|
3023
2876
|
|
|
@@ -3038,11 +2891,13 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
|
|
|
3038
2891
|
/// An immediate value specifying the number of bytes to right-shift operand
|
|
3039
2892
|
/// \a a.
|
|
3040
2893
|
/// \returns A 128-bit integer vector containing the right-shifted value.
|
|
3041
|
-
#define _mm_srli_si128(a, imm)
|
|
3042
|
-
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2894
|
+
#define _mm_srli_si128(a, imm) \
|
|
2895
|
+
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2896
|
+
(int)(imm)))
|
|
3043
2897
|
|
|
3044
|
-
#define _mm_bsrli_si128(a, imm)
|
|
3045
|
-
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2898
|
+
#define _mm_bsrli_si128(a, imm) \
|
|
2899
|
+
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2900
|
+
(int)(imm)))
|
|
3046
2901
|
|
|
3047
2902
|
/// Right-shifts each of 16-bit values in the 128-bit integer vector
|
|
3048
2903
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
@@ -3057,9 +2912,8 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
|
|
|
3057
2912
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3058
2913
|
/// in operand \a __a.
|
|
3059
2914
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3060
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3061
|
-
|
|
3062
|
-
{
|
|
2915
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,
|
|
2916
|
+
int __count) {
|
|
3063
2917
|
return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
|
|
3064
2918
|
}
|
|
3065
2919
|
|
|
@@ -3076,9 +2930,8 @@ _mm_srli_epi16(__m128i __a, int __count)
|
|
|
3076
2930
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3077
2931
|
/// to right-shift each value in operand \a __a.
|
|
3078
2932
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3079
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3080
|
-
|
|
3081
|
-
{
|
|
2933
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,
|
|
2934
|
+
__m128i __count) {
|
|
3082
2935
|
return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
|
|
3083
2936
|
}
|
|
3084
2937
|
|
|
@@ -3095,9 +2948,8 @@ _mm_srl_epi16(__m128i __a, __m128i __count)
|
|
|
3095
2948
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3096
2949
|
/// in operand \a __a.
|
|
3097
2950
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3098
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3099
|
-
|
|
3100
|
-
{
|
|
2951
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,
|
|
2952
|
+
int __count) {
|
|
3101
2953
|
return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
|
|
3102
2954
|
}
|
|
3103
2955
|
|
|
@@ -3114,9 +2966,8 @@ _mm_srli_epi32(__m128i __a, int __count)
|
|
|
3114
2966
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3115
2967
|
/// to right-shift each value in operand \a __a.
|
|
3116
2968
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3117
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3118
|
-
|
|
3119
|
-
{
|
|
2969
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,
|
|
2970
|
+
__m128i __count) {
|
|
3120
2971
|
return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
|
|
3121
2972
|
}
|
|
3122
2973
|
|
|
@@ -3133,9 +2984,8 @@ _mm_srl_epi32(__m128i __a, __m128i __count)
|
|
|
3133
2984
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3134
2985
|
/// in operand \a __a.
|
|
3135
2986
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3136
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3137
|
-
|
|
3138
|
-
{
|
|
2987
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,
|
|
2988
|
+
int __count) {
|
|
3139
2989
|
return __builtin_ia32_psrlqi128((__v2di)__a, __count);
|
|
3140
2990
|
}
|
|
3141
2991
|
|
|
@@ -3152,9 +3002,8 @@ _mm_srli_epi64(__m128i __a, int __count)
|
|
|
3152
3002
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3153
3003
|
/// to right-shift each value in operand \a __a.
|
|
3154
3004
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3155
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3156
|
-
|
|
3157
|
-
{
|
|
3005
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,
|
|
3006
|
+
__m128i __count) {
|
|
3158
3007
|
return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
|
|
3159
3008
|
}
|
|
3160
3009
|
|
|
@@ -3171,9 +3020,8 @@ _mm_srl_epi64(__m128i __a, __m128i __count)
|
|
|
3171
3020
|
/// \param __b
|
|
3172
3021
|
/// A 128-bit integer vector.
|
|
3173
3022
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3174
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3175
|
-
|
|
3176
|
-
{
|
|
3023
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,
|
|
3024
|
+
__m128i __b) {
|
|
3177
3025
|
return (__m128i)((__v16qi)__a == (__v16qi)__b);
|
|
3178
3026
|
}
|
|
3179
3027
|
|
|
@@ -3190,9 +3038,8 @@ _mm_cmpeq_epi8(__m128i __a, __m128i __b)
|
|
|
3190
3038
|
/// \param __b
|
|
3191
3039
|
/// A 128-bit integer vector.
|
|
3192
3040
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3193
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3194
|
-
|
|
3195
|
-
{
|
|
3041
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,
|
|
3042
|
+
__m128i __b) {
|
|
3196
3043
|
return (__m128i)((__v8hi)__a == (__v8hi)__b);
|
|
3197
3044
|
}
|
|
3198
3045
|
|
|
@@ -3209,9 +3056,8 @@ _mm_cmpeq_epi16(__m128i __a, __m128i __b)
|
|
|
3209
3056
|
/// \param __b
|
|
3210
3057
|
/// A 128-bit integer vector.
|
|
3211
3058
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3212
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3213
|
-
|
|
3214
|
-
{
|
|
3059
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,
|
|
3060
|
+
__m128i __b) {
|
|
3215
3061
|
return (__m128i)((__v4si)__a == (__v4si)__b);
|
|
3216
3062
|
}
|
|
3217
3063
|
|
|
@@ -3229,9 +3075,8 @@ _mm_cmpeq_epi32(__m128i __a, __m128i __b)
|
|
|
3229
3075
|
/// \param __b
|
|
3230
3076
|
/// A 128-bit integer vector.
|
|
3231
3077
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3232
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3233
|
-
|
|
3234
|
-
{
|
|
3078
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,
|
|
3079
|
+
__m128i __b) {
|
|
3235
3080
|
/* This function always performs a signed comparison, but __v16qi is a char
|
|
3236
3081
|
which may be signed or unsigned, so use __v16qs. */
|
|
3237
3082
|
return (__m128i)((__v16qs)__a > (__v16qs)__b);
|
|
@@ -3252,9 +3097,8 @@ _mm_cmpgt_epi8(__m128i __a, __m128i __b)
|
|
|
3252
3097
|
/// \param __b
|
|
3253
3098
|
/// A 128-bit integer vector.
|
|
3254
3099
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3255
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3256
|
-
|
|
3257
|
-
{
|
|
3100
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,
|
|
3101
|
+
__m128i __b) {
|
|
3258
3102
|
return (__m128i)((__v8hi)__a > (__v8hi)__b);
|
|
3259
3103
|
}
|
|
3260
3104
|
|
|
@@ -3273,9 +3117,8 @@ _mm_cmpgt_epi16(__m128i __a, __m128i __b)
|
|
|
3273
3117
|
/// \param __b
|
|
3274
3118
|
/// A 128-bit integer vector.
|
|
3275
3119
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3276
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3277
|
-
|
|
3278
|
-
{
|
|
3120
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,
|
|
3121
|
+
__m128i __b) {
|
|
3279
3122
|
return (__m128i)((__v4si)__a > (__v4si)__b);
|
|
3280
3123
|
}
|
|
3281
3124
|
|
|
@@ -3294,9 +3137,8 @@ _mm_cmpgt_epi32(__m128i __a, __m128i __b)
|
|
|
3294
3137
|
/// \param __b
|
|
3295
3138
|
/// A 128-bit integer vector.
|
|
3296
3139
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3297
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3298
|
-
|
|
3299
|
-
{
|
|
3140
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,
|
|
3141
|
+
__m128i __b) {
|
|
3300
3142
|
return _mm_cmpgt_epi8(__b, __a);
|
|
3301
3143
|
}
|
|
3302
3144
|
|
|
@@ -3315,9 +3157,8 @@ _mm_cmplt_epi8(__m128i __a, __m128i __b)
|
|
|
3315
3157
|
/// \param __b
|
|
3316
3158
|
/// A 128-bit integer vector.
|
|
3317
3159
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3318
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3319
|
-
|
|
3320
|
-
{
|
|
3160
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,
|
|
3161
|
+
__m128i __b) {
|
|
3321
3162
|
return _mm_cmpgt_epi16(__b, __a);
|
|
3322
3163
|
}
|
|
3323
3164
|
|
|
@@ -3336,9 +3177,8 @@ _mm_cmplt_epi16(__m128i __a, __m128i __b)
|
|
|
3336
3177
|
/// \param __b
|
|
3337
3178
|
/// A 128-bit integer vector.
|
|
3338
3179
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3339
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3340
|
-
|
|
3341
|
-
{
|
|
3180
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a,
|
|
3181
|
+
__m128i __b) {
|
|
3342
3182
|
return _mm_cmpgt_epi32(__b, __a);
|
|
3343
3183
|
}
|
|
3344
3184
|
|
|
@@ -3360,9 +3200,8 @@ _mm_cmplt_epi32(__m128i __a, __m128i __b)
|
|
|
3360
3200
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
3361
3201
|
/// converted value of the second operand. The upper 64 bits are copied from
|
|
3362
3202
|
/// the upper 64 bits of the first operand.
|
|
3363
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
3364
|
-
|
|
3365
|
-
{
|
|
3203
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi64_sd(__m128d __a,
|
|
3204
|
+
long long __b) {
|
|
3366
3205
|
__a[0] = __b;
|
|
3367
3206
|
return __a;
|
|
3368
3207
|
}
|
|
@@ -3378,9 +3217,7 @@ _mm_cvtsi64_sd(__m128d __a, long long __b)
|
|
|
3378
3217
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
3379
3218
|
/// conversion.
|
|
3380
3219
|
/// \returns A 64-bit signed integer containing the converted value.
|
|
3381
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3382
|
-
_mm_cvtsd_si64(__m128d __a)
|
|
3383
|
-
{
|
|
3220
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {
|
|
3384
3221
|
return __builtin_ia32_cvtsd2si64((__v2df)__a);
|
|
3385
3222
|
}
|
|
3386
3223
|
|
|
@@ -3396,9 +3233,7 @@ _mm_cvtsd_si64(__m128d __a)
|
|
|
3396
3233
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
3397
3234
|
/// conversion.
|
|
3398
3235
|
/// \returns A 64-bit signed integer containing the converted value.
|
|
3399
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3400
|
-
_mm_cvttsd_si64(__m128d __a)
|
|
3401
|
-
{
|
|
3236
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) {
|
|
3402
3237
|
return __builtin_ia32_cvttsd2si64((__v2df)__a);
|
|
3403
3238
|
}
|
|
3404
3239
|
#endif
|
|
@@ -3412,10 +3247,8 @@ _mm_cvttsd_si64(__m128d __a)
|
|
|
3412
3247
|
/// \param __a
|
|
3413
3248
|
/// A 128-bit integer vector.
|
|
3414
3249
|
/// \returns A 128-bit vector of [4 x float] containing the converted values.
|
|
3415
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
3416
|
-
|
|
3417
|
-
{
|
|
3418
|
-
return (__m128)__builtin_convertvector((__v4si)__a, __v4sf);
|
|
3250
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepi32_ps(__m128i __a) {
|
|
3251
|
+
return (__m128) __builtin_convertvector((__v4si)__a, __v4sf);
|
|
3419
3252
|
}
|
|
3420
3253
|
|
|
3421
3254
|
/// Converts a vector of [4 x float] into a vector of [4 x i32].
|
|
@@ -3428,9 +3261,7 @@ _mm_cvtepi32_ps(__m128i __a)
|
|
|
3428
3261
|
/// A 128-bit vector of [4 x float].
|
|
3429
3262
|
/// \returns A 128-bit integer vector of [4 x i32] containing the converted
|
|
3430
3263
|
/// values.
|
|
3431
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3432
|
-
_mm_cvtps_epi32(__m128 __a)
|
|
3433
|
-
{
|
|
3264
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {
|
|
3434
3265
|
return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
|
|
3435
3266
|
}
|
|
3436
3267
|
|
|
@@ -3445,9 +3276,7 @@ _mm_cvtps_epi32(__m128 __a)
|
|
|
3445
3276
|
/// \param __a
|
|
3446
3277
|
/// A 128-bit vector of [4 x float].
|
|
3447
3278
|
/// \returns A 128-bit vector of [4 x i32] containing the converted values.
|
|
3448
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3449
|
-
_mm_cvttps_epi32(__m128 __a)
|
|
3450
|
-
{
|
|
3279
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {
|
|
3451
3280
|
return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
|
|
3452
3281
|
}
|
|
3453
3282
|
|
|
@@ -3461,29 +3290,24 @@ _mm_cvttps_epi32(__m128 __a)
|
|
|
3461
3290
|
/// \param __a
|
|
3462
3291
|
/// A 32-bit signed integer operand.
|
|
3463
3292
|
/// \returns A 128-bit vector of [4 x i32].
|
|
3464
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3465
|
-
|
|
3466
|
-
{
|
|
3467
|
-
return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 };
|
|
3293
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
|
|
3294
|
+
return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
|
|
3468
3295
|
}
|
|
3469
3296
|
|
|
3470
|
-
#ifdef __x86_64__
|
|
3471
3297
|
/// Returns a vector of [2 x i64] where the lower element is the input
|
|
3472
3298
|
/// operand and the upper element is zero.
|
|
3473
3299
|
///
|
|
3474
3300
|
/// \headerfile <x86intrin.h>
|
|
3475
3301
|
///
|
|
3476
|
-
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
|
|
3302
|
+
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
|
|
3303
|
+
/// in 64-bit mode.
|
|
3477
3304
|
///
|
|
3478
3305
|
/// \param __a
|
|
3479
3306
|
/// A 64-bit signed integer operand containing the value to be converted.
|
|
3480
3307
|
/// \returns A 128-bit vector of [2 x i64] containing the converted value.
|
|
3481
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3482
|
-
|
|
3483
|
-
{
|
|
3484
|
-
return __extension__ (__m128i)(__v2di){ __a, 0 };
|
|
3308
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
|
|
3309
|
+
return __extension__(__m128i)(__v2di){__a, 0};
|
|
3485
3310
|
}
|
|
3486
|
-
#endif
|
|
3487
3311
|
|
|
3488
3312
|
/// Moves the least significant 32 bits of a vector of [4 x i32] to a
|
|
3489
3313
|
/// 32-bit signed integer value.
|
|
@@ -3496,14 +3320,11 @@ _mm_cvtsi64_si128(long long __a)
|
|
|
3496
3320
|
/// A vector of [4 x i32]. The least significant 32 bits are moved to the
|
|
3497
3321
|
/// destination.
|
|
3498
3322
|
/// \returns A 32-bit signed integer containing the moved value.
|
|
3499
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
3500
|
-
_mm_cvtsi128_si32(__m128i __a)
|
|
3501
|
-
{
|
|
3323
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
|
|
3502
3324
|
__v4si __b = (__v4si)__a;
|
|
3503
3325
|
return __b[0];
|
|
3504
3326
|
}
|
|
3505
3327
|
|
|
3506
|
-
#ifdef __x86_64__
|
|
3507
3328
|
/// Moves the least significant 64 bits of a vector of [2 x i64] to a
|
|
3508
3329
|
/// 64-bit signed integer value.
|
|
3509
3330
|
///
|
|
@@ -3515,12 +3336,9 @@ _mm_cvtsi128_si32(__m128i __a)
|
|
|
3515
3336
|
/// A vector of [2 x i64]. The least significant 64 bits are moved to the
|
|
3516
3337
|
/// destination.
|
|
3517
3338
|
/// \returns A 64-bit signed integer containing the moved value.
|
|
3518
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3519
|
-
_mm_cvtsi128_si64(__m128i __a)
|
|
3520
|
-
{
|
|
3339
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {
|
|
3521
3340
|
return __a[0];
|
|
3522
3341
|
}
|
|
3523
|
-
#endif
|
|
3524
3342
|
|
|
3525
3343
|
/// Moves packed integer values from an aligned 128-bit memory location
|
|
3526
3344
|
/// to elements in a 128-bit integer vector.
|
|
@@ -3533,8 +3351,7 @@ _mm_cvtsi128_si64(__m128i __a)
|
|
|
3533
3351
|
/// An aligned pointer to a memory location containing integer values.
|
|
3534
3352
|
/// \returns A 128-bit integer vector containing the moved values.
|
|
3535
3353
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3536
|
-
_mm_load_si128(__m128i const *__p)
|
|
3537
|
-
{
|
|
3354
|
+
_mm_load_si128(__m128i const *__p) {
|
|
3538
3355
|
return *__p;
|
|
3539
3356
|
}
|
|
3540
3357
|
|
|
@@ -3549,12 +3366,11 @@ _mm_load_si128(__m128i const *__p)
|
|
|
3549
3366
|
/// A pointer to a memory location containing integer values.
|
|
3550
3367
|
/// \returns A 128-bit integer vector containing the moved values.
|
|
3551
3368
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3552
|
-
_mm_loadu_si128(__m128i_u const *__p)
|
|
3553
|
-
{
|
|
3369
|
+
_mm_loadu_si128(__m128i_u const *__p) {
|
|
3554
3370
|
struct __loadu_si128 {
|
|
3555
3371
|
__m128i_u __v;
|
|
3556
3372
|
} __attribute__((__packed__, __may_alias__));
|
|
3557
|
-
return ((const struct __loadu_si128*)__p)->__v;
|
|
3373
|
+
return ((const struct __loadu_si128 *)__p)->__v;
|
|
3558
3374
|
}
|
|
3559
3375
|
|
|
3560
3376
|
/// Returns a vector of [2 x i64] where the lower element is taken from
|
|
@@ -3570,12 +3386,12 @@ _mm_loadu_si128(__m128i_u const *__p)
|
|
|
3570
3386
|
/// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
|
|
3571
3387
|
/// moved value. The higher order bits are cleared.
|
|
3572
3388
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3573
|
-
_mm_loadl_epi64(__m128i_u const *__p)
|
|
3574
|
-
{
|
|
3389
|
+
_mm_loadl_epi64(__m128i_u const *__p) {
|
|
3575
3390
|
struct __mm_loadl_epi64_struct {
|
|
3576
3391
|
long long __u;
|
|
3577
3392
|
} __attribute__((__packed__, __may_alias__));
|
|
3578
|
-
return __extension__
|
|
3393
|
+
return __extension__(__m128i){
|
|
3394
|
+
((const struct __mm_loadl_epi64_struct *)__p)->__u, 0};
|
|
3579
3395
|
}
|
|
3580
3396
|
|
|
3581
3397
|
/// Generates a 128-bit vector of [4 x i32] with unspecified content.
|
|
@@ -3587,9 +3403,7 @@ _mm_loadl_epi64(__m128i_u const *__p)
|
|
|
3587
3403
|
/// This intrinsic has no corresponding instruction.
|
|
3588
3404
|
///
|
|
3589
3405
|
/// \returns A 128-bit vector of [4 x i32] with unspecified content.
|
|
3590
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3591
|
-
_mm_undefined_si128(void)
|
|
3592
|
-
{
|
|
3406
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void) {
|
|
3593
3407
|
return (__m128i)__builtin_ia32_undef128();
|
|
3594
3408
|
}
|
|
3595
3409
|
|
|
@@ -3609,10 +3423,9 @@ _mm_undefined_si128(void)
|
|
|
3609
3423
|
/// destination vector of [2 x i64].
|
|
3610
3424
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
3611
3425
|
/// provided in the operands.
|
|
3612
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3613
|
-
|
|
3614
|
-
{
|
|
3615
|
-
return __extension__ (__m128i)(__v2di){ __q0, __q1 };
|
|
3426
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64x(long long __q1,
|
|
3427
|
+
long long __q0) {
|
|
3428
|
+
return __extension__(__m128i)(__v2di){__q0, __q1};
|
|
3616
3429
|
}
|
|
3617
3430
|
|
|
3618
3431
|
/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
|
|
@@ -3631,9 +3444,8 @@ _mm_set_epi64x(long long __q1, long long __q0)
|
|
|
3631
3444
|
/// destination vector of [2 x i64].
|
|
3632
3445
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
3633
3446
|
/// provided in the operands.
|
|
3634
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3635
|
-
|
|
3636
|
-
{
|
|
3447
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64(__m64 __q1,
|
|
3448
|
+
__m64 __q0) {
|
|
3637
3449
|
return _mm_set_epi64x((long long)__q1, (long long)__q0);
|
|
3638
3450
|
}
|
|
3639
3451
|
|
|
@@ -3659,10 +3471,9 @@ _mm_set_epi64(__m64 __q1, __m64 __q0)
|
|
|
3659
3471
|
/// vector.
|
|
3660
3472
|
/// \returns An initialized 128-bit vector of [4 x i32] containing the values
|
|
3661
3473
|
/// provided in the operands.
|
|
3662
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3663
|
-
|
|
3664
|
-
{
|
|
3665
|
-
return __extension__ (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
|
|
3474
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi32(int __i3, int __i2,
|
|
3475
|
+
int __i1, int __i0) {
|
|
3476
|
+
return __extension__(__m128i)(__v4si){__i0, __i1, __i2, __i3};
|
|
3666
3477
|
}
|
|
3667
3478
|
|
|
3668
3479
|
/// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
|
|
@@ -3700,9 +3511,10 @@ _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
|
|
|
3700
3511
|
/// \returns An initialized 128-bit vector of [8 x i16] containing the values
|
|
3701
3512
|
/// provided in the operands.
|
|
3702
3513
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3703
|
-
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
3704
|
-
{
|
|
3705
|
-
return __extension__
|
|
3514
|
+
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
3515
|
+
short __w2, short __w1, short __w0) {
|
|
3516
|
+
return __extension__(__m128i)(__v8hi){__w0, __w1, __w2, __w3,
|
|
3517
|
+
__w4, __w5, __w6, __w7};
|
|
3706
3518
|
}
|
|
3707
3519
|
|
|
3708
3520
|
/// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
|
|
@@ -3748,9 +3560,12 @@ _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short
|
|
|
3748
3560
|
/// \returns An initialized 128-bit vector of [16 x i8] containing the values
|
|
3749
3561
|
/// provided in the operands.
|
|
3750
3562
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3751
|
-
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
3752
|
-
|
|
3753
|
-
|
|
3563
|
+
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
3564
|
+
char __b10, char __b9, char __b8, char __b7, char __b6, char __b5,
|
|
3565
|
+
char __b4, char __b3, char __b2, char __b1, char __b0) {
|
|
3566
|
+
return __extension__(__m128i)(__v16qi){
|
|
3567
|
+
__b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7,
|
|
3568
|
+
__b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15};
|
|
3754
3569
|
}
|
|
3755
3570
|
|
|
3756
3571
|
/// Initializes both values in a 128-bit integer vector with the
|
|
@@ -3766,9 +3581,7 @@ _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __
|
|
|
3766
3581
|
/// vector.
|
|
3767
3582
|
/// \returns An initialized 128-bit integer vector of [2 x i64] with both
|
|
3768
3583
|
/// elements containing the value provided in the operand.
|
|
3769
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3770
|
-
_mm_set1_epi64x(long long __q)
|
|
3771
|
-
{
|
|
3584
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64x(long long __q) {
|
|
3772
3585
|
return _mm_set_epi64x(__q, __q);
|
|
3773
3586
|
}
|
|
3774
3587
|
|
|
@@ -3785,9 +3598,7 @@ _mm_set1_epi64x(long long __q)
|
|
|
3785
3598
|
/// vector.
|
|
3786
3599
|
/// \returns An initialized 128-bit vector of [2 x i64] with all elements
|
|
3787
3600
|
/// containing the value provided in the operand.
|
|
3788
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3789
|
-
_mm_set1_epi64(__m64 __q)
|
|
3790
|
-
{
|
|
3601
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64(__m64 __q) {
|
|
3791
3602
|
return _mm_set_epi64(__q, __q);
|
|
3792
3603
|
}
|
|
3793
3604
|
|
|
@@ -3804,9 +3615,7 @@ _mm_set1_epi64(__m64 __q)
|
|
|
3804
3615
|
/// vector.
|
|
3805
3616
|
/// \returns An initialized 128-bit vector of [4 x i32] with all elements
|
|
3806
3617
|
/// containing the value provided in the operand.
|
|
3807
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3808
|
-
_mm_set1_epi32(int __i)
|
|
3809
|
-
{
|
|
3618
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi32(int __i) {
|
|
3810
3619
|
return _mm_set_epi32(__i, __i, __i, __i);
|
|
3811
3620
|
}
|
|
3812
3621
|
|
|
@@ -3823,9 +3632,7 @@ _mm_set1_epi32(int __i)
|
|
|
3823
3632
|
/// vector.
|
|
3824
3633
|
/// \returns An initialized 128-bit vector of [8 x i16] with all elements
|
|
3825
3634
|
/// containing the value provided in the operand.
|
|
3826
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3827
|
-
_mm_set1_epi16(short __w)
|
|
3828
|
-
{
|
|
3635
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi16(short __w) {
|
|
3829
3636
|
return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);
|
|
3830
3637
|
}
|
|
3831
3638
|
|
|
@@ -3842,10 +3649,9 @@ _mm_set1_epi16(short __w)
|
|
|
3842
3649
|
/// vector.
|
|
3843
3650
|
/// \returns An initialized 128-bit vector of [16 x i8] with all elements
|
|
3844
3651
|
/// containing the value provided in the operand.
|
|
3845
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3846
|
-
|
|
3847
|
-
|
|
3848
|
-
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b);
|
|
3652
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi8(char __b) {
|
|
3653
|
+
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b,
|
|
3654
|
+
__b, __b, __b, __b, __b);
|
|
3849
3655
|
}
|
|
3850
3656
|
|
|
3851
3657
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
|
@@ -3862,9 +3668,8 @@ _mm_set1_epi8(char __b)
|
|
|
3862
3668
|
/// A 64-bit integral value used to initialize the upper 64 bits of the
|
|
3863
3669
|
/// result.
|
|
3864
3670
|
/// \returns An initialized 128-bit integer vector.
|
|
3865
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3866
|
-
|
|
3867
|
-
{
|
|
3671
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi64(__m64 __q0,
|
|
3672
|
+
__m64 __q1) {
|
|
3868
3673
|
return _mm_set_epi64(__q1, __q0);
|
|
3869
3674
|
}
|
|
3870
3675
|
|
|
@@ -3885,9 +3690,9 @@ _mm_setr_epi64(__m64 __q0, __m64 __q1)
|
|
|
3885
3690
|
/// \param __i3
|
|
3886
3691
|
/// A 32-bit integral value used to initialize bits [127:96] of the result.
|
|
3887
3692
|
/// \returns An initialized 128-bit integer vector.
|
|
3888
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3889
|
-
|
|
3890
|
-
{
|
|
3693
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi32(int __i0, int __i1,
|
|
3694
|
+
int __i2,
|
|
3695
|
+
int __i3) {
|
|
3891
3696
|
return _mm_set_epi32(__i3, __i2, __i1, __i0);
|
|
3892
3697
|
}
|
|
3893
3698
|
|
|
@@ -3917,8 +3722,8 @@ _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
|
|
|
3917
3722
|
/// A 16-bit integral value used to initialize bits [127:112] of the result.
|
|
3918
3723
|
/// \returns An initialized 128-bit integer vector.
|
|
3919
3724
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3920
|
-
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
3921
|
-
{
|
|
3725
|
+
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
3726
|
+
short __w5, short __w6, short __w7) {
|
|
3922
3727
|
return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);
|
|
3923
3728
|
}
|
|
3924
3729
|
|
|
@@ -3964,9 +3769,11 @@ _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short
|
|
|
3964
3769
|
/// An 8-bit integral value used to initialize bits [127:120] of the result.
|
|
3965
3770
|
/// \returns An initialized 128-bit integer vector.
|
|
3966
3771
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3967
|
-
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
3968
|
-
|
|
3969
|
-
|
|
3772
|
+
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
3773
|
+
char __b6, char __b7, char __b8, char __b9, char __b10,
|
|
3774
|
+
char __b11, char __b12, char __b13, char __b14, char __b15) {
|
|
3775
|
+
return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8,
|
|
3776
|
+
__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
|
|
3970
3777
|
}
|
|
3971
3778
|
|
|
3972
3779
|
/// Creates a 128-bit integer vector initialized to zero.
|
|
@@ -3977,10 +3784,8 @@ _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
|
3977
3784
|
///
|
|
3978
3785
|
/// \returns An initialized 128-bit integer vector with all elements set to
|
|
3979
3786
|
/// zero.
|
|
3980
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3981
|
-
|
|
3982
|
-
{
|
|
3983
|
-
return __extension__ (__m128i)(__v2di){ 0LL, 0LL };
|
|
3787
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setzero_si128(void) {
|
|
3788
|
+
return __extension__(__m128i)(__v2di){0LL, 0LL};
|
|
3984
3789
|
}
|
|
3985
3790
|
|
|
3986
3791
|
/// Stores a 128-bit integer vector to a memory location aligned on a
|
|
@@ -3995,9 +3800,8 @@ _mm_setzero_si128(void)
|
|
|
3995
3800
|
/// values.
|
|
3996
3801
|
/// \param __b
|
|
3997
3802
|
/// A 128-bit integer vector containing the values to be moved.
|
|
3998
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
3999
|
-
|
|
4000
|
-
{
|
|
3803
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_si128(__m128i *__p,
|
|
3804
|
+
__m128i __b) {
|
|
4001
3805
|
*__p = __b;
|
|
4002
3806
|
}
|
|
4003
3807
|
|
|
@@ -4011,13 +3815,12 @@ _mm_store_si128(__m128i *__p, __m128i __b)
|
|
|
4011
3815
|
/// A pointer to a memory location that will receive the integer values.
|
|
4012
3816
|
/// \param __b
|
|
4013
3817
|
/// A 128-bit integer vector containing the values to be moved.
|
|
4014
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4015
|
-
|
|
4016
|
-
{
|
|
3818
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si128(__m128i_u *__p,
|
|
3819
|
+
__m128i __b) {
|
|
4017
3820
|
struct __storeu_si128 {
|
|
4018
3821
|
__m128i_u __v;
|
|
4019
3822
|
} __attribute__((__packed__, __may_alias__));
|
|
4020
|
-
((struct __storeu_si128*)__p)->__v = __b;
|
|
3823
|
+
((struct __storeu_si128 *)__p)->__v = __b;
|
|
4021
3824
|
}
|
|
4022
3825
|
|
|
4023
3826
|
/// Stores a 64-bit integer value from the low element of a 128-bit integer
|
|
@@ -4032,13 +3835,12 @@ _mm_storeu_si128(__m128i_u *__p, __m128i __b)
|
|
|
4032
3835
|
/// location does not have to be aligned.
|
|
4033
3836
|
/// \param __b
|
|
4034
3837
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4035
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4036
|
-
|
|
4037
|
-
{
|
|
3838
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si64(void *__p,
|
|
3839
|
+
__m128i __b) {
|
|
4038
3840
|
struct __storeu_si64 {
|
|
4039
3841
|
long long __v;
|
|
4040
3842
|
} __attribute__((__packed__, __may_alias__));
|
|
4041
|
-
((struct __storeu_si64*)__p)->__v = ((__v2di)__b)[0];
|
|
3843
|
+
((struct __storeu_si64 *)__p)->__v = ((__v2di)__b)[0];
|
|
4042
3844
|
}
|
|
4043
3845
|
|
|
4044
3846
|
/// Stores a 32-bit integer value from the low element of a 128-bit integer
|
|
@@ -4053,13 +3855,12 @@ _mm_storeu_si64(void *__p, __m128i __b)
|
|
|
4053
3855
|
/// location does not have to be aligned.
|
|
4054
3856
|
/// \param __b
|
|
4055
3857
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4056
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4057
|
-
|
|
4058
|
-
{
|
|
3858
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si32(void *__p,
|
|
3859
|
+
__m128i __b) {
|
|
4059
3860
|
struct __storeu_si32 {
|
|
4060
3861
|
int __v;
|
|
4061
3862
|
} __attribute__((__packed__, __may_alias__));
|
|
4062
|
-
((struct __storeu_si32*)__p)->__v = ((__v4si)__b)[0];
|
|
3863
|
+
((struct __storeu_si32 *)__p)->__v = ((__v4si)__b)[0];
|
|
4063
3864
|
}
|
|
4064
3865
|
|
|
4065
3866
|
/// Stores a 16-bit integer value from the low element of a 128-bit integer
|
|
@@ -4074,13 +3875,12 @@ _mm_storeu_si32(void *__p, __m128i __b)
|
|
|
4074
3875
|
/// location does not have to be aligned.
|
|
4075
3876
|
/// \param __b
|
|
4076
3877
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4077
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4078
|
-
|
|
4079
|
-
{
|
|
3878
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si16(void *__p,
|
|
3879
|
+
__m128i __b) {
|
|
4080
3880
|
struct __storeu_si16 {
|
|
4081
3881
|
short __v;
|
|
4082
3882
|
} __attribute__((__packed__, __may_alias__));
|
|
4083
|
-
((struct __storeu_si16*)__p)->__v = ((__v8hi)__b)[0];
|
|
3883
|
+
((struct __storeu_si16 *)__p)->__v = ((__v8hi)__b)[0];
|
|
4084
3884
|
}
|
|
4085
3885
|
|
|
4086
3886
|
/// Moves bytes selected by the mask from the first operand to the
|
|
@@ -4104,9 +3904,9 @@ _mm_storeu_si16(void *__p, __m128i __b)
|
|
|
4104
3904
|
/// \param __p
|
|
4105
3905
|
/// A pointer to an unaligned 128-bit memory location where the specified
|
|
4106
3906
|
/// values are moved.
|
|
4107
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4108
|
-
|
|
4109
|
-
{
|
|
3907
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_maskmoveu_si128(__m128i __d,
|
|
3908
|
+
__m128i __n,
|
|
3909
|
+
char *__p) {
|
|
4110
3910
|
__builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
|
|
4111
3911
|
}
|
|
4112
3912
|
|
|
@@ -4123,13 +3923,12 @@ _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
|
|
|
4123
3923
|
/// \param __a
|
|
4124
3924
|
/// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
|
|
4125
3925
|
/// value to be stored.
|
|
4126
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4127
|
-
|
|
4128
|
-
{
|
|
3926
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_epi64(__m128i_u *__p,
|
|
3927
|
+
__m128i __a) {
|
|
4129
3928
|
struct __mm_storel_epi64_struct {
|
|
4130
3929
|
long long __u;
|
|
4131
3930
|
} __attribute__((__packed__, __may_alias__));
|
|
4132
|
-
((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
|
|
3931
|
+
((struct __mm_storel_epi64_struct *)__p)->__u = __a[0];
|
|
4133
3932
|
}
|
|
4134
3933
|
|
|
4135
3934
|
/// Stores a 128-bit floating point vector of [2 x double] to a 128-bit
|
|
@@ -4146,10 +3945,9 @@ _mm_storel_epi64(__m128i_u *__p, __m128i __a)
|
|
|
4146
3945
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
4147
3946
|
/// \param __a
|
|
4148
3947
|
/// A vector of [2 x double] containing the 64-bit values to be stored.
|
|
4149
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4150
|
-
|
|
4151
|
-
|
|
4152
|
-
__builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
|
|
3948
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_pd(double *__p,
|
|
3949
|
+
__m128d __a) {
|
|
3950
|
+
__builtin_nontemporal_store((__v2df)__a, (__v2df *)__p);
|
|
4153
3951
|
}
|
|
4154
3952
|
|
|
4155
3953
|
/// Stores a 128-bit integer vector to a 128-bit aligned memory location.
|
|
@@ -4165,10 +3963,9 @@ _mm_stream_pd(double *__p, __m128d __a)
|
|
|
4165
3963
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
4166
3964
|
/// \param __a
|
|
4167
3965
|
/// A 128-bit integer vector containing the values to be stored.
|
|
4168
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4169
|
-
|
|
4170
|
-
|
|
4171
|
-
__builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
|
|
3966
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_si128(__m128i *__p,
|
|
3967
|
+
__m128i __a) {
|
|
3968
|
+
__builtin_nontemporal_store((__v2di)__a, (__v2di *)__p);
|
|
4172
3969
|
}
|
|
4173
3970
|
|
|
4174
3971
|
/// Stores a 32-bit integer value in the specified memory location.
|
|
@@ -4184,9 +3981,9 @@ _mm_stream_si128(__m128i *__p, __m128i __a)
|
|
|
4184
3981
|
/// A pointer to the 32-bit memory location used to store the value.
|
|
4185
3982
|
/// \param __a
|
|
4186
3983
|
/// A 32-bit integer containing the value to be stored.
|
|
4187
|
-
static __inline__ void
|
|
4188
|
-
|
|
4189
|
-
{
|
|
3984
|
+
static __inline__ void
|
|
3985
|
+
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
3986
|
+
_mm_stream_si32(int *__p, int __a) {
|
|
4190
3987
|
__builtin_ia32_movnti(__p, __a);
|
|
4191
3988
|
}
|
|
4192
3989
|
|
|
@@ -4204,9 +4001,9 @@ _mm_stream_si32(int *__p, int __a)
|
|
|
4204
4001
|
/// A pointer to the 64-bit memory location used to store the value.
|
|
4205
4002
|
/// \param __a
|
|
4206
4003
|
/// A 64-bit integer containing the value to be stored.
|
|
4207
|
-
static __inline__ void
|
|
4208
|
-
|
|
4209
|
-
{
|
|
4004
|
+
static __inline__ void
|
|
4005
|
+
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
4006
|
+
_mm_stream_si64(long long *__p, long long __a) {
|
|
4210
4007
|
__builtin_ia32_movnti64(__p, __a);
|
|
4211
4008
|
}
|
|
4212
4009
|
#endif
|
|
@@ -4225,7 +4022,7 @@ extern "C" {
|
|
|
4225
4022
|
/// \param __p
|
|
4226
4023
|
/// A pointer to the memory location used to identify the cache line to be
|
|
4227
4024
|
/// flushed.
|
|
4228
|
-
void _mm_clflush(void const *
|
|
4025
|
+
void _mm_clflush(void const *__p);
|
|
4229
4026
|
|
|
4230
4027
|
/// Forces strong memory ordering (serialization) between load
|
|
4231
4028
|
/// instructions preceding this instruction and load instructions following
|
|
@@ -4275,9 +4072,8 @@ void _mm_mfence(void);
|
|
|
4275
4072
|
/// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
|
|
4276
4073
|
/// written to the higher 64 bits of the result.
|
|
4277
4074
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
|
4278
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4279
|
-
|
|
4280
|
-
{
|
|
4075
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,
|
|
4076
|
+
__m128i __b) {
|
|
4281
4077
|
return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
|
|
4282
4078
|
}
|
|
4283
4079
|
|
|
@@ -4303,9 +4099,8 @@ _mm_packs_epi16(__m128i __a, __m128i __b)
|
|
|
4303
4099
|
/// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
|
|
4304
4100
|
/// are written to the higher 64 bits of the result.
|
|
4305
4101
|
/// \returns A 128-bit vector of [8 x i16] containing the converted values.
|
|
4306
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4307
|
-
|
|
4308
|
-
{
|
|
4102
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,
|
|
4103
|
+
__m128i __b) {
|
|
4309
4104
|
return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
|
|
4310
4105
|
}
|
|
4311
4106
|
|
|
@@ -4331,9 +4126,8 @@ _mm_packs_epi32(__m128i __a, __m128i __b)
|
|
|
4331
4126
|
/// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
|
|
4332
4127
|
/// written to the higher 64 bits of the result.
|
|
4333
4128
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
|
4334
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4335
|
-
|
|
4336
|
-
{
|
|
4129
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,
|
|
4130
|
+
__m128i __b) {
|
|
4337
4131
|
return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
|
|
4338
4132
|
}
|
|
4339
4133
|
|
|
@@ -4342,25 +4136,29 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4342
4136
|
///
|
|
4343
4137
|
/// \headerfile <x86intrin.h>
|
|
4344
4138
|
///
|
|
4139
|
+
/// \code
|
|
4140
|
+
/// __m128i _mm_extract_epi16(__m128i a, const int imm);
|
|
4141
|
+
/// \endcode
|
|
4142
|
+
///
|
|
4345
4143
|
/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
|
|
4346
4144
|
///
|
|
4347
|
-
/// \param
|
|
4145
|
+
/// \param a
|
|
4348
4146
|
/// A 128-bit integer vector.
|
|
4349
|
-
/// \param
|
|
4350
|
-
/// An immediate value. Bits [2:0] selects values from \a
|
|
4147
|
+
/// \param imm
|
|
4148
|
+
/// An immediate value. Bits [2:0] selects values from \a a to be assigned
|
|
4351
4149
|
/// to bits[15:0] of the result. \n
|
|
4352
|
-
/// 000: assign values from bits [15:0] of \a
|
|
4353
|
-
/// 001: assign values from bits [31:16] of \a
|
|
4354
|
-
/// 010: assign values from bits [47:32] of \a
|
|
4355
|
-
/// 011: assign values from bits [63:48] of \a
|
|
4356
|
-
/// 100: assign values from bits [79:64] of \a
|
|
4357
|
-
/// 101: assign values from bits [95:80] of \a
|
|
4358
|
-
/// 110: assign values from bits [111:96] of \a
|
|
4359
|
-
/// 111: assign values from bits [127:112] of \a
|
|
4150
|
+
/// 000: assign values from bits [15:0] of \a a. \n
|
|
4151
|
+
/// 001: assign values from bits [31:16] of \a a. \n
|
|
4152
|
+
/// 010: assign values from bits [47:32] of \a a. \n
|
|
4153
|
+
/// 011: assign values from bits [63:48] of \a a. \n
|
|
4154
|
+
/// 100: assign values from bits [79:64] of \a a. \n
|
|
4155
|
+
/// 101: assign values from bits [95:80] of \a a. \n
|
|
4156
|
+
/// 110: assign values from bits [111:96] of \a a. \n
|
|
4157
|
+
/// 111: assign values from bits [127:112] of \a a.
|
|
4360
4158
|
/// \returns An integer, whose lower 16 bits are selected from the 128-bit
|
|
4361
4159
|
/// integer vector parameter and the remaining bits are assigned zeros.
|
|
4362
|
-
#define _mm_extract_epi16(a, imm)
|
|
4363
|
-
((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a),
|
|
4160
|
+
#define _mm_extract_epi16(a, imm) \
|
|
4161
|
+
((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \
|
|
4364
4162
|
(int)(imm)))
|
|
4365
4163
|
|
|
4366
4164
|
/// Constructs a 128-bit integer vector by first making a copy of the
|
|
@@ -4370,21 +4168,25 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4370
4168
|
///
|
|
4371
4169
|
/// \headerfile <x86intrin.h>
|
|
4372
4170
|
///
|
|
4171
|
+
/// \code
|
|
4172
|
+
/// __m128i _mm_insert_epi16(__m128i a, int b, const int imm);
|
|
4173
|
+
/// \endcode
|
|
4174
|
+
///
|
|
4373
4175
|
/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
|
|
4374
4176
|
///
|
|
4375
|
-
/// \param
|
|
4177
|
+
/// \param a
|
|
4376
4178
|
/// A 128-bit integer vector of [8 x i16]. This vector is copied to the
|
|
4377
4179
|
/// result and then one of the eight elements in the result is replaced by
|
|
4378
|
-
/// the lower 16 bits of \a
|
|
4379
|
-
/// \param
|
|
4180
|
+
/// the lower 16 bits of \a b.
|
|
4181
|
+
/// \param b
|
|
4380
4182
|
/// An integer. The lower 16 bits of this parameter are written to the
|
|
4381
|
-
/// result beginning at an offset specified by \a
|
|
4382
|
-
/// \param
|
|
4183
|
+
/// result beginning at an offset specified by \a imm.
|
|
4184
|
+
/// \param imm
|
|
4383
4185
|
/// An immediate value specifying the bit offset in the result at which the
|
|
4384
|
-
/// lower 16 bits of \a
|
|
4186
|
+
/// lower 16 bits of \a b are written.
|
|
4385
4187
|
/// \returns A 128-bit integer vector containing the constructed values.
|
|
4386
|
-
#define _mm_insert_epi16(a, b, imm)
|
|
4387
|
-
((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b),
|
|
4188
|
+
#define _mm_insert_epi16(a, b, imm) \
|
|
4189
|
+
((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \
|
|
4388
4190
|
(int)(imm)))
|
|
4389
4191
|
|
|
4390
4192
|
/// Copies the values of the most significant bits from each 8-bit
|
|
@@ -4399,9 +4201,7 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4399
4201
|
/// A 128-bit integer vector containing the values with bits to be extracted.
|
|
4400
4202
|
/// \returns The most significant bits from each 8-bit element in \a __a,
|
|
4401
4203
|
/// written to bits [15:0]. The other bits are assigned zeros.
|
|
4402
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
4403
|
-
_mm_movemask_epi8(__m128i __a)
|
|
4404
|
-
{
|
|
4204
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {
|
|
4405
4205
|
return __builtin_ia32_pmovmskb128((__v16qi)__a);
|
|
4406
4206
|
}
|
|
4407
4207
|
|
|
@@ -4431,9 +4231,12 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4431
4231
|
/// 00: assign values from bits [31:0] of \a a. \n
|
|
4432
4232
|
/// 01: assign values from bits [63:32] of \a a. \n
|
|
4433
4233
|
/// 10: assign values from bits [95:64] of \a a. \n
|
|
4434
|
-
/// 11: assign values from bits [127:96] of \a a.
|
|
4234
|
+
/// 11: assign values from bits [127:96] of \a a. \n
|
|
4235
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4236
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4237
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4435
4238
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4436
|
-
#define _mm_shuffle_epi32(a, imm)
|
|
4239
|
+
#define _mm_shuffle_epi32(a, imm) \
|
|
4437
4240
|
((__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm)))
|
|
4438
4241
|
|
|
4439
4242
|
/// Constructs a 128-bit integer vector by shuffling four lower 16-bit
|
|
@@ -4462,8 +4265,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4462
4265
|
/// 01: assign values from bits [31:16] of \a a. \n
|
|
4463
4266
|
/// 10: assign values from bits [47:32] of \a a. \n
|
|
4464
4267
|
/// 11: assign values from bits [63:48] of \a a. \n
|
|
4268
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4269
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4270
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4465
4271
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4466
|
-
#define _mm_shufflelo_epi16(a, imm)
|
|
4272
|
+
#define _mm_shufflelo_epi16(a, imm) \
|
|
4467
4273
|
((__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm)))
|
|
4468
4274
|
|
|
4469
4275
|
/// Constructs a 128-bit integer vector by shuffling four upper 16-bit
|
|
@@ -4492,8 +4298,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4492
4298
|
/// 01: assign values from bits [95:80] of \a a. \n
|
|
4493
4299
|
/// 10: assign values from bits [111:96] of \a a. \n
|
|
4494
4300
|
/// 11: assign values from bits [127:112] of \a a. \n
|
|
4301
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4302
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4303
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4495
4304
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4496
|
-
#define _mm_shufflehi_epi16(a, imm)
|
|
4305
|
+
#define _mm_shufflehi_epi16(a, imm) \
|
|
4497
4306
|
((__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm)))
|
|
4498
4307
|
|
|
4499
4308
|
/// Unpacks the high-order (index 8-15) values from two 128-bit vectors
|
|
@@ -4525,10 +4334,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4525
4334
|
/// Bits [119:112] are written to bits [111:104] of the result. \n
|
|
4526
4335
|
/// Bits [127:120] are written to bits [127:120] of the result.
|
|
4527
4336
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
|
4528
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4529
|
-
|
|
4530
|
-
|
|
4531
|
-
|
|
4337
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,
|
|
4338
|
+
__m128i __b) {
|
|
4339
|
+
return (__m128i)__builtin_shufflevector(
|
|
4340
|
+
(__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,
|
|
4341
|
+
16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);
|
|
4532
4342
|
}
|
|
4533
4343
|
|
|
4534
4344
|
/// Unpacks the high-order (index 4-7) values from two 128-bit vectors of
|
|
@@ -4552,10 +4362,10 @@ _mm_unpackhi_epi8(__m128i __a, __m128i __b)
|
|
|
4552
4362
|
/// Bits [111:96] are written to bits [95:80] of the result. \n
|
|
4553
4363
|
/// Bits [127:112] are written to bits [127:112] of the result.
|
|
4554
4364
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
|
4555
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4556
|
-
|
|
4557
|
-
|
|
4558
|
-
|
|
4365
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,
|
|
4366
|
+
__m128i __b) {
|
|
4367
|
+
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,
|
|
4368
|
+
8 + 5, 6, 8 + 6, 7, 8 + 7);
|
|
4559
4369
|
}
|
|
4560
4370
|
|
|
4561
4371
|
/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
|
|
@@ -4575,10 +4385,10 @@ _mm_unpackhi_epi16(__m128i __a, __m128i __b)
|
|
|
4575
4385
|
/// Bits [95:64] are written to bits [64:32] of the destination. \n
|
|
4576
4386
|
/// Bits [127:96] are written to bits [127:96] of the destination.
|
|
4577
4387
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
|
4578
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4579
|
-
|
|
4580
|
-
|
|
4581
|
-
|
|
4388
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,
|
|
4389
|
+
__m128i __b) {
|
|
4390
|
+
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,
|
|
4391
|
+
4 + 3);
|
|
4582
4392
|
}
|
|
4583
4393
|
|
|
4584
4394
|
/// Unpacks the high-order 64-bit elements from two 128-bit vectors of
|
|
@@ -4596,10 +4406,9 @@ _mm_unpackhi_epi32(__m128i __a, __m128i __b)
|
|
|
4596
4406
|
/// A 128-bit vector of [2 x i64]. \n
|
|
4597
4407
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
4598
4408
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
|
4599
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4600
|
-
|
|
4601
|
-
|
|
4602
|
-
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
|
|
4409
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,
|
|
4410
|
+
__m128i __b) {
|
|
4411
|
+
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);
|
|
4603
4412
|
}
|
|
4604
4413
|
|
|
4605
4414
|
/// Unpacks the low-order (index 0-7) values from two 128-bit vectors of
|
|
@@ -4631,10 +4440,11 @@ _mm_unpackhi_epi64(__m128i __a, __m128i __b)
|
|
|
4631
4440
|
/// Bits [55:48] are written to bits [111:104] of the result. \n
|
|
4632
4441
|
/// Bits [63:56] are written to bits [127:120] of the result.
|
|
4633
4442
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
|
4634
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4635
|
-
|
|
4636
|
-
|
|
4637
|
-
|
|
4443
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,
|
|
4444
|
+
__m128i __b) {
|
|
4445
|
+
return (__m128i)__builtin_shufflevector(
|
|
4446
|
+
(__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,
|
|
4447
|
+
16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);
|
|
4638
4448
|
}
|
|
4639
4449
|
|
|
4640
4450
|
/// Unpacks the low-order (index 0-3) values from each of the two 128-bit
|
|
@@ -4659,10 +4469,10 @@ _mm_unpacklo_epi8(__m128i __a, __m128i __b)
|
|
|
4659
4469
|
/// Bits [47:32] are written to bits [95:80] of the result. \n
|
|
4660
4470
|
/// Bits [63:48] are written to bits [127:112] of the result.
|
|
4661
4471
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
|
4662
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4663
|
-
|
|
4664
|
-
|
|
4665
|
-
|
|
4472
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,
|
|
4473
|
+
__m128i __b) {
|
|
4474
|
+
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,
|
|
4475
|
+
8 + 1, 2, 8 + 2, 3, 8 + 3);
|
|
4666
4476
|
}
|
|
4667
4477
|
|
|
4668
4478
|
/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
|
|
@@ -4682,10 +4492,10 @@ _mm_unpacklo_epi16(__m128i __a, __m128i __b)
|
|
|
4682
4492
|
/// Bits [31:0] are written to bits [64:32] of the destination. \n
|
|
4683
4493
|
/// Bits [63:32] are written to bits [127:96] of the destination.
|
|
4684
4494
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
|
4685
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4686
|
-
|
|
4687
|
-
|
|
4688
|
-
|
|
4495
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,
|
|
4496
|
+
__m128i __b) {
|
|
4497
|
+
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,
|
|
4498
|
+
4 + 1);
|
|
4689
4499
|
}
|
|
4690
4500
|
|
|
4691
4501
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors of
|
|
@@ -4703,10 +4513,9 @@ _mm_unpacklo_epi32(__m128i __a, __m128i __b)
|
|
|
4703
4513
|
/// A 128-bit vector of [2 x i64]. \n
|
|
4704
4514
|
/// Bits [63:0] are written to bits [127:64] of the destination. \n
|
|
4705
4515
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
|
4706
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4707
|
-
|
|
4708
|
-
|
|
4709
|
-
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
|
|
4516
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a,
|
|
4517
|
+
__m128i __b) {
|
|
4518
|
+
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);
|
|
4710
4519
|
}
|
|
4711
4520
|
|
|
4712
4521
|
/// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
|
|
@@ -4720,9 +4529,7 @@ _mm_unpacklo_epi64(__m128i __a, __m128i __b)
|
|
|
4720
4529
|
/// A 128-bit integer vector operand. The lower 64 bits are moved to the
|
|
4721
4530
|
/// destination.
|
|
4722
4531
|
/// \returns A 64-bit integer containing the lower 64 bits of the parameter.
|
|
4723
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS
|
|
4724
|
-
_mm_movepi64_pi64(__m128i __a)
|
|
4725
|
-
{
|
|
4532
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_movepi64_pi64(__m128i __a) {
|
|
4726
4533
|
return (__m64)__a[0];
|
|
4727
4534
|
}
|
|
4728
4535
|
|
|
@@ -4737,10 +4544,8 @@ _mm_movepi64_pi64(__m128i __a)
|
|
|
4737
4544
|
/// A 64-bit value.
|
|
4738
4545
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
4739
4546
|
/// the operand. The upper 64 bits are assigned zeros.
|
|
4740
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4741
|
-
|
|
4742
|
-
{
|
|
4743
|
-
return __extension__ (__m128i)(__v2di){ (long long)__a, 0 };
|
|
4547
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movpi64_epi64(__m64 __a) {
|
|
4548
|
+
return __extension__(__m128i)(__v2di){(long long)__a, 0};
|
|
4744
4549
|
}
|
|
4745
4550
|
|
|
4746
4551
|
/// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
|
|
@@ -4755,9 +4560,7 @@ _mm_movpi64_epi64(__m64 __a)
|
|
|
4755
4560
|
/// destination.
|
|
4756
4561
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
4757
4562
|
/// the operand. The upper 64 bits are assigned zeros.
|
|
4758
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4759
|
-
_mm_move_epi64(__m128i __a)
|
|
4760
|
-
{
|
|
4563
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_move_epi64(__m128i __a) {
|
|
4761
4564
|
return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);
|
|
4762
4565
|
}
|
|
4763
4566
|
|
|
@@ -4776,10 +4579,9 @@ _mm_move_epi64(__m128i __a)
|
|
|
4776
4579
|
/// A 128-bit vector of [2 x double]. \n
|
|
4777
4580
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
4778
4581
|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
|
4779
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4780
|
-
|
|
4781
|
-
|
|
4782
|
-
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
|
|
4582
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpackhi_pd(__m128d __a,
|
|
4583
|
+
__m128d __b) {
|
|
4584
|
+
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2 + 1);
|
|
4783
4585
|
}
|
|
4784
4586
|
|
|
4785
4587
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors
|
|
@@ -4797,10 +4599,9 @@ _mm_unpackhi_pd(__m128d __a, __m128d __b)
|
|
|
4797
4599
|
/// A 128-bit vector of [2 x double]. \n
|
|
4798
4600
|
/// Bits [63:0] are written to bits [127:64] of the destination.
|
|
4799
4601
|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
|
4800
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4801
|
-
|
|
4802
|
-
|
|
4803
|
-
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
|
|
4602
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpacklo_pd(__m128d __a,
|
|
4603
|
+
__m128d __b) {
|
|
4604
|
+
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2 + 0);
|
|
4804
4605
|
}
|
|
4805
4606
|
|
|
4806
4607
|
/// Extracts the sign bits of the double-precision values in the 128-bit
|
|
@@ -4816,13 +4617,10 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b)
|
|
|
4816
4617
|
/// be extracted.
|
|
4817
4618
|
/// \returns The sign bits from each of the double-precision elements in \a __a,
|
|
4818
4619
|
/// written to bits [1:0]. The remaining bits are assigned values of zero.
|
|
4819
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
4820
|
-
_mm_movemask_pd(__m128d __a)
|
|
4821
|
-
{
|
|
4620
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) {
|
|
4822
4621
|
return __builtin_ia32_movmskpd((__v2df)__a);
|
|
4823
4622
|
}
|
|
4824
4623
|
|
|
4825
|
-
|
|
4826
4624
|
/// Constructs a 128-bit floating-point vector of [2 x double] from two
|
|
4827
4625
|
/// 128-bit vector parameters of [2 x double], using the immediate-value
|
|
4828
4626
|
/// parameter as a specifier.
|
|
@@ -4846,9 +4644,12 @@ _mm_movemask_pd(__m128d __a)
|
|
|
4846
4644
|
/// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
|
|
4847
4645
|
/// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
|
|
4848
4646
|
/// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
|
|
4647
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE2 macro.
|
|
4648
|
+
/// <c>_MM_SHUFFLE2(b1, b0)</c> can create a 2-bit mask of the form
|
|
4649
|
+
/// <c>[b1, b0]</c>.
|
|
4849
4650
|
/// \returns A 128-bit vector of [2 x double] containing the shuffled values.
|
|
4850
|
-
#define _mm_shuffle_pd(a, b, i)
|
|
4851
|
-
((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b),
|
|
4651
|
+
#define _mm_shuffle_pd(a, b, i) \
|
|
4652
|
+
((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
|
|
4852
4653
|
(int)(i)))
|
|
4853
4654
|
|
|
4854
4655
|
/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
|
|
@@ -4862,9 +4663,7 @@ _mm_movemask_pd(__m128d __a)
|
|
|
4862
4663
|
/// A 128-bit floating-point vector of [2 x double].
|
|
4863
4664
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
4864
4665
|
/// bitwise pattern as the parameter.
|
|
4865
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
4866
|
-
_mm_castpd_ps(__m128d __a)
|
|
4867
|
-
{
|
|
4666
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castpd_ps(__m128d __a) {
|
|
4868
4667
|
return (__m128)__a;
|
|
4869
4668
|
}
|
|
4870
4669
|
|
|
@@ -4879,9 +4678,7 @@ _mm_castpd_ps(__m128d __a)
|
|
|
4879
4678
|
/// A 128-bit floating-point vector of [2 x double].
|
|
4880
4679
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
4881
4680
|
/// parameter.
|
|
4882
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4883
|
-
_mm_castpd_si128(__m128d __a)
|
|
4884
|
-
{
|
|
4681
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castpd_si128(__m128d __a) {
|
|
4885
4682
|
return (__m128i)__a;
|
|
4886
4683
|
}
|
|
4887
4684
|
|
|
@@ -4896,9 +4693,7 @@ _mm_castpd_si128(__m128d __a)
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4896
4693
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/// A 128-bit floating-point vector of [4 x float].
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4897
4694
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/// \returns A 128-bit floating-point vector of [2 x double] containing the same
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4898
4695
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/// bitwise pattern as the parameter.
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4899
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-
static __inline__ __m128d __DEFAULT_FN_ATTRS
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4900
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-
_mm_castps_pd(__m128 __a)
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4901
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-
{
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4696
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+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castps_pd(__m128 __a) {
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4902
4697
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return (__m128d)__a;
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4903
4698
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}
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4904
4699
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@@ -4913,9 +4708,7 @@ _mm_castps_pd(__m128 __a)
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4913
4708
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/// A 128-bit floating-point vector of [4 x float].
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4914
4709
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/// \returns A 128-bit integer vector containing the same bitwise pattern as the
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4915
4710
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/// parameter.
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4916
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-
static __inline__ __m128i __DEFAULT_FN_ATTRS
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4917
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-
_mm_castps_si128(__m128 __a)
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4918
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-
{
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4711
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+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castps_si128(__m128 __a) {
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4919
4712
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return (__m128i)__a;
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4920
4713
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}
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4921
4714
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@@ -4930,9 +4723,7 @@ _mm_castps_si128(__m128 __a)
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4930
4723
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/// A 128-bit integer vector.
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4931
4724
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/// \returns A 128-bit floating-point vector of [4 x float] containing the same
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4932
4725
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/// bitwise pattern as the parameter.
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4933
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-
static __inline__ __m128 __DEFAULT_FN_ATTRS
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4934
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-
_mm_castsi128_ps(__m128i __a)
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4935
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-
{
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4726
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+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castsi128_ps(__m128i __a) {
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4936
4727
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return (__m128)__a;
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4937
4728
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}
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4938
4729
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@@ -4947,9 +4738,7 @@ _mm_castsi128_ps(__m128i __a)
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4947
4738
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/// A 128-bit integer vector.
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4948
4739
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/// \returns A 128-bit floating-point vector of [2 x double] containing the same
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4949
4740
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/// bitwise pattern as the parameter.
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4950
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-
static __inline__ __m128d __DEFAULT_FN_ATTRS
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4951
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-
_mm_castsi128_pd(__m128i __a)
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4952
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-
{
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4741
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+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castsi128_pd(__m128i __a) {
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4953
4742
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return (__m128d)__a;
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4954
4743
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}
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4955
4744
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@@ -4974,12 +4763,13 @@ void _mm_pause(void);
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4974
4763
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4975
4764
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#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
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4976
4765
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4977
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-
#define _MM_DENORMALS_ZERO_ON
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4978
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-
#define _MM_DENORMALS_ZERO_OFF
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4766
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+
#define _MM_DENORMALS_ZERO_ON (0x0040U)
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4767
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+
#define _MM_DENORMALS_ZERO_OFF (0x0000U)
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4979
4768
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4980
4769
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#define _MM_DENORMALS_ZERO_MASK (0x0040U)
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4981
4770
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4982
4771
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#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
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4983
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-
#define _MM_SET_DENORMALS_ZERO_MODE(x)
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4772
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+
#define _MM_SET_DENORMALS_ZERO_MODE(x) \
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4773
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+
(_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
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4984
4774
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4985
4775
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#endif /* __EMMINTRIN_H */
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