@cpp-linter/clang-tidy-win32-x64 14.0.0 → 15.0.2
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/README.md +2 -2
- package/bin/clang-tidy.exe +2 -2
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_intrinsics.h +7 -7
- package/lib/clang/{14.0.0 → 15.0.2}/include/__wmmintrin_pclmul.h +10 -10
- package/lib/clang/{14.0.0 → 15.0.2}/include/altivec.h +487 -248
- package/lib/clang/{14.0.0 → 15.0.2}/include/amxintrin.h +0 -2
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_sve.h +65 -61
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx2intrin.h +8 -8
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx512bwintrin.h +12 -12
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx512fintrin.h +76 -73
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlbf16intrin.h +1 -1
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlbwintrin.h +8 -8
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlintrin.h +81 -95
- package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlvnniintrin.h +16 -16
- package/lib/clang/{14.0.0 → 15.0.2}/include/avxintrin.h +65 -30
- package/lib/clang/{14.0.0 → 15.0.2}/include/avxvnniintrin.h +16 -16
- package/lib/clang/{14.0.0 → 15.0.2}/include/bmiintrin.h +6 -2
- package/lib/clang/{14.0.0 → 15.0.2}/include/cetintrin.h +12 -6
- package/lib/clang/{14.0.0 → 15.0.2}/include/cpuid.h +1 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/emmintrin.h +549 -769
- package/lib/clang/{14.0.0 → 15.0.2}/include/f16cintrin.h +3 -3
- package/lib/clang/15.0.2/include/hlsl/hlsl_basic_types.h +64 -0
- package/lib/clang/15.0.2/include/hlsl/hlsl_intrinsics.h +15 -0
- package/lib/clang/15.0.2/include/hlsl.h +15 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/hresetintrin.h +2 -2
- package/lib/clang/{14.0.0 → 15.0.2}/include/ia32intrin.h +11 -11
- package/lib/clang/{14.0.0 → 15.0.2}/include/immintrin.h +15 -15
- package/lib/clang/{14.0.0 → 15.0.2}/include/intrin.h +12 -21
- package/lib/clang/{14.0.0 → 15.0.2}/include/keylockerintrin.h +22 -22
- package/lib/clang/{14.0.0 → 15.0.2}/include/mm_malloc.h +3 -3
- package/lib/clang/{14.0.0 → 15.0.2}/include/opencl-c-base.h +10 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/opencl-c.h +6794 -7020
- package/lib/clang/{14.0.0 → 15.0.2}/include/pmmintrin.h +1 -1
- package/lib/clang/15.0.2/include/ppc_wrappers/bmi2intrin.h +134 -0
- package/lib/clang/15.0.2/include/ppc_wrappers/bmiintrin.h +165 -0
- package/lib/clang/15.0.2/include/ppc_wrappers/emmintrin.h +2268 -0
- package/lib/clang/15.0.2/include/ppc_wrappers/immintrin.h +27 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/ppc_wrappers/mm_malloc.h +12 -17
- package/lib/clang/{14.0.0 → 15.0.2}/include/ppc_wrappers/mmintrin.h +389 -387
- package/lib/clang/15.0.2/include/ppc_wrappers/pmmintrin.h +145 -0
- package/lib/clang/15.0.2/include/ppc_wrappers/smmintrin.h +663 -0
- package/lib/clang/15.0.2/include/ppc_wrappers/tmmintrin.h +453 -0
- package/lib/clang/{14.0.0/include/stdnoreturn.h → 15.0.2/include/ppc_wrappers/x86gprintrin.h} +7 -6
- package/lib/clang/15.0.2/include/ppc_wrappers/x86intrin.h +28 -0
- package/lib/clang/15.0.2/include/ppc_wrappers/xmmintrin.h +1827 -0
- package/lib/clang/15.0.2/include/rdpruintrin.h +57 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/rdseedintrin.h +3 -3
- package/lib/clang/15.0.2/include/riscv_vector.h +202 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/rtmintrin.h +1 -1
- package/lib/clang/{14.0.0 → 15.0.2}/include/smmintrin.h +234 -257
- package/lib/clang/{14.0.0 → 15.0.2}/include/stdatomic.h +2 -5
- package/lib/clang/{14.0.0 → 15.0.2}/include/stdbool.h +9 -6
- package/lib/clang/{14.0.0 → 15.0.2}/include/stddef.h +1 -1
- package/lib/clang/15.0.2/include/stdnoreturn.h +29 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/uintrintrin.h +8 -8
- package/lib/clang/{14.0.0 → 15.0.2}/include/unwind.h +8 -5
- package/lib/clang/15.0.2/include/velintrin.h +71 -0
- package/lib/clang/15.0.2/include/velintrin_approx.h +120 -0
- package/lib/clang/15.0.2/include/velintrin_gen.h +1257 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/wasm_simd128.h +2 -2
- package/lib/clang/{14.0.0 → 15.0.2}/include/x86gprintrin.h +23 -5
- package/lib/clang/{14.0.0 → 15.0.2}/include/x86intrin.h +4 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/xmmintrin.h +9 -3
- package/package.json +6 -6
- package/lib/clang/14.0.0/include/ppc_wrappers/emmintrin.h +0 -2325
- package/lib/clang/14.0.0/include/ppc_wrappers/pmmintrin.h +0 -151
- package/lib/clang/14.0.0/include/ppc_wrappers/smmintrin.h +0 -110
- package/lib/clang/14.0.0/include/ppc_wrappers/tmmintrin.h +0 -496
- package/lib/clang/14.0.0/include/ppc_wrappers/xmmintrin.h +0 -1844
- package/lib/clang/14.0.0/include/riscv_vector.h +0 -95423
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_builtin_vars.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_cmath.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_complex_builtins.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_device_functions.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_libdevice_declares.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_math.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_math_forward_declares.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_runtime_wrapper.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_cuda_texture_intrinsics.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_hip_cmath.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_hip_libdevice_declares.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_hip_math.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__clang_hip_runtime_wrapper.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__stddef_max_align_t.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/__wmmintrin_aes.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/adxintrin.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/ammintrin.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm64intr.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_acle.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_bf16.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_cde.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_cmse.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_fp16.h +89 -89
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_mve.h +0 -0
- package/lib/clang/{14.0.0 → 15.0.2}/include/arm_neon.h +3999 -3999
- /package/lib/clang/{14.0.0 → 15.0.2}/include/arm_neon_sve_bridge.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/armintr.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512bf16intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512bitalgintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512cdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512dqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512erintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512fp16intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512ifmaintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512ifmavlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512pfintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vbmi2intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vbmiintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vbmivlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlbitalgintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlcdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vldqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlfp16intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlvbmi2intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vlvp2intersectintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vnniintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vp2intersectintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vpopcntdqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/avx512vpopcntdqvlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/bmi2intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/builtins.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/cet.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/cldemoteintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/clflushoptintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/clwbintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/clzerointrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/crc32intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/cuda_wrappers/algorithm +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/cuda_wrappers/complex +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/cuda_wrappers/new +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/enqcmdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/float.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/fma4intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/fmaintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/fxsrintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/gfniintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/hexagon_circ_brev_intrinsics.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/hexagon_protos.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/hexagon_types.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/htmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/htmxlintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/hvx_hexagon_protos.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/inttypes.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/invpcidintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/iso646.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/limits.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/lwpintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/lzcntintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/mm3dnow.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/mmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/module.modulemap +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/movdirintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/msa.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/mwaitxintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/nmmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/__clang_openmp_device_functions.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/cmath +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/complex +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/complex.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/complex_cmath.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/math.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/openmp_wrappers/new +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/pconfigintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/pkuintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/popcntintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/prfchwintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/ptwriteintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/s390intrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/serializeintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/sgxintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/shaintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/stdalign.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/stdarg.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/stdint.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/tbmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/tgmath.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/tmmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/tsxldtrkintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/vadefs.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/vaesintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/varargs.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/vecintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/vpclmulqdqintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/waitpkgintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/wbnoinvdintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/wmmintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/xopintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/xsavecintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/xsaveintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/xsaveoptintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/xsavesintrin.h +0 -0
- /package/lib/clang/{14.0.0 → 15.0.2}/include/xtestintrin.h +0 -0
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@@ -20,16 +20,17 @@ typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
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typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
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typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
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typedef long long __m128i_u
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typedef long long __m128i_u
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__attribute__((__vector_size__(16), __aligned__(1)));
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/* Type defines. */
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typedef double __v2df __attribute__
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typedef long long __v2di __attribute__
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typedef double __v2df __attribute__((__vector_size__(16)));
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typedef long long __v2di __attribute__((__vector_size__(16)));
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typedef short __v8hi __attribute__((__vector_size__(16)));
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typedef char __v16qi __attribute__((__vector_size__(16)));
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/* Unsigned types */
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typedef unsigned long long __v2du __attribute__
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typedef unsigned long long __v2du __attribute__((__vector_size__(16)));
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typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
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typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
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@@ -38,8 +39,12 @@ typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
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typedef signed char __v16qs __attribute__((__vector_size__(16)));
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
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__min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS_MMX \
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__attribute__((__always_inline__, __nodebug__, __target__("mmx,sse2"), \
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__min_vector_width__(64)))
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/// Adds lower double-precision values in both operands and returns the
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/// sum in the lower 64 bits of the result. The upper 64 bits of the result
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// sum of the lower 64 bits of both operands. The upper 64 bits are copied
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/// from the upper 64 bits of the first source operand.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_sd(__m128d __a,
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{
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__m128d __b) {
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{
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__m128d __b) {
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{
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__m128d __b) {
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{
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__m128d __b) {
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{
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__m128d __b) {
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_sd(__m128d __a,
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__m128d __b) {
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}
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_pd(__m128d __a,
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+
__m128d __b) {
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return (__m128d)((__v2df)__a / (__v2df)__b);
|
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}
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@@ -226,11 +223,10 @@ _mm_div_pd(__m128d __a, __m128d __b)
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
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/// square root of the lower 64 bits of operand \a __b, and whose upper 64
|
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/// bits are copied from the upper 64 bits of operand \a __a.
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|
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static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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|
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{
|
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+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,
|
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+
__m128d __b) {
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__m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
|
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|
-
return __extension__
|
|
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|
+
return __extension__(__m128d){__c[0], __a[1]};
|
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}
|
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236
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/// Calculates the square root of the each of two values stored in a
|
|
@@ -244,9 +240,7 @@ _mm_sqrt_sd(__m128d __a, __m128d __b)
|
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244
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/// A 128-bit vector of [2 x double].
|
|
245
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|
/// \returns A 128-bit vector of [2 x double] containing the square roots of the
|
|
246
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|
/// values in the operand.
|
|
247
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
248
|
-
_mm_sqrt_pd(__m128d __a)
|
|
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|
-
{
|
|
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|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {
|
|
250
244
|
return __builtin_ia32_sqrtpd((__v2df)__a);
|
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251
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|
}
|
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|
|
@@ -268,9 +262,8 @@ _mm_sqrt_pd(__m128d __a)
|
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268
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
269
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|
/// minimum value between both operands. The upper 64 bits are copied from
|
|
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|
/// the upper 64 bits of the first source operand.
|
|
271
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
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|
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|
|
273
|
-
{
|
|
265
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,
|
|
266
|
+
__m128d __b) {
|
|
274
267
|
return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
|
|
275
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|
}
|
|
276
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|
|
|
@@ -288,9 +281,8 @@ _mm_min_sd(__m128d __a, __m128d __b)
|
|
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288
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|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
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|
/// \returns A 128-bit vector of [2 x double] containing the minimum values
|
|
290
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|
/// between both operands.
|
|
291
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
292
|
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|
|
293
|
-
{
|
|
284
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a,
|
|
285
|
+
__m128d __b) {
|
|
294
286
|
return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
|
|
295
287
|
}
|
|
296
288
|
|
|
@@ -312,9 +304,8 @@ _mm_min_pd(__m128d __a, __m128d __b)
|
|
|
312
304
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
313
305
|
/// maximum value between both operands. The upper 64 bits are copied from
|
|
314
306
|
/// the upper 64 bits of the first source operand.
|
|
315
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
316
|
-
|
|
317
|
-
{
|
|
307
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,
|
|
308
|
+
__m128d __b) {
|
|
318
309
|
return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
|
|
319
310
|
}
|
|
320
311
|
|
|
@@ -332,9 +323,8 @@ _mm_max_sd(__m128d __a, __m128d __b)
|
|
|
332
323
|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
333
324
|
/// \returns A 128-bit vector of [2 x double] containing the maximum values
|
|
334
325
|
/// between both operands.
|
|
335
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
336
|
-
|
|
337
|
-
{
|
|
326
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a,
|
|
327
|
+
__m128d __b) {
|
|
338
328
|
return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
|
|
339
329
|
}
|
|
340
330
|
|
|
@@ -350,9 +340,8 @@ _mm_max_pd(__m128d __a, __m128d __b)
|
|
|
350
340
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
351
341
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
352
342
|
/// values between both operands.
|
|
353
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
354
|
-
|
|
355
|
-
{
|
|
343
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_and_pd(__m128d __a,
|
|
344
|
+
__m128d __b) {
|
|
356
345
|
return (__m128d)((__v2du)__a & (__v2du)__b);
|
|
357
346
|
}
|
|
358
347
|
|
|
@@ -371,9 +360,8 @@ _mm_and_pd(__m128d __a, __m128d __b)
|
|
|
371
360
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
372
361
|
/// values in the second operand and the one's complement of the first
|
|
373
362
|
/// operand.
|
|
374
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
375
|
-
|
|
376
|
-
{
|
|
363
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_andnot_pd(__m128d __a,
|
|
364
|
+
__m128d __b) {
|
|
377
365
|
return (__m128d)(~(__v2du)__a & (__v2du)__b);
|
|
378
366
|
}
|
|
379
367
|
|
|
@@ -389,9 +377,8 @@ _mm_andnot_pd(__m128d __a, __m128d __b)
|
|
|
389
377
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
390
378
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
|
|
391
379
|
/// values between both operands.
|
|
392
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
393
|
-
|
|
394
|
-
{
|
|
380
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_or_pd(__m128d __a,
|
|
381
|
+
__m128d __b) {
|
|
395
382
|
return (__m128d)((__v2du)__a | (__v2du)__b);
|
|
396
383
|
}
|
|
397
384
|
|
|
@@ -407,9 +394,8 @@ _mm_or_pd(__m128d __a, __m128d __b)
|
|
|
407
394
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
408
395
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
|
|
409
396
|
/// values between both operands.
|
|
410
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
411
|
-
|
|
412
|
-
{
|
|
397
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_xor_pd(__m128d __a,
|
|
398
|
+
__m128d __b) {
|
|
413
399
|
return (__m128d)((__v2du)__a ^ (__v2du)__b);
|
|
414
400
|
}
|
|
415
401
|
|
|
@@ -426,9 +412,8 @@ _mm_xor_pd(__m128d __a, __m128d __b)
|
|
|
426
412
|
/// \param __b
|
|
427
413
|
/// A 128-bit vector of [2 x double].
|
|
428
414
|
/// \returns A 128-bit vector containing the comparison results.
|
|
429
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
430
|
-
|
|
431
|
-
{
|
|
415
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_pd(__m128d __a,
|
|
416
|
+
__m128d __b) {
|
|
432
417
|
return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
|
|
433
418
|
}
|
|
434
419
|
|
|
@@ -446,9 +431,8 @@ _mm_cmpeq_pd(__m128d __a, __m128d __b)
|
|
|
446
431
|
/// \param __b
|
|
447
432
|
/// A 128-bit vector of [2 x double].
|
|
448
433
|
/// \returns A 128-bit vector containing the comparison results.
|
|
449
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
450
|
-
|
|
451
|
-
{
|
|
434
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_pd(__m128d __a,
|
|
435
|
+
__m128d __b) {
|
|
452
436
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
|
|
453
437
|
}
|
|
454
438
|
|
|
@@ -467,9 +451,8 @@ _mm_cmplt_pd(__m128d __a, __m128d __b)
|
|
|
467
451
|
/// \param __b
|
|
468
452
|
/// A 128-bit vector of [2 x double].
|
|
469
453
|
/// \returns A 128-bit vector containing the comparison results.
|
|
470
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
471
|
-
|
|
472
|
-
{
|
|
454
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_pd(__m128d __a,
|
|
455
|
+
__m128d __b) {
|
|
473
456
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
|
|
474
457
|
}
|
|
475
458
|
|
|
@@ -488,9 +471,8 @@ _mm_cmple_pd(__m128d __a, __m128d __b)
|
|
|
488
471
|
/// \param __b
|
|
489
472
|
/// A 128-bit vector of [2 x double].
|
|
490
473
|
/// \returns A 128-bit vector containing the comparison results.
|
|
491
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
492
|
-
|
|
493
|
-
{
|
|
474
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_pd(__m128d __a,
|
|
475
|
+
__m128d __b) {
|
|
494
476
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
|
|
495
477
|
}
|
|
496
478
|
|
|
@@ -509,9 +491,8 @@ _mm_cmpgt_pd(__m128d __a, __m128d __b)
|
|
|
509
491
|
/// \param __b
|
|
510
492
|
/// A 128-bit vector of [2 x double].
|
|
511
493
|
/// \returns A 128-bit vector containing the comparison results.
|
|
512
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
513
|
-
|
|
514
|
-
{
|
|
494
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_pd(__m128d __a,
|
|
495
|
+
__m128d __b) {
|
|
515
496
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
|
|
516
497
|
}
|
|
517
498
|
|
|
@@ -532,9 +513,8 @@ _mm_cmpge_pd(__m128d __a, __m128d __b)
|
|
|
532
513
|
/// \param __b
|
|
533
514
|
/// A 128-bit vector of [2 x double].
|
|
534
515
|
/// \returns A 128-bit vector containing the comparison results.
|
|
535
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
536
|
-
|
|
537
|
-
{
|
|
516
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_pd(__m128d __a,
|
|
517
|
+
__m128d __b) {
|
|
538
518
|
return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
|
|
539
519
|
}
|
|
540
520
|
|
|
@@ -556,9 +536,8 @@ _mm_cmpord_pd(__m128d __a, __m128d __b)
|
|
|
556
536
|
/// \param __b
|
|
557
537
|
/// A 128-bit vector of [2 x double].
|
|
558
538
|
/// \returns A 128-bit vector containing the comparison results.
|
|
559
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
560
|
-
|
|
561
|
-
{
|
|
539
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_pd(__m128d __a,
|
|
540
|
+
__m128d __b) {
|
|
562
541
|
return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
|
|
563
542
|
}
|
|
564
543
|
|
|
@@ -577,9 +556,8 @@ _mm_cmpunord_pd(__m128d __a, __m128d __b)
|
|
|
577
556
|
/// \param __b
|
|
578
557
|
/// A 128-bit vector of [2 x double].
|
|
579
558
|
/// \returns A 128-bit vector containing the comparison results.
|
|
580
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
581
|
-
|
|
582
|
-
{
|
|
559
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_pd(__m128d __a,
|
|
560
|
+
__m128d __b) {
|
|
583
561
|
return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
|
|
584
562
|
}
|
|
585
563
|
|
|
@@ -598,9 +576,8 @@ _mm_cmpneq_pd(__m128d __a, __m128d __b)
|
|
|
598
576
|
/// \param __b
|
|
599
577
|
/// A 128-bit vector of [2 x double].
|
|
600
578
|
/// \returns A 128-bit vector containing the comparison results.
|
|
601
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
602
|
-
|
|
603
|
-
{
|
|
579
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_pd(__m128d __a,
|
|
580
|
+
__m128d __b) {
|
|
604
581
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
|
|
605
582
|
}
|
|
606
583
|
|
|
@@ -619,9 +596,8 @@ _mm_cmpnlt_pd(__m128d __a, __m128d __b)
|
|
|
619
596
|
/// \param __b
|
|
620
597
|
/// A 128-bit vector of [2 x double].
|
|
621
598
|
/// \returns A 128-bit vector containing the comparison results.
|
|
622
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
623
|
-
|
|
624
|
-
{
|
|
599
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_pd(__m128d __a,
|
|
600
|
+
__m128d __b) {
|
|
625
601
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
|
|
626
602
|
}
|
|
627
603
|
|
|
@@ -640,9 +616,8 @@ _mm_cmpnle_pd(__m128d __a, __m128d __b)
|
|
|
640
616
|
/// \param __b
|
|
641
617
|
/// A 128-bit vector of [2 x double].
|
|
642
618
|
/// \returns A 128-bit vector containing the comparison results.
|
|
643
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
644
|
-
|
|
645
|
-
{
|
|
619
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_pd(__m128d __a,
|
|
620
|
+
__m128d __b) {
|
|
646
621
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
|
|
647
622
|
}
|
|
648
623
|
|
|
@@ -661,9 +636,8 @@ _mm_cmpngt_pd(__m128d __a, __m128d __b)
|
|
|
661
636
|
/// \param __b
|
|
662
637
|
/// A 128-bit vector of [2 x double].
|
|
663
638
|
/// \returns A 128-bit vector containing the comparison results.
|
|
664
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
665
|
-
|
|
666
|
-
{
|
|
639
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_pd(__m128d __a,
|
|
640
|
+
__m128d __b) {
|
|
667
641
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
|
|
668
642
|
}
|
|
669
643
|
|
|
@@ -684,9 +658,8 @@ _mm_cmpnge_pd(__m128d __a, __m128d __b)
|
|
|
684
658
|
/// compared to the lower double-precision value of \a __a.
|
|
685
659
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
686
660
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
687
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
688
|
-
|
|
689
|
-
{
|
|
661
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_sd(__m128d __a,
|
|
662
|
+
__m128d __b) {
|
|
690
663
|
return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
|
|
691
664
|
}
|
|
692
665
|
|
|
@@ -709,9 +682,8 @@ _mm_cmpeq_sd(__m128d __a, __m128d __b)
|
|
|
709
682
|
/// compared to the lower double-precision value of \a __a.
|
|
710
683
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
711
684
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
712
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
713
|
-
|
|
714
|
-
{
|
|
685
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_sd(__m128d __a,
|
|
686
|
+
__m128d __b) {
|
|
715
687
|
return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
|
|
716
688
|
}
|
|
717
689
|
|
|
@@ -734,9 +706,8 @@ _mm_cmplt_sd(__m128d __a, __m128d __b)
|
|
|
734
706
|
/// compared to the lower double-precision value of \a __a.
|
|
735
707
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
736
708
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
737
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
738
|
-
|
|
739
|
-
{
|
|
709
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_sd(__m128d __a,
|
|
710
|
+
__m128d __b) {
|
|
740
711
|
return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
|
|
741
712
|
}
|
|
742
713
|
|
|
@@ -759,11 +730,10 @@ _mm_cmple_sd(__m128d __a, __m128d __b)
|
|
|
759
730
|
/// compared to the lower double-precision value of \a __a.
|
|
760
731
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
761
732
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
762
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
763
|
-
|
|
764
|
-
{
|
|
733
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_sd(__m128d __a,
|
|
734
|
+
__m128d __b) {
|
|
765
735
|
__m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
|
|
766
|
-
return __extension__
|
|
736
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
767
737
|
}
|
|
768
738
|
|
|
769
739
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -785,11 +755,10 @@ _mm_cmpgt_sd(__m128d __a, __m128d __b)
|
|
|
785
755
|
/// compared to the lower double-precision value of \a __a.
|
|
786
756
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
787
757
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
788
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
789
|
-
|
|
790
|
-
{
|
|
758
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_sd(__m128d __a,
|
|
759
|
+
__m128d __b) {
|
|
791
760
|
__m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
|
|
792
|
-
return __extension__
|
|
761
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
793
762
|
}
|
|
794
763
|
|
|
795
764
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -813,9 +782,8 @@ _mm_cmpge_sd(__m128d __a, __m128d __b)
|
|
|
813
782
|
/// compared to the lower double-precision value of \a __a.
|
|
814
783
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
815
784
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
816
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
817
|
-
|
|
818
|
-
{
|
|
785
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_sd(__m128d __a,
|
|
786
|
+
__m128d __b) {
|
|
819
787
|
return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
|
|
820
788
|
}
|
|
821
789
|
|
|
@@ -841,9 +809,8 @@ _mm_cmpord_sd(__m128d __a, __m128d __b)
|
|
|
841
809
|
/// compared to the lower double-precision value of \a __a.
|
|
842
810
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
843
811
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
844
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
845
|
-
|
|
846
|
-
{
|
|
812
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_sd(__m128d __a,
|
|
813
|
+
__m128d __b) {
|
|
847
814
|
return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
|
|
848
815
|
}
|
|
849
816
|
|
|
@@ -866,9 +833,8 @@ _mm_cmpunord_sd(__m128d __a, __m128d __b)
|
|
|
866
833
|
/// compared to the lower double-precision value of \a __a.
|
|
867
834
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
868
835
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
869
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
870
|
-
|
|
871
|
-
{
|
|
836
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_sd(__m128d __a,
|
|
837
|
+
__m128d __b) {
|
|
872
838
|
return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
|
|
873
839
|
}
|
|
874
840
|
|
|
@@ -891,9 +857,8 @@ _mm_cmpneq_sd(__m128d __a, __m128d __b)
|
|
|
891
857
|
/// compared to the lower double-precision value of \a __a.
|
|
892
858
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
893
859
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
894
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
895
|
-
|
|
896
|
-
{
|
|
860
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_sd(__m128d __a,
|
|
861
|
+
__m128d __b) {
|
|
897
862
|
return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
|
|
898
863
|
}
|
|
899
864
|
|
|
@@ -916,9 +881,8 @@ _mm_cmpnlt_sd(__m128d __a, __m128d __b)
|
|
|
916
881
|
/// compared to the lower double-precision value of \a __a.
|
|
917
882
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
918
883
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
919
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
920
|
-
|
|
921
|
-
{
|
|
884
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_sd(__m128d __a,
|
|
885
|
+
__m128d __b) {
|
|
922
886
|
return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
|
|
923
887
|
}
|
|
924
888
|
|
|
@@ -941,11 +905,10 @@ _mm_cmpnle_sd(__m128d __a, __m128d __b)
|
|
|
941
905
|
/// compared to the lower double-precision value of \a __a.
|
|
942
906
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
943
907
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
944
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
945
|
-
|
|
946
|
-
{
|
|
908
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_sd(__m128d __a,
|
|
909
|
+
__m128d __b) {
|
|
947
910
|
__m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
|
|
948
|
-
return __extension__
|
|
911
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
949
912
|
}
|
|
950
913
|
|
|
951
914
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -967,11 +930,10 @@ _mm_cmpngt_sd(__m128d __a, __m128d __b)
|
|
|
967
930
|
/// compared to the lower double-precision value of \a __a.
|
|
968
931
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
969
932
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
970
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
971
|
-
|
|
972
|
-
{
|
|
933
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_sd(__m128d __a,
|
|
934
|
+
__m128d __b) {
|
|
973
935
|
__m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
|
|
974
|
-
return __extension__
|
|
936
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
975
937
|
}
|
|
976
938
|
|
|
977
939
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -992,9 +954,8 @@ _mm_cmpnge_sd(__m128d __a, __m128d __b)
|
|
|
992
954
|
/// compared to the lower double-precision value of \a __a.
|
|
993
955
|
/// \returns An integer containing the comparison results. If either of the two
|
|
994
956
|
/// lower double-precision values is NaN, 0 is returned.
|
|
995
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
996
|
-
|
|
997
|
-
{
|
|
957
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comieq_sd(__m128d __a,
|
|
958
|
+
__m128d __b) {
|
|
998
959
|
return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
|
|
999
960
|
}
|
|
1000
961
|
|
|
@@ -1018,9 +979,8 @@ _mm_comieq_sd(__m128d __a, __m128d __b)
|
|
|
1018
979
|
/// compared to the lower double-precision value of \a __a.
|
|
1019
980
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1020
981
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1021
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1022
|
-
|
|
1023
|
-
{
|
|
982
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comilt_sd(__m128d __a,
|
|
983
|
+
__m128d __b) {
|
|
1024
984
|
return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
|
|
1025
985
|
}
|
|
1026
986
|
|
|
@@ -1044,9 +1004,8 @@ _mm_comilt_sd(__m128d __a, __m128d __b)
|
|
|
1044
1004
|
/// compared to the lower double-precision value of \a __a.
|
|
1045
1005
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1046
1006
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1047
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1048
|
-
|
|
1049
|
-
{
|
|
1007
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comile_sd(__m128d __a,
|
|
1008
|
+
__m128d __b) {
|
|
1050
1009
|
return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
|
|
1051
1010
|
}
|
|
1052
1011
|
|
|
@@ -1070,9 +1029,8 @@ _mm_comile_sd(__m128d __a, __m128d __b)
|
|
|
1070
1029
|
/// compared to the lower double-precision value of \a __a.
|
|
1071
1030
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1072
1031
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1073
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1074
|
-
|
|
1075
|
-
{
|
|
1032
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comigt_sd(__m128d __a,
|
|
1033
|
+
__m128d __b) {
|
|
1076
1034
|
return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
|
|
1077
1035
|
}
|
|
1078
1036
|
|
|
@@ -1096,9 +1054,8 @@ _mm_comigt_sd(__m128d __a, __m128d __b)
|
|
|
1096
1054
|
/// compared to the lower double-precision value of \a __a.
|
|
1097
1055
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1098
1056
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1099
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1100
|
-
|
|
1101
|
-
{
|
|
1057
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comige_sd(__m128d __a,
|
|
1058
|
+
__m128d __b) {
|
|
1102
1059
|
return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
|
|
1103
1060
|
}
|
|
1104
1061
|
|
|
@@ -1122,9 +1079,8 @@ _mm_comige_sd(__m128d __a, __m128d __b)
|
|
|
1122
1079
|
/// compared to the lower double-precision value of \a __a.
|
|
1123
1080
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1124
1081
|
/// lower double-precision values is NaN, 1 is returned.
|
|
1125
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1126
|
-
|
|
1127
|
-
{
|
|
1082
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comineq_sd(__m128d __a,
|
|
1083
|
+
__m128d __b) {
|
|
1128
1084
|
return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
|
|
1129
1085
|
}
|
|
1130
1086
|
|
|
@@ -1146,9 +1102,8 @@ _mm_comineq_sd(__m128d __a, __m128d __b)
|
|
|
1146
1102
|
/// compared to the lower double-precision value of \a __a.
|
|
1147
1103
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1148
1104
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1149
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1150
|
-
|
|
1151
|
-
{
|
|
1105
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomieq_sd(__m128d __a,
|
|
1106
|
+
__m128d __b) {
|
|
1152
1107
|
return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
|
|
1153
1108
|
}
|
|
1154
1109
|
|
|
@@ -1172,9 +1127,8 @@ _mm_ucomieq_sd(__m128d __a, __m128d __b)
|
|
|
1172
1127
|
/// compared to the lower double-precision value of \a __a.
|
|
1173
1128
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1174
1129
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1175
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1176
|
-
|
|
1177
|
-
{
|
|
1130
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomilt_sd(__m128d __a,
|
|
1131
|
+
__m128d __b) {
|
|
1178
1132
|
return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
|
|
1179
1133
|
}
|
|
1180
1134
|
|
|
@@ -1198,9 +1152,8 @@ _mm_ucomilt_sd(__m128d __a, __m128d __b)
|
|
|
1198
1152
|
/// compared to the lower double-precision value of \a __a.
|
|
1199
1153
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1200
1154
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1201
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1202
|
-
|
|
1203
|
-
{
|
|
1155
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomile_sd(__m128d __a,
|
|
1156
|
+
__m128d __b) {
|
|
1204
1157
|
return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
|
|
1205
1158
|
}
|
|
1206
1159
|
|
|
@@ -1224,9 +1177,8 @@ _mm_ucomile_sd(__m128d __a, __m128d __b)
|
|
|
1224
1177
|
/// compared to the lower double-precision value of \a __a.
|
|
1225
1178
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1226
1179
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1227
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1228
|
-
|
|
1229
|
-
{
|
|
1180
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomigt_sd(__m128d __a,
|
|
1181
|
+
__m128d __b) {
|
|
1230
1182
|
return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
|
|
1231
1183
|
}
|
|
1232
1184
|
|
|
@@ -1250,9 +1202,8 @@ _mm_ucomigt_sd(__m128d __a, __m128d __b)
|
|
|
1250
1202
|
/// compared to the lower double-precision value of \a __a.
|
|
1251
1203
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1252
1204
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1253
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1254
|
-
|
|
1255
|
-
{
|
|
1205
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomige_sd(__m128d __a,
|
|
1206
|
+
__m128d __b) {
|
|
1256
1207
|
return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
|
|
1257
1208
|
}
|
|
1258
1209
|
|
|
@@ -1276,9 +1227,8 @@ _mm_ucomige_sd(__m128d __a, __m128d __b)
|
|
|
1276
1227
|
/// compared to the lower double-precision value of \a __a.
|
|
1277
1228
|
/// \returns An integer containing the comparison result. If either of the two
|
|
1278
1229
|
/// lower double-precision values is NaN, 1 is returned.
|
|
1279
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1280
|
-
|
|
1281
|
-
{
|
|
1230
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,
|
|
1231
|
+
__m128d __b) {
|
|
1282
1232
|
return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
|
|
1283
1233
|
}
|
|
1284
1234
|
|
|
@@ -1295,9 +1245,7 @@ _mm_ucomineq_sd(__m128d __a, __m128d __b)
|
|
|
1295
1245
|
/// A 128-bit vector of [2 x double].
|
|
1296
1246
|
/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
|
|
1297
1247
|
/// converted values. The upper 64 bits are set to zero.
|
|
1298
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1299
|
-
_mm_cvtpd_ps(__m128d __a)
|
|
1300
|
-
{
|
|
1248
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) {
|
|
1301
1249
|
return __builtin_ia32_cvtpd2ps((__v2df)__a);
|
|
1302
1250
|
}
|
|
1303
1251
|
|
|
@@ -1315,9 +1263,7 @@ _mm_cvtpd_ps(__m128d __a)
|
|
|
1315
1263
|
/// floating-point elements are converted to double-precision values. The
|
|
1316
1264
|
/// upper two elements are unused.
|
|
1317
1265
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1318
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1319
|
-
_mm_cvtps_pd(__m128 __a)
|
|
1320
|
-
{
|
|
1266
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtps_pd(__m128 __a) {
|
|
1321
1267
|
return (__m128d) __builtin_convertvector(
|
|
1322
1268
|
__builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
|
|
1323
1269
|
}
|
|
@@ -1338,9 +1284,7 @@ _mm_cvtps_pd(__m128 __a)
|
|
|
1338
1284
|
///
|
|
1339
1285
|
/// The upper two elements are unused.
|
|
1340
1286
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1341
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1342
|
-
_mm_cvtepi32_pd(__m128i __a)
|
|
1343
|
-
{
|
|
1287
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepi32_pd(__m128i __a) {
|
|
1344
1288
|
return (__m128d) __builtin_convertvector(
|
|
1345
1289
|
__builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
|
|
1346
1290
|
}
|
|
@@ -1358,9 +1302,7 @@ _mm_cvtepi32_pd(__m128i __a)
|
|
|
1358
1302
|
/// A 128-bit vector of [2 x double].
|
|
1359
1303
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
1360
1304
|
/// converted values. The upper 64 bits are set to zero.
|
|
1361
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1362
|
-
_mm_cvtpd_epi32(__m128d __a)
|
|
1363
|
-
{
|
|
1305
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {
|
|
1364
1306
|
return __builtin_ia32_cvtpd2dq((__v2df)__a);
|
|
1365
1307
|
}
|
|
1366
1308
|
|
|
@@ -1375,9 +1317,7 @@ _mm_cvtpd_epi32(__m128d __a)
|
|
|
1375
1317
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
1376
1318
|
/// conversion.
|
|
1377
1319
|
/// \returns A 32-bit signed integer containing the converted value.
|
|
1378
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1379
|
-
_mm_cvtsd_si32(__m128d __a)
|
|
1380
|
-
{
|
|
1320
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {
|
|
1381
1321
|
return __builtin_ia32_cvtsd2si((__v2df)__a);
|
|
1382
1322
|
}
|
|
1383
1323
|
|
|
@@ -1400,9 +1340,8 @@ _mm_cvtsd_si32(__m128d __a)
|
|
|
1400
1340
|
/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
|
|
1401
1341
|
/// converted value from the second parameter. The upper 96 bits are copied
|
|
1402
1342
|
/// from the upper 96 bits of the first parameter.
|
|
1403
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1404
|
-
|
|
1405
|
-
{
|
|
1343
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a,
|
|
1344
|
+
__m128d __b) {
|
|
1406
1345
|
return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
|
|
1407
1346
|
}
|
|
1408
1347
|
|
|
@@ -1423,9 +1362,8 @@ _mm_cvtsd_ss(__m128 __a, __m128d __b)
|
|
|
1423
1362
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
1424
1363
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
1425
1364
|
/// from the upper 64 bits of the first parameter.
|
|
1426
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1427
|
-
|
|
1428
|
-
{
|
|
1365
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi32_sd(__m128d __a,
|
|
1366
|
+
int __b) {
|
|
1429
1367
|
__a[0] = __b;
|
|
1430
1368
|
return __a;
|
|
1431
1369
|
}
|
|
@@ -1449,9 +1387,8 @@ _mm_cvtsi32_sd(__m128d __a, int __b)
|
|
|
1449
1387
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
1450
1388
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
1451
1389
|
/// from the upper 64 bits of the first parameter.
|
|
1452
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1453
|
-
|
|
1454
|
-
{
|
|
1390
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a,
|
|
1391
|
+
__m128 __b) {
|
|
1455
1392
|
__a[0] = __b[0];
|
|
1456
1393
|
return __a;
|
|
1457
1394
|
}
|
|
@@ -1473,9 +1410,7 @@ _mm_cvtss_sd(__m128d __a, __m128 __b)
|
|
|
1473
1410
|
/// A 128-bit vector of [2 x double].
|
|
1474
1411
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
1475
1412
|
/// converted values. The upper 64 bits are set to zero.
|
|
1476
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1477
|
-
_mm_cvttpd_epi32(__m128d __a)
|
|
1478
|
-
{
|
|
1413
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {
|
|
1479
1414
|
return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
|
|
1480
1415
|
}
|
|
1481
1416
|
|
|
@@ -1491,9 +1426,7 @@ _mm_cvttpd_epi32(__m128d __a)
|
|
|
1491
1426
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
1492
1427
|
/// conversion.
|
|
1493
1428
|
/// \returns A 32-bit signed integer containing the converted value.
|
|
1494
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1495
|
-
_mm_cvttsd_si32(__m128d __a)
|
|
1496
|
-
{
|
|
1429
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {
|
|
1497
1430
|
return __builtin_ia32_cvttsd2si((__v2df)__a);
|
|
1498
1431
|
}
|
|
1499
1432
|
|
|
@@ -1508,9 +1441,7 @@ _mm_cvttsd_si32(__m128d __a)
|
|
|
1508
1441
|
/// \param __a
|
|
1509
1442
|
/// A 128-bit vector of [2 x double].
|
|
1510
1443
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
|
1511
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
1512
|
-
_mm_cvtpd_pi32(__m128d __a)
|
|
1513
|
-
{
|
|
1444
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvtpd_pi32(__m128d __a) {
|
|
1514
1445
|
return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
|
|
1515
1446
|
}
|
|
1516
1447
|
|
|
@@ -1528,9 +1459,7 @@ _mm_cvtpd_pi32(__m128d __a)
|
|
|
1528
1459
|
/// \param __a
|
|
1529
1460
|
/// A 128-bit vector of [2 x double].
|
|
1530
1461
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
|
1531
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
1532
|
-
_mm_cvttpd_pi32(__m128d __a)
|
|
1533
|
-
{
|
|
1462
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvttpd_pi32(__m128d __a) {
|
|
1534
1463
|
return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
|
|
1535
1464
|
}
|
|
1536
1465
|
|
|
@@ -1545,9 +1474,7 @@ _mm_cvttpd_pi32(__m128d __a)
|
|
|
1545
1474
|
/// \param __a
|
|
1546
1475
|
/// A 64-bit vector of [2 x i32].
|
|
1547
1476
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1548
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX
|
|
1549
|
-
_mm_cvtpi32_pd(__m64 __a)
|
|
1550
|
-
{
|
|
1477
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX _mm_cvtpi32_pd(__m64 __a) {
|
|
1551
1478
|
return __builtin_ia32_cvtpi2pd((__v2si)__a);
|
|
1552
1479
|
}
|
|
1553
1480
|
|
|
@@ -1562,9 +1489,7 @@ _mm_cvtpi32_pd(__m64 __a)
|
|
|
1562
1489
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
|
|
1563
1490
|
/// \returns A double-precision floating-point value copied from the lower 64
|
|
1564
1491
|
/// bits of \a __a.
|
|
1565
|
-
static __inline__ double __DEFAULT_FN_ATTRS
|
|
1566
|
-
_mm_cvtsd_f64(__m128d __a)
|
|
1567
|
-
{
|
|
1492
|
+
static __inline__ double __DEFAULT_FN_ATTRS _mm_cvtsd_f64(__m128d __a) {
|
|
1568
1493
|
return __a[0];
|
|
1569
1494
|
}
|
|
1570
1495
|
|
|
@@ -1579,10 +1504,8 @@ _mm_cvtsd_f64(__m128d __a)
|
|
|
1579
1504
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
1580
1505
|
/// location has to be 16-byte aligned.
|
|
1581
1506
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
|
1582
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1583
|
-
|
|
1584
|
-
{
|
|
1585
|
-
return *(const __m128d*)__dp;
|
|
1507
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_pd(double const *__dp) {
|
|
1508
|
+
return *(const __m128d *)__dp;
|
|
1586
1509
|
}
|
|
1587
1510
|
|
|
1588
1511
|
/// Loads a double-precision floating-point value from a specified memory
|
|
@@ -1597,17 +1520,15 @@ _mm_load_pd(double const *__dp)
|
|
|
1597
1520
|
/// A pointer to a memory location containing a double-precision value.
|
|
1598
1521
|
/// \returns A 128-bit vector of [2 x double] containing the loaded and
|
|
1599
1522
|
/// duplicated values.
|
|
1600
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1601
|
-
_mm_load1_pd(double const *__dp)
|
|
1602
|
-
{
|
|
1523
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load1_pd(double const *__dp) {
|
|
1603
1524
|
struct __mm_load1_pd_struct {
|
|
1604
1525
|
double __u;
|
|
1605
1526
|
} __attribute__((__packed__, __may_alias__));
|
|
1606
|
-
double __u = ((const struct __mm_load1_pd_struct*)__dp)->__u;
|
|
1607
|
-
return __extension__
|
|
1527
|
+
double __u = ((const struct __mm_load1_pd_struct *)__dp)->__u;
|
|
1528
|
+
return __extension__(__m128d){__u, __u};
|
|
1608
1529
|
}
|
|
1609
1530
|
|
|
1610
|
-
#define
|
|
1531
|
+
#define _mm_load_pd1(dp) _mm_load1_pd(dp)
|
|
1611
1532
|
|
|
1612
1533
|
/// Loads two double-precision values, in reverse order, from an aligned
|
|
1613
1534
|
/// memory location into a 128-bit vector of [2 x double].
|
|
@@ -1623,10 +1544,8 @@ _mm_load1_pd(double const *__dp)
|
|
|
1623
1544
|
/// loaded in reverse order.
|
|
1624
1545
|
/// \returns A 128-bit vector of [2 x double] containing the reversed loaded
|
|
1625
1546
|
/// values.
|
|
1626
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1627
|
-
|
|
1628
|
-
{
|
|
1629
|
-
__m128d __u = *(const __m128d*)__dp;
|
|
1547
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadr_pd(double const *__dp) {
|
|
1548
|
+
__m128d __u = *(const __m128d *)__dp;
|
|
1630
1549
|
return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
|
|
1631
1550
|
}
|
|
1632
1551
|
|
|
@@ -1641,13 +1560,11 @@ _mm_loadr_pd(double const *__dp)
|
|
|
1641
1560
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
1642
1561
|
/// location does not have to be aligned.
|
|
1643
1562
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
|
1644
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1645
|
-
_mm_loadu_pd(double const *__dp)
|
|
1646
|
-
{
|
|
1563
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadu_pd(double const *__dp) {
|
|
1647
1564
|
struct __loadu_pd {
|
|
1648
1565
|
__m128d_u __v;
|
|
1649
1566
|
} __attribute__((__packed__, __may_alias__));
|
|
1650
|
-
return ((const struct __loadu_pd*)__dp)->__v;
|
|
1567
|
+
return ((const struct __loadu_pd *)__dp)->__v;
|
|
1651
1568
|
}
|
|
1652
1569
|
|
|
1653
1570
|
/// Loads a 64-bit integer value to the low element of a 128-bit integer
|
|
@@ -1661,14 +1578,12 @@ _mm_loadu_pd(double const *__dp)
|
|
|
1661
1578
|
/// A pointer to a 64-bit memory location. The address of the memory
|
|
1662
1579
|
/// location does not have to be aligned.
|
|
1663
1580
|
/// \returns A 128-bit vector of [2 x i64] containing the loaded value.
|
|
1664
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1665
|
-
_mm_loadu_si64(void const *__a)
|
|
1666
|
-
{
|
|
1581
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si64(void const *__a) {
|
|
1667
1582
|
struct __loadu_si64 {
|
|
1668
1583
|
long long __v;
|
|
1669
1584
|
} __attribute__((__packed__, __may_alias__));
|
|
1670
|
-
long long __u = ((const struct __loadu_si64*)__a)->__v;
|
|
1671
|
-
return __extension__
|
|
1585
|
+
long long __u = ((const struct __loadu_si64 *)__a)->__v;
|
|
1586
|
+
return __extension__(__m128i)(__v2di){__u, 0LL};
|
|
1672
1587
|
}
|
|
1673
1588
|
|
|
1674
1589
|
/// Loads a 32-bit integer value to the low element of a 128-bit integer
|
|
@@ -1682,14 +1597,12 @@ _mm_loadu_si64(void const *__a)
|
|
|
1682
1597
|
/// A pointer to a 32-bit memory location. The address of the memory
|
|
1683
1598
|
/// location does not have to be aligned.
|
|
1684
1599
|
/// \returns A 128-bit vector of [4 x i32] containing the loaded value.
|
|
1685
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1686
|
-
_mm_loadu_si32(void const *__a)
|
|
1687
|
-
{
|
|
1600
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si32(void const *__a) {
|
|
1688
1601
|
struct __loadu_si32 {
|
|
1689
1602
|
int __v;
|
|
1690
1603
|
} __attribute__((__packed__, __may_alias__));
|
|
1691
|
-
int __u = ((const struct __loadu_si32*)__a)->__v;
|
|
1692
|
-
return __extension__
|
|
1604
|
+
int __u = ((const struct __loadu_si32 *)__a)->__v;
|
|
1605
|
+
return __extension__(__m128i)(__v4si){__u, 0, 0, 0};
|
|
1693
1606
|
}
|
|
1694
1607
|
|
|
1695
1608
|
/// Loads a 16-bit integer value to the low element of a 128-bit integer
|
|
@@ -1703,14 +1616,12 @@ _mm_loadu_si32(void const *__a)
|
|
|
1703
1616
|
/// A pointer to a 16-bit memory location. The address of the memory
|
|
1704
1617
|
/// location does not have to be aligned.
|
|
1705
1618
|
/// \returns A 128-bit vector of [8 x i16] containing the loaded value.
|
|
1706
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1707
|
-
_mm_loadu_si16(void const *__a)
|
|
1708
|
-
{
|
|
1619
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si16(void const *__a) {
|
|
1709
1620
|
struct __loadu_si16 {
|
|
1710
1621
|
short __v;
|
|
1711
1622
|
} __attribute__((__packed__, __may_alias__));
|
|
1712
|
-
short __u = ((const struct __loadu_si16*)__a)->__v;
|
|
1713
|
-
return __extension__
|
|
1623
|
+
short __u = ((const struct __loadu_si16 *)__a)->__v;
|
|
1624
|
+
return __extension__(__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};
|
|
1714
1625
|
}
|
|
1715
1626
|
|
|
1716
1627
|
/// Loads a 64-bit double-precision value to the low element of a
|
|
@@ -1724,14 +1635,12 @@ _mm_loadu_si16(void const *__a)
|
|
|
1724
1635
|
/// A pointer to a memory location containing a double-precision value.
|
|
1725
1636
|
/// The address of the memory location does not have to be aligned.
|
|
1726
1637
|
/// \returns A 128-bit vector of [2 x double] containing the loaded value.
|
|
1727
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1728
|
-
_mm_load_sd(double const *__dp)
|
|
1729
|
-
{
|
|
1638
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_sd(double const *__dp) {
|
|
1730
1639
|
struct __mm_load_sd_struct {
|
|
1731
1640
|
double __u;
|
|
1732
1641
|
} __attribute__((__packed__, __may_alias__));
|
|
1733
|
-
double __u = ((const struct __mm_load_sd_struct*)__dp)->__u;
|
|
1734
|
-
return __extension__
|
|
1642
|
+
double __u = ((const struct __mm_load_sd_struct *)__dp)->__u;
|
|
1643
|
+
return __extension__(__m128d){__u, 0};
|
|
1735
1644
|
}
|
|
1736
1645
|
|
|
1737
1646
|
/// Loads a double-precision value into the high-order bits of a 128-bit
|
|
@@ -1751,14 +1660,13 @@ _mm_load_sd(double const *__dp)
|
|
|
1751
1660
|
/// [127:64] of the result. The address of the memory location does not have
|
|
1752
1661
|
/// to be aligned.
|
|
1753
1662
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1754
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1755
|
-
|
|
1756
|
-
{
|
|
1663
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadh_pd(__m128d __a,
|
|
1664
|
+
double const *__dp) {
|
|
1757
1665
|
struct __mm_loadh_pd_struct {
|
|
1758
1666
|
double __u;
|
|
1759
1667
|
} __attribute__((__packed__, __may_alias__));
|
|
1760
|
-
double __u = ((const struct __mm_loadh_pd_struct*)__dp)->__u;
|
|
1761
|
-
return __extension__
|
|
1668
|
+
double __u = ((const struct __mm_loadh_pd_struct *)__dp)->__u;
|
|
1669
|
+
return __extension__(__m128d){__a[0], __u};
|
|
1762
1670
|
}
|
|
1763
1671
|
|
|
1764
1672
|
/// Loads a double-precision value into the low-order bits of a 128-bit
|
|
@@ -1778,14 +1686,13 @@ _mm_loadh_pd(__m128d __a, double const *__dp)
|
|
|
1778
1686
|
/// [63:0] of the result. The address of the memory location does not have to
|
|
1779
1687
|
/// be aligned.
|
|
1780
1688
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1781
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1782
|
-
|
|
1783
|
-
{
|
|
1689
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadl_pd(__m128d __a,
|
|
1690
|
+
double const *__dp) {
|
|
1784
1691
|
struct __mm_loadl_pd_struct {
|
|
1785
1692
|
double __u;
|
|
1786
1693
|
} __attribute__((__packed__, __may_alias__));
|
|
1787
|
-
double __u = ((const struct __mm_loadl_pd_struct*)__dp)->__u;
|
|
1788
|
-
return __extension__
|
|
1694
|
+
double __u = ((const struct __mm_loadl_pd_struct *)__dp)->__u;
|
|
1695
|
+
return __extension__(__m128d){__u, __a[1]};
|
|
1789
1696
|
}
|
|
1790
1697
|
|
|
1791
1698
|
/// Constructs a 128-bit floating-point vector of [2 x double] with
|
|
@@ -1799,9 +1706,7 @@ _mm_loadl_pd(__m128d __a, double const *__dp)
|
|
|
1799
1706
|
///
|
|
1800
1707
|
/// \returns A 128-bit floating-point vector of [2 x double] with unspecified
|
|
1801
1708
|
/// content.
|
|
1802
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1803
|
-
_mm_undefined_pd(void)
|
|
1804
|
-
{
|
|
1709
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_undefined_pd(void) {
|
|
1805
1710
|
return (__m128d)__builtin_ia32_undef128();
|
|
1806
1711
|
}
|
|
1807
1712
|
|
|
@@ -1819,10 +1724,8 @@ _mm_undefined_pd(void)
|
|
|
1819
1724
|
/// \returns An initialized 128-bit floating-point vector of [2 x double]. The
|
|
1820
1725
|
/// lower 64 bits contain the value of the parameter. The upper 64 bits are
|
|
1821
1726
|
/// set to zero.
|
|
1822
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1823
|
-
|
|
1824
|
-
{
|
|
1825
|
-
return __extension__ (__m128d){ __w, 0 };
|
|
1727
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_sd(double __w) {
|
|
1728
|
+
return __extension__(__m128d){__w, 0};
|
|
1826
1729
|
}
|
|
1827
1730
|
|
|
1828
1731
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
|
@@ -1837,10 +1740,8 @@ _mm_set_sd(double __w)
|
|
|
1837
1740
|
/// A double-precision floating-point value used to initialize each vector
|
|
1838
1741
|
/// element of the result.
|
|
1839
1742
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1840
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1841
|
-
|
|
1842
|
-
{
|
|
1843
|
-
return __extension__ (__m128d){ __w, __w };
|
|
1743
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set1_pd(double __w) {
|
|
1744
|
+
return __extension__(__m128d){__w, __w};
|
|
1844
1745
|
}
|
|
1845
1746
|
|
|
1846
1747
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
|
@@ -1855,9 +1756,7 @@ _mm_set1_pd(double __w)
|
|
|
1855
1756
|
/// A double-precision floating-point value used to initialize each vector
|
|
1856
1757
|
/// element of the result.
|
|
1857
1758
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1858
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1859
|
-
_mm_set_pd1(double __w)
|
|
1860
|
-
{
|
|
1759
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd1(double __w) {
|
|
1861
1760
|
return _mm_set1_pd(__w);
|
|
1862
1761
|
}
|
|
1863
1762
|
|
|
@@ -1875,10 +1774,9 @@ _mm_set_pd1(double __w)
|
|
|
1875
1774
|
/// A double-precision floating-point value used to initialize the lower 64
|
|
1876
1775
|
/// bits of the result.
|
|
1877
1776
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1878
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1879
|
-
|
|
1880
|
-
{
|
|
1881
|
-
return __extension__ (__m128d){ __x, __w };
|
|
1777
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd(double __w,
|
|
1778
|
+
double __x) {
|
|
1779
|
+
return __extension__(__m128d){__x, __w};
|
|
1882
1780
|
}
|
|
1883
1781
|
|
|
1884
1782
|
/// Constructs a 128-bit floating-point vector of [2 x double],
|
|
@@ -1896,10 +1794,9 @@ _mm_set_pd(double __w, double __x)
|
|
|
1896
1794
|
/// A double-precision floating-point value used to initialize the upper 64
|
|
1897
1795
|
/// bits of the result.
|
|
1898
1796
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1899
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1900
|
-
|
|
1901
|
-
{
|
|
1902
|
-
return __extension__ (__m128d){ __w, __x };
|
|
1797
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setr_pd(double __w,
|
|
1798
|
+
double __x) {
|
|
1799
|
+
return __extension__(__m128d){__w, __x};
|
|
1903
1800
|
}
|
|
1904
1801
|
|
|
1905
1802
|
/// Constructs a 128-bit floating-point vector of [2 x double]
|
|
@@ -1911,10 +1808,8 @@ _mm_setr_pd(double __w, double __x)
|
|
|
1911
1808
|
///
|
|
1912
1809
|
/// \returns An initialized 128-bit floating-point vector of [2 x double] with
|
|
1913
1810
|
/// all elements set to zero.
|
|
1914
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1915
|
-
|
|
1916
|
-
{
|
|
1917
|
-
return __extension__ (__m128d){ 0, 0 };
|
|
1811
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setzero_pd(void) {
|
|
1812
|
+
return __extension__(__m128d){0, 0};
|
|
1918
1813
|
}
|
|
1919
1814
|
|
|
1920
1815
|
/// Constructs a 128-bit floating-point vector of [2 x double]. The lower
|
|
@@ -1932,9 +1827,8 @@ _mm_setzero_pd(void)
|
|
|
1932
1827
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
|
|
1933
1828
|
/// lower 64 bits of the result.
|
|
1934
1829
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1935
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1936
|
-
|
|
1937
|
-
{
|
|
1830
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_move_sd(__m128d __a,
|
|
1831
|
+
__m128d __b) {
|
|
1938
1832
|
__a[0] = __b[0];
|
|
1939
1833
|
return __a;
|
|
1940
1834
|
}
|
|
@@ -1950,13 +1844,12 @@ _mm_move_sd(__m128d __a, __m128d __b)
|
|
|
1950
1844
|
/// A pointer to a 64-bit memory location.
|
|
1951
1845
|
/// \param __a
|
|
1952
1846
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
1953
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1954
|
-
|
|
1955
|
-
{
|
|
1847
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_sd(double *__dp,
|
|
1848
|
+
__m128d __a) {
|
|
1956
1849
|
struct __mm_store_sd_struct {
|
|
1957
1850
|
double __u;
|
|
1958
1851
|
} __attribute__((__packed__, __may_alias__));
|
|
1959
|
-
((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
|
|
1852
|
+
((struct __mm_store_sd_struct *)__dp)->__u = __a[0];
|
|
1960
1853
|
}
|
|
1961
1854
|
|
|
1962
1855
|
/// Moves packed double-precision values from a 128-bit vector of
|
|
@@ -1972,10 +1865,9 @@ _mm_store_sd(double *__dp, __m128d __a)
|
|
|
1972
1865
|
/// \param __a
|
|
1973
1866
|
/// A packed 128-bit vector of [2 x double] containing the values to be
|
|
1974
1867
|
/// moved.
|
|
1975
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1976
|
-
|
|
1977
|
-
|
|
1978
|
-
*(__m128d*)__dp = __a;
|
|
1868
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd(double *__dp,
|
|
1869
|
+
__m128d __a) {
|
|
1870
|
+
*(__m128d *)__dp = __a;
|
|
1979
1871
|
}
|
|
1980
1872
|
|
|
1981
1873
|
/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
|
|
@@ -1992,9 +1884,8 @@ _mm_store_pd(double *__dp, __m128d __a)
|
|
|
1992
1884
|
/// \param __a
|
|
1993
1885
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
1994
1886
|
/// of the values in \a __dp.
|
|
1995
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1996
|
-
|
|
1997
|
-
{
|
|
1887
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store1_pd(double *__dp,
|
|
1888
|
+
__m128d __a) {
|
|
1998
1889
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
|
|
1999
1890
|
_mm_store_pd(__dp, __a);
|
|
2000
1891
|
}
|
|
@@ -2013,9 +1904,8 @@ _mm_store1_pd(double *__dp, __m128d __a)
|
|
|
2013
1904
|
/// \param __a
|
|
2014
1905
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
2015
1906
|
/// of the values in \a __dp.
|
|
2016
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2017
|
-
|
|
2018
|
-
{
|
|
1907
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd1(double *__dp,
|
|
1908
|
+
__m128d __a) {
|
|
2019
1909
|
_mm_store1_pd(__dp, __a);
|
|
2020
1910
|
}
|
|
2021
1911
|
|
|
@@ -2031,13 +1921,12 @@ _mm_store_pd1(double *__dp, __m128d __a)
|
|
|
2031
1921
|
/// location does not have to be aligned.
|
|
2032
1922
|
/// \param __a
|
|
2033
1923
|
/// A 128-bit vector of [2 x double] containing the values to be stored.
|
|
2034
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2035
|
-
|
|
2036
|
-
{
|
|
1924
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_pd(double *__dp,
|
|
1925
|
+
__m128d __a) {
|
|
2037
1926
|
struct __storeu_pd {
|
|
2038
1927
|
__m128d_u __v;
|
|
2039
1928
|
} __attribute__((__packed__, __may_alias__));
|
|
2040
|
-
((struct __storeu_pd*)__dp)->__v = __a;
|
|
1929
|
+
((struct __storeu_pd *)__dp)->__v = __a;
|
|
2041
1930
|
}
|
|
2042
1931
|
|
|
2043
1932
|
/// Stores two double-precision values, in reverse order, from a 128-bit
|
|
@@ -2054,9 +1943,8 @@ _mm_storeu_pd(double *__dp, __m128d __a)
|
|
|
2054
1943
|
/// \param __a
|
|
2055
1944
|
/// A 128-bit vector of [2 x double] containing the values to be reversed and
|
|
2056
1945
|
/// stored.
|
|
2057
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2058
|
-
|
|
2059
|
-
{
|
|
1946
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storer_pd(double *__dp,
|
|
1947
|
+
__m128d __a) {
|
|
2060
1948
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
|
|
2061
1949
|
*(__m128d *)__dp = __a;
|
|
2062
1950
|
}
|
|
@@ -2072,13 +1960,12 @@ _mm_storer_pd(double *__dp, __m128d __a)
|
|
|
2072
1960
|
/// A pointer to a 64-bit memory location.
|
|
2073
1961
|
/// \param __a
|
|
2074
1962
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
2075
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2076
|
-
|
|
2077
|
-
{
|
|
1963
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeh_pd(double *__dp,
|
|
1964
|
+
__m128d __a) {
|
|
2078
1965
|
struct __mm_storeh_pd_struct {
|
|
2079
1966
|
double __u;
|
|
2080
1967
|
} __attribute__((__packed__, __may_alias__));
|
|
2081
|
-
((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
|
|
1968
|
+
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[1];
|
|
2082
1969
|
}
|
|
2083
1970
|
|
|
2084
1971
|
/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
|
|
@@ -2092,13 +1979,12 @@ _mm_storeh_pd(double *__dp, __m128d __a)
|
|
|
2092
1979
|
/// A pointer to a 64-bit memory location.
|
|
2093
1980
|
/// \param __a
|
|
2094
1981
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
2095
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2096
|
-
|
|
2097
|
-
{
|
|
1982
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,
|
|
1983
|
+
__m128d __a) {
|
|
2098
1984
|
struct __mm_storeh_pd_struct {
|
|
2099
1985
|
double __u;
|
|
2100
1986
|
} __attribute__((__packed__, __may_alias__));
|
|
2101
|
-
((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
|
|
1987
|
+
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[0];
|
|
2102
1988
|
}
|
|
2103
1989
|
|
|
2104
1990
|
/// Adds the corresponding elements of two 128-bit vectors of [16 x i8],
|
|
@@ -2117,9 +2003,8 @@ _mm_storel_pd(double *__dp, __m128d __a)
|
|
|
2117
2003
|
/// A 128-bit vector of [16 x i8].
|
|
2118
2004
|
/// \returns A 128-bit vector of [16 x i8] containing the sums of both
|
|
2119
2005
|
/// parameters.
|
|
2120
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2121
|
-
|
|
2122
|
-
{
|
|
2006
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,
|
|
2007
|
+
__m128i __b) {
|
|
2123
2008
|
return (__m128i)((__v16qu)__a + (__v16qu)__b);
|
|
2124
2009
|
}
|
|
2125
2010
|
|
|
@@ -2139,9 +2024,8 @@ _mm_add_epi8(__m128i __a, __m128i __b)
|
|
|
2139
2024
|
/// A 128-bit vector of [8 x i16].
|
|
2140
2025
|
/// \returns A 128-bit vector of [8 x i16] containing the sums of both
|
|
2141
2026
|
/// parameters.
|
|
2142
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2143
|
-
|
|
2144
|
-
{
|
|
2027
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a,
|
|
2028
|
+
__m128i __b) {
|
|
2145
2029
|
return (__m128i)((__v8hu)__a + (__v8hu)__b);
|
|
2146
2030
|
}
|
|
2147
2031
|
|
|
@@ -2161,9 +2045,8 @@ _mm_add_epi16(__m128i __a, __m128i __b)
|
|
|
2161
2045
|
/// A 128-bit vector of [4 x i32].
|
|
2162
2046
|
/// \returns A 128-bit vector of [4 x i32] containing the sums of both
|
|
2163
2047
|
/// parameters.
|
|
2164
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2165
|
-
|
|
2166
|
-
{
|
|
2048
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi32(__m128i __a,
|
|
2049
|
+
__m128i __b) {
|
|
2167
2050
|
return (__m128i)((__v4su)__a + (__v4su)__b);
|
|
2168
2051
|
}
|
|
2169
2052
|
|
|
@@ -2179,9 +2062,8 @@ _mm_add_epi32(__m128i __a, __m128i __b)
|
|
|
2179
2062
|
/// \param __b
|
|
2180
2063
|
/// A 64-bit integer.
|
|
2181
2064
|
/// \returns A 64-bit integer containing the sum of both parameters.
|
|
2182
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2183
|
-
|
|
2184
|
-
{
|
|
2065
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_add_si64(__m64 __a,
|
|
2066
|
+
__m64 __b) {
|
|
2185
2067
|
return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
|
|
2186
2068
|
}
|
|
2187
2069
|
|
|
@@ -2201,9 +2083,8 @@ _mm_add_si64(__m64 __a, __m64 __b)
|
|
|
2201
2083
|
/// A 128-bit vector of [2 x i64].
|
|
2202
2084
|
/// \returns A 128-bit vector of [2 x i64] containing the sums of both
|
|
2203
2085
|
/// parameters.
|
|
2204
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2205
|
-
|
|
2206
|
-
{
|
|
2086
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a,
|
|
2087
|
+
__m128i __b) {
|
|
2207
2088
|
return (__m128i)((__v2du)__a + (__v2du)__b);
|
|
2208
2089
|
}
|
|
2209
2090
|
|
|
@@ -2222,10 +2103,9 @@ _mm_add_epi64(__m128i __a, __m128i __b)
|
|
|
2222
2103
|
/// A 128-bit signed [16 x i8] vector.
|
|
2223
2104
|
/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
|
|
2224
2105
|
/// both parameters.
|
|
2225
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2226
|
-
|
|
2227
|
-
|
|
2228
|
-
return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
|
|
2106
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,
|
|
2107
|
+
__m128i __b) {
|
|
2108
|
+
return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);
|
|
2229
2109
|
}
|
|
2230
2110
|
|
|
2231
2111
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2244,10 +2124,9 @@ _mm_adds_epi8(__m128i __a, __m128i __b)
|
|
|
2244
2124
|
/// A 128-bit signed [8 x i16] vector.
|
|
2245
2125
|
/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
|
|
2246
2126
|
/// both parameters.
|
|
2247
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2248
|
-
|
|
2249
|
-
|
|
2250
|
-
return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
|
|
2127
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,
|
|
2128
|
+
__m128i __b) {
|
|
2129
|
+
return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);
|
|
2251
2130
|
}
|
|
2252
2131
|
|
|
2253
2132
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2265,10 +2144,9 @@ _mm_adds_epi16(__m128i __a, __m128i __b)
|
|
|
2265
2144
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2266
2145
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
|
|
2267
2146
|
/// of both parameters.
|
|
2268
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2269
|
-
|
|
2270
|
-
|
|
2271
|
-
return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
|
|
2147
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,
|
|
2148
|
+
__m128i __b) {
|
|
2149
|
+
return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);
|
|
2272
2150
|
}
|
|
2273
2151
|
|
|
2274
2152
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2286,10 +2164,9 @@ _mm_adds_epu8(__m128i __a, __m128i __b)
|
|
|
2286
2164
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2287
2165
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
|
|
2288
2166
|
/// of both parameters.
|
|
2289
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2290
|
-
|
|
2291
|
-
|
|
2292
|
-
return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
|
|
2167
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,
|
|
2168
|
+
__m128i __b) {
|
|
2169
|
+
return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);
|
|
2293
2170
|
}
|
|
2294
2171
|
|
|
2295
2172
|
/// Computes the rounded averages of corresponding elements of two
|
|
@@ -2306,9 +2183,8 @@ _mm_adds_epu16(__m128i __a, __m128i __b)
|
|
|
2306
2183
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2307
2184
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
|
|
2308
2185
|
/// averages of both parameters.
|
|
2309
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2310
|
-
|
|
2311
|
-
{
|
|
2186
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,
|
|
2187
|
+
__m128i __b) {
|
|
2312
2188
|
return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);
|
|
2313
2189
|
}
|
|
2314
2190
|
|
|
@@ -2326,9 +2202,8 @@ _mm_avg_epu8(__m128i __a, __m128i __b)
|
|
|
2326
2202
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2327
2203
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
|
|
2328
2204
|
/// averages of both parameters.
|
|
2329
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2330
|
-
|
|
2331
|
-
{
|
|
2205
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,
|
|
2206
|
+
__m128i __b) {
|
|
2332
2207
|
return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);
|
|
2333
2208
|
}
|
|
2334
2209
|
|
|
@@ -2352,9 +2227,8 @@ _mm_avg_epu16(__m128i __a, __m128i __b)
|
|
|
2352
2227
|
/// A 128-bit signed [8 x i16] vector.
|
|
2353
2228
|
/// \returns A 128-bit signed [4 x i32] vector containing the sums of products
|
|
2354
2229
|
/// of both parameters.
|
|
2355
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2356
|
-
|
|
2357
|
-
{
|
|
2230
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,
|
|
2231
|
+
__m128i __b) {
|
|
2358
2232
|
return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
|
|
2359
2233
|
}
|
|
2360
2234
|
|
|
@@ -2372,9 +2246,8 @@ _mm_madd_epi16(__m128i __a, __m128i __b)
|
|
|
2372
2246
|
/// A 128-bit signed [8 x i16] vector.
|
|
2373
2247
|
/// \returns A 128-bit signed [8 x i16] vector containing the greater value of
|
|
2374
2248
|
/// each comparison.
|
|
2375
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2376
|
-
|
|
2377
|
-
{
|
|
2249
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,
|
|
2250
|
+
__m128i __b) {
|
|
2378
2251
|
return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);
|
|
2379
2252
|
}
|
|
2380
2253
|
|
|
@@ -2392,9 +2265,8 @@ _mm_max_epi16(__m128i __a, __m128i __b)
|
|
|
2392
2265
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2393
2266
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
|
|
2394
2267
|
/// each comparison.
|
|
2395
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2396
|
-
|
|
2397
|
-
{
|
|
2268
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,
|
|
2269
|
+
__m128i __b) {
|
|
2398
2270
|
return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);
|
|
2399
2271
|
}
|
|
2400
2272
|
|
|
@@ -2412,9 +2284,8 @@ _mm_max_epu8(__m128i __a, __m128i __b)
|
|
|
2412
2284
|
/// A 128-bit signed [8 x i16] vector.
|
|
2413
2285
|
/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
|
|
2414
2286
|
/// each comparison.
|
|
2415
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2416
|
-
|
|
2417
|
-
{
|
|
2287
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,
|
|
2288
|
+
__m128i __b) {
|
|
2418
2289
|
return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);
|
|
2419
2290
|
}
|
|
2420
2291
|
|
|
@@ -2432,9 +2303,8 @@ _mm_min_epi16(__m128i __a, __m128i __b)
|
|
|
2432
2303
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2433
2304
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
|
|
2434
2305
|
/// each comparison.
|
|
2435
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2436
|
-
|
|
2437
|
-
{
|
|
2306
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,
|
|
2307
|
+
__m128i __b) {
|
|
2438
2308
|
return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);
|
|
2439
2309
|
}
|
|
2440
2310
|
|
|
@@ -2452,9 +2322,8 @@ _mm_min_epu8(__m128i __a, __m128i __b)
|
|
|
2452
2322
|
/// A 128-bit signed [8 x i16] vector.
|
|
2453
2323
|
/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
|
|
2454
2324
|
/// each of the eight 32-bit products.
|
|
2455
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2456
|
-
|
|
2457
|
-
{
|
|
2325
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
|
|
2326
|
+
__m128i __b) {
|
|
2458
2327
|
return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
|
|
2459
2328
|
}
|
|
2460
2329
|
|
|
@@ -2472,9 +2341,8 @@ _mm_mulhi_epi16(__m128i __a, __m128i __b)
|
|
|
2472
2341
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2473
2342
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
|
|
2474
2343
|
/// of each of the eight 32-bit products.
|
|
2475
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2476
|
-
|
|
2477
|
-
{
|
|
2344
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
|
|
2345
|
+
__m128i __b) {
|
|
2478
2346
|
return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
|
|
2479
2347
|
}
|
|
2480
2348
|
|
|
@@ -2492,9 +2360,8 @@ _mm_mulhi_epu16(__m128i __a, __m128i __b)
|
|
|
2492
2360
|
/// A 128-bit signed [8 x i16] vector.
|
|
2493
2361
|
/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
|
|
2494
2362
|
/// each of the eight 32-bit products.
|
|
2495
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2496
|
-
|
|
2497
|
-
{
|
|
2363
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,
|
|
2364
|
+
__m128i __b) {
|
|
2498
2365
|
return (__m128i)((__v8hu)__a * (__v8hu)__b);
|
|
2499
2366
|
}
|
|
2500
2367
|
|
|
@@ -2511,9 +2378,8 @@ _mm_mullo_epi16(__m128i __a, __m128i __b)
|
|
|
2511
2378
|
/// \param __b
|
|
2512
2379
|
/// A 64-bit integer containing one of the source operands.
|
|
2513
2380
|
/// \returns A 64-bit integer vector containing the product of both operands.
|
|
2514
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2515
|
-
|
|
2516
|
-
{
|
|
2381
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_mul_su32(__m64 __a,
|
|
2382
|
+
__m64 __b) {
|
|
2517
2383
|
return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
|
|
2518
2384
|
}
|
|
2519
2385
|
|
|
@@ -2530,9 +2396,8 @@ _mm_mul_su32(__m64 __a, __m64 __b)
|
|
|
2530
2396
|
/// \param __b
|
|
2531
2397
|
/// A [2 x i64] vector containing one of the source operands.
|
|
2532
2398
|
/// \returns A [2 x i64] vector containing the product of both operands.
|
|
2533
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2534
|
-
|
|
2535
|
-
{
|
|
2399
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a,
|
|
2400
|
+
__m128i __b) {
|
|
2536
2401
|
return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
|
|
2537
2402
|
}
|
|
2538
2403
|
|
|
@@ -2552,9 +2417,8 @@ _mm_mul_epu32(__m128i __a, __m128i __b)
|
|
|
2552
2417
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2553
2418
|
/// \returns A [2 x i64] vector containing the sums of the sets of absolute
|
|
2554
2419
|
/// differences between both operands.
|
|
2555
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2556
|
-
|
|
2557
|
-
{
|
|
2420
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,
|
|
2421
|
+
__m128i __b) {
|
|
2558
2422
|
return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
|
|
2559
2423
|
}
|
|
2560
2424
|
|
|
@@ -2570,9 +2434,8 @@ _mm_sad_epu8(__m128i __a, __m128i __b)
|
|
|
2570
2434
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2571
2435
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2572
2436
|
/// in the operands.
|
|
2573
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2574
|
-
|
|
2575
|
-
{
|
|
2437
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,
|
|
2438
|
+
__m128i __b) {
|
|
2576
2439
|
return (__m128i)((__v16qu)__a - (__v16qu)__b);
|
|
2577
2440
|
}
|
|
2578
2441
|
|
|
@@ -2588,9 +2451,8 @@ _mm_sub_epi8(__m128i __a, __m128i __b)
|
|
|
2588
2451
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2589
2452
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2590
2453
|
/// in the operands.
|
|
2591
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2592
|
-
|
|
2593
|
-
{
|
|
2454
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a,
|
|
2455
|
+
__m128i __b) {
|
|
2594
2456
|
return (__m128i)((__v8hu)__a - (__v8hu)__b);
|
|
2595
2457
|
}
|
|
2596
2458
|
|
|
@@ -2606,9 +2468,8 @@ _mm_sub_epi16(__m128i __a, __m128i __b)
|
|
|
2606
2468
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2607
2469
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2608
2470
|
/// in the operands.
|
|
2609
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2610
|
-
|
|
2611
|
-
{
|
|
2471
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi32(__m128i __a,
|
|
2472
|
+
__m128i __b) {
|
|
2612
2473
|
return (__m128i)((__v4su)__a - (__v4su)__b);
|
|
2613
2474
|
}
|
|
2614
2475
|
|
|
@@ -2625,9 +2486,8 @@ _mm_sub_epi32(__m128i __a, __m128i __b)
|
|
|
2625
2486
|
/// A 64-bit integer vector containing the subtrahend.
|
|
2626
2487
|
/// \returns A 64-bit integer vector containing the difference of the values in
|
|
2627
2488
|
/// the operands.
|
|
2628
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2629
|
-
|
|
2630
|
-
{
|
|
2489
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sub_si64(__m64 __a,
|
|
2490
|
+
__m64 __b) {
|
|
2631
2491
|
return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
|
|
2632
2492
|
}
|
|
2633
2493
|
|
|
@@ -2643,9 +2503,8 @@ _mm_sub_si64(__m64 __a, __m64 __b)
|
|
|
2643
2503
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2644
2504
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2645
2505
|
/// in the operands.
|
|
2646
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2647
|
-
|
|
2648
|
-
{
|
|
2506
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi64(__m128i __a,
|
|
2507
|
+
__m128i __b) {
|
|
2649
2508
|
return (__m128i)((__v2du)__a - (__v2du)__b);
|
|
2650
2509
|
}
|
|
2651
2510
|
|
|
@@ -2664,10 +2523,9 @@ _mm_sub_epi64(__m128i __a, __m128i __b)
|
|
|
2664
2523
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2665
2524
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2666
2525
|
/// in the operands.
|
|
2667
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2668
|
-
|
|
2669
|
-
|
|
2670
|
-
return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
|
|
2526
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,
|
|
2527
|
+
__m128i __b) {
|
|
2528
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);
|
|
2671
2529
|
}
|
|
2672
2530
|
|
|
2673
2531
|
/// Subtracts corresponding 16-bit signed integer values in the input and
|
|
@@ -2685,10 +2543,9 @@ _mm_subs_epi8(__m128i __a, __m128i __b)
|
|
|
2685
2543
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2686
2544
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2687
2545
|
/// in the operands.
|
|
2688
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2689
|
-
|
|
2690
|
-
|
|
2691
|
-
return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
|
|
2546
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,
|
|
2547
|
+
__m128i __b) {
|
|
2548
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);
|
|
2692
2549
|
}
|
|
2693
2550
|
|
|
2694
2551
|
/// Subtracts corresponding 8-bit unsigned integer values in the input
|
|
@@ -2705,10 +2562,9 @@ _mm_subs_epi16(__m128i __a, __m128i __b)
|
|
|
2705
2562
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2706
2563
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
2707
2564
|
/// differences of the values in the operands.
|
|
2708
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2709
|
-
|
|
2710
|
-
|
|
2711
|
-
return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
|
|
2565
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,
|
|
2566
|
+
__m128i __b) {
|
|
2567
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);
|
|
2712
2568
|
}
|
|
2713
2569
|
|
|
2714
2570
|
/// Subtracts corresponding 16-bit unsigned integer values in the input
|
|
@@ -2725,10 +2581,9 @@ _mm_subs_epu8(__m128i __a, __m128i __b)
|
|
|
2725
2581
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2726
2582
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
2727
2583
|
/// differences of the values in the operands.
|
|
2728
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2729
|
-
|
|
2730
|
-
|
|
2731
|
-
return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
|
|
2584
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,
|
|
2585
|
+
__m128i __b) {
|
|
2586
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);
|
|
2732
2587
|
}
|
|
2733
2588
|
|
|
2734
2589
|
/// Performs a bitwise AND of two 128-bit integer vectors.
|
|
@@ -2743,9 +2598,8 @@ _mm_subs_epu16(__m128i __a, __m128i __b)
|
|
|
2743
2598
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2744
2599
|
/// \returns A 128-bit integer vector containing the bitwise AND of the values
|
|
2745
2600
|
/// in both operands.
|
|
2746
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2747
|
-
|
|
2748
|
-
{
|
|
2601
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,
|
|
2602
|
+
__m128i __b) {
|
|
2749
2603
|
return (__m128i)((__v2du)__a & (__v2du)__b);
|
|
2750
2604
|
}
|
|
2751
2605
|
|
|
@@ -2763,9 +2617,8 @@ _mm_and_si128(__m128i __a, __m128i __b)
|
|
|
2763
2617
|
/// A 128-bit vector containing the right source operand.
|
|
2764
2618
|
/// \returns A 128-bit integer vector containing the bitwise AND of the one's
|
|
2765
2619
|
/// complement of the first operand and the values in the second operand.
|
|
2766
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2767
|
-
|
|
2768
|
-
{
|
|
2620
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,
|
|
2621
|
+
__m128i __b) {
|
|
2769
2622
|
return (__m128i)(~(__v2du)__a & (__v2du)__b);
|
|
2770
2623
|
}
|
|
2771
2624
|
/// Performs a bitwise OR of two 128-bit integer vectors.
|
|
@@ -2780,9 +2633,8 @@ _mm_andnot_si128(__m128i __a, __m128i __b)
|
|
|
2780
2633
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2781
2634
|
/// \returns A 128-bit integer vector containing the bitwise OR of the values
|
|
2782
2635
|
/// in both operands.
|
|
2783
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2784
|
-
|
|
2785
|
-
{
|
|
2636
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,
|
|
2637
|
+
__m128i __b) {
|
|
2786
2638
|
return (__m128i)((__v2du)__a | (__v2du)__b);
|
|
2787
2639
|
}
|
|
2788
2640
|
|
|
@@ -2798,9 +2650,8 @@ _mm_or_si128(__m128i __a, __m128i __b)
|
|
|
2798
2650
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2799
2651
|
/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
|
|
2800
2652
|
/// values in both operands.
|
|
2801
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2802
|
-
|
|
2803
|
-
{
|
|
2653
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,
|
|
2654
|
+
__m128i __b) {
|
|
2804
2655
|
return (__m128i)((__v2du)__a ^ (__v2du)__b);
|
|
2805
2656
|
}
|
|
2806
2657
|
|
|
@@ -2821,11 +2672,13 @@ _mm_xor_si128(__m128i __a, __m128i __b)
|
|
|
2821
2672
|
/// An immediate value specifying the number of bytes to left-shift operand
|
|
2822
2673
|
/// \a a.
|
|
2823
2674
|
/// \returns A 128-bit integer vector containing the left-shifted value.
|
|
2824
|
-
#define _mm_slli_si128(a, imm)
|
|
2825
|
-
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2675
|
+
#define _mm_slli_si128(a, imm) \
|
|
2676
|
+
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2677
|
+
(int)(imm)))
|
|
2826
2678
|
|
|
2827
|
-
#define _mm_bslli_si128(a, imm)
|
|
2828
|
-
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2679
|
+
#define _mm_bslli_si128(a, imm) \
|
|
2680
|
+
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2681
|
+
(int)(imm)))
|
|
2829
2682
|
|
|
2830
2683
|
/// Left-shifts each 16-bit value in the 128-bit integer vector operand
|
|
2831
2684
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
@@ -2840,9 +2693,8 @@ _mm_xor_si128(__m128i __a, __m128i __b)
|
|
|
2840
2693
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2841
2694
|
/// in operand \a __a.
|
|
2842
2695
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2843
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2844
|
-
|
|
2845
|
-
{
|
|
2696
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,
|
|
2697
|
+
int __count) {
|
|
2846
2698
|
return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
|
|
2847
2699
|
}
|
|
2848
2700
|
|
|
@@ -2859,9 +2711,8 @@ _mm_slli_epi16(__m128i __a, int __count)
|
|
|
2859
2711
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2860
2712
|
/// to left-shift each value in operand \a __a.
|
|
2861
2713
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2862
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2863
|
-
|
|
2864
|
-
{
|
|
2714
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,
|
|
2715
|
+
__m128i __count) {
|
|
2865
2716
|
return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
|
|
2866
2717
|
}
|
|
2867
2718
|
|
|
@@ -2878,9 +2729,8 @@ _mm_sll_epi16(__m128i __a, __m128i __count)
|
|
|
2878
2729
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2879
2730
|
/// in operand \a __a.
|
|
2880
2731
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2881
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2882
|
-
|
|
2883
|
-
{
|
|
2732
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,
|
|
2733
|
+
int __count) {
|
|
2884
2734
|
return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
|
|
2885
2735
|
}
|
|
2886
2736
|
|
|
@@ -2897,9 +2747,8 @@ _mm_slli_epi32(__m128i __a, int __count)
|
|
|
2897
2747
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2898
2748
|
/// to left-shift each value in operand \a __a.
|
|
2899
2749
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2900
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2901
|
-
|
|
2902
|
-
{
|
|
2750
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,
|
|
2751
|
+
__m128i __count) {
|
|
2903
2752
|
return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
|
|
2904
2753
|
}
|
|
2905
2754
|
|
|
@@ -2916,9 +2765,8 @@ _mm_sll_epi32(__m128i __a, __m128i __count)
|
|
|
2916
2765
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2917
2766
|
/// in operand \a __a.
|
|
2918
2767
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2919
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2920
|
-
|
|
2921
|
-
{
|
|
2768
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,
|
|
2769
|
+
int __count) {
|
|
2922
2770
|
return __builtin_ia32_psllqi128((__v2di)__a, __count);
|
|
2923
2771
|
}
|
|
2924
2772
|
|
|
@@ -2935,9 +2783,8 @@ _mm_slli_epi64(__m128i __a, int __count)
|
|
|
2935
2783
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2936
2784
|
/// to left-shift each value in operand \a __a.
|
|
2937
2785
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2938
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2939
|
-
|
|
2940
|
-
{
|
|
2786
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,
|
|
2787
|
+
__m128i __count) {
|
|
2941
2788
|
return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
|
|
2942
2789
|
}
|
|
2943
2790
|
|
|
@@ -2955,9 +2802,8 @@ _mm_sll_epi64(__m128i __a, __m128i __count)
|
|
|
2955
2802
|
/// An integer value specifying the number of bits to right-shift each value
|
|
2956
2803
|
/// in operand \a __a.
|
|
2957
2804
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2958
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2959
|
-
|
|
2960
|
-
{
|
|
2805
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,
|
|
2806
|
+
int __count) {
|
|
2961
2807
|
return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
|
|
2962
2808
|
}
|
|
2963
2809
|
|
|
@@ -2975,9 +2821,8 @@ _mm_srai_epi16(__m128i __a, int __count)
|
|
|
2975
2821
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2976
2822
|
/// to right-shift each value in operand \a __a.
|
|
2977
2823
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2978
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2979
|
-
|
|
2980
|
-
{
|
|
2824
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,
|
|
2825
|
+
__m128i __count) {
|
|
2981
2826
|
return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
|
|
2982
2827
|
}
|
|
2983
2828
|
|
|
@@ -2995,9 +2840,8 @@ _mm_sra_epi16(__m128i __a, __m128i __count)
|
|
|
2995
2840
|
/// An integer value specifying the number of bits to right-shift each value
|
|
2996
2841
|
/// in operand \a __a.
|
|
2997
2842
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2998
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2999
|
-
|
|
3000
|
-
{
|
|
2843
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,
|
|
2844
|
+
int __count) {
|
|
3001
2845
|
return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
|
|
3002
2846
|
}
|
|
3003
2847
|
|
|
@@ -3015,9 +2859,8 @@ _mm_srai_epi32(__m128i __a, int __count)
|
|
|
3015
2859
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3016
2860
|
/// to right-shift each value in operand \a __a.
|
|
3017
2861
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3018
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3019
|
-
|
|
3020
|
-
{
|
|
2862
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,
|
|
2863
|
+
__m128i __count) {
|
|
3021
2864
|
return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
|
|
3022
2865
|
}
|
|
3023
2866
|
|
|
@@ -3038,11 +2881,13 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
|
|
|
3038
2881
|
/// An immediate value specifying the number of bytes to right-shift operand
|
|
3039
2882
|
/// \a a.
|
|
3040
2883
|
/// \returns A 128-bit integer vector containing the right-shifted value.
|
|
3041
|
-
#define _mm_srli_si128(a, imm)
|
|
3042
|
-
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2884
|
+
#define _mm_srli_si128(a, imm) \
|
|
2885
|
+
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2886
|
+
(int)(imm)))
|
|
3043
2887
|
|
|
3044
|
-
#define _mm_bsrli_si128(a, imm)
|
|
3045
|
-
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2888
|
+
#define _mm_bsrli_si128(a, imm) \
|
|
2889
|
+
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2890
|
+
(int)(imm)))
|
|
3046
2891
|
|
|
3047
2892
|
/// Right-shifts each of 16-bit values in the 128-bit integer vector
|
|
3048
2893
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
@@ -3057,9 +2902,8 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
|
|
|
3057
2902
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3058
2903
|
/// in operand \a __a.
|
|
3059
2904
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3060
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3061
|
-
|
|
3062
|
-
{
|
|
2905
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,
|
|
2906
|
+
int __count) {
|
|
3063
2907
|
return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
|
|
3064
2908
|
}
|
|
3065
2909
|
|
|
@@ -3076,9 +2920,8 @@ _mm_srli_epi16(__m128i __a, int __count)
|
|
|
3076
2920
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3077
2921
|
/// to right-shift each value in operand \a __a.
|
|
3078
2922
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3079
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3080
|
-
|
|
3081
|
-
{
|
|
2923
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,
|
|
2924
|
+
__m128i __count) {
|
|
3082
2925
|
return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
|
|
3083
2926
|
}
|
|
3084
2927
|
|
|
@@ -3095,9 +2938,8 @@ _mm_srl_epi16(__m128i __a, __m128i __count)
|
|
|
3095
2938
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3096
2939
|
/// in operand \a __a.
|
|
3097
2940
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3098
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3099
|
-
|
|
3100
|
-
{
|
|
2941
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,
|
|
2942
|
+
int __count) {
|
|
3101
2943
|
return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
|
|
3102
2944
|
}
|
|
3103
2945
|
|
|
@@ -3114,9 +2956,8 @@ _mm_srli_epi32(__m128i __a, int __count)
|
|
|
3114
2956
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3115
2957
|
/// to right-shift each value in operand \a __a.
|
|
3116
2958
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3117
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3118
|
-
|
|
3119
|
-
{
|
|
2959
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,
|
|
2960
|
+
__m128i __count) {
|
|
3120
2961
|
return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
|
|
3121
2962
|
}
|
|
3122
2963
|
|
|
@@ -3133,9 +2974,8 @@ _mm_srl_epi32(__m128i __a, __m128i __count)
|
|
|
3133
2974
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3134
2975
|
/// in operand \a __a.
|
|
3135
2976
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3136
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3137
|
-
|
|
3138
|
-
{
|
|
2977
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,
|
|
2978
|
+
int __count) {
|
|
3139
2979
|
return __builtin_ia32_psrlqi128((__v2di)__a, __count);
|
|
3140
2980
|
}
|
|
3141
2981
|
|
|
@@ -3152,9 +2992,8 @@ _mm_srli_epi64(__m128i __a, int __count)
|
|
|
3152
2992
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3153
2993
|
/// to right-shift each value in operand \a __a.
|
|
3154
2994
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3155
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3156
|
-
|
|
3157
|
-
{
|
|
2995
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,
|
|
2996
|
+
__m128i __count) {
|
|
3158
2997
|
return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
|
|
3159
2998
|
}
|
|
3160
2999
|
|
|
@@ -3171,9 +3010,8 @@ _mm_srl_epi64(__m128i __a, __m128i __count)
|
|
|
3171
3010
|
/// \param __b
|
|
3172
3011
|
/// A 128-bit integer vector.
|
|
3173
3012
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3174
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3175
|
-
|
|
3176
|
-
{
|
|
3013
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,
|
|
3014
|
+
__m128i __b) {
|
|
3177
3015
|
return (__m128i)((__v16qi)__a == (__v16qi)__b);
|
|
3178
3016
|
}
|
|
3179
3017
|
|
|
@@ -3190,9 +3028,8 @@ _mm_cmpeq_epi8(__m128i __a, __m128i __b)
|
|
|
3190
3028
|
/// \param __b
|
|
3191
3029
|
/// A 128-bit integer vector.
|
|
3192
3030
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3193
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3194
|
-
|
|
3195
|
-
{
|
|
3031
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,
|
|
3032
|
+
__m128i __b) {
|
|
3196
3033
|
return (__m128i)((__v8hi)__a == (__v8hi)__b);
|
|
3197
3034
|
}
|
|
3198
3035
|
|
|
@@ -3209,9 +3046,8 @@ _mm_cmpeq_epi16(__m128i __a, __m128i __b)
|
|
|
3209
3046
|
/// \param __b
|
|
3210
3047
|
/// A 128-bit integer vector.
|
|
3211
3048
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3212
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3213
|
-
|
|
3214
|
-
{
|
|
3049
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,
|
|
3050
|
+
__m128i __b) {
|
|
3215
3051
|
return (__m128i)((__v4si)__a == (__v4si)__b);
|
|
3216
3052
|
}
|
|
3217
3053
|
|
|
@@ -3229,9 +3065,8 @@ _mm_cmpeq_epi32(__m128i __a, __m128i __b)
|
|
|
3229
3065
|
/// \param __b
|
|
3230
3066
|
/// A 128-bit integer vector.
|
|
3231
3067
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3232
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3233
|
-
|
|
3234
|
-
{
|
|
3068
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,
|
|
3069
|
+
__m128i __b) {
|
|
3235
3070
|
/* This function always performs a signed comparison, but __v16qi is a char
|
|
3236
3071
|
which may be signed or unsigned, so use __v16qs. */
|
|
3237
3072
|
return (__m128i)((__v16qs)__a > (__v16qs)__b);
|
|
@@ -3252,9 +3087,8 @@ _mm_cmpgt_epi8(__m128i __a, __m128i __b)
|
|
|
3252
3087
|
/// \param __b
|
|
3253
3088
|
/// A 128-bit integer vector.
|
|
3254
3089
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3255
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3256
|
-
|
|
3257
|
-
{
|
|
3090
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,
|
|
3091
|
+
__m128i __b) {
|
|
3258
3092
|
return (__m128i)((__v8hi)__a > (__v8hi)__b);
|
|
3259
3093
|
}
|
|
3260
3094
|
|
|
@@ -3273,9 +3107,8 @@ _mm_cmpgt_epi16(__m128i __a, __m128i __b)
|
|
|
3273
3107
|
/// \param __b
|
|
3274
3108
|
/// A 128-bit integer vector.
|
|
3275
3109
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3276
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3277
|
-
|
|
3278
|
-
{
|
|
3110
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,
|
|
3111
|
+
__m128i __b) {
|
|
3279
3112
|
return (__m128i)((__v4si)__a > (__v4si)__b);
|
|
3280
3113
|
}
|
|
3281
3114
|
|
|
@@ -3294,9 +3127,8 @@ _mm_cmpgt_epi32(__m128i __a, __m128i __b)
|
|
|
3294
3127
|
/// \param __b
|
|
3295
3128
|
/// A 128-bit integer vector.
|
|
3296
3129
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3297
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3298
|
-
|
|
3299
|
-
{
|
|
3130
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,
|
|
3131
|
+
__m128i __b) {
|
|
3300
3132
|
return _mm_cmpgt_epi8(__b, __a);
|
|
3301
3133
|
}
|
|
3302
3134
|
|
|
@@ -3315,9 +3147,8 @@ _mm_cmplt_epi8(__m128i __a, __m128i __b)
|
|
|
3315
3147
|
/// \param __b
|
|
3316
3148
|
/// A 128-bit integer vector.
|
|
3317
3149
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3318
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3319
|
-
|
|
3320
|
-
{
|
|
3150
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,
|
|
3151
|
+
__m128i __b) {
|
|
3321
3152
|
return _mm_cmpgt_epi16(__b, __a);
|
|
3322
3153
|
}
|
|
3323
3154
|
|
|
@@ -3336,9 +3167,8 @@ _mm_cmplt_epi16(__m128i __a, __m128i __b)
|
|
|
3336
3167
|
/// \param __b
|
|
3337
3168
|
/// A 128-bit integer vector.
|
|
3338
3169
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3339
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3340
|
-
|
|
3341
|
-
{
|
|
3170
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a,
|
|
3171
|
+
__m128i __b) {
|
|
3342
3172
|
return _mm_cmpgt_epi32(__b, __a);
|
|
3343
3173
|
}
|
|
3344
3174
|
|
|
@@ -3360,9 +3190,8 @@ _mm_cmplt_epi32(__m128i __a, __m128i __b)
|
|
|
3360
3190
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
3361
3191
|
/// converted value of the second operand. The upper 64 bits are copied from
|
|
3362
3192
|
/// the upper 64 bits of the first operand.
|
|
3363
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
3364
|
-
|
|
3365
|
-
{
|
|
3193
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi64_sd(__m128d __a,
|
|
3194
|
+
long long __b) {
|
|
3366
3195
|
__a[0] = __b;
|
|
3367
3196
|
return __a;
|
|
3368
3197
|
}
|
|
@@ -3378,9 +3207,7 @@ _mm_cvtsi64_sd(__m128d __a, long long __b)
|
|
|
3378
3207
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
3379
3208
|
/// conversion.
|
|
3380
3209
|
/// \returns A 64-bit signed integer containing the converted value.
|
|
3381
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3382
|
-
_mm_cvtsd_si64(__m128d __a)
|
|
3383
|
-
{
|
|
3210
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {
|
|
3384
3211
|
return __builtin_ia32_cvtsd2si64((__v2df)__a);
|
|
3385
3212
|
}
|
|
3386
3213
|
|
|
@@ -3396,9 +3223,7 @@ _mm_cvtsd_si64(__m128d __a)
|
|
|
3396
3223
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
3397
3224
|
/// conversion.
|
|
3398
3225
|
/// \returns A 64-bit signed integer containing the converted value.
|
|
3399
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3400
|
-
_mm_cvttsd_si64(__m128d __a)
|
|
3401
|
-
{
|
|
3226
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) {
|
|
3402
3227
|
return __builtin_ia32_cvttsd2si64((__v2df)__a);
|
|
3403
3228
|
}
|
|
3404
3229
|
#endif
|
|
@@ -3412,10 +3237,8 @@ _mm_cvttsd_si64(__m128d __a)
|
|
|
3412
3237
|
/// \param __a
|
|
3413
3238
|
/// A 128-bit integer vector.
|
|
3414
3239
|
/// \returns A 128-bit vector of [4 x float] containing the converted values.
|
|
3415
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
3416
|
-
|
|
3417
|
-
{
|
|
3418
|
-
return (__m128)__builtin_convertvector((__v4si)__a, __v4sf);
|
|
3240
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepi32_ps(__m128i __a) {
|
|
3241
|
+
return (__m128) __builtin_convertvector((__v4si)__a, __v4sf);
|
|
3419
3242
|
}
|
|
3420
3243
|
|
|
3421
3244
|
/// Converts a vector of [4 x float] into a vector of [4 x i32].
|
|
@@ -3428,9 +3251,7 @@ _mm_cvtepi32_ps(__m128i __a)
|
|
|
3428
3251
|
/// A 128-bit vector of [4 x float].
|
|
3429
3252
|
/// \returns A 128-bit integer vector of [4 x i32] containing the converted
|
|
3430
3253
|
/// values.
|
|
3431
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3432
|
-
_mm_cvtps_epi32(__m128 __a)
|
|
3433
|
-
{
|
|
3254
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {
|
|
3434
3255
|
return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
|
|
3435
3256
|
}
|
|
3436
3257
|
|
|
@@ -3445,9 +3266,7 @@ _mm_cvtps_epi32(__m128 __a)
|
|
|
3445
3266
|
/// \param __a
|
|
3446
3267
|
/// A 128-bit vector of [4 x float].
|
|
3447
3268
|
/// \returns A 128-bit vector of [4 x i32] containing the converted values.
|
|
3448
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3449
|
-
_mm_cvttps_epi32(__m128 __a)
|
|
3450
|
-
{
|
|
3269
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {
|
|
3451
3270
|
return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
|
|
3452
3271
|
}
|
|
3453
3272
|
|
|
@@ -3461,29 +3280,24 @@ _mm_cvttps_epi32(__m128 __a)
|
|
|
3461
3280
|
/// \param __a
|
|
3462
3281
|
/// A 32-bit signed integer operand.
|
|
3463
3282
|
/// \returns A 128-bit vector of [4 x i32].
|
|
3464
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3465
|
-
|
|
3466
|
-
{
|
|
3467
|
-
return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 };
|
|
3283
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
|
|
3284
|
+
return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
|
|
3468
3285
|
}
|
|
3469
3286
|
|
|
3470
|
-
#ifdef __x86_64__
|
|
3471
3287
|
/// Returns a vector of [2 x i64] where the lower element is the input
|
|
3472
3288
|
/// operand and the upper element is zero.
|
|
3473
3289
|
///
|
|
3474
3290
|
/// \headerfile <x86intrin.h>
|
|
3475
3291
|
///
|
|
3476
|
-
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
|
|
3292
|
+
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
|
|
3293
|
+
/// in 64-bit mode.
|
|
3477
3294
|
///
|
|
3478
3295
|
/// \param __a
|
|
3479
3296
|
/// A 64-bit signed integer operand containing the value to be converted.
|
|
3480
3297
|
/// \returns A 128-bit vector of [2 x i64] containing the converted value.
|
|
3481
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3482
|
-
|
|
3483
|
-
{
|
|
3484
|
-
return __extension__ (__m128i)(__v2di){ __a, 0 };
|
|
3298
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
|
|
3299
|
+
return __extension__(__m128i)(__v2di){__a, 0};
|
|
3485
3300
|
}
|
|
3486
|
-
#endif
|
|
3487
3301
|
|
|
3488
3302
|
/// Moves the least significant 32 bits of a vector of [4 x i32] to a
|
|
3489
3303
|
/// 32-bit signed integer value.
|
|
@@ -3496,14 +3310,11 @@ _mm_cvtsi64_si128(long long __a)
|
|
|
3496
3310
|
/// A vector of [4 x i32]. The least significant 32 bits are moved to the
|
|
3497
3311
|
/// destination.
|
|
3498
3312
|
/// \returns A 32-bit signed integer containing the moved value.
|
|
3499
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
3500
|
-
_mm_cvtsi128_si32(__m128i __a)
|
|
3501
|
-
{
|
|
3313
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
|
|
3502
3314
|
__v4si __b = (__v4si)__a;
|
|
3503
3315
|
return __b[0];
|
|
3504
3316
|
}
|
|
3505
3317
|
|
|
3506
|
-
#ifdef __x86_64__
|
|
3507
3318
|
/// Moves the least significant 64 bits of a vector of [2 x i64] to a
|
|
3508
3319
|
/// 64-bit signed integer value.
|
|
3509
3320
|
///
|
|
@@ -3515,12 +3326,9 @@ _mm_cvtsi128_si32(__m128i __a)
|
|
|
3515
3326
|
/// A vector of [2 x i64]. The least significant 64 bits are moved to the
|
|
3516
3327
|
/// destination.
|
|
3517
3328
|
/// \returns A 64-bit signed integer containing the moved value.
|
|
3518
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3519
|
-
_mm_cvtsi128_si64(__m128i __a)
|
|
3520
|
-
{
|
|
3329
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {
|
|
3521
3330
|
return __a[0];
|
|
3522
3331
|
}
|
|
3523
|
-
#endif
|
|
3524
3332
|
|
|
3525
3333
|
/// Moves packed integer values from an aligned 128-bit memory location
|
|
3526
3334
|
/// to elements in a 128-bit integer vector.
|
|
@@ -3533,8 +3341,7 @@ _mm_cvtsi128_si64(__m128i __a)
|
|
|
3533
3341
|
/// An aligned pointer to a memory location containing integer values.
|
|
3534
3342
|
/// \returns A 128-bit integer vector containing the moved values.
|
|
3535
3343
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3536
|
-
_mm_load_si128(__m128i const *__p)
|
|
3537
|
-
{
|
|
3344
|
+
_mm_load_si128(__m128i const *__p) {
|
|
3538
3345
|
return *__p;
|
|
3539
3346
|
}
|
|
3540
3347
|
|
|
@@ -3549,12 +3356,11 @@ _mm_load_si128(__m128i const *__p)
|
|
|
3549
3356
|
/// A pointer to a memory location containing integer values.
|
|
3550
3357
|
/// \returns A 128-bit integer vector containing the moved values.
|
|
3551
3358
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3552
|
-
_mm_loadu_si128(__m128i_u const *__p)
|
|
3553
|
-
{
|
|
3359
|
+
_mm_loadu_si128(__m128i_u const *__p) {
|
|
3554
3360
|
struct __loadu_si128 {
|
|
3555
3361
|
__m128i_u __v;
|
|
3556
3362
|
} __attribute__((__packed__, __may_alias__));
|
|
3557
|
-
return ((const struct __loadu_si128*)__p)->__v;
|
|
3363
|
+
return ((const struct __loadu_si128 *)__p)->__v;
|
|
3558
3364
|
}
|
|
3559
3365
|
|
|
3560
3366
|
/// Returns a vector of [2 x i64] where the lower element is taken from
|
|
@@ -3570,12 +3376,12 @@ _mm_loadu_si128(__m128i_u const *__p)
|
|
|
3570
3376
|
/// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
|
|
3571
3377
|
/// moved value. The higher order bits are cleared.
|
|
3572
3378
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3573
|
-
_mm_loadl_epi64(__m128i_u const *__p)
|
|
3574
|
-
{
|
|
3379
|
+
_mm_loadl_epi64(__m128i_u const *__p) {
|
|
3575
3380
|
struct __mm_loadl_epi64_struct {
|
|
3576
3381
|
long long __u;
|
|
3577
3382
|
} __attribute__((__packed__, __may_alias__));
|
|
3578
|
-
return __extension__
|
|
3383
|
+
return __extension__(__m128i){
|
|
3384
|
+
((const struct __mm_loadl_epi64_struct *)__p)->__u, 0};
|
|
3579
3385
|
}
|
|
3580
3386
|
|
|
3581
3387
|
/// Generates a 128-bit vector of [4 x i32] with unspecified content.
|
|
@@ -3587,9 +3393,7 @@ _mm_loadl_epi64(__m128i_u const *__p)
|
|
|
3587
3393
|
/// This intrinsic has no corresponding instruction.
|
|
3588
3394
|
///
|
|
3589
3395
|
/// \returns A 128-bit vector of [4 x i32] with unspecified content.
|
|
3590
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3591
|
-
_mm_undefined_si128(void)
|
|
3592
|
-
{
|
|
3396
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void) {
|
|
3593
3397
|
return (__m128i)__builtin_ia32_undef128();
|
|
3594
3398
|
}
|
|
3595
3399
|
|
|
@@ -3609,10 +3413,9 @@ _mm_undefined_si128(void)
|
|
|
3609
3413
|
/// destination vector of [2 x i64].
|
|
3610
3414
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
3611
3415
|
/// provided in the operands.
|
|
3612
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3613
|
-
|
|
3614
|
-
{
|
|
3615
|
-
return __extension__ (__m128i)(__v2di){ __q0, __q1 };
|
|
3416
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64x(long long __q1,
|
|
3417
|
+
long long __q0) {
|
|
3418
|
+
return __extension__(__m128i)(__v2di){__q0, __q1};
|
|
3616
3419
|
}
|
|
3617
3420
|
|
|
3618
3421
|
/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
|
|
@@ -3631,9 +3434,8 @@ _mm_set_epi64x(long long __q1, long long __q0)
|
|
|
3631
3434
|
/// destination vector of [2 x i64].
|
|
3632
3435
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
3633
3436
|
/// provided in the operands.
|
|
3634
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3635
|
-
|
|
3636
|
-
{
|
|
3437
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64(__m64 __q1,
|
|
3438
|
+
__m64 __q0) {
|
|
3637
3439
|
return _mm_set_epi64x((long long)__q1, (long long)__q0);
|
|
3638
3440
|
}
|
|
3639
3441
|
|
|
@@ -3659,10 +3461,9 @@ _mm_set_epi64(__m64 __q1, __m64 __q0)
|
|
|
3659
3461
|
/// vector.
|
|
3660
3462
|
/// \returns An initialized 128-bit vector of [4 x i32] containing the values
|
|
3661
3463
|
/// provided in the operands.
|
|
3662
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3663
|
-
|
|
3664
|
-
{
|
|
3665
|
-
return __extension__ (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
|
|
3464
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi32(int __i3, int __i2,
|
|
3465
|
+
int __i1, int __i0) {
|
|
3466
|
+
return __extension__(__m128i)(__v4si){__i0, __i1, __i2, __i3};
|
|
3666
3467
|
}
|
|
3667
3468
|
|
|
3668
3469
|
/// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
|
|
@@ -3700,9 +3501,10 @@ _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
|
|
|
3700
3501
|
/// \returns An initialized 128-bit vector of [8 x i16] containing the values
|
|
3701
3502
|
/// provided in the operands.
|
|
3702
3503
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3703
|
-
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
3704
|
-
{
|
|
3705
|
-
return __extension__
|
|
3504
|
+
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
3505
|
+
short __w2, short __w1, short __w0) {
|
|
3506
|
+
return __extension__(__m128i)(__v8hi){__w0, __w1, __w2, __w3,
|
|
3507
|
+
__w4, __w5, __w6, __w7};
|
|
3706
3508
|
}
|
|
3707
3509
|
|
|
3708
3510
|
/// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
|
|
@@ -3748,9 +3550,12 @@ _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short
|
|
|
3748
3550
|
/// \returns An initialized 128-bit vector of [16 x i8] containing the values
|
|
3749
3551
|
/// provided in the operands.
|
|
3750
3552
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3751
|
-
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
3752
|
-
|
|
3753
|
-
|
|
3553
|
+
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
3554
|
+
char __b10, char __b9, char __b8, char __b7, char __b6, char __b5,
|
|
3555
|
+
char __b4, char __b3, char __b2, char __b1, char __b0) {
|
|
3556
|
+
return __extension__(__m128i)(__v16qi){
|
|
3557
|
+
__b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7,
|
|
3558
|
+
__b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15};
|
|
3754
3559
|
}
|
|
3755
3560
|
|
|
3756
3561
|
/// Initializes both values in a 128-bit integer vector with the
|
|
@@ -3766,9 +3571,7 @@ _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __
|
|
|
3766
3571
|
/// vector.
|
|
3767
3572
|
/// \returns An initialized 128-bit integer vector of [2 x i64] with both
|
|
3768
3573
|
/// elements containing the value provided in the operand.
|
|
3769
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3770
|
-
_mm_set1_epi64x(long long __q)
|
|
3771
|
-
{
|
|
3574
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64x(long long __q) {
|
|
3772
3575
|
return _mm_set_epi64x(__q, __q);
|
|
3773
3576
|
}
|
|
3774
3577
|
|
|
@@ -3785,9 +3588,7 @@ _mm_set1_epi64x(long long __q)
|
|
|
3785
3588
|
/// vector.
|
|
3786
3589
|
/// \returns An initialized 128-bit vector of [2 x i64] with all elements
|
|
3787
3590
|
/// containing the value provided in the operand.
|
|
3788
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3789
|
-
_mm_set1_epi64(__m64 __q)
|
|
3790
|
-
{
|
|
3591
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64(__m64 __q) {
|
|
3791
3592
|
return _mm_set_epi64(__q, __q);
|
|
3792
3593
|
}
|
|
3793
3594
|
|
|
@@ -3804,9 +3605,7 @@ _mm_set1_epi64(__m64 __q)
|
|
|
3804
3605
|
/// vector.
|
|
3805
3606
|
/// \returns An initialized 128-bit vector of [4 x i32] with all elements
|
|
3806
3607
|
/// containing the value provided in the operand.
|
|
3807
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3808
|
-
_mm_set1_epi32(int __i)
|
|
3809
|
-
{
|
|
3608
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi32(int __i) {
|
|
3810
3609
|
return _mm_set_epi32(__i, __i, __i, __i);
|
|
3811
3610
|
}
|
|
3812
3611
|
|
|
@@ -3823,9 +3622,7 @@ _mm_set1_epi32(int __i)
|
|
|
3823
3622
|
/// vector.
|
|
3824
3623
|
/// \returns An initialized 128-bit vector of [8 x i16] with all elements
|
|
3825
3624
|
/// containing the value provided in the operand.
|
|
3826
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3827
|
-
_mm_set1_epi16(short __w)
|
|
3828
|
-
{
|
|
3625
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi16(short __w) {
|
|
3829
3626
|
return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);
|
|
3830
3627
|
}
|
|
3831
3628
|
|
|
@@ -3842,10 +3639,9 @@ _mm_set1_epi16(short __w)
|
|
|
3842
3639
|
/// vector.
|
|
3843
3640
|
/// \returns An initialized 128-bit vector of [16 x i8] with all elements
|
|
3844
3641
|
/// containing the value provided in the operand.
|
|
3845
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3846
|
-
|
|
3847
|
-
|
|
3848
|
-
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b);
|
|
3642
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi8(char __b) {
|
|
3643
|
+
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b,
|
|
3644
|
+
__b, __b, __b, __b, __b);
|
|
3849
3645
|
}
|
|
3850
3646
|
|
|
3851
3647
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
|
@@ -3862,9 +3658,8 @@ _mm_set1_epi8(char __b)
|
|
|
3862
3658
|
/// A 64-bit integral value used to initialize the upper 64 bits of the
|
|
3863
3659
|
/// result.
|
|
3864
3660
|
/// \returns An initialized 128-bit integer vector.
|
|
3865
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3866
|
-
|
|
3867
|
-
{
|
|
3661
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi64(__m64 __q0,
|
|
3662
|
+
__m64 __q1) {
|
|
3868
3663
|
return _mm_set_epi64(__q1, __q0);
|
|
3869
3664
|
}
|
|
3870
3665
|
|
|
@@ -3885,9 +3680,9 @@ _mm_setr_epi64(__m64 __q0, __m64 __q1)
|
|
|
3885
3680
|
/// \param __i3
|
|
3886
3681
|
/// A 32-bit integral value used to initialize bits [127:96] of the result.
|
|
3887
3682
|
/// \returns An initialized 128-bit integer vector.
|
|
3888
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3889
|
-
|
|
3890
|
-
{
|
|
3683
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi32(int __i0, int __i1,
|
|
3684
|
+
int __i2,
|
|
3685
|
+
int __i3) {
|
|
3891
3686
|
return _mm_set_epi32(__i3, __i2, __i1, __i0);
|
|
3892
3687
|
}
|
|
3893
3688
|
|
|
@@ -3917,8 +3712,8 @@ _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
|
|
|
3917
3712
|
/// A 16-bit integral value used to initialize bits [127:112] of the result.
|
|
3918
3713
|
/// \returns An initialized 128-bit integer vector.
|
|
3919
3714
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3920
|
-
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
3921
|
-
{
|
|
3715
|
+
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
3716
|
+
short __w5, short __w6, short __w7) {
|
|
3922
3717
|
return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);
|
|
3923
3718
|
}
|
|
3924
3719
|
|
|
@@ -3964,9 +3759,11 @@ _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short
|
|
|
3964
3759
|
/// An 8-bit integral value used to initialize bits [127:120] of the result.
|
|
3965
3760
|
/// \returns An initialized 128-bit integer vector.
|
|
3966
3761
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3967
|
-
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
3968
|
-
|
|
3969
|
-
|
|
3762
|
+
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
3763
|
+
char __b6, char __b7, char __b8, char __b9, char __b10,
|
|
3764
|
+
char __b11, char __b12, char __b13, char __b14, char __b15) {
|
|
3765
|
+
return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8,
|
|
3766
|
+
__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
|
|
3970
3767
|
}
|
|
3971
3768
|
|
|
3972
3769
|
/// Creates a 128-bit integer vector initialized to zero.
|
|
@@ -3977,10 +3774,8 @@ _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
|
3977
3774
|
///
|
|
3978
3775
|
/// \returns An initialized 128-bit integer vector with all elements set to
|
|
3979
3776
|
/// zero.
|
|
3980
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3981
|
-
|
|
3982
|
-
{
|
|
3983
|
-
return __extension__ (__m128i)(__v2di){ 0LL, 0LL };
|
|
3777
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setzero_si128(void) {
|
|
3778
|
+
return __extension__(__m128i)(__v2di){0LL, 0LL};
|
|
3984
3779
|
}
|
|
3985
3780
|
|
|
3986
3781
|
/// Stores a 128-bit integer vector to a memory location aligned on a
|
|
@@ -3995,9 +3790,8 @@ _mm_setzero_si128(void)
|
|
|
3995
3790
|
/// values.
|
|
3996
3791
|
/// \param __b
|
|
3997
3792
|
/// A 128-bit integer vector containing the values to be moved.
|
|
3998
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
3999
|
-
|
|
4000
|
-
{
|
|
3793
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_si128(__m128i *__p,
|
|
3794
|
+
__m128i __b) {
|
|
4001
3795
|
*__p = __b;
|
|
4002
3796
|
}
|
|
4003
3797
|
|
|
@@ -4011,13 +3805,12 @@ _mm_store_si128(__m128i *__p, __m128i __b)
|
|
|
4011
3805
|
/// A pointer to a memory location that will receive the integer values.
|
|
4012
3806
|
/// \param __b
|
|
4013
3807
|
/// A 128-bit integer vector containing the values to be moved.
|
|
4014
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4015
|
-
|
|
4016
|
-
{
|
|
3808
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si128(__m128i_u *__p,
|
|
3809
|
+
__m128i __b) {
|
|
4017
3810
|
struct __storeu_si128 {
|
|
4018
3811
|
__m128i_u __v;
|
|
4019
3812
|
} __attribute__((__packed__, __may_alias__));
|
|
4020
|
-
((struct __storeu_si128*)__p)->__v = __b;
|
|
3813
|
+
((struct __storeu_si128 *)__p)->__v = __b;
|
|
4021
3814
|
}
|
|
4022
3815
|
|
|
4023
3816
|
/// Stores a 64-bit integer value from the low element of a 128-bit integer
|
|
@@ -4032,13 +3825,12 @@ _mm_storeu_si128(__m128i_u *__p, __m128i __b)
|
|
|
4032
3825
|
/// location does not have to be aligned.
|
|
4033
3826
|
/// \param __b
|
|
4034
3827
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4035
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4036
|
-
|
|
4037
|
-
{
|
|
3828
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si64(void *__p,
|
|
3829
|
+
__m128i __b) {
|
|
4038
3830
|
struct __storeu_si64 {
|
|
4039
3831
|
long long __v;
|
|
4040
3832
|
} __attribute__((__packed__, __may_alias__));
|
|
4041
|
-
((struct __storeu_si64*)__p)->__v = ((__v2di)__b)[0];
|
|
3833
|
+
((struct __storeu_si64 *)__p)->__v = ((__v2di)__b)[0];
|
|
4042
3834
|
}
|
|
4043
3835
|
|
|
4044
3836
|
/// Stores a 32-bit integer value from the low element of a 128-bit integer
|
|
@@ -4053,13 +3845,12 @@ _mm_storeu_si64(void *__p, __m128i __b)
|
|
|
4053
3845
|
/// location does not have to be aligned.
|
|
4054
3846
|
/// \param __b
|
|
4055
3847
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4056
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4057
|
-
|
|
4058
|
-
{
|
|
3848
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si32(void *__p,
|
|
3849
|
+
__m128i __b) {
|
|
4059
3850
|
struct __storeu_si32 {
|
|
4060
3851
|
int __v;
|
|
4061
3852
|
} __attribute__((__packed__, __may_alias__));
|
|
4062
|
-
((struct __storeu_si32*)__p)->__v = ((__v4si)__b)[0];
|
|
3853
|
+
((struct __storeu_si32 *)__p)->__v = ((__v4si)__b)[0];
|
|
4063
3854
|
}
|
|
4064
3855
|
|
|
4065
3856
|
/// Stores a 16-bit integer value from the low element of a 128-bit integer
|
|
@@ -4074,13 +3865,12 @@ _mm_storeu_si32(void *__p, __m128i __b)
|
|
|
4074
3865
|
/// location does not have to be aligned.
|
|
4075
3866
|
/// \param __b
|
|
4076
3867
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4077
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4078
|
-
|
|
4079
|
-
{
|
|
3868
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si16(void *__p,
|
|
3869
|
+
__m128i __b) {
|
|
4080
3870
|
struct __storeu_si16 {
|
|
4081
3871
|
short __v;
|
|
4082
3872
|
} __attribute__((__packed__, __may_alias__));
|
|
4083
|
-
((struct __storeu_si16*)__p)->__v = ((__v8hi)__b)[0];
|
|
3873
|
+
((struct __storeu_si16 *)__p)->__v = ((__v8hi)__b)[0];
|
|
4084
3874
|
}
|
|
4085
3875
|
|
|
4086
3876
|
/// Moves bytes selected by the mask from the first operand to the
|
|
@@ -4104,9 +3894,9 @@ _mm_storeu_si16(void *__p, __m128i __b)
|
|
|
4104
3894
|
/// \param __p
|
|
4105
3895
|
/// A pointer to an unaligned 128-bit memory location where the specified
|
|
4106
3896
|
/// values are moved.
|
|
4107
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4108
|
-
|
|
4109
|
-
{
|
|
3897
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_maskmoveu_si128(__m128i __d,
|
|
3898
|
+
__m128i __n,
|
|
3899
|
+
char *__p) {
|
|
4110
3900
|
__builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
|
|
4111
3901
|
}
|
|
4112
3902
|
|
|
@@ -4123,13 +3913,12 @@ _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
|
|
|
4123
3913
|
/// \param __a
|
|
4124
3914
|
/// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
|
|
4125
3915
|
/// value to be stored.
|
|
4126
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4127
|
-
|
|
4128
|
-
{
|
|
3916
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_epi64(__m128i_u *__p,
|
|
3917
|
+
__m128i __a) {
|
|
4129
3918
|
struct __mm_storel_epi64_struct {
|
|
4130
3919
|
long long __u;
|
|
4131
3920
|
} __attribute__((__packed__, __may_alias__));
|
|
4132
|
-
((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
|
|
3921
|
+
((struct __mm_storel_epi64_struct *)__p)->__u = __a[0];
|
|
4133
3922
|
}
|
|
4134
3923
|
|
|
4135
3924
|
/// Stores a 128-bit floating point vector of [2 x double] to a 128-bit
|
|
@@ -4146,10 +3935,9 @@ _mm_storel_epi64(__m128i_u *__p, __m128i __a)
|
|
|
4146
3935
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
4147
3936
|
/// \param __a
|
|
4148
3937
|
/// A vector of [2 x double] containing the 64-bit values to be stored.
|
|
4149
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4150
|
-
|
|
4151
|
-
|
|
4152
|
-
__builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
|
|
3938
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_pd(double *__p,
|
|
3939
|
+
__m128d __a) {
|
|
3940
|
+
__builtin_nontemporal_store((__v2df)__a, (__v2df *)__p);
|
|
4153
3941
|
}
|
|
4154
3942
|
|
|
4155
3943
|
/// Stores a 128-bit integer vector to a 128-bit aligned memory location.
|
|
@@ -4165,10 +3953,9 @@ _mm_stream_pd(double *__p, __m128d __a)
|
|
|
4165
3953
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
4166
3954
|
/// \param __a
|
|
4167
3955
|
/// A 128-bit integer vector containing the values to be stored.
|
|
4168
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4169
|
-
|
|
4170
|
-
|
|
4171
|
-
__builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
|
|
3956
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_si128(__m128i *__p,
|
|
3957
|
+
__m128i __a) {
|
|
3958
|
+
__builtin_nontemporal_store((__v2di)__a, (__v2di *)__p);
|
|
4172
3959
|
}
|
|
4173
3960
|
|
|
4174
3961
|
/// Stores a 32-bit integer value in the specified memory location.
|
|
@@ -4184,9 +3971,9 @@ _mm_stream_si128(__m128i *__p, __m128i __a)
|
|
|
4184
3971
|
/// A pointer to the 32-bit memory location used to store the value.
|
|
4185
3972
|
/// \param __a
|
|
4186
3973
|
/// A 32-bit integer containing the value to be stored.
|
|
4187
|
-
static __inline__ void
|
|
4188
|
-
|
|
4189
|
-
{
|
|
3974
|
+
static __inline__ void
|
|
3975
|
+
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
3976
|
+
_mm_stream_si32(int *__p, int __a) {
|
|
4190
3977
|
__builtin_ia32_movnti(__p, __a);
|
|
4191
3978
|
}
|
|
4192
3979
|
|
|
@@ -4204,9 +3991,9 @@ _mm_stream_si32(int *__p, int __a)
|
|
|
4204
3991
|
/// A pointer to the 64-bit memory location used to store the value.
|
|
4205
3992
|
/// \param __a
|
|
4206
3993
|
/// A 64-bit integer containing the value to be stored.
|
|
4207
|
-
static __inline__ void
|
|
4208
|
-
|
|
4209
|
-
{
|
|
3994
|
+
static __inline__ void
|
|
3995
|
+
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
3996
|
+
_mm_stream_si64(long long *__p, long long __a) {
|
|
4210
3997
|
__builtin_ia32_movnti64(__p, __a);
|
|
4211
3998
|
}
|
|
4212
3999
|
#endif
|
|
@@ -4225,7 +4012,7 @@ extern "C" {
|
|
|
4225
4012
|
/// \param __p
|
|
4226
4013
|
/// A pointer to the memory location used to identify the cache line to be
|
|
4227
4014
|
/// flushed.
|
|
4228
|
-
void _mm_clflush(void const *
|
|
4015
|
+
void _mm_clflush(void const *__p);
|
|
4229
4016
|
|
|
4230
4017
|
/// Forces strong memory ordering (serialization) between load
|
|
4231
4018
|
/// instructions preceding this instruction and load instructions following
|
|
@@ -4275,9 +4062,8 @@ void _mm_mfence(void);
|
|
|
4275
4062
|
/// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
|
|
4276
4063
|
/// written to the higher 64 bits of the result.
|
|
4277
4064
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
|
4278
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4279
|
-
|
|
4280
|
-
{
|
|
4065
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,
|
|
4066
|
+
__m128i __b) {
|
|
4281
4067
|
return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
|
|
4282
4068
|
}
|
|
4283
4069
|
|
|
@@ -4303,9 +4089,8 @@ _mm_packs_epi16(__m128i __a, __m128i __b)
|
|
|
4303
4089
|
/// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
|
|
4304
4090
|
/// are written to the higher 64 bits of the result.
|
|
4305
4091
|
/// \returns A 128-bit vector of [8 x i16] containing the converted values.
|
|
4306
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4307
|
-
|
|
4308
|
-
{
|
|
4092
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,
|
|
4093
|
+
__m128i __b) {
|
|
4309
4094
|
return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
|
|
4310
4095
|
}
|
|
4311
4096
|
|
|
@@ -4331,9 +4116,8 @@ _mm_packs_epi32(__m128i __a, __m128i __b)
|
|
|
4331
4116
|
/// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
|
|
4332
4117
|
/// written to the higher 64 bits of the result.
|
|
4333
4118
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
|
4334
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4335
|
-
|
|
4336
|
-
{
|
|
4119
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,
|
|
4120
|
+
__m128i __b) {
|
|
4337
4121
|
return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
|
|
4338
4122
|
}
|
|
4339
4123
|
|
|
@@ -4342,25 +4126,29 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4342
4126
|
///
|
|
4343
4127
|
/// \headerfile <x86intrin.h>
|
|
4344
4128
|
///
|
|
4129
|
+
/// \code
|
|
4130
|
+
/// __m128i _mm_extract_epi16(__m128i a, const int imm);
|
|
4131
|
+
/// \endcode
|
|
4132
|
+
///
|
|
4345
4133
|
/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
|
|
4346
4134
|
///
|
|
4347
|
-
/// \param
|
|
4135
|
+
/// \param a
|
|
4348
4136
|
/// A 128-bit integer vector.
|
|
4349
|
-
/// \param
|
|
4350
|
-
/// An immediate value. Bits [2:0] selects values from \a
|
|
4137
|
+
/// \param imm
|
|
4138
|
+
/// An immediate value. Bits [2:0] selects values from \a a to be assigned
|
|
4351
4139
|
/// to bits[15:0] of the result. \n
|
|
4352
|
-
/// 000: assign values from bits [15:0] of \a
|
|
4353
|
-
/// 001: assign values from bits [31:16] of \a
|
|
4354
|
-
/// 010: assign values from bits [47:32] of \a
|
|
4355
|
-
/// 011: assign values from bits [63:48] of \a
|
|
4356
|
-
/// 100: assign values from bits [79:64] of \a
|
|
4357
|
-
/// 101: assign values from bits [95:80] of \a
|
|
4358
|
-
/// 110: assign values from bits [111:96] of \a
|
|
4359
|
-
/// 111: assign values from bits [127:112] of \a
|
|
4140
|
+
/// 000: assign values from bits [15:0] of \a a. \n
|
|
4141
|
+
/// 001: assign values from bits [31:16] of \a a. \n
|
|
4142
|
+
/// 010: assign values from bits [47:32] of \a a. \n
|
|
4143
|
+
/// 011: assign values from bits [63:48] of \a a. \n
|
|
4144
|
+
/// 100: assign values from bits [79:64] of \a a. \n
|
|
4145
|
+
/// 101: assign values from bits [95:80] of \a a. \n
|
|
4146
|
+
/// 110: assign values from bits [111:96] of \a a. \n
|
|
4147
|
+
/// 111: assign values from bits [127:112] of \a a.
|
|
4360
4148
|
/// \returns An integer, whose lower 16 bits are selected from the 128-bit
|
|
4361
4149
|
/// integer vector parameter and the remaining bits are assigned zeros.
|
|
4362
|
-
#define _mm_extract_epi16(a, imm)
|
|
4363
|
-
((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a),
|
|
4150
|
+
#define _mm_extract_epi16(a, imm) \
|
|
4151
|
+
((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \
|
|
4364
4152
|
(int)(imm)))
|
|
4365
4153
|
|
|
4366
4154
|
/// Constructs a 128-bit integer vector by first making a copy of the
|
|
@@ -4370,21 +4158,25 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4370
4158
|
///
|
|
4371
4159
|
/// \headerfile <x86intrin.h>
|
|
4372
4160
|
///
|
|
4161
|
+
/// \code
|
|
4162
|
+
/// __m128i _mm_insert_epi16(__m128i a, int b, const int imm);
|
|
4163
|
+
/// \endcode
|
|
4164
|
+
///
|
|
4373
4165
|
/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
|
|
4374
4166
|
///
|
|
4375
|
-
/// \param
|
|
4167
|
+
/// \param a
|
|
4376
4168
|
/// A 128-bit integer vector of [8 x i16]. This vector is copied to the
|
|
4377
4169
|
/// result and then one of the eight elements in the result is replaced by
|
|
4378
|
-
/// the lower 16 bits of \a
|
|
4379
|
-
/// \param
|
|
4170
|
+
/// the lower 16 bits of \a b.
|
|
4171
|
+
/// \param b
|
|
4380
4172
|
/// An integer. The lower 16 bits of this parameter are written to the
|
|
4381
|
-
/// result beginning at an offset specified by \a
|
|
4382
|
-
/// \param
|
|
4173
|
+
/// result beginning at an offset specified by \a imm.
|
|
4174
|
+
/// \param imm
|
|
4383
4175
|
/// An immediate value specifying the bit offset in the result at which the
|
|
4384
|
-
/// lower 16 bits of \a
|
|
4176
|
+
/// lower 16 bits of \a b are written.
|
|
4385
4177
|
/// \returns A 128-bit integer vector containing the constructed values.
|
|
4386
|
-
#define _mm_insert_epi16(a, b, imm)
|
|
4387
|
-
((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b),
|
|
4178
|
+
#define _mm_insert_epi16(a, b, imm) \
|
|
4179
|
+
((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \
|
|
4388
4180
|
(int)(imm)))
|
|
4389
4181
|
|
|
4390
4182
|
/// Copies the values of the most significant bits from each 8-bit
|
|
@@ -4399,9 +4191,7 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4399
4191
|
/// A 128-bit integer vector containing the values with bits to be extracted.
|
|
4400
4192
|
/// \returns The most significant bits from each 8-bit element in \a __a,
|
|
4401
4193
|
/// written to bits [15:0]. The other bits are assigned zeros.
|
|
4402
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
4403
|
-
_mm_movemask_epi8(__m128i __a)
|
|
4404
|
-
{
|
|
4194
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {
|
|
4405
4195
|
return __builtin_ia32_pmovmskb128((__v16qi)__a);
|
|
4406
4196
|
}
|
|
4407
4197
|
|
|
@@ -4431,9 +4221,12 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4431
4221
|
/// 00: assign values from bits [31:0] of \a a. \n
|
|
4432
4222
|
/// 01: assign values from bits [63:32] of \a a. \n
|
|
4433
4223
|
/// 10: assign values from bits [95:64] of \a a. \n
|
|
4434
|
-
/// 11: assign values from bits [127:96] of \a a.
|
|
4224
|
+
/// 11: assign values from bits [127:96] of \a a. \n
|
|
4225
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4226
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4227
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4435
4228
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4436
|
-
#define _mm_shuffle_epi32(a, imm)
|
|
4229
|
+
#define _mm_shuffle_epi32(a, imm) \
|
|
4437
4230
|
((__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm)))
|
|
4438
4231
|
|
|
4439
4232
|
/// Constructs a 128-bit integer vector by shuffling four lower 16-bit
|
|
@@ -4462,8 +4255,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4462
4255
|
/// 01: assign values from bits [31:16] of \a a. \n
|
|
4463
4256
|
/// 10: assign values from bits [47:32] of \a a. \n
|
|
4464
4257
|
/// 11: assign values from bits [63:48] of \a a. \n
|
|
4258
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4259
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4260
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4465
4261
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4466
|
-
#define _mm_shufflelo_epi16(a, imm)
|
|
4262
|
+
#define _mm_shufflelo_epi16(a, imm) \
|
|
4467
4263
|
((__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm)))
|
|
4468
4264
|
|
|
4469
4265
|
/// Constructs a 128-bit integer vector by shuffling four upper 16-bit
|
|
@@ -4492,8 +4288,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4492
4288
|
/// 01: assign values from bits [95:80] of \a a. \n
|
|
4493
4289
|
/// 10: assign values from bits [111:96] of \a a. \n
|
|
4494
4290
|
/// 11: assign values from bits [127:112] of \a a. \n
|
|
4291
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4292
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4293
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4495
4294
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4496
|
-
#define _mm_shufflehi_epi16(a, imm)
|
|
4295
|
+
#define _mm_shufflehi_epi16(a, imm) \
|
|
4497
4296
|
((__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm)))
|
|
4498
4297
|
|
|
4499
4298
|
/// Unpacks the high-order (index 8-15) values from two 128-bit vectors
|
|
@@ -4525,10 +4324,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4525
4324
|
/// Bits [119:112] are written to bits [111:104] of the result. \n
|
|
4526
4325
|
/// Bits [127:120] are written to bits [127:120] of the result.
|
|
4527
4326
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
|
4528
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4529
|
-
|
|
4530
|
-
|
|
4531
|
-
|
|
4327
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,
|
|
4328
|
+
__m128i __b) {
|
|
4329
|
+
return (__m128i)__builtin_shufflevector(
|
|
4330
|
+
(__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,
|
|
4331
|
+
16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);
|
|
4532
4332
|
}
|
|
4533
4333
|
|
|
4534
4334
|
/// Unpacks the high-order (index 4-7) values from two 128-bit vectors of
|
|
@@ -4552,10 +4352,10 @@ _mm_unpackhi_epi8(__m128i __a, __m128i __b)
|
|
|
4552
4352
|
/// Bits [111:96] are written to bits [95:80] of the result. \n
|
|
4553
4353
|
/// Bits [127:112] are written to bits [127:112] of the result.
|
|
4554
4354
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
|
4555
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4556
|
-
|
|
4557
|
-
|
|
4558
|
-
|
|
4355
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,
|
|
4356
|
+
__m128i __b) {
|
|
4357
|
+
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,
|
|
4358
|
+
8 + 5, 6, 8 + 6, 7, 8 + 7);
|
|
4559
4359
|
}
|
|
4560
4360
|
|
|
4561
4361
|
/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
|
|
@@ -4575,10 +4375,10 @@ _mm_unpackhi_epi16(__m128i __a, __m128i __b)
|
|
|
4575
4375
|
/// Bits [95:64] are written to bits [64:32] of the destination. \n
|
|
4576
4376
|
/// Bits [127:96] are written to bits [127:96] of the destination.
|
|
4577
4377
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
|
4578
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4579
|
-
|
|
4580
|
-
|
|
4581
|
-
|
|
4378
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,
|
|
4379
|
+
__m128i __b) {
|
|
4380
|
+
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,
|
|
4381
|
+
4 + 3);
|
|
4582
4382
|
}
|
|
4583
4383
|
|
|
4584
4384
|
/// Unpacks the high-order 64-bit elements from two 128-bit vectors of
|
|
@@ -4596,10 +4396,9 @@ _mm_unpackhi_epi32(__m128i __a, __m128i __b)
|
|
|
4596
4396
|
/// A 128-bit vector of [2 x i64]. \n
|
|
4597
4397
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
4598
4398
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
|
4599
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4600
|
-
|
|
4601
|
-
|
|
4602
|
-
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
|
|
4399
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,
|
|
4400
|
+
__m128i __b) {
|
|
4401
|
+
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);
|
|
4603
4402
|
}
|
|
4604
4403
|
|
|
4605
4404
|
/// Unpacks the low-order (index 0-7) values from two 128-bit vectors of
|
|
@@ -4631,10 +4430,11 @@ _mm_unpackhi_epi64(__m128i __a, __m128i __b)
|
|
|
4631
4430
|
/// Bits [55:48] are written to bits [111:104] of the result. \n
|
|
4632
4431
|
/// Bits [63:56] are written to bits [127:120] of the result.
|
|
4633
4432
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
|
4634
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4635
|
-
|
|
4636
|
-
|
|
4637
|
-
|
|
4433
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,
|
|
4434
|
+
__m128i __b) {
|
|
4435
|
+
return (__m128i)__builtin_shufflevector(
|
|
4436
|
+
(__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,
|
|
4437
|
+
16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);
|
|
4638
4438
|
}
|
|
4639
4439
|
|
|
4640
4440
|
/// Unpacks the low-order (index 0-3) values from each of the two 128-bit
|
|
@@ -4659,10 +4459,10 @@ _mm_unpacklo_epi8(__m128i __a, __m128i __b)
|
|
|
4659
4459
|
/// Bits [47:32] are written to bits [95:80] of the result. \n
|
|
4660
4460
|
/// Bits [63:48] are written to bits [127:112] of the result.
|
|
4661
4461
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
|
4662
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4663
|
-
|
|
4664
|
-
|
|
4665
|
-
|
|
4462
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,
|
|
4463
|
+
__m128i __b) {
|
|
4464
|
+
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,
|
|
4465
|
+
8 + 1, 2, 8 + 2, 3, 8 + 3);
|
|
4666
4466
|
}
|
|
4667
4467
|
|
|
4668
4468
|
/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
|
|
@@ -4682,10 +4482,10 @@ _mm_unpacklo_epi16(__m128i __a, __m128i __b)
|
|
|
4682
4482
|
/// Bits [31:0] are written to bits [64:32] of the destination. \n
|
|
4683
4483
|
/// Bits [63:32] are written to bits [127:96] of the destination.
|
|
4684
4484
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
|
4685
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4686
|
-
|
|
4687
|
-
|
|
4688
|
-
|
|
4485
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,
|
|
4486
|
+
__m128i __b) {
|
|
4487
|
+
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,
|
|
4488
|
+
4 + 1);
|
|
4689
4489
|
}
|
|
4690
4490
|
|
|
4691
4491
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors of
|
|
@@ -4703,10 +4503,9 @@ _mm_unpacklo_epi32(__m128i __a, __m128i __b)
|
|
|
4703
4503
|
/// A 128-bit vector of [2 x i64]. \n
|
|
4704
4504
|
/// Bits [63:0] are written to bits [127:64] of the destination. \n
|
|
4705
4505
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
|
4706
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4707
|
-
|
|
4708
|
-
|
|
4709
|
-
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
|
|
4506
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a,
|
|
4507
|
+
__m128i __b) {
|
|
4508
|
+
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);
|
|
4710
4509
|
}
|
|
4711
4510
|
|
|
4712
4511
|
/// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
|
|
@@ -4720,9 +4519,7 @@ _mm_unpacklo_epi64(__m128i __a, __m128i __b)
|
|
|
4720
4519
|
/// A 128-bit integer vector operand. The lower 64 bits are moved to the
|
|
4721
4520
|
/// destination.
|
|
4722
4521
|
/// \returns A 64-bit integer containing the lower 64 bits of the parameter.
|
|
4723
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS
|
|
4724
|
-
_mm_movepi64_pi64(__m128i __a)
|
|
4725
|
-
{
|
|
4522
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_movepi64_pi64(__m128i __a) {
|
|
4726
4523
|
return (__m64)__a[0];
|
|
4727
4524
|
}
|
|
4728
4525
|
|
|
@@ -4737,10 +4534,8 @@ _mm_movepi64_pi64(__m128i __a)
|
|
|
4737
4534
|
/// A 64-bit value.
|
|
4738
4535
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
4739
4536
|
/// the operand. The upper 64 bits are assigned zeros.
|
|
4740
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4741
|
-
|
|
4742
|
-
{
|
|
4743
|
-
return __extension__ (__m128i)(__v2di){ (long long)__a, 0 };
|
|
4537
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movpi64_epi64(__m64 __a) {
|
|
4538
|
+
return __extension__(__m128i)(__v2di){(long long)__a, 0};
|
|
4744
4539
|
}
|
|
4745
4540
|
|
|
4746
4541
|
/// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
|
|
@@ -4755,9 +4550,7 @@ _mm_movpi64_epi64(__m64 __a)
|
|
|
4755
4550
|
/// destination.
|
|
4756
4551
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
4757
4552
|
/// the operand. The upper 64 bits are assigned zeros.
|
|
4758
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4759
|
-
_mm_move_epi64(__m128i __a)
|
|
4760
|
-
{
|
|
4553
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_move_epi64(__m128i __a) {
|
|
4761
4554
|
return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);
|
|
4762
4555
|
}
|
|
4763
4556
|
|
|
@@ -4776,10 +4569,9 @@ _mm_move_epi64(__m128i __a)
|
|
|
4776
4569
|
/// A 128-bit vector of [2 x double]. \n
|
|
4777
4570
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
4778
4571
|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
|
4779
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4780
|
-
|
|
4781
|
-
|
|
4782
|
-
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
|
|
4572
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpackhi_pd(__m128d __a,
|
|
4573
|
+
__m128d __b) {
|
|
4574
|
+
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2 + 1);
|
|
4783
4575
|
}
|
|
4784
4576
|
|
|
4785
4577
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors
|
|
@@ -4797,10 +4589,9 @@ _mm_unpackhi_pd(__m128d __a, __m128d __b)
|
|
|
4797
4589
|
/// A 128-bit vector of [2 x double]. \n
|
|
4798
4590
|
/// Bits [63:0] are written to bits [127:64] of the destination.
|
|
4799
4591
|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
|
4800
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4801
|
-
|
|
4802
|
-
|
|
4803
|
-
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
|
|
4592
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpacklo_pd(__m128d __a,
|
|
4593
|
+
__m128d __b) {
|
|
4594
|
+
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2 + 0);
|
|
4804
4595
|
}
|
|
4805
4596
|
|
|
4806
4597
|
/// Extracts the sign bits of the double-precision values in the 128-bit
|
|
@@ -4816,13 +4607,10 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b)
|
|
|
4816
4607
|
/// be extracted.
|
|
4817
4608
|
/// \returns The sign bits from each of the double-precision elements in \a __a,
|
|
4818
4609
|
/// written to bits [1:0]. The remaining bits are assigned values of zero.
|
|
4819
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
4820
|
-
_mm_movemask_pd(__m128d __a)
|
|
4821
|
-
{
|
|
4610
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) {
|
|
4822
4611
|
return __builtin_ia32_movmskpd((__v2df)__a);
|
|
4823
4612
|
}
|
|
4824
4613
|
|
|
4825
|
-
|
|
4826
4614
|
/// Constructs a 128-bit floating-point vector of [2 x double] from two
|
|
4827
4615
|
/// 128-bit vector parameters of [2 x double], using the immediate-value
|
|
4828
4616
|
/// parameter as a specifier.
|
|
@@ -4846,9 +4634,12 @@ _mm_movemask_pd(__m128d __a)
|
|
|
4846
4634
|
/// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
|
|
4847
4635
|
/// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
|
|
4848
4636
|
/// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
|
|
4637
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE2 macro.
|
|
4638
|
+
/// <c>_MM_SHUFFLE2(b1, b0)</c> can create a 2-bit mask of the form
|
|
4639
|
+
/// <c>[b1, b0]</c>.
|
|
4849
4640
|
/// \returns A 128-bit vector of [2 x double] containing the shuffled values.
|
|
4850
|
-
#define _mm_shuffle_pd(a, b, i)
|
|
4851
|
-
((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b),
|
|
4641
|
+
#define _mm_shuffle_pd(a, b, i) \
|
|
4642
|
+
((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
|
|
4852
4643
|
(int)(i)))
|
|
4853
4644
|
|
|
4854
4645
|
/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
|
|
@@ -4862,9 +4653,7 @@ _mm_movemask_pd(__m128d __a)
|
|
|
4862
4653
|
/// A 128-bit floating-point vector of [2 x double].
|
|
4863
4654
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
4864
4655
|
/// bitwise pattern as the parameter.
|
|
4865
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
4866
|
-
_mm_castpd_ps(__m128d __a)
|
|
4867
|
-
{
|
|
4656
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castpd_ps(__m128d __a) {
|
|
4868
4657
|
return (__m128)__a;
|
|
4869
4658
|
}
|
|
4870
4659
|
|
|
@@ -4879,9 +4668,7 @@ _mm_castpd_ps(__m128d __a)
|
|
|
4879
4668
|
/// A 128-bit floating-point vector of [2 x double].
|
|
4880
4669
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
4881
4670
|
/// parameter.
|
|
4882
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4883
|
-
_mm_castpd_si128(__m128d __a)
|
|
4884
|
-
{
|
|
4671
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castpd_si128(__m128d __a) {
|
|
4885
4672
|
return (__m128i)__a;
|
|
4886
4673
|
}
|
|
4887
4674
|
|
|
@@ -4896,9 +4683,7 @@ _mm_castpd_si128(__m128d __a)
|
|
|
4896
4683
|
/// A 128-bit floating-point vector of [4 x float].
|
|
4897
4684
|
/// \returns A 128-bit floating-point vector of [2 x double] containing the same
|
|
4898
4685
|
/// bitwise pattern as the parameter.
|
|
4899
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4900
|
-
_mm_castps_pd(__m128 __a)
|
|
4901
|
-
{
|
|
4686
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castps_pd(__m128 __a) {
|
|
4902
4687
|
return (__m128d)__a;
|
|
4903
4688
|
}
|
|
4904
4689
|
|
|
@@ -4913,9 +4698,7 @@ _mm_castps_pd(__m128 __a)
|
|
|
4913
4698
|
/// A 128-bit floating-point vector of [4 x float].
|
|
4914
4699
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
4915
4700
|
/// parameter.
|
|
4916
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4917
|
-
_mm_castps_si128(__m128 __a)
|
|
4918
|
-
{
|
|
4701
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castps_si128(__m128 __a) {
|
|
4919
4702
|
return (__m128i)__a;
|
|
4920
4703
|
}
|
|
4921
4704
|
|
|
@@ -4930,9 +4713,7 @@ _mm_castps_si128(__m128 __a)
|
|
|
4930
4713
|
/// A 128-bit integer vector.
|
|
4931
4714
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
4932
4715
|
/// bitwise pattern as the parameter.
|
|
4933
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
4934
|
-
_mm_castsi128_ps(__m128i __a)
|
|
4935
|
-
{
|
|
4716
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castsi128_ps(__m128i __a) {
|
|
4936
4717
|
return (__m128)__a;
|
|
4937
4718
|
}
|
|
4938
4719
|
|
|
@@ -4947,9 +4728,7 @@ _mm_castsi128_ps(__m128i __a)
|
|
|
4947
4728
|
/// A 128-bit integer vector.
|
|
4948
4729
|
/// \returns A 128-bit floating-point vector of [2 x double] containing the same
|
|
4949
4730
|
/// bitwise pattern as the parameter.
|
|
4950
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4951
|
-
_mm_castsi128_pd(__m128i __a)
|
|
4952
|
-
{
|
|
4731
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castsi128_pd(__m128i __a) {
|
|
4953
4732
|
return (__m128d)__a;
|
|
4954
4733
|
}
|
|
4955
4734
|
|
|
@@ -4974,12 +4753,13 @@ void _mm_pause(void);
|
|
|
4974
4753
|
|
|
4975
4754
|
#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
|
|
4976
4755
|
|
|
4977
|
-
#define _MM_DENORMALS_ZERO_ON
|
|
4978
|
-
#define _MM_DENORMALS_ZERO_OFF
|
|
4756
|
+
#define _MM_DENORMALS_ZERO_ON (0x0040U)
|
|
4757
|
+
#define _MM_DENORMALS_ZERO_OFF (0x0000U)
|
|
4979
4758
|
|
|
4980
4759
|
#define _MM_DENORMALS_ZERO_MASK (0x0040U)
|
|
4981
4760
|
|
|
4982
4761
|
#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
|
|
4983
|
-
#define _MM_SET_DENORMALS_ZERO_MODE(x)
|
|
4762
|
+
#define _MM_SET_DENORMALS_ZERO_MODE(x) \
|
|
4763
|
+
(_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
|
|
4984
4764
|
|
|
4985
4765
|
#endif /* __EMMINTRIN_H */
|