@cpp-linter/clang-tidy-win32-x64 12.0.1 → 13.0.0
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/README.md +2 -2
- package/bin/clang-tidy.exe +2 -2
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_device_functions.h +174 -102
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_runtime_wrapper.h +6 -1
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_hip_cmath.h +272 -94
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_hip_libdevice_declares.h +24 -12
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_hip_math.h +48 -2
- package/lib/clang/13.0.0/include/__clang_hip_runtime_wrapper.h +124 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/altivec.h +1165 -423
- package/lib/clang/{12.0.1 → 13.0.0}/include/amxintrin.h +234 -19
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_acle.h +55 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_neon.h +1077 -165
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_sve.h +11791 -5896
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512fintrin.h +177 -37
- package/lib/clang/13.0.0/include/builtins.h +16 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cuda_wrappers/complex +8 -0
- package/lib/clang/13.0.0/include/hexagon_circ_brev_intrinsics.h +298 -0
- package/lib/clang/13.0.0/include/hexagon_protos.h +8450 -0
- package/lib/clang/13.0.0/include/hexagon_types.h +2653 -0
- package/lib/clang/13.0.0/include/hvx_hexagon_protos.h +4392 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/intrin.h +44 -8
- package/lib/clang/{12.0.1 → 13.0.0}/include/keylockerintrin.h +30 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/opencl-c-base.h +144 -3
- package/lib/clang/{12.0.1 → 13.0.0}/include/opencl-c.h +505 -355
- package/lib/clang/13.0.0/include/openmp_wrappers/__clang_openmp_device_functions.h +106 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/openmp_wrappers/cmath +54 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/openmp_wrappers/complex +1 -7
- package/lib/clang/{12.0.1 → 13.0.0}/include/openmp_wrappers/complex.h +0 -1
- package/lib/clang/{12.0.1 → 13.0.0}/include/openmp_wrappers/math.h +10 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/openmp_wrappers/new +2 -24
- package/lib/clang/13.0.0/include/riscv_vector.h +123865 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/uintrintrin.h +7 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/vaesintrin.h +21 -20
- package/lib/clang/{12.0.1 → 13.0.0}/include/vecintrin.h +206 -77
- package/lib/clang/{12.0.1 → 13.0.0}/include/vpclmulqdqintrin.h +2 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/wasm_simd128.h +806 -239
- package/package.json +6 -6
- package/lib/clang/12.0.1/include/__clang_hip_runtime_wrapper.h +0 -69
- package/lib/clang/12.0.1/include/openmp_wrappers/__clang_openmp_device_functions.h +0 -42
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_builtin_vars.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_cmath.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_complex_builtins.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_intrinsics.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_libdevice_declares.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_math.h +2 -2
- package/lib/clang/{12.0.1 → 13.0.0}/include/__clang_cuda_math_forward_declares.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__stddef_max_align_t.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__wmmintrin_aes.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/__wmmintrin_pclmul.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/adxintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/ammintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm64intr.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_bf16.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_cde.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_cmse.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_fp16.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/arm_mve.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/armintr.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx2intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512bf16intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512bitalgintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512bwintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512cdintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512dqintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512erintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512ifmaintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512ifmavlintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512pfintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vbmi2intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vbmiintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vbmivlintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlbf16intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlbitalgintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlbwintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlcdintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vldqintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlvbmi2intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlvnniintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vlvp2intersectintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vnniintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vp2intersectintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vpopcntdqintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avx512vpopcntdqvlintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avxintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/avxvnniintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/bmi2intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/bmiintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cet.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cetintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cldemoteintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/clflushoptintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/clwbintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/clzerointrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cpuid.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cuda_wrappers/algorithm +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/cuda_wrappers/new +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/emmintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/enqcmdintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/f16cintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/float.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/fma4intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/fmaintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/fxsrintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/gfniintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/hresetintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/htmintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/htmxlintrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/ia32intrin.h +0 -0
- package/lib/clang/{12.0.1 → 13.0.0}/include/immintrin.h +5 -5
- /package/lib/clang/{12.0.1 → 13.0.0}/include/inttypes.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/invpcidintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/iso646.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/limits.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/lwpintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/lzcntintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/mm3dnow.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/mm_malloc.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/mmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/module.modulemap +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/movdirintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/msa.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/mwaitxintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/nmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/openmp_wrappers/complex_cmath.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/pconfigintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/pkuintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/pmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/popcntintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/emmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/mm_malloc.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/mmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/pmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/smmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/tmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ppc_wrappers/xmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/prfchwintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/ptwriteintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/rdseedintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/rtmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/s390intrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/serializeintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/sgxintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/shaintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/smmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stdalign.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stdarg.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stdatomic.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stdbool.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stddef.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stdint.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/stdnoreturn.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/tbmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/tgmath.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/tmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/tsxldtrkintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/unwind.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/vadefs.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/varargs.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/waitpkgintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/wbnoinvdintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/wmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/x86gprintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/x86intrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xmmintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xopintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xsavecintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xsaveintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xsaveoptintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xsavesintrin.h +0 -0
- /package/lib/clang/{12.0.1 → 13.0.0}/include/xtestintrin.h +0 -0
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@@ -2432,6 +2432,96 @@ __ai int16x4_t vadd_s16(int16x4_t __p0, int16x4_t __p1) {
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}
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#endif
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#ifdef __LITTLE_ENDIAN__
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__ai poly8x8_t vadd_p8(poly8x8_t __p0, poly8x8_t __p1) {
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poly8x8_t __ret;
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__ret = (poly8x8_t) __builtin_neon_vadd_v((int8x8_t)__p0, (int8x8_t)__p1, 4);
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return __ret;
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}
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#else
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__ai poly8x8_t vadd_p8(poly8x8_t __p0, poly8x8_t __p1) {
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poly8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
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poly8x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0);
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poly8x8_t __ret;
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__ret = (poly8x8_t) __builtin_neon_vadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 4);
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__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
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return __ret;
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}
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#endif
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__ai poly64x1_t vadd_p64(poly64x1_t __p0, poly64x1_t __p1) {
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poly64x1_t __ret;
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__ret = (poly64x1_t) __builtin_neon_vadd_v((int8x8_t)__p0, (int8x8_t)__p1, 6);
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return __ret;
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}
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#ifdef __LITTLE_ENDIAN__
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__ai poly16x4_t vadd_p16(poly16x4_t __p0, poly16x4_t __p1) {
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poly16x4_t __ret;
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__ret = (poly16x4_t) __builtin_neon_vadd_v((int8x8_t)__p0, (int8x8_t)__p1, 5);
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return __ret;
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}
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#else
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__ai poly16x4_t vadd_p16(poly16x4_t __p0, poly16x4_t __p1) {
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poly16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
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poly16x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
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poly16x4_t __ret;
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__ret = (poly16x4_t) __builtin_neon_vadd_v((int8x8_t)__rev0, (int8x8_t)__rev1, 5);
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__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
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return __ret;
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}
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#endif
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#ifdef __LITTLE_ENDIAN__
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__ai poly8x16_t vaddq_p8(poly8x16_t __p0, poly8x16_t __p1) {
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poly8x16_t __ret;
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__ret = (poly8x16_t) __builtin_neon_vaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 36);
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return __ret;
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}
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#else
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__ai poly8x16_t vaddq_p8(poly8x16_t __p0, poly8x16_t __p1) {
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poly8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
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poly8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
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poly8x16_t __ret;
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+
__ret = (poly8x16_t) __builtin_neon_vaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 36);
|
|
2486
|
+
__ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
2487
|
+
return __ret;
|
|
2488
|
+
}
|
|
2489
|
+
#endif
|
|
2490
|
+
|
|
2491
|
+
#ifdef __LITTLE_ENDIAN__
|
|
2492
|
+
__ai poly64x2_t vaddq_p64(poly64x2_t __p0, poly64x2_t __p1) {
|
|
2493
|
+
poly64x2_t __ret;
|
|
2494
|
+
__ret = (poly64x2_t) __builtin_neon_vaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 38);
|
|
2495
|
+
return __ret;
|
|
2496
|
+
}
|
|
2497
|
+
#else
|
|
2498
|
+
__ai poly64x2_t vaddq_p64(poly64x2_t __p0, poly64x2_t __p1) {
|
|
2499
|
+
poly64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
2500
|
+
poly64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
2501
|
+
poly64x2_t __ret;
|
|
2502
|
+
__ret = (poly64x2_t) __builtin_neon_vaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 38);
|
|
2503
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
2504
|
+
return __ret;
|
|
2505
|
+
}
|
|
2506
|
+
#endif
|
|
2507
|
+
|
|
2508
|
+
#ifdef __LITTLE_ENDIAN__
|
|
2509
|
+
__ai poly16x8_t vaddq_p16(poly16x8_t __p0, poly16x8_t __p1) {
|
|
2510
|
+
poly16x8_t __ret;
|
|
2511
|
+
__ret = (poly16x8_t) __builtin_neon_vaddq_v((int8x16_t)__p0, (int8x16_t)__p1, 37);
|
|
2512
|
+
return __ret;
|
|
2513
|
+
}
|
|
2514
|
+
#else
|
|
2515
|
+
__ai poly16x8_t vaddq_p16(poly16x8_t __p0, poly16x8_t __p1) {
|
|
2516
|
+
poly16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
2517
|
+
poly16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
2518
|
+
poly16x8_t __ret;
|
|
2519
|
+
__ret = (poly16x8_t) __builtin_neon_vaddq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 37);
|
|
2520
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
2521
|
+
return __ret;
|
|
2522
|
+
}
|
|
2523
|
+
#endif
|
|
2524
|
+
|
|
2435
2525
|
#ifdef __LITTLE_ENDIAN__
|
|
2436
2526
|
__ai uint16x4_t vaddhn_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
2437
2527
|
uint16x4_t __ret;
|
|
@@ -4552,6 +4642,54 @@ __ai uint16x4_t vcle_s16(int16x4_t __p0, int16x4_t __p1) {
|
|
|
4552
4642
|
}
|
|
4553
4643
|
#endif
|
|
4554
4644
|
|
|
4645
|
+
#ifdef __LITTLE_ENDIAN__
|
|
4646
|
+
__ai int8x16_t vclsq_u8(uint8x16_t __p0) {
|
|
4647
|
+
int8x16_t __ret;
|
|
4648
|
+
__ret = (int8x16_t) __builtin_neon_vclsq_v((int8x16_t)__p0, 32);
|
|
4649
|
+
return __ret;
|
|
4650
|
+
}
|
|
4651
|
+
#else
|
|
4652
|
+
__ai int8x16_t vclsq_u8(uint8x16_t __p0) {
|
|
4653
|
+
uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
4654
|
+
int8x16_t __ret;
|
|
4655
|
+
__ret = (int8x16_t) __builtin_neon_vclsq_v((int8x16_t)__rev0, 32);
|
|
4656
|
+
__ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
4657
|
+
return __ret;
|
|
4658
|
+
}
|
|
4659
|
+
#endif
|
|
4660
|
+
|
|
4661
|
+
#ifdef __LITTLE_ENDIAN__
|
|
4662
|
+
__ai int32x4_t vclsq_u32(uint32x4_t __p0) {
|
|
4663
|
+
int32x4_t __ret;
|
|
4664
|
+
__ret = (int32x4_t) __builtin_neon_vclsq_v((int8x16_t)__p0, 34);
|
|
4665
|
+
return __ret;
|
|
4666
|
+
}
|
|
4667
|
+
#else
|
|
4668
|
+
__ai int32x4_t vclsq_u32(uint32x4_t __p0) {
|
|
4669
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
4670
|
+
int32x4_t __ret;
|
|
4671
|
+
__ret = (int32x4_t) __builtin_neon_vclsq_v((int8x16_t)__rev0, 34);
|
|
4672
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
4673
|
+
return __ret;
|
|
4674
|
+
}
|
|
4675
|
+
#endif
|
|
4676
|
+
|
|
4677
|
+
#ifdef __LITTLE_ENDIAN__
|
|
4678
|
+
__ai int16x8_t vclsq_u16(uint16x8_t __p0) {
|
|
4679
|
+
int16x8_t __ret;
|
|
4680
|
+
__ret = (int16x8_t) __builtin_neon_vclsq_v((int8x16_t)__p0, 33);
|
|
4681
|
+
return __ret;
|
|
4682
|
+
}
|
|
4683
|
+
#else
|
|
4684
|
+
__ai int16x8_t vclsq_u16(uint16x8_t __p0) {
|
|
4685
|
+
uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
4686
|
+
int16x8_t __ret;
|
|
4687
|
+
__ret = (int16x8_t) __builtin_neon_vclsq_v((int8x16_t)__rev0, 33);
|
|
4688
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
4689
|
+
return __ret;
|
|
4690
|
+
}
|
|
4691
|
+
#endif
|
|
4692
|
+
|
|
4555
4693
|
#ifdef __LITTLE_ENDIAN__
|
|
4556
4694
|
__ai int8x16_t vclsq_s8(int8x16_t __p0) {
|
|
4557
4695
|
int8x16_t __ret;
|
|
@@ -4600,6 +4738,54 @@ __ai int16x8_t vclsq_s16(int16x8_t __p0) {
|
|
|
4600
4738
|
}
|
|
4601
4739
|
#endif
|
|
4602
4740
|
|
|
4741
|
+
#ifdef __LITTLE_ENDIAN__
|
|
4742
|
+
__ai int8x8_t vcls_u8(uint8x8_t __p0) {
|
|
4743
|
+
int8x8_t __ret;
|
|
4744
|
+
__ret = (int8x8_t) __builtin_neon_vcls_v((int8x8_t)__p0, 0);
|
|
4745
|
+
return __ret;
|
|
4746
|
+
}
|
|
4747
|
+
#else
|
|
4748
|
+
__ai int8x8_t vcls_u8(uint8x8_t __p0) {
|
|
4749
|
+
uint8x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
4750
|
+
int8x8_t __ret;
|
|
4751
|
+
__ret = (int8x8_t) __builtin_neon_vcls_v((int8x8_t)__rev0, 0);
|
|
4752
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
4753
|
+
return __ret;
|
|
4754
|
+
}
|
|
4755
|
+
#endif
|
|
4756
|
+
|
|
4757
|
+
#ifdef __LITTLE_ENDIAN__
|
|
4758
|
+
__ai int32x2_t vcls_u32(uint32x2_t __p0) {
|
|
4759
|
+
int32x2_t __ret;
|
|
4760
|
+
__ret = (int32x2_t) __builtin_neon_vcls_v((int8x8_t)__p0, 2);
|
|
4761
|
+
return __ret;
|
|
4762
|
+
}
|
|
4763
|
+
#else
|
|
4764
|
+
__ai int32x2_t vcls_u32(uint32x2_t __p0) {
|
|
4765
|
+
uint32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
4766
|
+
int32x2_t __ret;
|
|
4767
|
+
__ret = (int32x2_t) __builtin_neon_vcls_v((int8x8_t)__rev0, 2);
|
|
4768
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
4769
|
+
return __ret;
|
|
4770
|
+
}
|
|
4771
|
+
#endif
|
|
4772
|
+
|
|
4773
|
+
#ifdef __LITTLE_ENDIAN__
|
|
4774
|
+
__ai int16x4_t vcls_u16(uint16x4_t __p0) {
|
|
4775
|
+
int16x4_t __ret;
|
|
4776
|
+
__ret = (int16x4_t) __builtin_neon_vcls_v((int8x8_t)__p0, 1);
|
|
4777
|
+
return __ret;
|
|
4778
|
+
}
|
|
4779
|
+
#else
|
|
4780
|
+
__ai int16x4_t vcls_u16(uint16x4_t __p0) {
|
|
4781
|
+
uint16x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
4782
|
+
int16x4_t __ret;
|
|
4783
|
+
__ret = (int16x4_t) __builtin_neon_vcls_v((int8x8_t)__rev0, 1);
|
|
4784
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
4785
|
+
return __ret;
|
|
4786
|
+
}
|
|
4787
|
+
#endif
|
|
4788
|
+
|
|
4603
4789
|
#ifdef __LITTLE_ENDIAN__
|
|
4604
4790
|
__ai int8x8_t vcls_s8(int8x8_t __p0) {
|
|
4605
4791
|
int8x8_t __ret;
|
|
@@ -34889,7 +35075,7 @@ __ai uint32x2_t vcvtp_u32_f32(float32x2_t __p0) {
|
|
|
34889
35075
|
#endif
|
|
34890
35076
|
|
|
34891
35077
|
#endif
|
|
34892
|
-
#if __ARM_ARCH >= 8 && defined(
|
|
35078
|
+
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_AES)
|
|
34893
35079
|
#ifdef __LITTLE_ENDIAN__
|
|
34894
35080
|
__ai uint8x16_t vaesdq_u8(uint8x16_t __p0, uint8x16_t __p1) {
|
|
34895
35081
|
uint8x16_t __ret;
|
|
@@ -34956,168 +35142,6 @@ __ai uint8x16_t vaesmcq_u8(uint8x16_t __p0) {
|
|
|
34956
35142
|
}
|
|
34957
35143
|
#endif
|
|
34958
35144
|
|
|
34959
|
-
#ifdef __LITTLE_ENDIAN__
|
|
34960
|
-
__ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
34961
|
-
uint32x4_t __ret;
|
|
34962
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__p0, __p1, __p2);
|
|
34963
|
-
return __ret;
|
|
34964
|
-
}
|
|
34965
|
-
#else
|
|
34966
|
-
__ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
34967
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
34968
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
34969
|
-
uint32x4_t __ret;
|
|
34970
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__rev0, __p1, __rev2);
|
|
34971
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
34972
|
-
return __ret;
|
|
34973
|
-
}
|
|
34974
|
-
#endif
|
|
34975
|
-
|
|
34976
|
-
__ai uint32_t vsha1h_u32(uint32_t __p0) {
|
|
34977
|
-
uint32_t __ret;
|
|
34978
|
-
__ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0);
|
|
34979
|
-
return __ret;
|
|
34980
|
-
}
|
|
34981
|
-
#ifdef __LITTLE_ENDIAN__
|
|
34982
|
-
__ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
34983
|
-
uint32x4_t __ret;
|
|
34984
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__p0, __p1, __p2);
|
|
34985
|
-
return __ret;
|
|
34986
|
-
}
|
|
34987
|
-
#else
|
|
34988
|
-
__ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
34989
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
34990
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
34991
|
-
uint32x4_t __ret;
|
|
34992
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__rev0, __p1, __rev2);
|
|
34993
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
34994
|
-
return __ret;
|
|
34995
|
-
}
|
|
34996
|
-
#endif
|
|
34997
|
-
|
|
34998
|
-
#ifdef __LITTLE_ENDIAN__
|
|
34999
|
-
__ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35000
|
-
uint32x4_t __ret;
|
|
35001
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__p0, __p1, __p2);
|
|
35002
|
-
return __ret;
|
|
35003
|
-
}
|
|
35004
|
-
#else
|
|
35005
|
-
__ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35006
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35007
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35008
|
-
uint32x4_t __ret;
|
|
35009
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__rev0, __p1, __rev2);
|
|
35010
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35011
|
-
return __ret;
|
|
35012
|
-
}
|
|
35013
|
-
#endif
|
|
35014
|
-
|
|
35015
|
-
#ifdef __LITTLE_ENDIAN__
|
|
35016
|
-
__ai uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35017
|
-
uint32x4_t __ret;
|
|
35018
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1su0q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35019
|
-
return __ret;
|
|
35020
|
-
}
|
|
35021
|
-
#else
|
|
35022
|
-
__ai uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35023
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35024
|
-
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35025
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35026
|
-
uint32x4_t __ret;
|
|
35027
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35028
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35029
|
-
return __ret;
|
|
35030
|
-
}
|
|
35031
|
-
#endif
|
|
35032
|
-
|
|
35033
|
-
#ifdef __LITTLE_ENDIAN__
|
|
35034
|
-
__ai uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35035
|
-
uint32x4_t __ret;
|
|
35036
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1su1q_v((int8x16_t)__p0, (int8x16_t)__p1, 50);
|
|
35037
|
-
return __ret;
|
|
35038
|
-
}
|
|
35039
|
-
#else
|
|
35040
|
-
__ai uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35041
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35042
|
-
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35043
|
-
uint32x4_t __ret;
|
|
35044
|
-
__ret = (uint32x4_t) __builtin_neon_vsha1su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50);
|
|
35045
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35046
|
-
return __ret;
|
|
35047
|
-
}
|
|
35048
|
-
#endif
|
|
35049
|
-
|
|
35050
|
-
#ifdef __LITTLE_ENDIAN__
|
|
35051
|
-
__ai uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35052
|
-
uint32x4_t __ret;
|
|
35053
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256hq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35054
|
-
return __ret;
|
|
35055
|
-
}
|
|
35056
|
-
#else
|
|
35057
|
-
__ai uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35058
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35059
|
-
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35060
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35061
|
-
uint32x4_t __ret;
|
|
35062
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256hq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35063
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35064
|
-
return __ret;
|
|
35065
|
-
}
|
|
35066
|
-
#endif
|
|
35067
|
-
|
|
35068
|
-
#ifdef __LITTLE_ENDIAN__
|
|
35069
|
-
__ai uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35070
|
-
uint32x4_t __ret;
|
|
35071
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256h2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35072
|
-
return __ret;
|
|
35073
|
-
}
|
|
35074
|
-
#else
|
|
35075
|
-
__ai uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35076
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35077
|
-
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35078
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35079
|
-
uint32x4_t __ret;
|
|
35080
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256h2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35081
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35082
|
-
return __ret;
|
|
35083
|
-
}
|
|
35084
|
-
#endif
|
|
35085
|
-
|
|
35086
|
-
#ifdef __LITTLE_ENDIAN__
|
|
35087
|
-
__ai uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35088
|
-
uint32x4_t __ret;
|
|
35089
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256su0q_v((int8x16_t)__p0, (int8x16_t)__p1, 50);
|
|
35090
|
-
return __ret;
|
|
35091
|
-
}
|
|
35092
|
-
#else
|
|
35093
|
-
__ai uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35094
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35095
|
-
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35096
|
-
uint32x4_t __ret;
|
|
35097
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50);
|
|
35098
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35099
|
-
return __ret;
|
|
35100
|
-
}
|
|
35101
|
-
#endif
|
|
35102
|
-
|
|
35103
|
-
#ifdef __LITTLE_ENDIAN__
|
|
35104
|
-
__ai uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35105
|
-
uint32x4_t __ret;
|
|
35106
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256su1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35107
|
-
return __ret;
|
|
35108
|
-
}
|
|
35109
|
-
#else
|
|
35110
|
-
__ai uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35111
|
-
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35112
|
-
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35113
|
-
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35114
|
-
uint32x4_t __ret;
|
|
35115
|
-
__ret = (uint32x4_t) __builtin_neon_vsha256su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35116
|
-
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35117
|
-
return __ret;
|
|
35118
|
-
}
|
|
35119
|
-
#endif
|
|
35120
|
-
|
|
35121
35145
|
#endif
|
|
35122
35146
|
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_DIRECTED_ROUNDING)
|
|
35123
35147
|
#ifdef __LITTLE_ENDIAN__
|
|
@@ -35683,6 +35707,759 @@ __ai float16x4_t vminnm_f16(float16x4_t __p0, float16x4_t __p1) {
|
|
|
35683
35707
|
}
|
|
35684
35708
|
#endif
|
|
35685
35709
|
|
|
35710
|
+
#endif
|
|
35711
|
+
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA2)
|
|
35712
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35713
|
+
__ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35714
|
+
uint32x4_t __ret;
|
|
35715
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__p0, __p1, __p2);
|
|
35716
|
+
return __ret;
|
|
35717
|
+
}
|
|
35718
|
+
#else
|
|
35719
|
+
__ai uint32x4_t vsha1cq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35720
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35721
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35722
|
+
uint32x4_t __ret;
|
|
35723
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1cq_u32(__rev0, __p1, __rev2);
|
|
35724
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35725
|
+
return __ret;
|
|
35726
|
+
}
|
|
35727
|
+
#endif
|
|
35728
|
+
|
|
35729
|
+
__ai uint32_t vsha1h_u32(uint32_t __p0) {
|
|
35730
|
+
uint32_t __ret;
|
|
35731
|
+
__ret = (uint32_t) __builtin_neon_vsha1h_u32(__p0);
|
|
35732
|
+
return __ret;
|
|
35733
|
+
}
|
|
35734
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35735
|
+
__ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35736
|
+
uint32x4_t __ret;
|
|
35737
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__p0, __p1, __p2);
|
|
35738
|
+
return __ret;
|
|
35739
|
+
}
|
|
35740
|
+
#else
|
|
35741
|
+
__ai uint32x4_t vsha1mq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35742
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35743
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35744
|
+
uint32x4_t __ret;
|
|
35745
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1mq_u32(__rev0, __p1, __rev2);
|
|
35746
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35747
|
+
return __ret;
|
|
35748
|
+
}
|
|
35749
|
+
#endif
|
|
35750
|
+
|
|
35751
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35752
|
+
__ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35753
|
+
uint32x4_t __ret;
|
|
35754
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__p0, __p1, __p2);
|
|
35755
|
+
return __ret;
|
|
35756
|
+
}
|
|
35757
|
+
#else
|
|
35758
|
+
__ai uint32x4_t vsha1pq_u32(uint32x4_t __p0, uint32_t __p1, uint32x4_t __p2) {
|
|
35759
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35760
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35761
|
+
uint32x4_t __ret;
|
|
35762
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1pq_u32(__rev0, __p1, __rev2);
|
|
35763
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35764
|
+
return __ret;
|
|
35765
|
+
}
|
|
35766
|
+
#endif
|
|
35767
|
+
|
|
35768
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35769
|
+
__ai uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35770
|
+
uint32x4_t __ret;
|
|
35771
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1su0q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35772
|
+
return __ret;
|
|
35773
|
+
}
|
|
35774
|
+
#else
|
|
35775
|
+
__ai uint32x4_t vsha1su0q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35776
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35777
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35778
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35779
|
+
uint32x4_t __ret;
|
|
35780
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35781
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35782
|
+
return __ret;
|
|
35783
|
+
}
|
|
35784
|
+
#endif
|
|
35785
|
+
|
|
35786
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35787
|
+
__ai uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35788
|
+
uint32x4_t __ret;
|
|
35789
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1su1q_v((int8x16_t)__p0, (int8x16_t)__p1, 50);
|
|
35790
|
+
return __ret;
|
|
35791
|
+
}
|
|
35792
|
+
#else
|
|
35793
|
+
__ai uint32x4_t vsha1su1q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35794
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35795
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35796
|
+
uint32x4_t __ret;
|
|
35797
|
+
__ret = (uint32x4_t) __builtin_neon_vsha1su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50);
|
|
35798
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35799
|
+
return __ret;
|
|
35800
|
+
}
|
|
35801
|
+
#endif
|
|
35802
|
+
|
|
35803
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35804
|
+
__ai uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35805
|
+
uint32x4_t __ret;
|
|
35806
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256hq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35807
|
+
return __ret;
|
|
35808
|
+
}
|
|
35809
|
+
#else
|
|
35810
|
+
__ai uint32x4_t vsha256hq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35811
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35812
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35813
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35814
|
+
uint32x4_t __ret;
|
|
35815
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256hq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35816
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35817
|
+
return __ret;
|
|
35818
|
+
}
|
|
35819
|
+
#endif
|
|
35820
|
+
|
|
35821
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35822
|
+
__ai uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35823
|
+
uint32x4_t __ret;
|
|
35824
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256h2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35825
|
+
return __ret;
|
|
35826
|
+
}
|
|
35827
|
+
#else
|
|
35828
|
+
__ai uint32x4_t vsha256h2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35829
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35830
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35831
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35832
|
+
uint32x4_t __ret;
|
|
35833
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256h2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35834
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35835
|
+
return __ret;
|
|
35836
|
+
}
|
|
35837
|
+
#endif
|
|
35838
|
+
|
|
35839
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35840
|
+
__ai uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35841
|
+
uint32x4_t __ret;
|
|
35842
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256su0q_v((int8x16_t)__p0, (int8x16_t)__p1, 50);
|
|
35843
|
+
return __ret;
|
|
35844
|
+
}
|
|
35845
|
+
#else
|
|
35846
|
+
__ai uint32x4_t vsha256su0q_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
35847
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35848
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35849
|
+
uint32x4_t __ret;
|
|
35850
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50);
|
|
35851
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35852
|
+
return __ret;
|
|
35853
|
+
}
|
|
35854
|
+
#endif
|
|
35855
|
+
|
|
35856
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35857
|
+
__ai uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35858
|
+
uint32x4_t __ret;
|
|
35859
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256su1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35860
|
+
return __ret;
|
|
35861
|
+
}
|
|
35862
|
+
#else
|
|
35863
|
+
__ai uint32x4_t vsha256su1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35864
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35865
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35866
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35867
|
+
uint32x4_t __ret;
|
|
35868
|
+
__ret = (uint32x4_t) __builtin_neon_vsha256su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35869
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35870
|
+
return __ret;
|
|
35871
|
+
}
|
|
35872
|
+
#endif
|
|
35873
|
+
|
|
35874
|
+
#endif
|
|
35875
|
+
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA3) && defined(__aarch64__)
|
|
35876
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35877
|
+
__ai uint8x16_t vbcaxq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) {
|
|
35878
|
+
uint8x16_t __ret;
|
|
35879
|
+
__ret = (uint8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48);
|
|
35880
|
+
return __ret;
|
|
35881
|
+
}
|
|
35882
|
+
#else
|
|
35883
|
+
__ai uint8x16_t vbcaxq_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) {
|
|
35884
|
+
uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35885
|
+
uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35886
|
+
uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35887
|
+
uint8x16_t __ret;
|
|
35888
|
+
__ret = (uint8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48);
|
|
35889
|
+
__ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35890
|
+
return __ret;
|
|
35891
|
+
}
|
|
35892
|
+
#endif
|
|
35893
|
+
|
|
35894
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35895
|
+
__ai uint32x4_t vbcaxq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35896
|
+
uint32x4_t __ret;
|
|
35897
|
+
__ret = (uint32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
35898
|
+
return __ret;
|
|
35899
|
+
}
|
|
35900
|
+
#else
|
|
35901
|
+
__ai uint32x4_t vbcaxq_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
35902
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35903
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35904
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35905
|
+
uint32x4_t __ret;
|
|
35906
|
+
__ret = (uint32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
35907
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35908
|
+
return __ret;
|
|
35909
|
+
}
|
|
35910
|
+
#endif
|
|
35911
|
+
|
|
35912
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35913
|
+
__ai uint64x2_t vbcaxq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
35914
|
+
uint64x2_t __ret;
|
|
35915
|
+
__ret = (uint64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51);
|
|
35916
|
+
return __ret;
|
|
35917
|
+
}
|
|
35918
|
+
#else
|
|
35919
|
+
__ai uint64x2_t vbcaxq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
35920
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
35921
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
35922
|
+
uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
35923
|
+
uint64x2_t __ret;
|
|
35924
|
+
__ret = (uint64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51);
|
|
35925
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
35926
|
+
return __ret;
|
|
35927
|
+
}
|
|
35928
|
+
#endif
|
|
35929
|
+
|
|
35930
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35931
|
+
__ai uint16x8_t vbcaxq_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) {
|
|
35932
|
+
uint16x8_t __ret;
|
|
35933
|
+
__ret = (uint16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 49);
|
|
35934
|
+
return __ret;
|
|
35935
|
+
}
|
|
35936
|
+
#else
|
|
35937
|
+
__ai uint16x8_t vbcaxq_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) {
|
|
35938
|
+
uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35939
|
+
uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35940
|
+
uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35941
|
+
uint16x8_t __ret;
|
|
35942
|
+
__ret = (uint16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 49);
|
|
35943
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35944
|
+
return __ret;
|
|
35945
|
+
}
|
|
35946
|
+
#endif
|
|
35947
|
+
|
|
35948
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35949
|
+
__ai int8x16_t vbcaxq_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) {
|
|
35950
|
+
int8x16_t __ret;
|
|
35951
|
+
__ret = (int8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32);
|
|
35952
|
+
return __ret;
|
|
35953
|
+
}
|
|
35954
|
+
#else
|
|
35955
|
+
__ai int8x16_t vbcaxq_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) {
|
|
35956
|
+
int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35957
|
+
int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35958
|
+
int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35959
|
+
int8x16_t __ret;
|
|
35960
|
+
__ret = (int8x16_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32);
|
|
35961
|
+
__ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
35962
|
+
return __ret;
|
|
35963
|
+
}
|
|
35964
|
+
#endif
|
|
35965
|
+
|
|
35966
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35967
|
+
__ai int32x4_t vbcaxq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) {
|
|
35968
|
+
int32x4_t __ret;
|
|
35969
|
+
__ret = (int32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34);
|
|
35970
|
+
return __ret;
|
|
35971
|
+
}
|
|
35972
|
+
#else
|
|
35973
|
+
__ai int32x4_t vbcaxq_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) {
|
|
35974
|
+
int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
35975
|
+
int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
35976
|
+
int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
35977
|
+
int32x4_t __ret;
|
|
35978
|
+
__ret = (int32x4_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34);
|
|
35979
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
35980
|
+
return __ret;
|
|
35981
|
+
}
|
|
35982
|
+
#endif
|
|
35983
|
+
|
|
35984
|
+
#ifdef __LITTLE_ENDIAN__
|
|
35985
|
+
__ai int64x2_t vbcaxq_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) {
|
|
35986
|
+
int64x2_t __ret;
|
|
35987
|
+
__ret = (int64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 35);
|
|
35988
|
+
return __ret;
|
|
35989
|
+
}
|
|
35990
|
+
#else
|
|
35991
|
+
__ai int64x2_t vbcaxq_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) {
|
|
35992
|
+
int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
35993
|
+
int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
35994
|
+
int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
35995
|
+
int64x2_t __ret;
|
|
35996
|
+
__ret = (int64x2_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 35);
|
|
35997
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
35998
|
+
return __ret;
|
|
35999
|
+
}
|
|
36000
|
+
#endif
|
|
36001
|
+
|
|
36002
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36003
|
+
__ai int16x8_t vbcaxq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) {
|
|
36004
|
+
int16x8_t __ret;
|
|
36005
|
+
__ret = (int16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33);
|
|
36006
|
+
return __ret;
|
|
36007
|
+
}
|
|
36008
|
+
#else
|
|
36009
|
+
__ai int16x8_t vbcaxq_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) {
|
|
36010
|
+
int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36011
|
+
int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36012
|
+
int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36013
|
+
int16x8_t __ret;
|
|
36014
|
+
__ret = (int16x8_t) __builtin_neon_vbcaxq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33);
|
|
36015
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36016
|
+
return __ret;
|
|
36017
|
+
}
|
|
36018
|
+
#endif
|
|
36019
|
+
|
|
36020
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36021
|
+
__ai uint8x16_t veor3q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) {
|
|
36022
|
+
uint8x16_t __ret;
|
|
36023
|
+
__ret = (uint8x16_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 48);
|
|
36024
|
+
return __ret;
|
|
36025
|
+
}
|
|
36026
|
+
#else
|
|
36027
|
+
__ai uint8x16_t veor3q_u8(uint8x16_t __p0, uint8x16_t __p1, uint8x16_t __p2) {
|
|
36028
|
+
uint8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36029
|
+
uint8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36030
|
+
uint8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36031
|
+
uint8x16_t __ret;
|
|
36032
|
+
__ret = (uint8x16_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 48);
|
|
36033
|
+
__ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36034
|
+
return __ret;
|
|
36035
|
+
}
|
|
36036
|
+
#endif
|
|
36037
|
+
|
|
36038
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36039
|
+
__ai uint32x4_t veor3q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36040
|
+
uint32x4_t __ret;
|
|
36041
|
+
__ret = (uint32x4_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
36042
|
+
return __ret;
|
|
36043
|
+
}
|
|
36044
|
+
#else
|
|
36045
|
+
__ai uint32x4_t veor3q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36046
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36047
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36048
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
36049
|
+
uint32x4_t __ret;
|
|
36050
|
+
__ret = (uint32x4_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
36051
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36052
|
+
return __ret;
|
|
36053
|
+
}
|
|
36054
|
+
#endif
|
|
36055
|
+
|
|
36056
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36057
|
+
__ai uint64x2_t veor3q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36058
|
+
uint64x2_t __ret;
|
|
36059
|
+
__ret = (uint64x2_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51);
|
|
36060
|
+
return __ret;
|
|
36061
|
+
}
|
|
36062
|
+
#else
|
|
36063
|
+
__ai uint64x2_t veor3q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36064
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36065
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36066
|
+
uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
36067
|
+
uint64x2_t __ret;
|
|
36068
|
+
__ret = (uint64x2_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51);
|
|
36069
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36070
|
+
return __ret;
|
|
36071
|
+
}
|
|
36072
|
+
#endif
|
|
36073
|
+
|
|
36074
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36075
|
+
__ai uint16x8_t veor3q_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) {
|
|
36076
|
+
uint16x8_t __ret;
|
|
36077
|
+
__ret = (uint16x8_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 49);
|
|
36078
|
+
return __ret;
|
|
36079
|
+
}
|
|
36080
|
+
#else
|
|
36081
|
+
__ai uint16x8_t veor3q_u16(uint16x8_t __p0, uint16x8_t __p1, uint16x8_t __p2) {
|
|
36082
|
+
uint16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36083
|
+
uint16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36084
|
+
uint16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36085
|
+
uint16x8_t __ret;
|
|
36086
|
+
__ret = (uint16x8_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 49);
|
|
36087
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36088
|
+
return __ret;
|
|
36089
|
+
}
|
|
36090
|
+
#endif
|
|
36091
|
+
|
|
36092
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36093
|
+
__ai int8x16_t veor3q_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) {
|
|
36094
|
+
int8x16_t __ret;
|
|
36095
|
+
__ret = (int8x16_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 32);
|
|
36096
|
+
return __ret;
|
|
36097
|
+
}
|
|
36098
|
+
#else
|
|
36099
|
+
__ai int8x16_t veor3q_s8(int8x16_t __p0, int8x16_t __p1, int8x16_t __p2) {
|
|
36100
|
+
int8x16_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36101
|
+
int8x16_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36102
|
+
int8x16_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36103
|
+
int8x16_t __ret;
|
|
36104
|
+
__ret = (int8x16_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 32);
|
|
36105
|
+
__ret = __builtin_shufflevector(__ret, __ret, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36106
|
+
return __ret;
|
|
36107
|
+
}
|
|
36108
|
+
#endif
|
|
36109
|
+
|
|
36110
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36111
|
+
__ai int32x4_t veor3q_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) {
|
|
36112
|
+
int32x4_t __ret;
|
|
36113
|
+
__ret = (int32x4_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 34);
|
|
36114
|
+
return __ret;
|
|
36115
|
+
}
|
|
36116
|
+
#else
|
|
36117
|
+
__ai int32x4_t veor3q_s32(int32x4_t __p0, int32x4_t __p1, int32x4_t __p2) {
|
|
36118
|
+
int32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36119
|
+
int32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36120
|
+
int32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
36121
|
+
int32x4_t __ret;
|
|
36122
|
+
__ret = (int32x4_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 34);
|
|
36123
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36124
|
+
return __ret;
|
|
36125
|
+
}
|
|
36126
|
+
#endif
|
|
36127
|
+
|
|
36128
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36129
|
+
__ai int64x2_t veor3q_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) {
|
|
36130
|
+
int64x2_t __ret;
|
|
36131
|
+
__ret = (int64x2_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 35);
|
|
36132
|
+
return __ret;
|
|
36133
|
+
}
|
|
36134
|
+
#else
|
|
36135
|
+
__ai int64x2_t veor3q_s64(int64x2_t __p0, int64x2_t __p1, int64x2_t __p2) {
|
|
36136
|
+
int64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36137
|
+
int64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36138
|
+
int64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
36139
|
+
int64x2_t __ret;
|
|
36140
|
+
__ret = (int64x2_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 35);
|
|
36141
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36142
|
+
return __ret;
|
|
36143
|
+
}
|
|
36144
|
+
#endif
|
|
36145
|
+
|
|
36146
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36147
|
+
__ai int16x8_t veor3q_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) {
|
|
36148
|
+
int16x8_t __ret;
|
|
36149
|
+
__ret = (int16x8_t) __builtin_neon_veor3q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 33);
|
|
36150
|
+
return __ret;
|
|
36151
|
+
}
|
|
36152
|
+
#else
|
|
36153
|
+
__ai int16x8_t veor3q_s16(int16x8_t __p0, int16x8_t __p1, int16x8_t __p2) {
|
|
36154
|
+
int16x8_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36155
|
+
int16x8_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36156
|
+
int16x8_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36157
|
+
int16x8_t __ret;
|
|
36158
|
+
__ret = (int16x8_t) __builtin_neon_veor3q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 33);
|
|
36159
|
+
__ret = __builtin_shufflevector(__ret, __ret, 7, 6, 5, 4, 3, 2, 1, 0);
|
|
36160
|
+
return __ret;
|
|
36161
|
+
}
|
|
36162
|
+
#endif
|
|
36163
|
+
|
|
36164
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36165
|
+
__ai uint64x2_t vrax1q_u64(uint64x2_t __p0, uint64x2_t __p1) {
|
|
36166
|
+
uint64x2_t __ret;
|
|
36167
|
+
__ret = (uint64x2_t) __builtin_neon_vrax1q_v((int8x16_t)__p0, (int8x16_t)__p1, 51);
|
|
36168
|
+
return __ret;
|
|
36169
|
+
}
|
|
36170
|
+
#else
|
|
36171
|
+
__ai uint64x2_t vrax1q_u64(uint64x2_t __p0, uint64x2_t __p1) {
|
|
36172
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36173
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36174
|
+
uint64x2_t __ret;
|
|
36175
|
+
__ret = (uint64x2_t) __builtin_neon_vrax1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51);
|
|
36176
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36177
|
+
return __ret;
|
|
36178
|
+
}
|
|
36179
|
+
#endif
|
|
36180
|
+
|
|
36181
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36182
|
+
#define vxarq_u64(__p0, __p1, __p2) __extension__ ({ \
|
|
36183
|
+
uint64x2_t __s0 = __p0; \
|
|
36184
|
+
uint64x2_t __s1 = __p1; \
|
|
36185
|
+
uint64x2_t __ret; \
|
|
36186
|
+
__ret = (uint64x2_t) __builtin_neon_vxarq_v((int8x16_t)__s0, (int8x16_t)__s1, __p2, 51); \
|
|
36187
|
+
__ret; \
|
|
36188
|
+
})
|
|
36189
|
+
#else
|
|
36190
|
+
#define vxarq_u64(__p0, __p1, __p2) __extension__ ({ \
|
|
36191
|
+
uint64x2_t __s0 = __p0; \
|
|
36192
|
+
uint64x2_t __s1 = __p1; \
|
|
36193
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 1, 0); \
|
|
36194
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 1, 0); \
|
|
36195
|
+
uint64x2_t __ret; \
|
|
36196
|
+
__ret = (uint64x2_t) __builtin_neon_vxarq_v((int8x16_t)__rev0, (int8x16_t)__rev1, __p2, 51); \
|
|
36197
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0); \
|
|
36198
|
+
__ret; \
|
|
36199
|
+
})
|
|
36200
|
+
#endif
|
|
36201
|
+
|
|
36202
|
+
#endif
|
|
36203
|
+
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SHA512) && defined(__aarch64__)
|
|
36204
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36205
|
+
__ai uint64x2_t vsha512hq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36206
|
+
uint64x2_t __ret;
|
|
36207
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512hq_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51);
|
|
36208
|
+
return __ret;
|
|
36209
|
+
}
|
|
36210
|
+
#else
|
|
36211
|
+
__ai uint64x2_t vsha512hq_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36212
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36213
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36214
|
+
uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
36215
|
+
uint64x2_t __ret;
|
|
36216
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512hq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51);
|
|
36217
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36218
|
+
return __ret;
|
|
36219
|
+
}
|
|
36220
|
+
#endif
|
|
36221
|
+
|
|
36222
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36223
|
+
__ai uint64x2_t vsha512h2q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36224
|
+
uint64x2_t __ret;
|
|
36225
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512h2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51);
|
|
36226
|
+
return __ret;
|
|
36227
|
+
}
|
|
36228
|
+
#else
|
|
36229
|
+
__ai uint64x2_t vsha512h2q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36230
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36231
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36232
|
+
uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
36233
|
+
uint64x2_t __ret;
|
|
36234
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512h2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51);
|
|
36235
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36236
|
+
return __ret;
|
|
36237
|
+
}
|
|
36238
|
+
#endif
|
|
36239
|
+
|
|
36240
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36241
|
+
__ai uint64x2_t vsha512su0q_u64(uint64x2_t __p0, uint64x2_t __p1) {
|
|
36242
|
+
uint64x2_t __ret;
|
|
36243
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512su0q_v((int8x16_t)__p0, (int8x16_t)__p1, 51);
|
|
36244
|
+
return __ret;
|
|
36245
|
+
}
|
|
36246
|
+
#else
|
|
36247
|
+
__ai uint64x2_t vsha512su0q_u64(uint64x2_t __p0, uint64x2_t __p1) {
|
|
36248
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36249
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36250
|
+
uint64x2_t __ret;
|
|
36251
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512su0q_v((int8x16_t)__rev0, (int8x16_t)__rev1, 51);
|
|
36252
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36253
|
+
return __ret;
|
|
36254
|
+
}
|
|
36255
|
+
#endif
|
|
36256
|
+
|
|
36257
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36258
|
+
__ai uint64x2_t vsha512su1q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36259
|
+
uint64x2_t __ret;
|
|
36260
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512su1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 51);
|
|
36261
|
+
return __ret;
|
|
36262
|
+
}
|
|
36263
|
+
#else
|
|
36264
|
+
__ai uint64x2_t vsha512su1q_u64(uint64x2_t __p0, uint64x2_t __p1, uint64x2_t __p2) {
|
|
36265
|
+
uint64x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
36266
|
+
uint64x2_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 1, 0);
|
|
36267
|
+
uint64x2_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 1, 0);
|
|
36268
|
+
uint64x2_t __ret;
|
|
36269
|
+
__ret = (uint64x2_t) __builtin_neon_vsha512su1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 51);
|
|
36270
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
36271
|
+
return __ret;
|
|
36272
|
+
}
|
|
36273
|
+
#endif
|
|
36274
|
+
|
|
36275
|
+
#endif
|
|
36276
|
+
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM3) && defined(__aarch64__)
|
|
36277
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36278
|
+
__ai uint32x4_t vsm3partw1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36279
|
+
uint32x4_t __ret;
|
|
36280
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3partw1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
36281
|
+
return __ret;
|
|
36282
|
+
}
|
|
36283
|
+
#else
|
|
36284
|
+
__ai uint32x4_t vsm3partw1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36285
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36286
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36287
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
36288
|
+
uint32x4_t __ret;
|
|
36289
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3partw1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
36290
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36291
|
+
return __ret;
|
|
36292
|
+
}
|
|
36293
|
+
#endif
|
|
36294
|
+
|
|
36295
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36296
|
+
__ai uint32x4_t vsm3partw2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36297
|
+
uint32x4_t __ret;
|
|
36298
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3partw2q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
36299
|
+
return __ret;
|
|
36300
|
+
}
|
|
36301
|
+
#else
|
|
36302
|
+
__ai uint32x4_t vsm3partw2q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36303
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36304
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36305
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
36306
|
+
uint32x4_t __ret;
|
|
36307
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3partw2q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
36308
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36309
|
+
return __ret;
|
|
36310
|
+
}
|
|
36311
|
+
#endif
|
|
36312
|
+
|
|
36313
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36314
|
+
__ai uint32x4_t vsm3ss1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36315
|
+
uint32x4_t __ret;
|
|
36316
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3ss1q_v((int8x16_t)__p0, (int8x16_t)__p1, (int8x16_t)__p2, 50);
|
|
36317
|
+
return __ret;
|
|
36318
|
+
}
|
|
36319
|
+
#else
|
|
36320
|
+
__ai uint32x4_t vsm3ss1q_u32(uint32x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
36321
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36322
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36323
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__p2, __p2, 3, 2, 1, 0);
|
|
36324
|
+
uint32x4_t __ret;
|
|
36325
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3ss1q_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, 50);
|
|
36326
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36327
|
+
return __ret;
|
|
36328
|
+
}
|
|
36329
|
+
#endif
|
|
36330
|
+
|
|
36331
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36332
|
+
#define vsm3tt1aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36333
|
+
uint32x4_t __s0 = __p0; \
|
|
36334
|
+
uint32x4_t __s1 = __p1; \
|
|
36335
|
+
uint32x4_t __s2 = __p2; \
|
|
36336
|
+
uint32x4_t __ret; \
|
|
36337
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt1aq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \
|
|
36338
|
+
__ret; \
|
|
36339
|
+
})
|
|
36340
|
+
#else
|
|
36341
|
+
#define vsm3tt1aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36342
|
+
uint32x4_t __s0 = __p0; \
|
|
36343
|
+
uint32x4_t __s1 = __p1; \
|
|
36344
|
+
uint32x4_t __s2 = __p2; \
|
|
36345
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \
|
|
36346
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \
|
|
36347
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \
|
|
36348
|
+
uint32x4_t __ret; \
|
|
36349
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt1aq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \
|
|
36350
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \
|
|
36351
|
+
__ret; \
|
|
36352
|
+
})
|
|
36353
|
+
#endif
|
|
36354
|
+
|
|
36355
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36356
|
+
#define vsm3tt1bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36357
|
+
uint32x4_t __s0 = __p0; \
|
|
36358
|
+
uint32x4_t __s1 = __p1; \
|
|
36359
|
+
uint32x4_t __s2 = __p2; \
|
|
36360
|
+
uint32x4_t __ret; \
|
|
36361
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt1bq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \
|
|
36362
|
+
__ret; \
|
|
36363
|
+
})
|
|
36364
|
+
#else
|
|
36365
|
+
#define vsm3tt1bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36366
|
+
uint32x4_t __s0 = __p0; \
|
|
36367
|
+
uint32x4_t __s1 = __p1; \
|
|
36368
|
+
uint32x4_t __s2 = __p2; \
|
|
36369
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \
|
|
36370
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \
|
|
36371
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \
|
|
36372
|
+
uint32x4_t __ret; \
|
|
36373
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt1bq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \
|
|
36374
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \
|
|
36375
|
+
__ret; \
|
|
36376
|
+
})
|
|
36377
|
+
#endif
|
|
36378
|
+
|
|
36379
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36380
|
+
#define vsm3tt2aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36381
|
+
uint32x4_t __s0 = __p0; \
|
|
36382
|
+
uint32x4_t __s1 = __p1; \
|
|
36383
|
+
uint32x4_t __s2 = __p2; \
|
|
36384
|
+
uint32x4_t __ret; \
|
|
36385
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt2aq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \
|
|
36386
|
+
__ret; \
|
|
36387
|
+
})
|
|
36388
|
+
#else
|
|
36389
|
+
#define vsm3tt2aq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36390
|
+
uint32x4_t __s0 = __p0; \
|
|
36391
|
+
uint32x4_t __s1 = __p1; \
|
|
36392
|
+
uint32x4_t __s2 = __p2; \
|
|
36393
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \
|
|
36394
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \
|
|
36395
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \
|
|
36396
|
+
uint32x4_t __ret; \
|
|
36397
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt2aq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \
|
|
36398
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \
|
|
36399
|
+
__ret; \
|
|
36400
|
+
})
|
|
36401
|
+
#endif
|
|
36402
|
+
|
|
36403
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36404
|
+
#define vsm3tt2bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36405
|
+
uint32x4_t __s0 = __p0; \
|
|
36406
|
+
uint32x4_t __s1 = __p1; \
|
|
36407
|
+
uint32x4_t __s2 = __p2; \
|
|
36408
|
+
uint32x4_t __ret; \
|
|
36409
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt2bq_v((int8x16_t)__s0, (int8x16_t)__s1, (int8x16_t)__s2, __p3, 50); \
|
|
36410
|
+
__ret; \
|
|
36411
|
+
})
|
|
36412
|
+
#else
|
|
36413
|
+
#define vsm3tt2bq_u32(__p0, __p1, __p2, __p3) __extension__ ({ \
|
|
36414
|
+
uint32x4_t __s0 = __p0; \
|
|
36415
|
+
uint32x4_t __s1 = __p1; \
|
|
36416
|
+
uint32x4_t __s2 = __p2; \
|
|
36417
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__s0, __s0, 3, 2, 1, 0); \
|
|
36418
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__s1, __s1, 3, 2, 1, 0); \
|
|
36419
|
+
uint32x4_t __rev2; __rev2 = __builtin_shufflevector(__s2, __s2, 3, 2, 1, 0); \
|
|
36420
|
+
uint32x4_t __ret; \
|
|
36421
|
+
__ret = (uint32x4_t) __builtin_neon_vsm3tt2bq_v((int8x16_t)__rev0, (int8x16_t)__rev1, (int8x16_t)__rev2, __p3, 50); \
|
|
36422
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0); \
|
|
36423
|
+
__ret; \
|
|
36424
|
+
})
|
|
36425
|
+
#endif
|
|
36426
|
+
|
|
36427
|
+
#endif
|
|
36428
|
+
#if __ARM_ARCH >= 8 && defined(__ARM_FEATURE_SM4) && defined(__aarch64__)
|
|
36429
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36430
|
+
__ai uint32x4_t vsm4eq_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
36431
|
+
uint32x4_t __ret;
|
|
36432
|
+
__ret = (uint32x4_t) __builtin_neon_vsm4eq_v((int8x16_t)__p0, (int8x16_t)__p1, 50);
|
|
36433
|
+
return __ret;
|
|
36434
|
+
}
|
|
36435
|
+
#else
|
|
36436
|
+
__ai uint32x4_t vsm4eq_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
36437
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36438
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36439
|
+
uint32x4_t __ret;
|
|
36440
|
+
__ret = (uint32x4_t) __builtin_neon_vsm4eq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50);
|
|
36441
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36442
|
+
return __ret;
|
|
36443
|
+
}
|
|
36444
|
+
#endif
|
|
36445
|
+
|
|
36446
|
+
#ifdef __LITTLE_ENDIAN__
|
|
36447
|
+
__ai uint32x4_t vsm4ekeyq_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
36448
|
+
uint32x4_t __ret;
|
|
36449
|
+
__ret = (uint32x4_t) __builtin_neon_vsm4ekeyq_v((int8x16_t)__p0, (int8x16_t)__p1, 50);
|
|
36450
|
+
return __ret;
|
|
36451
|
+
}
|
|
36452
|
+
#else
|
|
36453
|
+
__ai uint32x4_t vsm4ekeyq_u32(uint32x4_t __p0, uint32x4_t __p1) {
|
|
36454
|
+
uint32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
36455
|
+
uint32x4_t __rev1; __rev1 = __builtin_shufflevector(__p1, __p1, 3, 2, 1, 0);
|
|
36456
|
+
uint32x4_t __ret;
|
|
36457
|
+
__ret = (uint32x4_t) __builtin_neon_vsm4ekeyq_v((int8x16_t)__rev0, (int8x16_t)__rev1, 50);
|
|
36458
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
36459
|
+
return __ret;
|
|
36460
|
+
}
|
|
36461
|
+
#endif
|
|
36462
|
+
|
|
35686
36463
|
#endif
|
|
35687
36464
|
#if __ARM_ARCH >= 8 && defined(__aarch64__)
|
|
35688
36465
|
#ifdef __LITTLE_ENDIAN__
|
|
@@ -37962,6 +38739,136 @@ __ai float64x1_t vrndx_f64(float64x1_t __p0) {
|
|
|
37962
38739
|
__ret = (float64x1_t) __builtin_neon_vrndx_v((int8x8_t)__p0, 10);
|
|
37963
38740
|
return __ret;
|
|
37964
38741
|
}
|
|
38742
|
+
#endif
|
|
38743
|
+
#if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_FRINT)
|
|
38744
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38745
|
+
__ai float32x4_t vrnd32xq_f32(float32x4_t __p0) {
|
|
38746
|
+
float32x4_t __ret;
|
|
38747
|
+
__ret = (float32x4_t) __builtin_neon_vrnd32xq_v((int8x16_t)__p0, 41);
|
|
38748
|
+
return __ret;
|
|
38749
|
+
}
|
|
38750
|
+
#else
|
|
38751
|
+
__ai float32x4_t vrnd32xq_f32(float32x4_t __p0) {
|
|
38752
|
+
float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
38753
|
+
float32x4_t __ret;
|
|
38754
|
+
__ret = (float32x4_t) __builtin_neon_vrnd32xq_v((int8x16_t)__rev0, 41);
|
|
38755
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
38756
|
+
return __ret;
|
|
38757
|
+
}
|
|
38758
|
+
#endif
|
|
38759
|
+
|
|
38760
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38761
|
+
__ai float32x2_t vrnd32x_f32(float32x2_t __p0) {
|
|
38762
|
+
float32x2_t __ret;
|
|
38763
|
+
__ret = (float32x2_t) __builtin_neon_vrnd32x_v((int8x8_t)__p0, 9);
|
|
38764
|
+
return __ret;
|
|
38765
|
+
}
|
|
38766
|
+
#else
|
|
38767
|
+
__ai float32x2_t vrnd32x_f32(float32x2_t __p0) {
|
|
38768
|
+
float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
38769
|
+
float32x2_t __ret;
|
|
38770
|
+
__ret = (float32x2_t) __builtin_neon_vrnd32x_v((int8x8_t)__rev0, 9);
|
|
38771
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
38772
|
+
return __ret;
|
|
38773
|
+
}
|
|
38774
|
+
#endif
|
|
38775
|
+
|
|
38776
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38777
|
+
__ai float32x4_t vrnd32zq_f32(float32x4_t __p0) {
|
|
38778
|
+
float32x4_t __ret;
|
|
38779
|
+
__ret = (float32x4_t) __builtin_neon_vrnd32zq_v((int8x16_t)__p0, 41);
|
|
38780
|
+
return __ret;
|
|
38781
|
+
}
|
|
38782
|
+
#else
|
|
38783
|
+
__ai float32x4_t vrnd32zq_f32(float32x4_t __p0) {
|
|
38784
|
+
float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
38785
|
+
float32x4_t __ret;
|
|
38786
|
+
__ret = (float32x4_t) __builtin_neon_vrnd32zq_v((int8x16_t)__rev0, 41);
|
|
38787
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
38788
|
+
return __ret;
|
|
38789
|
+
}
|
|
38790
|
+
#endif
|
|
38791
|
+
|
|
38792
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38793
|
+
__ai float32x2_t vrnd32z_f32(float32x2_t __p0) {
|
|
38794
|
+
float32x2_t __ret;
|
|
38795
|
+
__ret = (float32x2_t) __builtin_neon_vrnd32z_v((int8x8_t)__p0, 9);
|
|
38796
|
+
return __ret;
|
|
38797
|
+
}
|
|
38798
|
+
#else
|
|
38799
|
+
__ai float32x2_t vrnd32z_f32(float32x2_t __p0) {
|
|
38800
|
+
float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
38801
|
+
float32x2_t __ret;
|
|
38802
|
+
__ret = (float32x2_t) __builtin_neon_vrnd32z_v((int8x8_t)__rev0, 9);
|
|
38803
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
38804
|
+
return __ret;
|
|
38805
|
+
}
|
|
38806
|
+
#endif
|
|
38807
|
+
|
|
38808
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38809
|
+
__ai float32x4_t vrnd64xq_f32(float32x4_t __p0) {
|
|
38810
|
+
float32x4_t __ret;
|
|
38811
|
+
__ret = (float32x4_t) __builtin_neon_vrnd64xq_v((int8x16_t)__p0, 41);
|
|
38812
|
+
return __ret;
|
|
38813
|
+
}
|
|
38814
|
+
#else
|
|
38815
|
+
__ai float32x4_t vrnd64xq_f32(float32x4_t __p0) {
|
|
38816
|
+
float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
38817
|
+
float32x4_t __ret;
|
|
38818
|
+
__ret = (float32x4_t) __builtin_neon_vrnd64xq_v((int8x16_t)__rev0, 41);
|
|
38819
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
38820
|
+
return __ret;
|
|
38821
|
+
}
|
|
38822
|
+
#endif
|
|
38823
|
+
|
|
38824
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38825
|
+
__ai float32x2_t vrnd64x_f32(float32x2_t __p0) {
|
|
38826
|
+
float32x2_t __ret;
|
|
38827
|
+
__ret = (float32x2_t) __builtin_neon_vrnd64x_v((int8x8_t)__p0, 9);
|
|
38828
|
+
return __ret;
|
|
38829
|
+
}
|
|
38830
|
+
#else
|
|
38831
|
+
__ai float32x2_t vrnd64x_f32(float32x2_t __p0) {
|
|
38832
|
+
float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
38833
|
+
float32x2_t __ret;
|
|
38834
|
+
__ret = (float32x2_t) __builtin_neon_vrnd64x_v((int8x8_t)__rev0, 9);
|
|
38835
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
38836
|
+
return __ret;
|
|
38837
|
+
}
|
|
38838
|
+
#endif
|
|
38839
|
+
|
|
38840
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38841
|
+
__ai float32x4_t vrnd64zq_f32(float32x4_t __p0) {
|
|
38842
|
+
float32x4_t __ret;
|
|
38843
|
+
__ret = (float32x4_t) __builtin_neon_vrnd64zq_v((int8x16_t)__p0, 41);
|
|
38844
|
+
return __ret;
|
|
38845
|
+
}
|
|
38846
|
+
#else
|
|
38847
|
+
__ai float32x4_t vrnd64zq_f32(float32x4_t __p0) {
|
|
38848
|
+
float32x4_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 3, 2, 1, 0);
|
|
38849
|
+
float32x4_t __ret;
|
|
38850
|
+
__ret = (float32x4_t) __builtin_neon_vrnd64zq_v((int8x16_t)__rev0, 41);
|
|
38851
|
+
__ret = __builtin_shufflevector(__ret, __ret, 3, 2, 1, 0);
|
|
38852
|
+
return __ret;
|
|
38853
|
+
}
|
|
38854
|
+
#endif
|
|
38855
|
+
|
|
38856
|
+
#ifdef __LITTLE_ENDIAN__
|
|
38857
|
+
__ai float32x2_t vrnd64z_f32(float32x2_t __p0) {
|
|
38858
|
+
float32x2_t __ret;
|
|
38859
|
+
__ret = (float32x2_t) __builtin_neon_vrnd64z_v((int8x8_t)__p0, 9);
|
|
38860
|
+
return __ret;
|
|
38861
|
+
}
|
|
38862
|
+
#else
|
|
38863
|
+
__ai float32x2_t vrnd64z_f32(float32x2_t __p0) {
|
|
38864
|
+
float32x2_t __rev0; __rev0 = __builtin_shufflevector(__p0, __p0, 1, 0);
|
|
38865
|
+
float32x2_t __ret;
|
|
38866
|
+
__ret = (float32x2_t) __builtin_neon_vrnd64z_v((int8x8_t)__rev0, 9);
|
|
38867
|
+
__ret = __builtin_shufflevector(__ret, __ret, 1, 0);
|
|
38868
|
+
return __ret;
|
|
38869
|
+
}
|
|
38870
|
+
#endif
|
|
38871
|
+
|
|
37965
38872
|
#endif
|
|
37966
38873
|
#if __ARM_ARCH >= 8 && defined(__aarch64__) && defined(__ARM_FEATURE_NUMERIC_MAXMIN)
|
|
37967
38874
|
#ifdef __LITTLE_ENDIAN__
|
|
@@ -42710,7 +43617,7 @@ __ai float32x2_t vfms_f32(float32x2_t __p0, float32x2_t __p1, float32x2_t __p2)
|
|
|
42710
43617
|
#endif
|
|
42711
43618
|
|
|
42712
43619
|
#endif
|
|
42713
|
-
#if defined(
|
|
43620
|
+
#if defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__)
|
|
42714
43621
|
#ifdef __LITTLE_ENDIAN__
|
|
42715
43622
|
__ai float32x4_t vfmlalq_high_f16(float32x4_t __p0, float16x8_t __p1, float16x8_t __p2) {
|
|
42716
43623
|
float32x4_t __ret;
|
|
@@ -46786,6 +47693,11 @@ __ai int64_t vaddd_s64(int64_t __p0, int64_t __p1) {
|
|
|
46786
47693
|
__ret = (int64_t) __builtin_neon_vaddd_s64(__p0, __p1);
|
|
46787
47694
|
return __ret;
|
|
46788
47695
|
}
|
|
47696
|
+
__ai poly128_t vaddq_p128(poly128_t __p0, poly128_t __p1) {
|
|
47697
|
+
poly128_t __ret;
|
|
47698
|
+
__ret = (poly128_t) __builtin_neon_vaddq_p128(__p0, __p1);
|
|
47699
|
+
return __ret;
|
|
47700
|
+
}
|
|
46789
47701
|
#ifdef __LITTLE_ENDIAN__
|
|
46790
47702
|
__ai uint16x8_t vaddhn_high_u32(uint16x4_t __p0, uint32x4_t __p1, uint32x4_t __p2) {
|
|
46791
47703
|
uint16x8_t __ret;
|
|
@@ -67227,7 +68139,7 @@ __ai float32x4_t vcvtq_low_f32_bf16(bfloat16x8_t __p0) {
|
|
|
67227
68139
|
#endif
|
|
67228
68140
|
|
|
67229
68141
|
#endif
|
|
67230
|
-
#if defined(
|
|
68142
|
+
#if defined(__ARM_FEATURE_FP16_FML) && defined(__aarch64__)
|
|
67231
68143
|
#ifdef __LITTLE_ENDIAN__
|
|
67232
68144
|
#define vfmlalq_lane_high_f16(__p0_869, __p1_869, __p2_869, __p3_869) __extension__ ({ \
|
|
67233
68145
|
float32x4_t __s0_869 = __p0_869; \
|