@cpp-linter/clang-tidy-linux-arm64 20.1.0 → 20.1.8

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Files changed (15) hide show
  1. package/README.md +2 -2
  2. package/bin/clang-tidy +2 -2
  3. package/lib/clang/20/include/__clang_cuda_intrinsics.h +8 -8
  4. package/lib/clang/20/include/amdgpuintrin.h +1 -1
  5. package/lib/clang/20/include/avx10_2_512convertintrin.h +24 -22
  6. package/lib/clang/20/include/avx10_2_512satcvtdsintrin.h +28 -24
  7. package/lib/clang/20/include/avx10_2_512satcvtintrin.h +84 -84
  8. package/lib/clang/20/include/avx10_2convertintrin.h +50 -62
  9. package/lib/clang/20/include/avx10_2minmaxintrin.h +0 -45
  10. package/lib/clang/20/include/avx10_2niintrin.h +0 -1666
  11. package/lib/clang/20/include/avx10_2satcvtdsintrin.h +52 -158
  12. package/lib/clang/20/include/avx10_2satcvtintrin.h +88 -200
  13. package/lib/clang/20/include/nvptxintrin.h +2 -1
  14. package/lib/clang/20/include/vecintrin.h +5 -0
  15. package/package.json +5 -5
package/lib/clang/20/include/avx10_2satcvtintrin.h CHANGED
@@ -14,431 +14,319 @@
14
14
  #ifndef __AVX10_2SATCVTINTRIN_H
15
15
  #define __AVX10_2SATCVTINTRIN_H
16
16
 
17
- #define _mm_ipcvtbf16_epi8(A) \
17
+ #define _mm_ipcvts_bf16_epi8(A) \
18
18
  ((__m128i)__builtin_ia32_vcvtbf162ibs128((__v8bf)(__m128bh)(A)))
19
19
 
20
- #define _mm_mask_ipcvtbf16_epi8(W, U, A) \
20
+ #define _mm_mask_ipcvts_bf16_epi8(W, U, A) \
21
21
  ((__m128i)__builtin_ia32_selectw_128( \
22
- (__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epi8(A), (__v8hi)(__m128i)(W)))
22
+ (__mmask8)(U), (__v8hi)_mm_ipcvts_bf16_epi8(A), (__v8hi)(__m128i)(W)))
23
23
 
24
- #define _mm_maskz_ipcvtbf16_epi8(U, A) \
24
+ #define _mm_maskz_ipcvts_bf16_epi8(U, A) \
25
25
  ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
26
- (__v8hi)_mm_ipcvtbf16_epi8(A), \
26
+ (__v8hi)_mm_ipcvts_bf16_epi8(A), \
27
27
  (__v8hi)_mm_setzero_si128()))
28
28
 
29
- #define _mm256_ipcvtbf16_epi8(A) \
29
+ #define _mm256_ipcvts_bf16_epi8(A) \
30
30
  ((__m256i)__builtin_ia32_vcvtbf162ibs256((__v16bf)(__m256bh)(A)))
31
31
 
32
- #define _mm256_mask_ipcvtbf16_epi8(W, U, A) \
32
+ #define _mm256_mask_ipcvts_bf16_epi8(W, U, A) \
33
33
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
34
- (__v16hi)_mm256_ipcvtbf16_epi8(A), \
34
+ (__v16hi)_mm256_ipcvts_bf16_epi8(A), \
35
35
  (__v16hi)(__m256i)(W)))
36
36
 
37
- #define _mm256_maskz_ipcvtbf16_epi8(U, A) \
37
+ #define _mm256_maskz_ipcvts_bf16_epi8(U, A) \
38
38
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
39
- (__v16hi)_mm256_ipcvtbf16_epi8(A), \
39
+ (__v16hi)_mm256_ipcvts_bf16_epi8(A), \
40
40
  (__v16hi)_mm256_setzero_si256()))
41
41
 
42
- #define _mm_ipcvtbf16_epu8(A) \
42
+ #define _mm_ipcvts_bf16_epu8(A) \
43
43
  ((__m128i)__builtin_ia32_vcvtbf162iubs128((__v8bf)(__m128bh)(A)))
44
44
 
45
- #define _mm_mask_ipcvtbf16_epu8(W, U, A) \
45
+ #define _mm_mask_ipcvts_bf16_epu8(W, U, A) \
46
46
  ((__m128i)__builtin_ia32_selectw_128( \
47
- (__mmask8)(U), (__v8hi)_mm_ipcvtbf16_epu8(A), (__v8hi)(__m128i)(W)))
47
+ (__mmask8)(U), (__v8hi)_mm_ipcvts_bf16_epu8(A), (__v8hi)(__m128i)(W)))
48
48
 
49
- #define _mm_maskz_ipcvtbf16_epu8(U, A) \
49
+ #define _mm_maskz_ipcvts_bf16_epu8(U, A) \
50
50
  ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
51
- (__v8hi)_mm_ipcvtbf16_epu8(A), \
51
+ (__v8hi)_mm_ipcvts_bf16_epu8(A), \
52
52
  (__v8hi)_mm_setzero_si128()))
53
53
 
54
- #define _mm256_ipcvtbf16_epu8(A) \
54
+ #define _mm256_ipcvts_bf16_epu8(A) \
55
55
  ((__m256i)__builtin_ia32_vcvtbf162iubs256((__v16bf)(__m256bh)(A)))
56
56
 
57
- #define _mm256_mask_ipcvtbf16_epu8(W, U, A) \
57
+ #define _mm256_mask_ipcvts_bf16_epu8(W, U, A) \
58
58
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
59
- (__v16hi)_mm256_ipcvtbf16_epu8(A), \
59
+ (__v16hi)_mm256_ipcvts_bf16_epu8(A), \
60
60
  (__v16hi)(__m256i)(W)))
61
61
 
62
- #define _mm256_maskz_ipcvtbf16_epu8(U, A) \
62
+ #define _mm256_maskz_ipcvts_bf16_epu8(U, A) \
63
63
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
64
- (__v16hi)_mm256_ipcvtbf16_epu8(A), \
64
+ (__v16hi)_mm256_ipcvts_bf16_epu8(A), \
65
65
  (__v16hi)_mm256_setzero_si256()))
66
66
 
67
- #define _mm_ipcvtph_epi8(A) \
67
+ #define _mm_ipcvts_ph_epi8(A) \
68
68
  ((__m128i)__builtin_ia32_vcvtph2ibs128_mask( \
69
69
  (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
70
70
 
71
- #define _mm_mask_ipcvtph_epi8(W, U, A) \
71
+ #define _mm_mask_ipcvts_ph_epi8(W, U, A) \
72
72
  ((__m128i)__builtin_ia32_vcvtph2ibs128_mask((__v8hf)(__m128h)(A), \
73
73
  (__v8hu)(W), (__mmask8)(U)))
74
74
 
75
- #define _mm_maskz_ipcvtph_epi8(U, A) \
75
+ #define _mm_maskz_ipcvts_ph_epi8(U, A) \
76
76
  ((__m128i)__builtin_ia32_vcvtph2ibs128_mask( \
77
77
  (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
78
78
 
79
- #define _mm256_ipcvtph_epi8(A) \
79
+ #define _mm256_ipcvts_ph_epi8(A) \
80
80
  ((__m256i)__builtin_ia32_vcvtph2ibs256_mask( \
81
81
  (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
82
82
  _MM_FROUND_CUR_DIRECTION))
83
83
 
84
- #define _mm256_mask_ipcvtph_epi8(W, U, A) \
84
+ #define _mm256_mask_ipcvts_ph_epi8(W, U, A) \
85
85
  ((__m256i)__builtin_ia32_vcvtph2ibs256_mask((__v16hf)(__m256h)(A), \
86
86
  (__v16hu)(W), (__mmask16)(U), \
87
87
  _MM_FROUND_CUR_DIRECTION))
88
88
 
89
- #define _mm256_maskz_ipcvtph_epi8(U, A) \
89
+ #define _mm256_maskz_ipcvts_ph_epi8(U, A) \
90
90
  ((__m256i)__builtin_ia32_vcvtph2ibs256_mask( \
91
91
  (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
92
92
  (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
93
93
 
94
- #define _mm256_ipcvt_roundph_epi8(A, R) \
95
- ((__m256i)__builtin_ia32_vcvtph2ibs256_mask((__v16hf)(__m256h)(A), \
96
- (__v16hu)_mm256_setzero_si256(), \
97
- (__mmask16)-1, (const int)R))
98
-
99
- #define _mm256_mask_ipcvt_roundph_epi8(W, U, A, R) \
100
- ((__m256i)__builtin_ia32_vcvtph2ibs256_mask( \
101
- (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
102
-
103
- #define _mm256_maskz_ipcvt_roundph_epi8(U, A, R) \
104
- ((__m256i)__builtin_ia32_vcvtph2ibs256_mask((__v16hf)(__m256h)(A), \
105
- (__v16hu)_mm256_setzero_si256(), \
106
- (__mmask16)(U), (const int)R))
107
-
108
- #define _mm_ipcvtph_epu8(A) \
94
+ #define _mm_ipcvts_ph_epu8(A) \
109
95
  ((__m128i)__builtin_ia32_vcvtph2iubs128_mask( \
110
96
  (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
111
97
 
112
- #define _mm_mask_ipcvtph_epu8(W, U, A) \
98
+ #define _mm_mask_ipcvts_ph_epu8(W, U, A) \
113
99
  ((__m128i)__builtin_ia32_vcvtph2iubs128_mask((__v8hf)(__m128h)(A), \
114
100
  (__v8hu)(W), (__mmask8)(U)))
115
101
 
116
- #define _mm_maskz_ipcvtph_epu8(U, A) \
102
+ #define _mm_maskz_ipcvts_ph_epu8(U, A) \
117
103
  ((__m128i)__builtin_ia32_vcvtph2iubs128_mask( \
118
104
  (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
119
105
 
120
- #define _mm256_ipcvtph_epu8(A) \
106
+ #define _mm256_ipcvts_ph_epu8(A) \
121
107
  ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
122
108
  (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
123
109
  _MM_FROUND_CUR_DIRECTION))
124
110
 
125
- #define _mm256_mask_ipcvtph_epu8(W, U, A) \
111
+ #define _mm256_mask_ipcvts_ph_epu8(W, U, A) \
126
112
  ((__m256i)__builtin_ia32_vcvtph2iubs256_mask((__v16hf)(__m256h)(A), \
127
113
  (__v16hu)(W), (__mmask16)(U), \
128
114
  _MM_FROUND_CUR_DIRECTION))
129
115
 
130
- #define _mm256_maskz_ipcvtph_epu8(U, A) \
116
+ #define _mm256_maskz_ipcvts_ph_epu8(U, A) \
131
117
  ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
132
118
  (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
133
119
  (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
134
120
 
135
- #define _mm256_ipcvt_roundph_epu8(A, R) \
136
- ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
137
- (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
138
- (const int)R))
139
-
140
- #define _mm256_mask_ipcvt_roundph_epu8(W, U, A, R) \
141
- ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
142
- (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
143
-
144
- #define _mm256_maskz_ipcvt_roundph_epu8(U, A, R) \
145
- ((__m256i)__builtin_ia32_vcvtph2iubs256_mask( \
146
- (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)(U), \
147
- (const int)R))
148
-
149
- #define _mm_ipcvtps_epi8(A) \
121
+ #define _mm_ipcvts_ps_epi8(A) \
150
122
  ((__m128i)__builtin_ia32_vcvtps2ibs128_mask( \
151
123
  (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
152
124
 
153
- #define _mm_mask_ipcvtps_epi8(W, U, A) \
125
+ #define _mm_mask_ipcvts_ps_epi8(W, U, A) \
154
126
  ((__m128i)__builtin_ia32_vcvtps2ibs128_mask((__v4sf)(__m128)(A), \
155
127
  (__v4su)(W), (__mmask8)(U)))
156
128
 
157
- #define _mm_maskz_ipcvtps_epi8(U, A) \
129
+ #define _mm_maskz_ipcvts_ps_epi8(U, A) \
158
130
  ((__m128i)__builtin_ia32_vcvtps2ibs128_mask( \
159
131
  (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
160
132
 
161
- #define _mm256_ipcvtps_epi8(A) \
133
+ #define _mm256_ipcvts_ps_epi8(A) \
162
134
  ((__m256i)__builtin_ia32_vcvtps2ibs256_mask( \
163
135
  (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
164
136
  _MM_FROUND_CUR_DIRECTION))
165
137
 
166
- #define _mm256_mask_ipcvtps_epi8(W, U, A) \
138
+ #define _mm256_mask_ipcvts_ps_epi8(W, U, A) \
167
139
  ((__m256i)__builtin_ia32_vcvtps2ibs256_mask((__v8sf)(__m256)(A), \
168
140
  (__v8su)(W), (__mmask8)(U), \
169
141
  _MM_FROUND_CUR_DIRECTION))
170
142
 
171
- #define _mm256_maskz_ipcvtps_epi8(U, A) \
143
+ #define _mm256_maskz_ipcvts_ps_epi8(U, A) \
172
144
  ((__m256i)__builtin_ia32_vcvtps2ibs256_mask( \
173
145
  (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
174
146
  _MM_FROUND_CUR_DIRECTION))
175
147
 
176
- #define _mm256_ipcvt_roundps_epi8(A, R) \
177
- ((__m256i)__builtin_ia32_vcvtps2ibs256_mask((__v8sf)(__m256)(A), \
178
- (__v8su)_mm256_setzero_si256(), \
179
- (__mmask8)-1, (const int)R))
180
-
181
- #define _mm256_mask_ipcvt_roundps_epi8(W, U, A, R) \
182
- ((__m256i)__builtin_ia32_vcvtps2ibs256_mask( \
183
- (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
184
-
185
- #define _mm256_maskz_ipcvt_roundps_epi8(U, A, R) \
186
- ((__m256i)__builtin_ia32_vcvtps2ibs256_mask((__v8sf)(__m256)(A), \
187
- (__v8su)_mm256_setzero_si256(), \
188
- (__mmask8)(U), (const int)R))
189
-
190
- #define _mm_ipcvtps_epu8(A) \
148
+ #define _mm_ipcvts_ps_epu8(A) \
191
149
  ((__m128i)__builtin_ia32_vcvtps2iubs128_mask( \
192
150
  (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
193
151
 
194
- #define _mm_mask_ipcvtps_epu8(W, U, A) \
152
+ #define _mm_mask_ipcvts_ps_epu8(W, U, A) \
195
153
  ((__m128i)__builtin_ia32_vcvtps2iubs128_mask((__v4sf)(__m128)(A), \
196
154
  (__v4su)(W), (__mmask8)(U)))
197
155
 
198
- #define _mm_maskz_ipcvtps_epu8(U, A) \
156
+ #define _mm_maskz_ipcvts_ps_epu8(U, A) \
199
157
  ((__m128i)__builtin_ia32_vcvtps2iubs128_mask( \
200
158
  (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
201
159
 
202
- #define _mm256_ipcvtps_epu8(A) \
160
+ #define _mm256_ipcvts_ps_epu8(A) \
203
161
  ((__m256i)__builtin_ia32_vcvtps2iubs256_mask( \
204
162
  (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
205
163
  _MM_FROUND_CUR_DIRECTION))
206
164
 
207
- #define _mm256_mask_ipcvtps_epu8(W, U, A) \
165
+ #define _mm256_mask_ipcvts_ps_epu8(W, U, A) \
208
166
  ((__m256i)__builtin_ia32_vcvtps2iubs256_mask((__v8sf)(__m256)(A), \
209
167
  (__v8su)(W), (__mmask8)(U), \
210
168
  _MM_FROUND_CUR_DIRECTION))
211
169
 
212
- #define _mm256_maskz_ipcvtps_epu8(U, A) \
170
+ #define _mm256_maskz_ipcvts_ps_epu8(U, A) \
213
171
  ((__m256i)__builtin_ia32_vcvtps2iubs256_mask( \
214
172
  (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
215
173
  _MM_FROUND_CUR_DIRECTION))
216
174
 
217
- #define _mm256_ipcvt_roundps_epu8(A, R) \
218
- ((__m256i)__builtin_ia32_vcvtps2iubs256_mask((__v8sf)(__m256)(A), \
219
- (__v8su)_mm256_setzero_si256(), \
220
- (__mmask8)-1, (const int)R))
221
-
222
- #define _mm256_mask_ipcvt_roundps_epu8(W, U, A, R) \
223
- ((__m256i)__builtin_ia32_vcvtps2iubs256_mask( \
224
- (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
225
-
226
- #define _mm256_maskz_ipcvt_roundps_epu8(U, A, R) \
227
- ((__m256i)__builtin_ia32_vcvtps2iubs256_mask((__v8sf)(__m256)(A), \
228
- (__v8su)_mm256_setzero_si256(), \
229
- (__mmask8)(U), (const int)R))
230
-
231
- #define _mm_ipcvttbf16_epi8(A) \
175
+ #define _mm_ipcvtts_bf16_epi8(A) \
232
176
  ((__m128i)__builtin_ia32_vcvttbf162ibs128((__v8bf)(__m128bh)(A)))
233
177
 
234
- #define _mm_mask_ipcvttbf16_epi8(W, U, A) \
178
+ #define _mm_mask_ipcvtts_bf16_epi8(W, U, A) \
235
179
  ((__m128i)__builtin_ia32_selectw_128( \
236
- (__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epi8(A), (__v8hi)(__m128i)(W)))
180
+ (__mmask8)(U), (__v8hi)_mm_ipcvtts_bf16_epi8(A), (__v8hi)(__m128i)(W)))
237
181
 
238
- #define _mm_maskz_ipcvttbf16_epi8(U, A) \
182
+ #define _mm_maskz_ipcvtts_bf16_epi8(U, A) \
239
183
  ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
240
- (__v8hi)_mm_ipcvttbf16_epi8(A), \
184
+ (__v8hi)_mm_ipcvtts_bf16_epi8(A), \
241
185
  (__v8hi)_mm_setzero_si128()))
242
186
 
243
- #define _mm256_ipcvttbf16_epi8(A) \
187
+ #define _mm256_ipcvtts_bf16_epi8(A) \
244
188
  ((__m256i)__builtin_ia32_vcvttbf162ibs256((__v16bf)(__m256bh)(A)))
245
189
 
246
- #define _mm256_mask_ipcvttbf16_epi8(W, U, A) \
190
+ #define _mm256_mask_ipcvtts_bf16_epi8(W, U, A) \
247
191
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
248
- (__v16hi)_mm256_ipcvttbf16_epi8(A), \
192
+ (__v16hi)_mm256_ipcvtts_bf16_epi8(A), \
249
193
  (__v16hi)(__m256i)(W)))
250
194
 
251
- #define _mm256_maskz_ipcvttbf16_epi8(U, A) \
195
+ #define _mm256_maskz_ipcvtts_bf16_epi8(U, A) \
252
196
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
253
- (__v16hi)_mm256_ipcvttbf16_epi8(A), \
197
+ (__v16hi)_mm256_ipcvtts_bf16_epi8(A), \
254
198
  (__v16hi)_mm256_setzero_si256()))
255
199
 
256
- #define _mm_ipcvttbf16_epu8(A) \
200
+ #define _mm_ipcvtts_bf16_epu8(A) \
257
201
  ((__m128i)__builtin_ia32_vcvttbf162iubs128((__v8bf)(__m128bh)(A)))
258
202
 
259
- #define _mm_mask_ipcvttbf16_epu8(W, U, A) \
203
+ #define _mm_mask_ipcvtts_bf16_epu8(W, U, A) \
260
204
  ((__m128i)__builtin_ia32_selectw_128( \
261
- (__mmask8)(U), (__v8hi)_mm_ipcvttbf16_epu8(A), (__v8hi)(__m128i)(W)))
205
+ (__mmask8)(U), (__v8hi)_mm_ipcvtts_bf16_epu8(A), (__v8hi)(__m128i)(W)))
262
206
 
263
- #define _mm_maskz_ipcvttbf16_epu8(U, A) \
207
+ #define _mm_maskz_ipcvtts_bf16_epu8(U, A) \
264
208
  ((__m128i)__builtin_ia32_selectw_128((__mmask8)(U), \
265
- (__v8hi)_mm_ipcvttbf16_epu8(A), \
209
+ (__v8hi)_mm_ipcvtts_bf16_epu8(A), \
266
210
  (__v8hi)_mm_setzero_si128()))
267
211
 
268
- #define _mm256_ipcvttbf16_epu8(A) \
212
+ #define _mm256_ipcvtts_bf16_epu8(A) \
269
213
  ((__m256i)__builtin_ia32_vcvttbf162iubs256((__v16bf)(__m256bh)(A)))
270
214
 
271
- #define _mm256_mask_ipcvttbf16_epu8(W, U, A) \
215
+ #define _mm256_mask_ipcvtts_bf16_epu8(W, U, A) \
272
216
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
273
- (__v16hi)_mm256_ipcvttbf16_epu8(A), \
217
+ (__v16hi)_mm256_ipcvtts_bf16_epu8(A), \
274
218
  (__v16hi)(__m256i)(W)))
275
219
 
276
- #define _mm256_maskz_ipcvttbf16_epu8(U, A) \
220
+ #define _mm256_maskz_ipcvtts_bf16_epu8(U, A) \
277
221
  ((__m256i)__builtin_ia32_selectw_256((__mmask16)(U), \
278
- (__v16hi)_mm256_ipcvttbf16_epu8(A), \
222
+ (__v16hi)_mm256_ipcvtts_bf16_epu8(A), \
279
223
  (__v16hi)_mm256_setzero_si256()))
280
224
 
281
- #define _mm_ipcvttph_epi8(A) \
225
+ #define _mm_ipcvtts_ph_epi8(A) \
282
226
  ((__m128i)__builtin_ia32_vcvttph2ibs128_mask( \
283
227
  (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
284
228
 
285
- #define _mm_mask_ipcvttph_epi8(W, U, A) \
229
+ #define _mm_mask_ipcvtts_ph_epi8(W, U, A) \
286
230
  ((__m128i)__builtin_ia32_vcvttph2ibs128_mask((__v8hf)(__m128h)(A), \
287
231
  (__v8hu)(W), (__mmask8)(U)))
288
232
 
289
- #define _mm_maskz_ipcvttph_epi8(U, A) \
233
+ #define _mm_maskz_ipcvtts_ph_epi8(U, A) \
290
234
  ((__m128i)__builtin_ia32_vcvttph2ibs128_mask( \
291
235
  (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
292
236
 
293
- #define _mm256_ipcvttph_epi8(A) \
237
+ #define _mm256_ipcvtts_ph_epi8(A) \
294
238
  ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
295
239
  (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
296
240
  _MM_FROUND_CUR_DIRECTION))
297
241
 
298
- #define _mm256_mask_ipcvttph_epi8(W, U, A) \
242
+ #define _mm256_mask_ipcvtts_ph_epi8(W, U, A) \
299
243
  ((__m256i)__builtin_ia32_vcvttph2ibs256_mask((__v16hf)(__m256h)(A), \
300
244
  (__v16hu)(W), (__mmask16)(U), \
301
245
  _MM_FROUND_CUR_DIRECTION))
302
246
 
303
- #define _mm256_maskz_ipcvttph_epi8(U, A) \
247
+ #define _mm256_maskz_ipcvtts_ph_epi8(U, A) \
304
248
  ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
305
249
  (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
306
250
  (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
307
251
 
308
- #define _mm256_ipcvtt_roundph_epi8(A, R) \
309
- ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
310
- (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
311
- (const int)R))
312
-
313
- #define _mm256_mask_ipcvtt_roundph_epi8(W, U, A, R) \
314
- ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
315
- (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
316
-
317
- #define _mm256_maskz_ipcvtt_roundph_epi8(U, A, R) \
318
- ((__m256i)__builtin_ia32_vcvttph2ibs256_mask( \
319
- (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)(U), \
320
- (const int)R))
321
-
322
- #define _mm_ipcvttph_epu8(A) \
252
+ #define _mm_ipcvtts_ph_epu8(A) \
323
253
  ((__m128i)__builtin_ia32_vcvttph2iubs128_mask( \
324
254
  (__v8hf)(__m128h)(A), (__v8hu)_mm_setzero_si128(), (__mmask8)-1))
325
255
 
326
- #define _mm_mask_ipcvttph_epu8(W, U, A) \
256
+ #define _mm_mask_ipcvtts_ph_epu8(W, U, A) \
327
257
  ((__m128i)__builtin_ia32_vcvttph2iubs128_mask((__v8hf)(__m128h)(A), \
328
258
  (__v8hu)(W), (__mmask8)(U)))
329
259
 
330
- #define _mm_maskz_ipcvttph_epu8(U, A) \
260
+ #define _mm_maskz_ipcvtts_ph_epu8(U, A) \
331
261
  ((__m128i)__builtin_ia32_vcvttph2iubs128_mask( \
332
262
  (__v8hf)(__m128h)(A), (__v8hu)(_mm_setzero_si128()), (__mmask8)(U)))
333
263
 
334
- #define _mm256_ipcvttph_epu8(A) \
264
+ #define _mm256_ipcvtts_ph_epu8(A) \
335
265
  ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
336
266
  (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
337
267
  _MM_FROUND_CUR_DIRECTION))
338
268
 
339
- #define _mm256_mask_ipcvttph_epu8(W, U, A) \
269
+ #define _mm256_mask_ipcvtts_ph_epu8(W, U, A) \
340
270
  ((__m256i)__builtin_ia32_vcvttph2iubs256_mask((__v16hf)(__m256h)(A), \
341
271
  (__v16hu)(W), (__mmask16)(U), \
342
272
  _MM_FROUND_CUR_DIRECTION))
343
273
 
344
- #define _mm256_maskz_ipcvttph_epu8(U, A) \
274
+ #define _mm256_maskz_ipcvtts_ph_epu8(U, A) \
345
275
  ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
346
276
  (__v16hf)(__m256h)(A), (__v16hu)(_mm256_setzero_si256()), \
347
277
  (__mmask16)(U), _MM_FROUND_CUR_DIRECTION))
348
278
 
349
- #define _mm256_ipcvtt_roundph_epu8(A, R) \
350
- ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
351
- (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)-1, \
352
- (const int)R))
353
-
354
- #define _mm256_mask_ipcvtt_roundph_epu8(W, U, A, R) \
355
- ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
356
- (__v16hf)(__m256h)(A), (__v16hu)(W), (__mmask16)(U), (const int)R))
357
-
358
- #define _mm256_maskz_ipcvtt_roundph_epu8(U, A, R) \
359
- ((__m256i)__builtin_ia32_vcvttph2iubs256_mask( \
360
- (__v16hf)(__m256h)(A), (__v16hu)_mm256_setzero_si256(), (__mmask16)(U), \
361
- (const int)R))
362
-
363
- #define _mm_ipcvttps_epi8(A) \
279
+ #define _mm_ipcvtts_ps_epi8(A) \
364
280
  ((__m128i)__builtin_ia32_vcvttps2ibs128_mask( \
365
281
  (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
366
282
 
367
- #define _mm_mask_ipcvttps_epi8(W, U, A) \
283
+ #define _mm_mask_ipcvtts_ps_epi8(W, U, A) \
368
284
  ((__m128i)__builtin_ia32_vcvttps2ibs128_mask((__v4sf)(__m128)(A), \
369
285
  (__v4su)(W), (__mmask8)(U)))
370
286
 
371
- #define _mm_maskz_ipcvttps_epi8(U, A) \
287
+ #define _mm_maskz_ipcvtts_ps_epi8(U, A) \
372
288
  ((__m128i)__builtin_ia32_vcvttps2ibs128_mask( \
373
289
  (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
374
290
 
375
- #define _mm256_ipcvttps_epi8(A) \
291
+ #define _mm256_ipcvtts_ps_epi8(A) \
376
292
  ((__m256i)__builtin_ia32_vcvttps2ibs256_mask( \
377
293
  (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
378
294
  _MM_FROUND_CUR_DIRECTION))
379
295
 
380
- #define _mm256_mask_ipcvttps_epi8(W, U, A) \
296
+ #define _mm256_mask_ipcvtts_ps_epi8(W, U, A) \
381
297
  ((__m256i)__builtin_ia32_vcvttps2ibs256_mask((__v8sf)(__m256)(A), \
382
298
  (__v8su)(W), (__mmask8)(U), \
383
299
  _MM_FROUND_CUR_DIRECTION))
384
300
 
385
- #define _mm256_maskz_ipcvttps_epi8(U, A) \
301
+ #define _mm256_maskz_ipcvtts_ps_epi8(U, A) \
386
302
  ((__m256i)__builtin_ia32_vcvttps2ibs256_mask( \
387
303
  (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
388
304
  _MM_FROUND_CUR_DIRECTION))
389
305
 
390
- #define _mm256_ipcvtt_roundps_epi8(A, R) \
391
- ((__m256i)__builtin_ia32_vcvttps2ibs256_mask((__v8sf)(__m256)(A), \
392
- (__v8su)_mm256_setzero_si256(), \
393
- (__mmask8)-1, (const int)R))
394
-
395
- #define _mm256_mask_ipcvtt_roundps_epi8(W, U, A, R) \
396
- ((__m256i)__builtin_ia32_vcvttps2ibs256_mask( \
397
- (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
398
-
399
- #define _mm256_maskz_ipcvtt_roundps_epi8(U, A, R) \
400
- ((__m256i)__builtin_ia32_vcvttps2ibs256_mask((__v8sf)(__m256)(A), \
401
- (__v8su)_mm256_setzero_si256(), \
402
- (__mmask8)(U), (const int)R))
403
-
404
- #define _mm_ipcvttps_epu8(A) \
306
+ #define _mm_ipcvtts_ps_epu8(A) \
405
307
  ((__m128i)__builtin_ia32_vcvttps2iubs128_mask( \
406
308
  (__v4sf)(__m128)(A), (__v4su)_mm_setzero_si128(), (__mmask8)-1))
407
309
 
408
- #define _mm_mask_ipcvttps_epu8(W, U, A) \
310
+ #define _mm_mask_ipcvtts_ps_epu8(W, U, A) \
409
311
  ((__m128i)__builtin_ia32_vcvttps2iubs128_mask((__v4sf)(__m128)(A), \
410
312
  (__v4su)(W), (__mmask8)(U)))
411
313
 
412
- #define _mm_maskz_ipcvttps_epu8(U, A) \
314
+ #define _mm_maskz_ipcvtts_ps_epu8(U, A) \
413
315
  ((__m128i)__builtin_ia32_vcvttps2iubs128_mask( \
414
316
  (__v4sf)(__m128)(A), (__v4su)(_mm_setzero_si128()), (__mmask8)(U)))
415
317
 
416
- #define _mm256_ipcvttps_epu8(A) \
318
+ #define _mm256_ipcvtts_ps_epu8(A) \
417
319
  ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
418
320
  (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
419
321
  _MM_FROUND_CUR_DIRECTION))
420
322
 
421
- #define _mm256_mask_ipcvttps_epu8(W, U, A) \
323
+ #define _mm256_mask_ipcvtts_ps_epu8(W, U, A) \
422
324
  ((__m256i)__builtin_ia32_vcvttps2iubs256_mask((__v8sf)(__m256)(A), \
423
325
  (__v8su)(W), (__mmask8)(U), \
424
326
  _MM_FROUND_CUR_DIRECTION))
425
327
 
426
- #define _mm256_maskz_ipcvttps_epu8(U, A) \
328
+ #define _mm256_maskz_ipcvtts_ps_epu8(U, A) \
427
329
  ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
428
330
  (__v8sf)(__m256)(A), (__v8su)(_mm256_setzero_si256()), (__mmask8)(U), \
429
331
  _MM_FROUND_CUR_DIRECTION))
430
-
431
- #define _mm256_ipcvtt_roundps_epu8(A, R) \
432
- ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
433
- (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)-1, \
434
- (const int)R))
435
-
436
- #define _mm256_mask_ipcvtt_roundps_epu8(W, U, A, R) \
437
- ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
438
- (__v8sf)(__m256)(A), (__v8su)(W), (__mmask8)(U), (const int)R))
439
-
440
- #define _mm256_maskz_ipcvtt_roundps_epu8(U, A, R) \
441
- ((__m256i)__builtin_ia32_vcvttps2iubs256_mask( \
442
- (__v8sf)(__m256)(A), (__v8su)_mm256_setzero_si256(), (__mmask8)(U), \
443
- (const int)R))
444
332
  #endif // __AVX10_2SATCVTINTRIN_H
package/lib/clang/20/include/nvptxintrin.h CHANGED
@@ -127,7 +127,8 @@ __gpu_read_first_lane_u64(uint64_t __lane_mask, uint64_t __x) {
127
127
  __gpu_num_lanes() - 1)
128
128
  << 32ull) |
129
129
  ((uint64_t)__nvvm_shfl_sync_idx_i32(__mask, __lo, __id,
130
- __gpu_num_lanes() - 1));
130
+ __gpu_num_lanes() - 1) &
131
+ 0xFFFFFFFF);
131
132
  }
132
133
 
133
134
  // Returns a bitmask of threads in the current lane for which \p x is true.
package/lib/clang/20/include/vecintrin.h CHANGED
@@ -7,6 +7,9 @@
7
7
  *===-----------------------------------------------------------------------===
8
8
  */
9
9
 
10
+ #ifndef _VECINTRIN_H
11
+ #define _VECINTRIN_H
12
+
10
13
  #if defined(__s390x__) && defined(__VEC__)
11
14
 
12
15
  #define __ATTRS_ai __attribute__((__always_inline__))
@@ -12861,3 +12864,5 @@ vec_search_string_until_zero_cc(__vector unsigned int __a,
12861
12864
  #error "Use -fzvector to enable vector extensions"
12862
12865
 
12863
12866
  #endif
12867
+
12868
+ #endif /* _VECINTRIN_H */
package/package.json CHANGED
@@ -1,7 +1,7 @@
1
1
  {
2
2
  "name": "@cpp-linter/clang-tidy-linux-arm64",
3
- "version": "20.1.0",
4
- "description": "The Linux arm64 binary for @cpp-linter/clang-tidy (LLVM 20.1.0).",
3
+ "version": "20.1.8",
4
+ "description": "The Linux arm64 binary for @cpp-linter/clang-tidy (LLVM 20.1.8).",
5
5
  "license": "Apache-2.0 WITH LLVM-exception",
6
6
  "repository": {
7
7
  "type": "git",
@@ -24,9 +24,9 @@
24
24
  "lib"
25
25
  ],
26
26
  "staticBinary": {
27
- "release": "llvm-20.1.0-3",
27
+ "release": "llvm-20.1.8",
28
28
  "file": "clang-tidy-20_linux-arm64",
29
- "url": "https://github.com/cpp-linter/clang-tools-static-binaries/releases/download/llvm-20.1.0-3/clang-tidy-20_linux-arm64",
30
- "sha512": "b5e155008ba23239219ffa03f9323c9e97076793eb48dda4fddbcd82c5f14449e487cfcaa28703c940a2d454ba0b263b38e875d7159dc23e3a531865577f3359"
29
+ "url": "https://github.com/cpp-linter/clang-tools-static-binaries/releases/download/llvm-20.1.8/clang-tidy-20_linux-arm64",
30
+ "sha512": "0c1cf61e43af310c720ac86eeee06b8e57e2b72670710efd1fb02a7f6befebbf82299cc5b0b5f68edb6635bf95d703bf3c2c3dbd60ae10b4fd1f458245226c90"
31
31
  }
32
32
  }