@cpp-linter/clang-tidy-darwin-x64 14.0.0 → 17.0.6

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Files changed (227) hide show
  1. package/README.md +2 -2
  2. package/bin/clang-tidy +2 -2
  3. package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_intrinsics.h +198 -7
  4. package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_math.h +1 -1
  5. package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_texture_intrinsics.h +2 -0
  6. package/lib/clang/{14.0.0 → 17}/include/__clang_hip_cmath.h +1 -1
  7. package/lib/clang/{14.0.0 → 17}/include/__clang_hip_libdevice_declares.h +37 -30
  8. package/lib/clang/{14.0.0 → 17}/include/__clang_hip_math.h +66 -84
  9. package/lib/clang/{14.0.0 → 17}/include/__clang_hip_runtime_wrapper.h +14 -0
  10. package/lib/clang/17/include/__clang_hip_stdlib.h +43 -0
  11. package/lib/clang/{14.0.0 → 17}/include/__wmmintrin_pclmul.h +10 -10
  12. package/lib/clang/17/include/adxintrin.h +227 -0
  13. package/lib/clang/{14.0.0 → 17}/include/altivec.h +597 -346
  14. package/lib/clang/17/include/amxcomplexintrin.h +169 -0
  15. package/lib/clang/17/include/amxfp16intrin.h +58 -0
  16. package/lib/clang/{14.0.0 → 17}/include/amxintrin.h +32 -2
  17. package/lib/clang/{14.0.0 → 17}/include/arm_acle.h +86 -81
  18. package/lib/clang/{14.0.0 → 17}/include/arm_fp16.h +90 -90
  19. package/lib/clang/{14.0.0 → 17}/include/arm_neon.h +28567 -28574
  20. package/lib/clang/{14.0.0 → 17}/include/arm_neon_sve_bridge.h +0 -2
  21. package/lib/clang/17/include/arm_sme_draft_spec_subject_to_change.h +642 -0
  22. package/lib/clang/{14.0.0 → 17}/include/arm_sve.h +7916 -8009
  23. package/lib/clang/17/include/avx2intrin.h +5263 -0
  24. package/lib/clang/{14.0.0 → 17}/include/avx512bf16intrin.h +18 -15
  25. package/lib/clang/{14.0.0 → 17}/include/avx512bwintrin.h +12 -12
  26. package/lib/clang/{14.0.0 → 17}/include/avx512fintrin.h +95 -82
  27. package/lib/clang/{14.0.0 → 17}/include/avx512fp16intrin.h +18 -17
  28. package/lib/clang/{14.0.0 → 17}/include/avx512ifmavlintrin.h +13 -27
  29. package/lib/clang/{14.0.0 → 17}/include/avx512vlbf16intrin.h +31 -38
  30. package/lib/clang/{14.0.0 → 17}/include/avx512vlbwintrin.h +360 -8
  31. package/lib/clang/{14.0.0 → 17}/include/avx512vlfp16intrin.h +3 -0
  32. package/lib/clang/{14.0.0 → 17}/include/avx512vlintrin.h +81 -95
  33. package/lib/clang/{14.0.0 → 17}/include/avx512vlvnniintrin.h +16 -16
  34. package/lib/clang/17/include/avxifmaintrin.h +177 -0
  35. package/lib/clang/{14.0.0 → 17}/include/avxintrin.h +97 -39
  36. package/lib/clang/17/include/avxneconvertintrin.h +484 -0
  37. package/lib/clang/17/include/avxvnniint16intrin.h +473 -0
  38. package/lib/clang/17/include/avxvnniint8intrin.h +471 -0
  39. package/lib/clang/{14.0.0 → 17}/include/avxvnniintrin.h +16 -16
  40. package/lib/clang/17/include/bmi2intrin.h +255 -0
  41. package/lib/clang/{14.0.0 → 17}/include/bmiintrin.h +6 -2
  42. package/lib/clang/{14.0.0 → 17}/include/cetintrin.h +12 -6
  43. package/lib/clang/{14.0.0 → 17}/include/clflushoptintrin.h +9 -0
  44. package/lib/clang/{14.0.0 → 17}/include/clzerointrin.h +7 -5
  45. package/lib/clang/17/include/cmpccxaddintrin.h +70 -0
  46. package/lib/clang/{14.0.0 → 17}/include/cpuid.h +12 -1
  47. package/lib/clang/17/include/cuda_wrappers/bits/basic_string.h +9 -0
  48. package/lib/clang/17/include/cuda_wrappers/bits/basic_string.tcc +9 -0
  49. package/lib/clang/17/include/cuda_wrappers/bits/shared_ptr_base.h +9 -0
  50. package/lib/clang/17/include/cuda_wrappers/cmath +90 -0
  51. package/lib/clang/{14.0.0 → 17}/include/emmintrin.h +559 -769
  52. package/lib/clang/{14.0.0 → 17}/include/f16cintrin.h +3 -3
  53. package/lib/clang/{14.0.0 → 17}/include/float.h +17 -10
  54. package/lib/clang/17/include/fmaintrin.h +780 -0
  55. package/lib/clang/{14.0.0 → 17}/include/gfniintrin.h +7 -5
  56. package/lib/clang/17/include/hlsl/hlsl_basic_types.h +67 -0
  57. package/lib/clang/17/include/hlsl/hlsl_intrinsics.h +480 -0
  58. package/lib/clang/17/include/hlsl.h +15 -0
  59. package/lib/clang/{14.0.0 → 17}/include/hresetintrin.h +2 -2
  60. package/lib/clang/{14.0.0 → 17}/include/ia32intrin.h +11 -11
  61. package/lib/clang/{14.0.0 → 17}/include/immintrin.h +166 -26
  62. package/lib/clang/{14.0.0 → 17}/include/intrin.h +12 -21
  63. package/lib/clang/{14.0.0 → 17}/include/keylockerintrin.h +22 -22
  64. package/lib/clang/17/include/larchintrin.h +234 -0
  65. package/lib/clang/{14.0.0 → 17}/include/limits.h +8 -3
  66. package/lib/clang/17/include/llvm_libc_wrappers/ctype.h +85 -0
  67. package/lib/clang/17/include/llvm_libc_wrappers/inttypes.h +34 -0
  68. package/lib/clang/17/include/llvm_libc_wrappers/stdio.h +34 -0
  69. package/lib/clang/17/include/llvm_libc_wrappers/stdlib.h +42 -0
  70. package/lib/clang/17/include/llvm_libc_wrappers/string.h +37 -0
  71. package/lib/clang/{14.0.0 → 17}/include/mm_malloc.h +3 -3
  72. package/lib/clang/17/include/mwaitxintrin.h +62 -0
  73. package/lib/clang/{14.0.0 → 17}/include/opencl-c-base.h +32 -0
  74. package/lib/clang/{14.0.0 → 17}/include/opencl-c.h +6904 -7100
  75. package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/__clang_openmp_device_functions.h +0 -1
  76. package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/new +1 -1
  77. package/lib/clang/{14.0.0 → 17}/include/pmmintrin.h +13 -7
  78. package/lib/clang/17/include/ppc_wrappers/bmi2intrin.h +134 -0
  79. package/lib/clang/17/include/ppc_wrappers/bmiintrin.h +165 -0
  80. package/lib/clang/17/include/ppc_wrappers/emmintrin.h +2269 -0
  81. package/lib/clang/17/include/ppc_wrappers/immintrin.h +27 -0
  82. package/lib/clang/{14.0.0 → 17}/include/ppc_wrappers/mm_malloc.h +12 -17
  83. package/lib/clang/{14.0.0 → 17}/include/ppc_wrappers/mmintrin.h +389 -387
  84. package/lib/clang/17/include/ppc_wrappers/pmmintrin.h +145 -0
  85. package/lib/clang/17/include/ppc_wrappers/smmintrin.h +663 -0
  86. package/lib/clang/17/include/ppc_wrappers/tmmintrin.h +453 -0
  87. package/lib/clang/{14.0.0/include/stdnoreturn.h → 17/include/ppc_wrappers/x86gprintrin.h} +7 -6
  88. package/lib/clang/17/include/ppc_wrappers/x86intrin.h +28 -0
  89. package/lib/clang/17/include/ppc_wrappers/xmmintrin.h +1827 -0
  90. package/lib/clang/17/include/prfchiintrin.h +61 -0
  91. package/lib/clang/17/include/raointintrin.h +203 -0
  92. package/lib/clang/17/include/rdpruintrin.h +57 -0
  93. package/lib/clang/17/include/rdseedintrin.h +105 -0
  94. package/lib/clang/17/include/riscv_ntlh.h +28 -0
  95. package/lib/clang/17/include/riscv_vector.h +400 -0
  96. package/lib/clang/{14.0.0 → 17}/include/rtmintrin.h +1 -1
  97. package/lib/clang/17/include/sha512intrin.h +200 -0
  98. package/lib/clang/17/include/shaintrin.h +189 -0
  99. package/lib/clang/17/include/sifive_vector.h +16 -0
  100. package/lib/clang/17/include/sm3intrin.h +238 -0
  101. package/lib/clang/17/include/sm4intrin.h +269 -0
  102. package/lib/clang/{14.0.0 → 17}/include/smmintrin.h +236 -259
  103. package/lib/clang/{14.0.0 → 17}/include/stdalign.h +5 -0
  104. package/lib/clang/{14.0.0 → 17}/include/stdarg.h +23 -7
  105. package/lib/clang/{14.0.0 → 17}/include/stdatomic.h +15 -8
  106. package/lib/clang/{14.0.0 → 17}/include/stdbool.h +10 -7
  107. package/lib/clang/{14.0.0 → 17}/include/stddef.h +14 -2
  108. package/lib/clang/{14.0.0 → 17}/include/stdint.h +158 -40
  109. package/lib/clang/17/include/stdnoreturn.h +29 -0
  110. package/lib/clang/{14.0.0 → 17}/include/uintrintrin.h +8 -8
  111. package/lib/clang/{14.0.0 → 17}/include/unwind.h +10 -6
  112. package/lib/clang/17/include/velintrin.h +71 -0
  113. package/lib/clang/17/include/velintrin_approx.h +120 -0
  114. package/lib/clang/17/include/velintrin_gen.h +1257 -0
  115. package/lib/clang/{14.0.0 → 17}/include/wasm_simd128.h +134 -14
  116. package/lib/clang/17/include/x86gprintrin.h +65 -0
  117. package/lib/clang/{14.0.0 → 17}/include/x86intrin.h +4 -0
  118. package/lib/clang/{14.0.0 → 17}/include/xmmintrin.h +10 -5
  119. package/lib/clang/17/include/xsavecintrin.h +84 -0
  120. package/package.json +6 -6
  121. package/lib/clang/14.0.0/include/adxintrin.h +0 -72
  122. package/lib/clang/14.0.0/include/avx2intrin.h +0 -1148
  123. package/lib/clang/14.0.0/include/bmi2intrin.h +0 -81
  124. package/lib/clang/14.0.0/include/fmaintrin.h +0 -216
  125. package/lib/clang/14.0.0/include/mwaitxintrin.h +0 -33
  126. package/lib/clang/14.0.0/include/ppc_wrappers/emmintrin.h +0 -2325
  127. package/lib/clang/14.0.0/include/ppc_wrappers/pmmintrin.h +0 -151
  128. package/lib/clang/14.0.0/include/ppc_wrappers/smmintrin.h +0 -110
  129. package/lib/clang/14.0.0/include/ppc_wrappers/tmmintrin.h +0 -496
  130. package/lib/clang/14.0.0/include/ppc_wrappers/xmmintrin.h +0 -1844
  131. package/lib/clang/14.0.0/include/rdseedintrin.h +0 -42
  132. package/lib/clang/14.0.0/include/riscv_vector.h +0 -95423
  133. package/lib/clang/14.0.0/include/shaintrin.h +0 -61
  134. package/lib/clang/14.0.0/include/x86gprintrin.h +0 -35
  135. package/lib/clang/14.0.0/include/xsavecintrin.h +0 -34
  136. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_builtin_vars.h +0 -0
  137. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_cmath.h +0 -0
  138. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_complex_builtins.h +0 -0
  139. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_device_functions.h +0 -0
  140. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_libdevice_declares.h +0 -0
  141. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_math_forward_declares.h +0 -0
  142. /package/lib/clang/{14.0.0 → 17}/include/__clang_cuda_runtime_wrapper.h +0 -0
  143. /package/lib/clang/{14.0.0 → 17}/include/__stddef_max_align_t.h +0 -0
  144. /package/lib/clang/{14.0.0 → 17}/include/__wmmintrin_aes.h +0 -0
  145. /package/lib/clang/{14.0.0 → 17}/include/ammintrin.h +0 -0
  146. /package/lib/clang/{14.0.0 → 17}/include/arm64intr.h +0 -0
  147. /package/lib/clang/{14.0.0 → 17}/include/arm_bf16.h +0 -0
  148. /package/lib/clang/{14.0.0 → 17}/include/arm_cde.h +0 -0
  149. /package/lib/clang/{14.0.0 → 17}/include/arm_cmse.h +0 -0
  150. /package/lib/clang/{14.0.0 → 17}/include/arm_mve.h +0 -0
  151. /package/lib/clang/{14.0.0 → 17}/include/armintr.h +0 -0
  152. /package/lib/clang/{14.0.0 → 17}/include/avx512bitalgintrin.h +0 -0
  153. /package/lib/clang/{14.0.0 → 17}/include/avx512cdintrin.h +0 -0
  154. /package/lib/clang/{14.0.0 → 17}/include/avx512dqintrin.h +0 -0
  155. /package/lib/clang/{14.0.0 → 17}/include/avx512erintrin.h +0 -0
  156. /package/lib/clang/{14.0.0 → 17}/include/avx512ifmaintrin.h +0 -0
  157. /package/lib/clang/{14.0.0 → 17}/include/avx512pfintrin.h +0 -0
  158. /package/lib/clang/{14.0.0 → 17}/include/avx512vbmi2intrin.h +0 -0
  159. /package/lib/clang/{14.0.0 → 17}/include/avx512vbmiintrin.h +0 -0
  160. /package/lib/clang/{14.0.0 → 17}/include/avx512vbmivlintrin.h +0 -0
  161. /package/lib/clang/{14.0.0 → 17}/include/avx512vlbitalgintrin.h +0 -0
  162. /package/lib/clang/{14.0.0 → 17}/include/avx512vlcdintrin.h +0 -0
  163. /package/lib/clang/{14.0.0 → 17}/include/avx512vldqintrin.h +0 -0
  164. /package/lib/clang/{14.0.0 → 17}/include/avx512vlvbmi2intrin.h +0 -0
  165. /package/lib/clang/{14.0.0 → 17}/include/avx512vlvp2intersectintrin.h +0 -0
  166. /package/lib/clang/{14.0.0 → 17}/include/avx512vnniintrin.h +0 -0
  167. /package/lib/clang/{14.0.0 → 17}/include/avx512vp2intersectintrin.h +0 -0
  168. /package/lib/clang/{14.0.0 → 17}/include/avx512vpopcntdqintrin.h +0 -0
  169. /package/lib/clang/{14.0.0 → 17}/include/avx512vpopcntdqvlintrin.h +0 -0
  170. /package/lib/clang/{14.0.0 → 17}/include/builtins.h +0 -0
  171. /package/lib/clang/{14.0.0 → 17}/include/cet.h +0 -0
  172. /package/lib/clang/{14.0.0 → 17}/include/cldemoteintrin.h +0 -0
  173. /package/lib/clang/{14.0.0 → 17}/include/clwbintrin.h +0 -0
  174. /package/lib/clang/{14.0.0 → 17}/include/crc32intrin.h +0 -0
  175. /package/lib/clang/{14.0.0 → 17}/include/cuda_wrappers/algorithm +0 -0
  176. /package/lib/clang/{14.0.0 → 17}/include/cuda_wrappers/complex +0 -0
  177. /package/lib/clang/{14.0.0 → 17}/include/cuda_wrappers/new +0 -0
  178. /package/lib/clang/{14.0.0 → 17}/include/enqcmdintrin.h +0 -0
  179. /package/lib/clang/{14.0.0 → 17}/include/fma4intrin.h +0 -0
  180. /package/lib/clang/{14.0.0 → 17}/include/fxsrintrin.h +0 -0
  181. /package/lib/clang/{14.0.0 → 17}/include/hexagon_circ_brev_intrinsics.h +0 -0
  182. /package/lib/clang/{14.0.0 → 17}/include/hexagon_protos.h +0 -0
  183. /package/lib/clang/{14.0.0 → 17}/include/hexagon_types.h +0 -0
  184. /package/lib/clang/{14.0.0 → 17}/include/htmintrin.h +0 -0
  185. /package/lib/clang/{14.0.0 → 17}/include/htmxlintrin.h +0 -0
  186. /package/lib/clang/{14.0.0 → 17}/include/hvx_hexagon_protos.h +0 -0
  187. /package/lib/clang/{14.0.0 → 17}/include/inttypes.h +0 -0
  188. /package/lib/clang/{14.0.0 → 17}/include/invpcidintrin.h +0 -0
  189. /package/lib/clang/{14.0.0 → 17}/include/iso646.h +0 -0
  190. /package/lib/clang/{14.0.0 → 17}/include/lwpintrin.h +0 -0
  191. /package/lib/clang/{14.0.0 → 17}/include/lzcntintrin.h +0 -0
  192. /package/lib/clang/{14.0.0 → 17}/include/mm3dnow.h +0 -0
  193. /package/lib/clang/{14.0.0 → 17}/include/mmintrin.h +0 -0
  194. /package/lib/clang/{14.0.0 → 17}/include/module.modulemap +0 -0
  195. /package/lib/clang/{14.0.0 → 17}/include/movdirintrin.h +0 -0
  196. /package/lib/clang/{14.0.0 → 17}/include/msa.h +0 -0
  197. /package/lib/clang/{14.0.0 → 17}/include/nmmintrin.h +0 -0
  198. /package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/cmath +0 -0
  199. /package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/complex +0 -0
  200. /package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/complex.h +0 -0
  201. /package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/complex_cmath.h +0 -0
  202. /package/lib/clang/{14.0.0 → 17}/include/openmp_wrappers/math.h +0 -0
  203. /package/lib/clang/{14.0.0 → 17}/include/pconfigintrin.h +0 -0
  204. /package/lib/clang/{14.0.0 → 17}/include/pkuintrin.h +0 -0
  205. /package/lib/clang/{14.0.0 → 17}/include/popcntintrin.h +0 -0
  206. /package/lib/clang/{14.0.0 → 17}/include/prfchwintrin.h +0 -0
  207. /package/lib/clang/{14.0.0 → 17}/include/ptwriteintrin.h +0 -0
  208. /package/lib/clang/{14.0.0 → 17}/include/s390intrin.h +0 -0
  209. /package/lib/clang/{14.0.0 → 17}/include/serializeintrin.h +0 -0
  210. /package/lib/clang/{14.0.0 → 17}/include/sgxintrin.h +0 -0
  211. /package/lib/clang/{14.0.0 → 17}/include/tbmintrin.h +0 -0
  212. /package/lib/clang/{14.0.0 → 17}/include/tgmath.h +0 -0
  213. /package/lib/clang/{14.0.0 → 17}/include/tmmintrin.h +0 -0
  214. /package/lib/clang/{14.0.0 → 17}/include/tsxldtrkintrin.h +0 -0
  215. /package/lib/clang/{14.0.0 → 17}/include/vadefs.h +0 -0
  216. /package/lib/clang/{14.0.0 → 17}/include/vaesintrin.h +0 -0
  217. /package/lib/clang/{14.0.0 → 17}/include/varargs.h +0 -0
  218. /package/lib/clang/{14.0.0 → 17}/include/vecintrin.h +0 -0
  219. /package/lib/clang/{14.0.0 → 17}/include/vpclmulqdqintrin.h +0 -0
  220. /package/lib/clang/{14.0.0 → 17}/include/waitpkgintrin.h +0 -0
  221. /package/lib/clang/{14.0.0 → 17}/include/wbnoinvdintrin.h +0 -0
  222. /package/lib/clang/{14.0.0 → 17}/include/wmmintrin.h +0 -0
  223. /package/lib/clang/{14.0.0 → 17}/include/xopintrin.h +0 -0
  224. /package/lib/clang/{14.0.0 → 17}/include/xsaveintrin.h +0 -0
  225. /package/lib/clang/{14.0.0 → 17}/include/xsaveoptintrin.h +0 -0
  226. /package/lib/clang/{14.0.0 → 17}/include/xsavesintrin.h +0 -0
  227. /package/lib/clang/{14.0.0 → 17}/include/xtestintrin.h +0 -0
@@ -10,12 +10,14 @@
10
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  #error "Never use <avx512bf16intrin.h> directly; include <immintrin.h> instead."
11
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  #endif
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13
+ #ifdef __SSE2__
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+
13
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  #ifndef __AVX512BF16INTRIN_H
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  #define __AVX512BF16INTRIN_H
15
17
 
16
- typedef short __m512bh __attribute__((__vector_size__(64), __aligned__(64)));
17
- typedef short __m256bh __attribute__((__vector_size__(32), __aligned__(32)));
18
- typedef unsigned short __bfloat16;
18
+ typedef __bf16 __v32bf __attribute__((__vector_size__(64), __aligned__(64)));
19
+ typedef __bf16 __m512bh __attribute__((__vector_size__(64), __aligned__(64)));
20
+ typedef __bf16 __bfloat16 __attribute__((deprecated("use __bf16 instead")));
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20
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  #define __DEFAULT_FN_ATTRS512 \
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  __attribute__((__always_inline__, __nodebug__, __target__("avx512bf16"), \
@@ -33,7 +35,7 @@ typedef unsigned short __bfloat16;
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  /// A bfloat data.
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  /// \returns A float data whose sign field and exponent field keep unchanged,
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  /// and fraction field is extended to 23 bits.
36
- static __inline__ float __DEFAULT_FN_ATTRS _mm_cvtsbh_ss(__bfloat16 __A) {
38
+ static __inline__ float __DEFAULT_FN_ATTRS _mm_cvtsbh_ss(__bf16 __A) {
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  return __builtin_ia32_cvtsbf162ss_32(__A);
38
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  }
39
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@@ -74,9 +76,9 @@ _mm512_cvtne2ps_pbh(__m512 __A, __m512 __B) {
74
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  /// conversion of __B, and higher 256 bits come from conversion of __A.
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  static __inline__ __m512bh __DEFAULT_FN_ATTRS512
76
78
  _mm512_mask_cvtne2ps_pbh(__m512bh __W, __mmask32 __U, __m512 __A, __m512 __B) {
77
- return (__m512bh)__builtin_ia32_selectw_512((__mmask32)__U,
78
- (__v32hi)_mm512_cvtne2ps_pbh(__A, __B),
79
- (__v32hi)__W);
79
+ return (__m512bh)__builtin_ia32_selectpbf_512((__mmask32)__U,
80
+ (__v32bf)_mm512_cvtne2ps_pbh(__A, __B),
81
+ (__v32bf)__W);
80
82
  }
81
83
 
82
84
  /// Convert Two Packed Single Data to One Packed BF16 Data.
@@ -96,9 +98,9 @@ _mm512_mask_cvtne2ps_pbh(__m512bh __W, __mmask32 __U, __m512 __A, __m512 __B) {
96
98
  /// conversion of __B, and higher 256 bits come from conversion of __A.
97
99
  static __inline__ __m512bh __DEFAULT_FN_ATTRS512
98
100
  _mm512_maskz_cvtne2ps_pbh(__mmask32 __U, __m512 __A, __m512 __B) {
99
- return (__m512bh)__builtin_ia32_selectw_512((__mmask32)__U,
100
- (__v32hi)_mm512_cvtne2ps_pbh(__A, __B),
101
- (__v32hi)_mm512_setzero_si512());
101
+ return (__m512bh)__builtin_ia32_selectpbf_512((__mmask32)__U,
102
+ (__v32bf)_mm512_cvtne2ps_pbh(__A, __B),
103
+ (__v32bf)_mm512_setzero_si512());
102
104
  }
103
105
 
104
106
  /// Convert Packed Single Data to Packed BF16 Data.
@@ -113,7 +115,7 @@ _mm512_maskz_cvtne2ps_pbh(__mmask32 __U, __m512 __A, __m512 __B) {
113
115
  static __inline__ __m256bh __DEFAULT_FN_ATTRS512
114
116
  _mm512_cvtneps_pbh(__m512 __A) {
115
117
  return (__m256bh)__builtin_ia32_cvtneps2bf16_512_mask((__v16sf)__A,
116
- (__v16hi)_mm256_undefined_si256(),
118
+ (__v16bf)_mm256_undefined_si256(),
117
119
  (__mmask16)-1);
118
120
  }
119
121
 
@@ -134,7 +136,7 @@ _mm512_cvtneps_pbh(__m512 __A) {
134
136
  static __inline__ __m256bh __DEFAULT_FN_ATTRS512
135
137
  _mm512_mask_cvtneps_pbh(__m256bh __W, __mmask16 __U, __m512 __A) {
136
138
  return (__m256bh)__builtin_ia32_cvtneps2bf16_512_mask((__v16sf)__A,
137
- (__v16hi)__W,
139
+ (__v16bf)__W,
138
140
  (__mmask16)__U);
139
141
  }
140
142
 
@@ -153,7 +155,7 @@ _mm512_mask_cvtneps_pbh(__m256bh __W, __mmask16 __U, __m512 __A) {
153
155
  static __inline__ __m256bh __DEFAULT_FN_ATTRS512
154
156
  _mm512_maskz_cvtneps_pbh(__mmask16 __U, __m512 __A) {
155
157
  return (__m256bh)__builtin_ia32_cvtneps2bf16_512_mask((__v16sf)__A,
156
- (__v16hi)_mm256_setzero_si256(),
158
+ (__v16bf)_mm256_setzero_si256(),
157
159
  (__mmask16)__U);
158
160
  }
159
161
 
@@ -174,8 +176,8 @@ _mm512_maskz_cvtneps_pbh(__mmask16 __U, __m512 __A) {
174
176
  static __inline__ __m512 __DEFAULT_FN_ATTRS512
175
177
  _mm512_dpbf16_ps(__m512 __D, __m512bh __A, __m512bh __B) {
176
178
  return (__m512)__builtin_ia32_dpbf16ps_512((__v16sf) __D,
177
- (__v16si) __A,
178
- (__v16si) __B);
179
+ (__v32bf) __A,
180
+ (__v32bf) __B);
179
181
  }
180
182
 
181
183
  /// Dot Product of BF16 Pairs Accumulated into Packed Single Precision.
@@ -277,3 +279,4 @@ _mm512_mask_cvtpbh_ps(__m512 __S, __mmask16 __U, __m256bh __A) {
277
279
  #undef __DEFAULT_FN_ATTRS512
278
280
 
279
281
  #endif
282
+ #endif
@@ -617,7 +617,7 @@ _mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B)
617
617
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
618
618
  _mm512_adds_epi8 (__m512i __A, __m512i __B)
619
619
  {
620
- return (__m512i)__builtin_ia32_paddsb512((__v64qi)__A, (__v64qi)__B);
620
+ return (__m512i)__builtin_elementwise_add_sat((__v64qs)__A, (__v64qs)__B);
621
621
  }
622
622
 
623
623
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -639,7 +639,7 @@ _mm512_maskz_adds_epi8 (__mmask64 __U, __m512i __A, __m512i __B)
639
639
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
640
640
  _mm512_adds_epi16 (__m512i __A, __m512i __B)
641
641
  {
642
- return (__m512i)__builtin_ia32_paddsw512((__v32hi)__A, (__v32hi)__B);
642
+ return (__m512i)__builtin_elementwise_add_sat((__v32hi)__A, (__v32hi)__B);
643
643
  }
644
644
 
645
645
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -661,7 +661,7 @@ _mm512_maskz_adds_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
661
661
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
662
662
  _mm512_adds_epu8 (__m512i __A, __m512i __B)
663
663
  {
664
- return (__m512i)__builtin_ia32_paddusb512((__v64qi) __A, (__v64qi) __B);
664
+ return (__m512i)__builtin_elementwise_add_sat((__v64qu) __A, (__v64qu) __B);
665
665
  }
666
666
 
667
667
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -683,7 +683,7 @@ _mm512_maskz_adds_epu8 (__mmask64 __U, __m512i __A, __m512i __B)
683
683
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
684
684
  _mm512_adds_epu16 (__m512i __A, __m512i __B)
685
685
  {
686
- return (__m512i)__builtin_ia32_paddusw512((__v32hi) __A, (__v32hi) __B);
686
+ return (__m512i)__builtin_elementwise_add_sat((__v32hu) __A, (__v32hu) __B);
687
687
  }
688
688
 
689
689
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -950,7 +950,7 @@ _mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B)
950
950
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
951
951
  _mm512_subs_epi8 (__m512i __A, __m512i __B)
952
952
  {
953
- return (__m512i)__builtin_ia32_psubsb512((__v64qi)__A, (__v64qi)__B);
953
+ return (__m512i)__builtin_elementwise_sub_sat((__v64qs)__A, (__v64qs)__B);
954
954
  }
955
955
 
956
956
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -972,7 +972,7 @@ _mm512_maskz_subs_epi8 (__mmask64 __U, __m512i __A, __m512i __B)
972
972
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
973
973
  _mm512_subs_epi16 (__m512i __A, __m512i __B)
974
974
  {
975
- return (__m512i)__builtin_ia32_psubsw512((__v32hi)__A, (__v32hi)__B);
975
+ return (__m512i)__builtin_elementwise_sub_sat((__v32hi)__A, (__v32hi)__B);
976
976
  }
977
977
 
978
978
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -994,7 +994,7 @@ _mm512_maskz_subs_epi16 (__mmask32 __U, __m512i __A, __m512i __B)
994
994
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
995
995
  _mm512_subs_epu8 (__m512i __A, __m512i __B)
996
996
  {
997
- return (__m512i)__builtin_ia32_psubusb512((__v64qi) __A, (__v64qi) __B);
997
+ return (__m512i)__builtin_elementwise_sub_sat((__v64qu) __A, (__v64qu) __B);
998
998
  }
999
999
 
1000
1000
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -1016,7 +1016,7 @@ _mm512_maskz_subs_epu8 (__mmask64 __U, __m512i __A, __m512i __B)
1016
1016
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
1017
1017
  _mm512_subs_epu16 (__m512i __A, __m512i __B)
1018
1018
  {
1019
- return (__m512i)__builtin_ia32_psubusw512((__v32hi) __A, (__v32hi) __B);
1019
+ return (__m512i)__builtin_elementwise_sub_sat((__v32hu) __A, (__v32hu) __B);
1020
1020
  }
1021
1021
 
1022
1022
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -1506,7 +1506,7 @@ _mm512_maskz_sll_epi16(__mmask32 __U, __m512i __A, __m128i __B)
1506
1506
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
1507
1507
  _mm512_slli_epi16(__m512i __A, unsigned int __B)
1508
1508
  {
1509
- return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, __B);
1509
+ return (__m512i)__builtin_ia32_psllwi512((__v32hi)__A, (int)__B);
1510
1510
  }
1511
1511
 
1512
1512
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -1598,7 +1598,7 @@ _mm512_maskz_sra_epi16(__mmask32 __U, __m512i __A, __m128i __B)
1598
1598
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
1599
1599
  _mm512_srai_epi16(__m512i __A, unsigned int __B)
1600
1600
  {
1601
- return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, __B);
1601
+ return (__m512i)__builtin_ia32_psrawi512((__v32hi)__A, (int)__B);
1602
1602
  }
1603
1603
 
1604
1604
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -1643,7 +1643,7 @@ _mm512_maskz_srl_epi16(__mmask32 __U, __m512i __A, __m128i __B)
1643
1643
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
1644
1644
  _mm512_srli_epi16(__m512i __A, unsigned int __B)
1645
1645
  {
1646
- return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, __B);
1646
+ return (__m512i)__builtin_ia32_psrlwi512((__v32hi)__A, (int)__B);
1647
1647
  }
1648
1648
 
1649
1649
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -1659,7 +1659,7 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS512
1659
1659
  _mm512_maskz_srli_epi16(__mmask32 __U, __m512i __A, int __B)
1660
1660
  {
1661
1661
  return (__m512i)__builtin_ia32_selectw_512((__mmask32)__U,
1662
- (__v32hi)_mm512_srli_epi16(__A, __B),
1662
+ (__v32hi)_mm512_srli_epi16(__A, (unsigned int)__B),
1663
1663
  (__v32hi)_mm512_setzero_si512());
1664
1664
  }
1665
1665
 
@@ -256,8 +256,8 @@ _mm512_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A)
256
256
  static __inline __m512 __DEFAULT_FN_ATTRS512
257
257
  _mm512_setzero_ps(void)
258
258
  {
259
- return __extension__ (__m512){ 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0,
260
- 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 };
259
+ return __extension__ (__m512){ 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
260
+ 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f };
261
261
  }
262
262
 
263
263
  #define _mm512_setzero _mm512_setzero_ps
@@ -397,14 +397,15 @@ _mm512_broadcastsd_pd(__m128d __A)
397
397
  static __inline __m512d __DEFAULT_FN_ATTRS512
398
398
  _mm512_castpd256_pd512(__m256d __a)
399
399
  {
400
- return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, -1, -1, -1, -1);
400
+ return __builtin_shufflevector(__a, __builtin_nondeterministic_value(__a), 0,
401
+ 1, 2, 3, 4, 5, 6, 7);
401
402
  }
402
403
 
403
404
  static __inline __m512 __DEFAULT_FN_ATTRS512
404
405
  _mm512_castps256_ps512(__m256 __a)
405
406
  {
406
- return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7,
407
- -1, -1, -1, -1, -1, -1, -1, -1);
407
+ return __builtin_shufflevector(__a, __builtin_nondeterministic_value(__a), 0,
408
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
408
409
  }
409
410
 
410
411
  static __inline __m128d __DEFAULT_FN_ATTRS512
@@ -446,7 +447,10 @@ _mm512_castpd_si512 (__m512d __A)
446
447
  static __inline__ __m512d __DEFAULT_FN_ATTRS512
447
448
  _mm512_castpd128_pd512 (__m128d __A)
448
449
  {
449
- return __builtin_shufflevector( __A, __A, 0, 1, -1, -1, -1, -1, -1, -1);
450
+ __m256d __B = __builtin_nondeterministic_value(__B);
451
+ return __builtin_shufflevector(
452
+ __builtin_shufflevector(__A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3),
453
+ __B, 0, 1, 2, 3, 4, 5, 6, 7);
450
454
  }
451
455
 
452
456
  static __inline __m512d __DEFAULT_FN_ATTRS512
@@ -464,19 +468,25 @@ _mm512_castps_si512 (__m512 __A)
464
468
  static __inline__ __m512 __DEFAULT_FN_ATTRS512
465
469
  _mm512_castps128_ps512 (__m128 __A)
466
470
  {
467
- return __builtin_shufflevector( __A, __A, 0, 1, 2, 3, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1);
471
+ __m256 __B = __builtin_nondeterministic_value(__B);
472
+ return __builtin_shufflevector(
473
+ __builtin_shufflevector(__A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3, 4, 5, 6, 7),
474
+ __B, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
468
475
  }
469
476
 
470
477
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
471
478
  _mm512_castsi128_si512 (__m128i __A)
472
479
  {
473
- return __builtin_shufflevector( __A, __A, 0, 1, -1, -1, -1, -1, -1, -1);
480
+ __m256i __B = __builtin_nondeterministic_value(__B);
481
+ return __builtin_shufflevector(
482
+ __builtin_shufflevector(__A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3),
483
+ __B, 0, 1, 2, 3, 4, 5, 6, 7);
474
484
  }
475
485
 
476
486
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
477
487
  _mm512_castsi256_si512 (__m256i __A)
478
488
  {
479
- return __builtin_shufflevector( __A, __A, 0, 1, 2, 3, -1, -1, -1, -1);
489
+ return __builtin_shufflevector( __A, __builtin_nondeterministic_value(__A), 0, 1, 2, 3, 4, 5, 6, 7);
480
490
  }
481
491
 
482
492
  static __inline __m512 __DEFAULT_FN_ATTRS512
@@ -1780,7 +1790,7 @@ _mm512_floor_ps(__m512 __A)
1780
1790
  {
1781
1791
  return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1782
1792
  _MM_FROUND_FLOOR,
1783
- (__v16sf) __A, -1,
1793
+ (__v16sf) __A, (unsigned short)-1,
1784
1794
  _MM_FROUND_CUR_DIRECTION);
1785
1795
  }
1786
1796
 
@@ -1798,7 +1808,7 @@ _mm512_floor_pd(__m512d __A)
1798
1808
  {
1799
1809
  return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A,
1800
1810
  _MM_FROUND_FLOOR,
1801
- (__v8df) __A, -1,
1811
+ (__v8df) __A, (unsigned char)-1,
1802
1812
  _MM_FROUND_CUR_DIRECTION);
1803
1813
  }
1804
1814
 
@@ -1825,7 +1835,7 @@ _mm512_ceil_ps(__m512 __A)
1825
1835
  {
1826
1836
  return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A,
1827
1837
  _MM_FROUND_CEIL,
1828
- (__v16sf) __A, -1,
1838
+ (__v16sf) __A, (unsigned short)-1,
1829
1839
  _MM_FROUND_CUR_DIRECTION);
1830
1840
  }
1831
1841
 
@@ -1834,7 +1844,7 @@ _mm512_ceil_pd(__m512d __A)
1834
1844
  {
1835
1845
  return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A,
1836
1846
  _MM_FROUND_CEIL,
1837
- (__v8df) __A, -1,
1847
+ (__v8df) __A, (unsigned char)-1,
1838
1848
  _MM_FROUND_CUR_DIRECTION);
1839
1849
  }
1840
1850
 
@@ -5117,7 +5127,7 @@ _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B)
5117
5127
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
5118
5128
  _mm512_slli_epi32(__m512i __A, unsigned int __B)
5119
5129
  {
5120
- return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, __B);
5130
+ return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, (int)__B);
5121
5131
  }
5122
5132
 
5123
5133
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -5139,7 +5149,7 @@ _mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {
5139
5149
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
5140
5150
  _mm512_slli_epi64(__m512i __A, unsigned int __B)
5141
5151
  {
5142
- return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, __B);
5152
+ return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, (int)__B);
5143
5153
  }
5144
5154
 
5145
5155
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -5161,7 +5171,7 @@ _mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, unsigned int __B)
5161
5171
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
5162
5172
  _mm512_srli_epi32(__m512i __A, unsigned int __B)
5163
5173
  {
5164
- return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, __B);
5174
+ return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, (int)__B);
5165
5175
  }
5166
5176
 
5167
5177
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -5183,7 +5193,7 @@ _mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) {
5183
5193
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
5184
5194
  _mm512_srli_epi64(__m512i __A, unsigned int __B)
5185
5195
  {
5186
- return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, __B);
5196
+ return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, (int)__B);
5187
5197
  }
5188
5198
 
5189
5199
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -5929,41 +5939,44 @@ _mm512_maskz_srlv_epi64(__mmask8 __U, __m512i __X, __m512i __Y)
5929
5939
  (__v8di)_mm512_setzero_si512());
5930
5940
  }
5931
5941
 
5932
- #define _mm512_ternarylogic_epi32(A, B, C, imm) \
5933
- ((__m512i)__builtin_ia32_pternlogd512_mask((__v16si)(__m512i)(A), \
5934
- (__v16si)(__m512i)(B), \
5935
- (__v16si)(__m512i)(C), (int)(imm), \
5936
- (__mmask16)-1))
5937
-
5938
- #define _mm512_mask_ternarylogic_epi32(A, U, B, C, imm) \
5939
- ((__m512i)__builtin_ia32_pternlogd512_mask((__v16si)(__m512i)(A), \
5940
- (__v16si)(__m512i)(B), \
5941
- (__v16si)(__m512i)(C), (int)(imm), \
5942
- (__mmask16)(U)))
5943
-
5944
- #define _mm512_maskz_ternarylogic_epi32(U, A, B, C, imm) \
5945
- ((__m512i)__builtin_ia32_pternlogd512_maskz((__v16si)(__m512i)(A), \
5946
- (__v16si)(__m512i)(B), \
5947
- (__v16si)(__m512i)(C), \
5948
- (int)(imm), (__mmask16)(U)))
5949
-
5950
- #define _mm512_ternarylogic_epi64(A, B, C, imm) \
5951
- ((__m512i)__builtin_ia32_pternlogq512_mask((__v8di)(__m512i)(A), \
5952
- (__v8di)(__m512i)(B), \
5953
- (__v8di)(__m512i)(C), (int)(imm), \
5954
- (__mmask8)-1))
5955
-
5956
- #define _mm512_mask_ternarylogic_epi64(A, U, B, C, imm) \
5957
- ((__m512i)__builtin_ia32_pternlogq512_mask((__v8di)(__m512i)(A), \
5958
- (__v8di)(__m512i)(B), \
5959
- (__v8di)(__m512i)(C), (int)(imm), \
5960
- (__mmask8)(U)))
5961
-
5962
- #define _mm512_maskz_ternarylogic_epi64(U, A, B, C, imm) \
5963
- ((__m512i)__builtin_ia32_pternlogq512_maskz((__v8di)(__m512i)(A), \
5964
- (__v8di)(__m512i)(B), \
5965
- (__v8di)(__m512i)(C), (int)(imm), \
5966
- (__mmask8)(U)))
5942
+ /// \enum _MM_TERNLOG_ENUM
5943
+ /// A helper to represent the ternary logic operations among vector \a A,
5944
+ /// \a B and \a C. The representation is passed to \a imm.
5945
+ typedef enum {
5946
+ _MM_TERNLOG_A = 0xF0,
5947
+ _MM_TERNLOG_B = 0xCC,
5948
+ _MM_TERNLOG_C = 0xAA
5949
+ } _MM_TERNLOG_ENUM;
5950
+
5951
+ #define _mm512_ternarylogic_epi32(A, B, C, imm) \
5952
+ ((__m512i)__builtin_ia32_pternlogd512_mask( \
5953
+ (__v16si)(__m512i)(A), (__v16si)(__m512i)(B), (__v16si)(__m512i)(C), \
5954
+ (unsigned char)(imm), (__mmask16)-1))
5955
+
5956
+ #define _mm512_mask_ternarylogic_epi32(A, U, B, C, imm) \
5957
+ ((__m512i)__builtin_ia32_pternlogd512_mask( \
5958
+ (__v16si)(__m512i)(A), (__v16si)(__m512i)(B), (__v16si)(__m512i)(C), \
5959
+ (unsigned char)(imm), (__mmask16)(U)))
5960
+
5961
+ #define _mm512_maskz_ternarylogic_epi32(U, A, B, C, imm) \
5962
+ ((__m512i)__builtin_ia32_pternlogd512_maskz( \
5963
+ (__v16si)(__m512i)(A), (__v16si)(__m512i)(B), (__v16si)(__m512i)(C), \
5964
+ (unsigned char)(imm), (__mmask16)(U)))
5965
+
5966
+ #define _mm512_ternarylogic_epi64(A, B, C, imm) \
5967
+ ((__m512i)__builtin_ia32_pternlogq512_mask( \
5968
+ (__v8di)(__m512i)(A), (__v8di)(__m512i)(B), (__v8di)(__m512i)(C), \
5969
+ (unsigned char)(imm), (__mmask8)-1))
5970
+
5971
+ #define _mm512_mask_ternarylogic_epi64(A, U, B, C, imm) \
5972
+ ((__m512i)__builtin_ia32_pternlogq512_mask( \
5973
+ (__v8di)(__m512i)(A), (__v8di)(__m512i)(B), (__v8di)(__m512i)(C), \
5974
+ (unsigned char)(imm), (__mmask8)(U)))
5975
+
5976
+ #define _mm512_maskz_ternarylogic_epi64(U, A, B, C, imm) \
5977
+ ((__m512i)__builtin_ia32_pternlogq512_maskz( \
5978
+ (__v8di)(__m512i)(A), (__v8di)(__m512i)(B), (__v8di)(__m512i)(C), \
5979
+ (unsigned char)(imm), (__mmask8)(U)))
5967
5980
 
5968
5981
  #ifdef __x86_64__
5969
5982
  #define _mm_cvt_roundsd_i64(A, R) \
@@ -6603,7 +6616,7 @@ _mm_maskz_scalef_ss (__mmask8 __U, __m128 __A, __m128 __B)
6603
6616
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
6604
6617
  _mm512_srai_epi32(__m512i __A, unsigned int __B)
6605
6618
  {
6606
- return (__m512i)__builtin_ia32_psradi512((__v16si)__A, __B);
6619
+ return (__m512i)__builtin_ia32_psradi512((__v16si)__A, (int)__B);
6607
6620
  }
6608
6621
 
6609
6622
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -6626,7 +6639,7 @@ _mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A,
6626
6639
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
6627
6640
  _mm512_srai_epi64(__m512i __A, unsigned int __B)
6628
6641
  {
6629
- return (__m512i)__builtin_ia32_psraqi512((__v8di)__A, __B);
6642
+ return (__m512i)__builtin_ia32_psraqi512((__v8di)__A, (int)__B);
6630
6643
  }
6631
6644
 
6632
6645
  static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -9316,11 +9329,11 @@ _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A)
9316
9329
  */
9317
9330
 
9318
9331
  static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_add_epi64(__m512i __W) {
9319
- return __builtin_ia32_reduce_add_q512(__W);
9332
+ return __builtin_reduce_add((__v8di)__W);
9320
9333
  }
9321
9334
 
9322
9335
  static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_mul_epi64(__m512i __W) {
9323
- return __builtin_ia32_reduce_mul_q512(__W);
9336
+ return __builtin_reduce_mul((__v8di)__W);
9324
9337
  }
9325
9338
 
9326
9339
  static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_and_epi64(__m512i __W) {
@@ -9334,18 +9347,18 @@ static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_or_epi64(__m512i
9334
9347
  static __inline__ long long __DEFAULT_FN_ATTRS512
9335
9348
  _mm512_mask_reduce_add_epi64(__mmask8 __M, __m512i __W) {
9336
9349
  __W = _mm512_maskz_mov_epi64(__M, __W);
9337
- return __builtin_ia32_reduce_add_q512(__W);
9350
+ return __builtin_reduce_add((__v8di)__W);
9338
9351
  }
9339
9352
 
9340
9353
  static __inline__ long long __DEFAULT_FN_ATTRS512
9341
9354
  _mm512_mask_reduce_mul_epi64(__mmask8 __M, __m512i __W) {
9342
9355
  __W = _mm512_mask_mov_epi64(_mm512_set1_epi64(1), __M, __W);
9343
- return __builtin_ia32_reduce_mul_q512(__W);
9356
+ return __builtin_reduce_mul((__v8di)__W);
9344
9357
  }
9345
9358
 
9346
9359
  static __inline__ long long __DEFAULT_FN_ATTRS512
9347
9360
  _mm512_mask_reduce_and_epi64(__mmask8 __M, __m512i __W) {
9348
- __W = _mm512_mask_mov_epi64(_mm512_set1_epi64(~0ULL), __M, __W);
9361
+ __W = _mm512_mask_mov_epi64(_mm512_set1_epi64(-1LL), __M, __W);
9349
9362
  return __builtin_reduce_and((__v8di)__W);
9350
9363
  }
9351
9364
 
@@ -9380,12 +9393,12 @@ _mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W) {
9380
9393
 
9381
9394
  static __inline__ int __DEFAULT_FN_ATTRS512
9382
9395
  _mm512_reduce_add_epi32(__m512i __W) {
9383
- return __builtin_ia32_reduce_add_d512((__v16si)__W);
9396
+ return __builtin_reduce_add((__v16si)__W);
9384
9397
  }
9385
9398
 
9386
9399
  static __inline__ int __DEFAULT_FN_ATTRS512
9387
9400
  _mm512_reduce_mul_epi32(__m512i __W) {
9388
- return __builtin_ia32_reduce_mul_d512((__v16si)__W);
9401
+ return __builtin_reduce_mul((__v16si)__W);
9389
9402
  }
9390
9403
 
9391
9404
  static __inline__ int __DEFAULT_FN_ATTRS512
@@ -9401,18 +9414,18 @@ _mm512_reduce_or_epi32(__m512i __W) {
9401
9414
  static __inline__ int __DEFAULT_FN_ATTRS512
9402
9415
  _mm512_mask_reduce_add_epi32( __mmask16 __M, __m512i __W) {
9403
9416
  __W = _mm512_maskz_mov_epi32(__M, __W);
9404
- return __builtin_ia32_reduce_add_d512((__v16si)__W);
9417
+ return __builtin_reduce_add((__v16si)__W);
9405
9418
  }
9406
9419
 
9407
9420
  static __inline__ int __DEFAULT_FN_ATTRS512
9408
9421
  _mm512_mask_reduce_mul_epi32( __mmask16 __M, __m512i __W) {
9409
9422
  __W = _mm512_mask_mov_epi32(_mm512_set1_epi32(1), __M, __W);
9410
- return __builtin_ia32_reduce_mul_d512((__v16si)__W);
9423
+ return __builtin_reduce_mul((__v16si)__W);
9411
9424
  }
9412
9425
 
9413
9426
  static __inline__ int __DEFAULT_FN_ATTRS512
9414
9427
  _mm512_mask_reduce_and_epi32( __mmask16 __M, __m512i __W) {
9415
- __W = _mm512_mask_mov_epi32(_mm512_set1_epi32(~0U), __M, __W);
9428
+ __W = _mm512_mask_mov_epi32(_mm512_set1_epi32(-1), __M, __W);
9416
9429
  return __builtin_reduce_and((__v16si)__W);
9417
9430
  }
9418
9431
 
@@ -9484,7 +9497,7 @@ _mm512_mask_reduce_min_epi64(__mmask8 __M, __m512i __V) {
9484
9497
 
9485
9498
  static __inline__ unsigned long long __DEFAULT_FN_ATTRS512
9486
9499
  _mm512_mask_reduce_min_epu64(__mmask8 __M, __m512i __V) {
9487
- __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(~0ULL), __M, __V);
9500
+ __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(-1LL), __M, __V);
9488
9501
  return __builtin_reduce_min((__v8du)__V);
9489
9502
  }
9490
9503
  static __inline__ int __DEFAULT_FN_ATTRS512
@@ -9527,7 +9540,7 @@ _mm512_mask_reduce_min_epi32(__mmask16 __M, __m512i __V) {
9527
9540
 
9528
9541
  static __inline__ unsigned int __DEFAULT_FN_ATTRS512
9529
9542
  _mm512_mask_reduce_min_epu32(__mmask16 __M, __m512i __V) {
9530
- __V = _mm512_mask_mov_epi32(_mm512_set1_epi32(~0U), __M, __V);
9543
+ __V = _mm512_mask_mov_epi32(_mm512_set1_epi32(-1), __M, __V);
9531
9544
  return __builtin_reduce_min((__v16su)__V);
9532
9545
  }
9533
9546
 
@@ -9598,7 +9611,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9598
9611
  ///
9599
9612
  /// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions.
9600
9613
  ///
9601
- /// \operation
9614
+ /// \code{.operation}
9602
9615
  /// FOR j := 0 to 7
9603
9616
  /// i := j*64
9604
9617
  /// m := j*32
@@ -9606,7 +9619,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9606
9619
  /// dst[i+63:i] := MEM[addr+63:addr]
9607
9620
  /// ENDFOR
9608
9621
  /// dst[MAX:512] := 0
9609
- /// \endoperation
9622
+ /// \endcode
9610
9623
  #define _mm512_i32logather_pd(vindex, base_addr, scale) \
9611
9624
  _mm512_i32gather_pd(_mm512_castsi512_si256(vindex), (base_addr), (scale))
9612
9625
 
@@ -9618,7 +9631,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9618
9631
  ///
9619
9632
  /// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions.
9620
9633
  ///
9621
- /// \operation
9634
+ /// \code{.operation}
9622
9635
  /// FOR j := 0 to 7
9623
9636
  /// i := j*64
9624
9637
  /// m := j*32
@@ -9630,7 +9643,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9630
9643
  /// FI
9631
9644
  /// ENDFOR
9632
9645
  /// dst[MAX:512] := 0
9633
- /// \endoperation
9646
+ /// \endcode
9634
9647
  #define _mm512_mask_i32logather_pd(src, mask, vindex, base_addr, scale) \
9635
9648
  _mm512_mask_i32gather_pd((src), (mask), _mm512_castsi512_si256(vindex), \
9636
9649
  (base_addr), (scale))
@@ -9641,7 +9654,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9641
9654
  ///
9642
9655
  /// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions.
9643
9656
  ///
9644
- /// \operation
9657
+ /// \code{.operation}
9645
9658
  /// FOR j := 0 to 7
9646
9659
  /// i := j*64
9647
9660
  /// m := j*32
@@ -9649,7 +9662,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9649
9662
  /// dst[i+63:i] := MEM[addr+63:addr]
9650
9663
  /// ENDFOR
9651
9664
  /// dst[MAX:512] := 0
9652
- /// \endoperation
9665
+ /// \endcode
9653
9666
  #define _mm512_i32logather_epi64(vindex, base_addr, scale) \
9654
9667
  _mm512_i32gather_epi64(_mm512_castsi512_si256(vindex), (base_addr), (scale))
9655
9668
 
@@ -9660,7 +9673,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9660
9673
  ///
9661
9674
  /// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions.
9662
9675
  ///
9663
- /// \operation
9676
+ /// \code{.operation}
9664
9677
  /// FOR j := 0 to 7
9665
9678
  /// i := j*64
9666
9679
  /// m := j*32
@@ -9672,7 +9685,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9672
9685
  /// FI
9673
9686
  /// ENDFOR
9674
9687
  /// dst[MAX:512] := 0
9675
- /// \endoperation
9688
+ /// \endcode
9676
9689
  #define _mm512_mask_i32logather_epi64(src, mask, vindex, base_addr, scale) \
9677
9690
  _mm512_mask_i32gather_epi64((src), (mask), _mm512_castsi512_si256(vindex), \
9678
9691
  (base_addr), (scale))
@@ -9683,14 +9696,14 @@ _mm512_cvtsi512_si32(__m512i __A) {
9683
9696
  ///
9684
9697
  /// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions.
9685
9698
  ///
9686
- /// \operation
9699
+ /// \code{.operation}
9687
9700
  /// FOR j := 0 to 7
9688
9701
  /// i := j*64
9689
9702
  /// m := j*32
9690
9703
  /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8
9691
9704
  /// MEM[addr+63:addr] := v1[i+63:i]
9692
9705
  /// ENDFOR
9693
- /// \endoperation
9706
+ /// \endcode
9694
9707
  #define _mm512_i32loscatter_pd(base_addr, vindex, v1, scale) \
9695
9708
  _mm512_i32scatter_pd((base_addr), _mm512_castsi512_si256(vindex), (v1), (scale))
9696
9709
 
@@ -9702,7 +9715,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9702
9715
  ///
9703
9716
  /// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions.
9704
9717
  ///
9705
- /// \operation
9718
+ /// \code{.operation}
9706
9719
  /// FOR j := 0 to 7
9707
9720
  /// i := j*64
9708
9721
  /// m := j*32
@@ -9711,7 +9724,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9711
9724
  /// MEM[addr+63:addr] := a[i+63:i]
9712
9725
  /// FI
9713
9726
  /// ENDFOR
9714
- /// \endoperation
9727
+ /// \endcode
9715
9728
  #define _mm512_mask_i32loscatter_pd(base_addr, mask, vindex, v1, scale) \
9716
9729
  _mm512_mask_i32scatter_pd((base_addr), (mask), \
9717
9730
  _mm512_castsi512_si256(vindex), (v1), (scale))
@@ -9722,14 +9735,14 @@ _mm512_cvtsi512_si32(__m512i __A) {
9722
9735
  ///
9723
9736
  /// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions.
9724
9737
  ///
9725
- /// \operation
9738
+ /// \code{.operation}
9726
9739
  /// FOR j := 0 to 7
9727
9740
  /// i := j*64
9728
9741
  /// m := j*32
9729
9742
  /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8
9730
9743
  /// MEM[addr+63:addr] := a[i+63:i]
9731
9744
  /// ENDFOR
9732
- /// \endoperation
9745
+ /// \endcode
9733
9746
  #define _mm512_i32loscatter_epi64(base_addr, vindex, v1, scale) \
9734
9747
  _mm512_i32scatter_epi64((base_addr), \
9735
9748
  _mm512_castsi512_si256(vindex), (v1), (scale))
@@ -9741,7 +9754,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9741
9754
  ///
9742
9755
  /// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions.
9743
9756
  ///
9744
- /// \operation
9757
+ /// \code{.operation}
9745
9758
  /// FOR j := 0 to 7
9746
9759
  /// i := j*64
9747
9760
  /// m := j*32
@@ -9750,7 +9763,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
9750
9763
  /// MEM[addr+63:addr] := a[i+63:i]
9751
9764
  /// FI
9752
9765
  /// ENDFOR
9753
- /// \endoperation
9766
+ /// \endcode
9754
9767
  #define _mm512_mask_i32loscatter_epi64(base_addr, mask, vindex, v1, scale) \
9755
9768
  _mm512_mask_i32scatter_epi64((base_addr), (mask), \
9756
9769
  _mm512_castsi512_si256(vindex), (v1), (scale))