@cpp-linter/clang-tidy-darwin-x64 13.0.0 → 16.0.3
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- package/README.md +2 -2
- package/bin/clang-tidy +2 -2
- package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_complex_builtins.h +3 -3
- package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_intrinsics.h +38 -6
- package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_libdevice_declares.h +6 -0
- package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_math.h +1 -1
- package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_runtime_wrapper.h +62 -7
- package/lib/clang/16/include/__clang_cuda_texture_intrinsics.h +742 -0
- package/lib/clang/{13.0.0 → 16}/include/__clang_hip_libdevice_declares.h +5 -0
- package/lib/clang/{13.0.0 → 16}/include/__clang_hip_math.h +10 -13
- package/lib/clang/{13.0.0 → 16}/include/__clang_hip_runtime_wrapper.h +18 -4
- package/lib/clang/16/include/__clang_hip_stdlib.h +43 -0
- package/lib/clang/{13.0.0 → 16}/include/__wmmintrin_aes.h +1 -1
- package/lib/clang/{13.0.0 → 16}/include/__wmmintrin_pclmul.h +10 -10
- package/lib/clang/{13.0.0 → 16}/include/altivec.h +691 -342
- package/lib/clang/{13.0.0 → 16}/include/ammintrin.h +4 -0
- package/lib/clang/16/include/amxfp16intrin.h +58 -0
- package/lib/clang/{13.0.0 → 16}/include/amxintrin.h +49 -18
- package/lib/clang/{13.0.0 → 16}/include/arm_acle.h +80 -73
- package/lib/clang/{13.0.0 → 16}/include/arm_fp16.h +90 -90
- package/lib/clang/{13.0.0 → 16}/include/arm_neon.h +28607 -28779
- package/lib/clang/16/include/arm_neon_sve_bridge.h +182 -0
- package/lib/clang/{13.0.0 → 16}/include/arm_sve.h +7848 -7996
- package/lib/clang/{13.0.0 → 16}/include/avx2intrin.h +189 -189
- package/lib/clang/{13.0.0 → 16}/include/avx512bf16intrin.h +21 -18
- package/lib/clang/{13.0.0 → 16}/include/avx512bwintrin.h +83 -83
- package/lib/clang/{13.0.0 → 16}/include/avx512dqintrin.h +365 -365
- package/lib/clang/{13.0.0 → 16}/include/avx512erintrin.h +102 -102
- package/lib/clang/{13.0.0 → 16}/include/avx512fintrin.h +1627 -1620
- package/lib/clang/16/include/avx512fp16intrin.h +3346 -0
- package/lib/clang/{13.0.0 → 16}/include/avx512ifmavlintrin.h +13 -27
- package/lib/clang/{13.0.0 → 16}/include/avx512vbmi2intrin.h +48 -48
- package/lib/clang/{13.0.0 → 16}/include/avx512vlbf16intrin.h +82 -41
- package/lib/clang/{13.0.0 → 16}/include/avx512vlbwintrin.h +454 -102
- package/lib/clang/{13.0.0 → 16}/include/avx512vldqintrin.h +134 -134
- package/lib/clang/16/include/avx512vlfp16intrin.h +2071 -0
- package/lib/clang/{13.0.0 → 16}/include/avx512vlintrin.h +596 -610
- package/lib/clang/{13.0.0 → 16}/include/avx512vlvbmi2intrin.h +96 -96
- package/lib/clang/{13.0.0 → 16}/include/avx512vlvnniintrin.h +24 -24
- package/lib/clang/16/include/avxifmaintrin.h +177 -0
- package/lib/clang/{13.0.0 → 16}/include/avxintrin.h +266 -224
- package/lib/clang/16/include/avxneconvertintrin.h +484 -0
- package/lib/clang/16/include/avxvnniint8intrin.h +471 -0
- package/lib/clang/{13.0.0 → 16}/include/avxvnniintrin.h +16 -16
- package/lib/clang/{13.0.0 → 16}/include/bmiintrin.h +6 -2
- package/lib/clang/{13.0.0 → 16}/include/cetintrin.h +20 -4
- package/lib/clang/16/include/cmpccxaddintrin.h +70 -0
- package/lib/clang/{13.0.0 → 16}/include/cpuid.h +14 -2
- package/lib/clang/16/include/crc32intrin.h +100 -0
- package/lib/clang/16/include/cuda_wrappers/cmath +90 -0
- package/lib/clang/{13.0.0 → 16}/include/emmintrin.h +573 -779
- package/lib/clang/{13.0.0 → 16}/include/f16cintrin.h +4 -4
- package/lib/clang/{13.0.0 → 16}/include/float.h +22 -6
- package/lib/clang/{13.0.0 → 16}/include/gfniintrin.h +54 -53
- package/lib/clang/{13.0.0 → 16}/include/hexagon_protos.h +0 -11
- package/lib/clang/{13.0.0 → 16}/include/hexagon_types.h +0 -32
- package/lib/clang/16/include/hlsl/hlsl_basic_types.h +67 -0
- package/lib/clang/16/include/hlsl/hlsl_intrinsics.h +223 -0
- package/lib/clang/16/include/hlsl.h +15 -0
- package/lib/clang/{13.0.0 → 16}/include/hresetintrin.h +2 -2
- package/lib/clang/{13.0.0 → 16}/include/hvx_hexagon_protos.h +1200 -409
- package/lib/clang/{13.0.0 → 16}/include/ia32intrin.h +17 -17
- package/lib/clang/{13.0.0 → 16}/include/immintrin.h +74 -24
- package/lib/clang/{13.0.0 → 16}/include/intrin.h +34 -35
- package/lib/clang/{13.0.0 → 16}/include/keylockerintrin.h +24 -30
- package/lib/clang/16/include/larchintrin.h +234 -0
- package/lib/clang/{13.0.0 → 16}/include/limits.h +22 -1
- package/lib/clang/{13.0.0 → 16}/include/mm_malloc.h +3 -3
- package/lib/clang/{13.0.0 → 16}/include/mmintrin.h +4 -0
- package/lib/clang/{13.0.0 → 16}/include/nmmintrin.h +4 -0
- package/lib/clang/{13.0.0 → 16}/include/opencl-c-base.h +98 -11
- package/lib/clang/{13.0.0 → 16}/include/opencl-c.h +7252 -6208
- package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/complex +10 -1
- package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/complex.h +9 -0
- package/lib/clang/{13.0.0 → 16}/include/pmmintrin.h +5 -1
- package/lib/clang/16/include/ppc_wrappers/bmi2intrin.h +134 -0
- package/lib/clang/16/include/ppc_wrappers/bmiintrin.h +165 -0
- package/lib/clang/16/include/ppc_wrappers/emmintrin.h +2268 -0
- package/lib/clang/16/include/ppc_wrappers/immintrin.h +27 -0
- package/lib/clang/{13.0.0 → 16}/include/ppc_wrappers/mm_malloc.h +12 -17
- package/lib/clang/{13.0.0 → 16}/include/ppc_wrappers/mmintrin.h +389 -386
- package/lib/clang/16/include/ppc_wrappers/pmmintrin.h +145 -0
- package/lib/clang/16/include/ppc_wrappers/smmintrin.h +663 -0
- package/lib/clang/16/include/ppc_wrappers/tmmintrin.h +453 -0
- package/lib/clang/{13.0.0/include/stdnoreturn.h → 16/include/ppc_wrappers/x86gprintrin.h} +7 -6
- package/lib/clang/16/include/ppc_wrappers/x86intrin.h +28 -0
- package/lib/clang/16/include/ppc_wrappers/xmmintrin.h +1827 -0
- package/lib/clang/16/include/prfchiintrin.h +61 -0
- package/lib/clang/{13.0.0 → 16}/include/prfchwintrin.h +5 -2
- package/lib/clang/16/include/raointintrin.h +203 -0
- package/lib/clang/16/include/rdpruintrin.h +57 -0
- package/lib/clang/{13.0.0 → 16}/include/rdseedintrin.h +3 -3
- package/lib/clang/16/include/riscv_vector.h +211 -0
- package/lib/clang/{13.0.0 → 16}/include/rtmintrin.h +1 -1
- package/lib/clang/{13.0.0 → 16}/include/smmintrin.h +260 -362
- package/lib/clang/{13.0.0 → 16}/include/stdarg.h +23 -7
- package/lib/clang/{13.0.0 → 16}/include/stdatomic.h +14 -1
- package/lib/clang/{13.0.0 → 16}/include/stdbool.h +10 -7
- package/lib/clang/{13.0.0 → 16}/include/stddef.h +9 -2
- package/lib/clang/{13.0.0 → 16}/include/stdint.h +311 -25
- package/lib/clang/16/include/stdnoreturn.h +29 -0
- package/lib/clang/{13.0.0 → 16}/include/tmmintrin.h +10 -6
- package/lib/clang/{13.0.0 → 16}/include/uintrintrin.h +8 -8
- package/lib/clang/{13.0.0 → 16}/include/unwind.h +12 -7
- package/lib/clang/{13.0.0 → 16}/include/vaesintrin.h +1 -1
- package/lib/clang/16/include/velintrin.h +71 -0
- package/lib/clang/16/include/velintrin_approx.h +120 -0
- package/lib/clang/16/include/velintrin_gen.h +1257 -0
- package/lib/clang/{13.0.0 → 16}/include/vpclmulqdqintrin.h +6 -6
- package/lib/clang/{13.0.0 → 16}/include/wasm_simd128.h +169 -26
- package/lib/clang/{13.0.0 → 16}/include/wmmintrin.h +4 -0
- package/lib/clang/16/include/x86gprintrin.h +65 -0
- package/lib/clang/{13.0.0 → 16}/include/x86intrin.h +4 -0
- package/lib/clang/{13.0.0 → 16}/include/xmmintrin.h +19 -10
- package/lib/clang/{13.0.0 → 16}/include/xopintrin.h +31 -31
- package/package.json +6 -6
- package/lib/clang/13.0.0/include/ppc_wrappers/emmintrin.h +0 -2324
- package/lib/clang/13.0.0/include/ppc_wrappers/pmmintrin.h +0 -150
- package/lib/clang/13.0.0/include/ppc_wrappers/smmintrin.h +0 -109
- package/lib/clang/13.0.0/include/ppc_wrappers/tmmintrin.h +0 -495
- package/lib/clang/13.0.0/include/ppc_wrappers/xmmintrin.h +0 -1843
- package/lib/clang/13.0.0/include/riscv_vector.h +0 -123865
- package/lib/clang/13.0.0/include/x86gprintrin.h +0 -23
- /package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_builtin_vars.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_cmath.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_device_functions.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/__clang_cuda_math_forward_declares.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/__clang_hip_cmath.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/__stddef_max_align_t.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/adxintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/arm64intr.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/arm_bf16.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/arm_cde.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/arm_cmse.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/arm_mve.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/armintr.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512bitalgintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512cdintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512ifmaintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512pfintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vbmiintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vbmivlintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vlbitalgintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vlcdintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vlvp2intersectintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vnniintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vp2intersectintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vpopcntdqintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/avx512vpopcntdqvlintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/bmi2intrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/builtins.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/cet.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/cldemoteintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/clflushoptintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/clwbintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/clzerointrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/cuda_wrappers/algorithm +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/cuda_wrappers/complex +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/cuda_wrappers/new +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/enqcmdintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/fma4intrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/fmaintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/fxsrintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/hexagon_circ_brev_intrinsics.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/htmintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/htmxlintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/inttypes.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/invpcidintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/iso646.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/lwpintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/lzcntintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/mm3dnow.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/module.modulemap +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/movdirintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/msa.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/mwaitxintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/__clang_openmp_device_functions.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/cmath +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/complex_cmath.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/math.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/openmp_wrappers/new +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/pconfigintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/pkuintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/popcntintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/ptwriteintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/s390intrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/serializeintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/sgxintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/shaintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/stdalign.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/tbmintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/tgmath.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/tsxldtrkintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/vadefs.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/varargs.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/vecintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/waitpkgintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/wbnoinvdintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/xsavecintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/xsaveintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/xsaveoptintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/xsavesintrin.h +0 -0
- /package/lib/clang/{13.0.0 → 16}/include/xtestintrin.h +0 -0
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#ifndef __EMMINTRIN_H
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#define __EMMINTRIN_H
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#endif
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#include <xmmintrin.h>
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typedef double __m128d __attribute__((__vector_size__(16), __aligned__(16)));
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typedef long long __m128i __attribute__((__vector_size__(16), __aligned__(16)));
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typedef double __m128d_u __attribute__((__vector_size__(16), __aligned__(1)));
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typedef long long __m128i_u
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typedef long long __m128i_u
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__attribute__((__vector_size__(16), __aligned__(1)));
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typedef double __v2df __attribute__((__vector_size__(16)));
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typedef long long __v2di __attribute__((__vector_size__(16)));
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typedef short __v8hi __attribute__((__vector_size__(16)));
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typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
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typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
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typedef _Float16 __m128h __attribute__((__vector_size__(16), __aligned__(16)));
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typedef _Float16 __m128h_u __attribute__((__vector_size__(16), __aligned__(1)));
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typedef __bf16 __v8bf __attribute__((__vector_size__(16), __aligned__(16)));
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typedef __bf16 __m128bh __attribute__((__vector_size__(16), __aligned__(16)));
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#endif
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/* Define the default attributes for the functions in this file. */
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__attribute__((__always_inline__, __nodebug__, __target__("sse2"), \
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__min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS_MMX \
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__attribute__((__always_inline__, __nodebug__, __target__("mmx,sse2"), \
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/// Adds lower double-precision values in both operands and returns the
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/// sum in the lower 64 bits of the result. The upper 64 bits of the result
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_add_sd(__m128d __a,
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__m128d __b) {
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{
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__m128d __b) {
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}
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@@ -94,9 +111,8 @@ _mm_add_pd(__m128d __a, __m128d __b)
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sub_sd(__m128d __a,
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__m128d __b) {
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}
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{
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/// product of the lower 64 bits of both operands. The upper 64 bits are
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mul_sd(__m128d __a,
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__m128d __b) {
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}
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_mul_pd(__m128d __a,
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__m128d __b) {
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}
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
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/// copied from the upper 64 bits of the first source operand.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
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{
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_sd(__m128d __a,
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+
__m128d __b) {
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}
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@@ -197,9 +209,8 @@ _mm_div_sd(__m128d __a, __m128d __b)
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{
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+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_div_pd(__m128d __a,
|
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+
__m128d __b) {
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return (__m128d)((__v2df)__a / (__v2df)__b);
|
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}
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@@ -222,11 +233,10 @@ _mm_div_pd(__m128d __a, __m128d __b)
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
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/// square root of the lower 64 bits of operand \a __b, and whose upper 64
|
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/// bits are copied from the upper 64 bits of operand \a __a.
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static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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|
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{
|
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static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_sd(__m128d __a,
|
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237
|
+
__m128d __b) {
|
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|
__m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
|
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|
-
return __extension__
|
|
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|
+
return __extension__(__m128d){__c[0], __a[1]};
|
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}
|
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241
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232
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/// Calculates the square root of the each of two values stored in a
|
|
@@ -240,9 +250,7 @@ _mm_sqrt_sd(__m128d __a, __m128d __b)
|
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240
250
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/// A 128-bit vector of [2 x double].
|
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241
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|
/// \returns A 128-bit vector of [2 x double] containing the square roots of the
|
|
242
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|
/// values in the operand.
|
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243
|
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static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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244
|
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_mm_sqrt_pd(__m128d __a)
|
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245
|
-
{
|
|
253
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_sqrt_pd(__m128d __a) {
|
|
246
254
|
return __builtin_ia32_sqrtpd((__v2df)__a);
|
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247
255
|
}
|
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256
|
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@@ -264,9 +272,8 @@ _mm_sqrt_pd(__m128d __a)
|
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264
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/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
265
273
|
/// minimum value between both operands. The upper 64 bits are copied from
|
|
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274
|
/// the upper 64 bits of the first source operand.
|
|
267
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
268
|
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|
|
269
|
-
{
|
|
275
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_sd(__m128d __a,
|
|
276
|
+
__m128d __b) {
|
|
270
277
|
return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
|
|
271
278
|
}
|
|
272
279
|
|
|
@@ -284,9 +291,8 @@ _mm_min_sd(__m128d __a, __m128d __b)
|
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284
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|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
285
292
|
/// \returns A 128-bit vector of [2 x double] containing the minimum values
|
|
286
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|
/// between both operands.
|
|
287
|
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static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
288
|
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|
|
289
|
-
{
|
|
294
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_min_pd(__m128d __a,
|
|
295
|
+
__m128d __b) {
|
|
290
296
|
return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
|
|
291
297
|
}
|
|
292
298
|
|
|
@@ -308,9 +314,8 @@ _mm_min_pd(__m128d __a, __m128d __b)
|
|
|
308
314
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
309
315
|
/// maximum value between both operands. The upper 64 bits are copied from
|
|
310
316
|
/// the upper 64 bits of the first source operand.
|
|
311
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
312
|
-
|
|
313
|
-
{
|
|
317
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_sd(__m128d __a,
|
|
318
|
+
__m128d __b) {
|
|
314
319
|
return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
|
|
315
320
|
}
|
|
316
321
|
|
|
@@ -328,9 +333,8 @@ _mm_max_sd(__m128d __a, __m128d __b)
|
|
|
328
333
|
/// A 128-bit vector of [2 x double] containing one of the operands.
|
|
329
334
|
/// \returns A 128-bit vector of [2 x double] containing the maximum values
|
|
330
335
|
/// between both operands.
|
|
331
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
332
|
-
|
|
333
|
-
{
|
|
336
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_max_pd(__m128d __a,
|
|
337
|
+
__m128d __b) {
|
|
334
338
|
return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
|
|
335
339
|
}
|
|
336
340
|
|
|
@@ -346,9 +350,8 @@ _mm_max_pd(__m128d __a, __m128d __b)
|
|
|
346
350
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
347
351
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
348
352
|
/// values between both operands.
|
|
349
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
350
|
-
|
|
351
|
-
{
|
|
353
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_and_pd(__m128d __a,
|
|
354
|
+
__m128d __b) {
|
|
352
355
|
return (__m128d)((__v2du)__a & (__v2du)__b);
|
|
353
356
|
}
|
|
354
357
|
|
|
@@ -367,9 +370,8 @@ _mm_and_pd(__m128d __a, __m128d __b)
|
|
|
367
370
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
|
|
368
371
|
/// values in the second operand and the one's complement of the first
|
|
369
372
|
/// operand.
|
|
370
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
371
|
-
|
|
372
|
-
{
|
|
373
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_andnot_pd(__m128d __a,
|
|
374
|
+
__m128d __b) {
|
|
373
375
|
return (__m128d)(~(__v2du)__a & (__v2du)__b);
|
|
374
376
|
}
|
|
375
377
|
|
|
@@ -385,9 +387,8 @@ _mm_andnot_pd(__m128d __a, __m128d __b)
|
|
|
385
387
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
386
388
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
|
|
387
389
|
/// values between both operands.
|
|
388
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
389
|
-
|
|
390
|
-
{
|
|
390
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_or_pd(__m128d __a,
|
|
391
|
+
__m128d __b) {
|
|
391
392
|
return (__m128d)((__v2du)__a | (__v2du)__b);
|
|
392
393
|
}
|
|
393
394
|
|
|
@@ -403,9 +404,8 @@ _mm_or_pd(__m128d __a, __m128d __b)
|
|
|
403
404
|
/// A 128-bit vector of [2 x double] containing one of the source operands.
|
|
404
405
|
/// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
|
|
405
406
|
/// values between both operands.
|
|
406
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
407
|
-
|
|
408
|
-
{
|
|
407
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_xor_pd(__m128d __a,
|
|
408
|
+
__m128d __b) {
|
|
409
409
|
return (__m128d)((__v2du)__a ^ (__v2du)__b);
|
|
410
410
|
}
|
|
411
411
|
|
|
@@ -422,9 +422,8 @@ _mm_xor_pd(__m128d __a, __m128d __b)
|
|
|
422
422
|
/// \param __b
|
|
423
423
|
/// A 128-bit vector of [2 x double].
|
|
424
424
|
/// \returns A 128-bit vector containing the comparison results.
|
|
425
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
426
|
-
|
|
427
|
-
{
|
|
425
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_pd(__m128d __a,
|
|
426
|
+
__m128d __b) {
|
|
428
427
|
return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
|
|
429
428
|
}
|
|
430
429
|
|
|
@@ -442,9 +441,8 @@ _mm_cmpeq_pd(__m128d __a, __m128d __b)
|
|
|
442
441
|
/// \param __b
|
|
443
442
|
/// A 128-bit vector of [2 x double].
|
|
444
443
|
/// \returns A 128-bit vector containing the comparison results.
|
|
445
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
446
|
-
|
|
447
|
-
{
|
|
444
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_pd(__m128d __a,
|
|
445
|
+
__m128d __b) {
|
|
448
446
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
|
|
449
447
|
}
|
|
450
448
|
|
|
@@ -463,9 +461,8 @@ _mm_cmplt_pd(__m128d __a, __m128d __b)
|
|
|
463
461
|
/// \param __b
|
|
464
462
|
/// A 128-bit vector of [2 x double].
|
|
465
463
|
/// \returns A 128-bit vector containing the comparison results.
|
|
466
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
467
|
-
|
|
468
|
-
{
|
|
464
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_pd(__m128d __a,
|
|
465
|
+
__m128d __b) {
|
|
469
466
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
|
|
470
467
|
}
|
|
471
468
|
|
|
@@ -484,9 +481,8 @@ _mm_cmple_pd(__m128d __a, __m128d __b)
|
|
|
484
481
|
/// \param __b
|
|
485
482
|
/// A 128-bit vector of [2 x double].
|
|
486
483
|
/// \returns A 128-bit vector containing the comparison results.
|
|
487
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
488
|
-
|
|
489
|
-
{
|
|
484
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_pd(__m128d __a,
|
|
485
|
+
__m128d __b) {
|
|
490
486
|
return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
|
|
491
487
|
}
|
|
492
488
|
|
|
@@ -505,9 +501,8 @@ _mm_cmpgt_pd(__m128d __a, __m128d __b)
|
|
|
505
501
|
/// \param __b
|
|
506
502
|
/// A 128-bit vector of [2 x double].
|
|
507
503
|
/// \returns A 128-bit vector containing the comparison results.
|
|
508
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
509
|
-
|
|
510
|
-
{
|
|
504
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_pd(__m128d __a,
|
|
505
|
+
__m128d __b) {
|
|
511
506
|
return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
|
|
512
507
|
}
|
|
513
508
|
|
|
@@ -528,9 +523,8 @@ _mm_cmpge_pd(__m128d __a, __m128d __b)
|
|
|
528
523
|
/// \param __b
|
|
529
524
|
/// A 128-bit vector of [2 x double].
|
|
530
525
|
/// \returns A 128-bit vector containing the comparison results.
|
|
531
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
532
|
-
|
|
533
|
-
{
|
|
526
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_pd(__m128d __a,
|
|
527
|
+
__m128d __b) {
|
|
534
528
|
return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
|
|
535
529
|
}
|
|
536
530
|
|
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@@ -552,9 +546,8 @@ _mm_cmpord_pd(__m128d __a, __m128d __b)
|
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552
546
|
/// \param __b
|
|
553
547
|
/// A 128-bit vector of [2 x double].
|
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554
548
|
/// \returns A 128-bit vector containing the comparison results.
|
|
555
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
556
|
-
|
|
557
|
-
{
|
|
549
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_pd(__m128d __a,
|
|
550
|
+
__m128d __b) {
|
|
558
551
|
return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
|
|
559
552
|
}
|
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560
553
|
|
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@@ -573,9 +566,8 @@ _mm_cmpunord_pd(__m128d __a, __m128d __b)
|
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573
566
|
/// \param __b
|
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574
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|
/// A 128-bit vector of [2 x double].
|
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|
/// \returns A 128-bit vector containing the comparison results.
|
|
576
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
577
|
-
|
|
578
|
-
{
|
|
569
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_pd(__m128d __a,
|
|
570
|
+
__m128d __b) {
|
|
579
571
|
return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
|
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580
572
|
}
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581
573
|
|
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@@ -594,9 +586,8 @@ _mm_cmpneq_pd(__m128d __a, __m128d __b)
|
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594
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|
/// \param __b
|
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|
/// A 128-bit vector of [2 x double].
|
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|
/// \returns A 128-bit vector containing the comparison results.
|
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597
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
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598
|
-
|
|
599
|
-
{
|
|
589
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_pd(__m128d __a,
|
|
590
|
+
__m128d __b) {
|
|
600
591
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
|
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601
592
|
}
|
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602
593
|
|
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@@ -615,9 +606,8 @@ _mm_cmpnlt_pd(__m128d __a, __m128d __b)
|
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615
606
|
/// \param __b
|
|
616
607
|
/// A 128-bit vector of [2 x double].
|
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617
608
|
/// \returns A 128-bit vector containing the comparison results.
|
|
618
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
619
|
-
|
|
620
|
-
{
|
|
609
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_pd(__m128d __a,
|
|
610
|
+
__m128d __b) {
|
|
621
611
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
|
|
622
612
|
}
|
|
623
613
|
|
|
@@ -636,9 +626,8 @@ _mm_cmpnle_pd(__m128d __a, __m128d __b)
|
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636
626
|
/// \param __b
|
|
637
627
|
/// A 128-bit vector of [2 x double].
|
|
638
628
|
/// \returns A 128-bit vector containing the comparison results.
|
|
639
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
640
|
-
|
|
641
|
-
{
|
|
629
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_pd(__m128d __a,
|
|
630
|
+
__m128d __b) {
|
|
642
631
|
return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
|
|
643
632
|
}
|
|
644
633
|
|
|
@@ -657,9 +646,8 @@ _mm_cmpngt_pd(__m128d __a, __m128d __b)
|
|
|
657
646
|
/// \param __b
|
|
658
647
|
/// A 128-bit vector of [2 x double].
|
|
659
648
|
/// \returns A 128-bit vector containing the comparison results.
|
|
660
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
661
|
-
|
|
662
|
-
{
|
|
649
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_pd(__m128d __a,
|
|
650
|
+
__m128d __b) {
|
|
663
651
|
return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
|
|
664
652
|
}
|
|
665
653
|
|
|
@@ -680,9 +668,8 @@ _mm_cmpnge_pd(__m128d __a, __m128d __b)
|
|
|
680
668
|
/// compared to the lower double-precision value of \a __a.
|
|
681
669
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
682
670
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
683
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
684
|
-
|
|
685
|
-
{
|
|
671
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpeq_sd(__m128d __a,
|
|
672
|
+
__m128d __b) {
|
|
686
673
|
return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
|
|
687
674
|
}
|
|
688
675
|
|
|
@@ -705,9 +692,8 @@ _mm_cmpeq_sd(__m128d __a, __m128d __b)
|
|
|
705
692
|
/// compared to the lower double-precision value of \a __a.
|
|
706
693
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
707
694
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
708
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
709
|
-
|
|
710
|
-
{
|
|
695
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmplt_sd(__m128d __a,
|
|
696
|
+
__m128d __b) {
|
|
711
697
|
return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
|
|
712
698
|
}
|
|
713
699
|
|
|
@@ -730,9 +716,8 @@ _mm_cmplt_sd(__m128d __a, __m128d __b)
|
|
|
730
716
|
/// compared to the lower double-precision value of \a __a.
|
|
731
717
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
732
718
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
733
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
734
|
-
|
|
735
|
-
{
|
|
719
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmple_sd(__m128d __a,
|
|
720
|
+
__m128d __b) {
|
|
736
721
|
return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
|
|
737
722
|
}
|
|
738
723
|
|
|
@@ -755,11 +740,10 @@ _mm_cmple_sd(__m128d __a, __m128d __b)
|
|
|
755
740
|
/// compared to the lower double-precision value of \a __a.
|
|
756
741
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
757
742
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
758
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
759
|
-
|
|
760
|
-
{
|
|
743
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpgt_sd(__m128d __a,
|
|
744
|
+
__m128d __b) {
|
|
761
745
|
__m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
|
|
762
|
-
return __extension__
|
|
746
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
763
747
|
}
|
|
764
748
|
|
|
765
749
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -781,11 +765,10 @@ _mm_cmpgt_sd(__m128d __a, __m128d __b)
|
|
|
781
765
|
/// compared to the lower double-precision value of \a __a.
|
|
782
766
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
783
767
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
784
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
785
|
-
|
|
786
|
-
{
|
|
768
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpge_sd(__m128d __a,
|
|
769
|
+
__m128d __b) {
|
|
787
770
|
__m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
|
|
788
|
-
return __extension__
|
|
771
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
789
772
|
}
|
|
790
773
|
|
|
791
774
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -809,9 +792,8 @@ _mm_cmpge_sd(__m128d __a, __m128d __b)
|
|
|
809
792
|
/// compared to the lower double-precision value of \a __a.
|
|
810
793
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
811
794
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
812
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
813
|
-
|
|
814
|
-
{
|
|
795
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpord_sd(__m128d __a,
|
|
796
|
+
__m128d __b) {
|
|
815
797
|
return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
|
|
816
798
|
}
|
|
817
799
|
|
|
@@ -837,9 +819,8 @@ _mm_cmpord_sd(__m128d __a, __m128d __b)
|
|
|
837
819
|
/// compared to the lower double-precision value of \a __a.
|
|
838
820
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
839
821
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
840
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
841
|
-
|
|
842
|
-
{
|
|
822
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpunord_sd(__m128d __a,
|
|
823
|
+
__m128d __b) {
|
|
843
824
|
return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
|
|
844
825
|
}
|
|
845
826
|
|
|
@@ -862,9 +843,8 @@ _mm_cmpunord_sd(__m128d __a, __m128d __b)
|
|
|
862
843
|
/// compared to the lower double-precision value of \a __a.
|
|
863
844
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
864
845
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
865
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
866
|
-
|
|
867
|
-
{
|
|
846
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpneq_sd(__m128d __a,
|
|
847
|
+
__m128d __b) {
|
|
868
848
|
return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
|
|
869
849
|
}
|
|
870
850
|
|
|
@@ -887,9 +867,8 @@ _mm_cmpneq_sd(__m128d __a, __m128d __b)
|
|
|
887
867
|
/// compared to the lower double-precision value of \a __a.
|
|
888
868
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
889
869
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
890
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
891
|
-
|
|
892
|
-
{
|
|
870
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnlt_sd(__m128d __a,
|
|
871
|
+
__m128d __b) {
|
|
893
872
|
return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
|
|
894
873
|
}
|
|
895
874
|
|
|
@@ -912,9 +891,8 @@ _mm_cmpnlt_sd(__m128d __a, __m128d __b)
|
|
|
912
891
|
/// compared to the lower double-precision value of \a __a.
|
|
913
892
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
914
893
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
915
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
916
|
-
|
|
917
|
-
{
|
|
894
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnle_sd(__m128d __a,
|
|
895
|
+
__m128d __b) {
|
|
918
896
|
return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
|
|
919
897
|
}
|
|
920
898
|
|
|
@@ -937,11 +915,10 @@ _mm_cmpnle_sd(__m128d __a, __m128d __b)
|
|
|
937
915
|
/// compared to the lower double-precision value of \a __a.
|
|
938
916
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
939
917
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
940
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
941
|
-
|
|
942
|
-
{
|
|
918
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpngt_sd(__m128d __a,
|
|
919
|
+
__m128d __b) {
|
|
943
920
|
__m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
|
|
944
|
-
return __extension__
|
|
921
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
945
922
|
}
|
|
946
923
|
|
|
947
924
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -963,11 +940,10 @@ _mm_cmpngt_sd(__m128d __a, __m128d __b)
|
|
|
963
940
|
/// compared to the lower double-precision value of \a __a.
|
|
964
941
|
/// \returns A 128-bit vector. The lower 64 bits contains the comparison
|
|
965
942
|
/// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
|
|
966
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
967
|
-
|
|
968
|
-
{
|
|
943
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cmpnge_sd(__m128d __a,
|
|
944
|
+
__m128d __b) {
|
|
969
945
|
__m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
|
|
970
|
-
return __extension__
|
|
946
|
+
return __extension__(__m128d){__c[0], __a[1]};
|
|
971
947
|
}
|
|
972
948
|
|
|
973
949
|
/// Compares the lower double-precision floating-point values in each of
|
|
@@ -988,9 +964,8 @@ _mm_cmpnge_sd(__m128d __a, __m128d __b)
|
|
|
988
964
|
/// compared to the lower double-precision value of \a __a.
|
|
989
965
|
/// \returns An integer containing the comparison results. If either of the two
|
|
990
966
|
/// lower double-precision values is NaN, 0 is returned.
|
|
991
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
992
|
-
|
|
993
|
-
{
|
|
967
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comieq_sd(__m128d __a,
|
|
968
|
+
__m128d __b) {
|
|
994
969
|
return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
|
|
995
970
|
}
|
|
996
971
|
|
|
@@ -1014,9 +989,8 @@ _mm_comieq_sd(__m128d __a, __m128d __b)
|
|
|
1014
989
|
/// compared to the lower double-precision value of \a __a.
|
|
1015
990
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1016
991
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1017
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1018
|
-
|
|
1019
|
-
{
|
|
992
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comilt_sd(__m128d __a,
|
|
993
|
+
__m128d __b) {
|
|
1020
994
|
return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
|
|
1021
995
|
}
|
|
1022
996
|
|
|
@@ -1040,9 +1014,8 @@ _mm_comilt_sd(__m128d __a, __m128d __b)
|
|
|
1040
1014
|
/// compared to the lower double-precision value of \a __a.
|
|
1041
1015
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1042
1016
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1043
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1044
|
-
|
|
1045
|
-
{
|
|
1017
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comile_sd(__m128d __a,
|
|
1018
|
+
__m128d __b) {
|
|
1046
1019
|
return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
|
|
1047
1020
|
}
|
|
1048
1021
|
|
|
@@ -1066,9 +1039,8 @@ _mm_comile_sd(__m128d __a, __m128d __b)
|
|
|
1066
1039
|
/// compared to the lower double-precision value of \a __a.
|
|
1067
1040
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1068
1041
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1069
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1070
|
-
|
|
1071
|
-
{
|
|
1042
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comigt_sd(__m128d __a,
|
|
1043
|
+
__m128d __b) {
|
|
1072
1044
|
return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
|
|
1073
1045
|
}
|
|
1074
1046
|
|
|
@@ -1092,9 +1064,8 @@ _mm_comigt_sd(__m128d __a, __m128d __b)
|
|
|
1092
1064
|
/// compared to the lower double-precision value of \a __a.
|
|
1093
1065
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1094
1066
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1095
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1096
|
-
|
|
1097
|
-
{
|
|
1067
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comige_sd(__m128d __a,
|
|
1068
|
+
__m128d __b) {
|
|
1098
1069
|
return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
|
|
1099
1070
|
}
|
|
1100
1071
|
|
|
@@ -1118,9 +1089,8 @@ _mm_comige_sd(__m128d __a, __m128d __b)
|
|
|
1118
1089
|
/// compared to the lower double-precision value of \a __a.
|
|
1119
1090
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1120
1091
|
/// lower double-precision values is NaN, 1 is returned.
|
|
1121
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1122
|
-
|
|
1123
|
-
{
|
|
1092
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_comineq_sd(__m128d __a,
|
|
1093
|
+
__m128d __b) {
|
|
1124
1094
|
return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
|
|
1125
1095
|
}
|
|
1126
1096
|
|
|
@@ -1142,9 +1112,8 @@ _mm_comineq_sd(__m128d __a, __m128d __b)
|
|
|
1142
1112
|
/// compared to the lower double-precision value of \a __a.
|
|
1143
1113
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1144
1114
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1145
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1146
|
-
|
|
1147
|
-
{
|
|
1115
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomieq_sd(__m128d __a,
|
|
1116
|
+
__m128d __b) {
|
|
1148
1117
|
return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
|
|
1149
1118
|
}
|
|
1150
1119
|
|
|
@@ -1168,9 +1137,8 @@ _mm_ucomieq_sd(__m128d __a, __m128d __b)
|
|
|
1168
1137
|
/// compared to the lower double-precision value of \a __a.
|
|
1169
1138
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1170
1139
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1171
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1172
|
-
|
|
1173
|
-
{
|
|
1140
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomilt_sd(__m128d __a,
|
|
1141
|
+
__m128d __b) {
|
|
1174
1142
|
return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
|
|
1175
1143
|
}
|
|
1176
1144
|
|
|
@@ -1194,9 +1162,8 @@ _mm_ucomilt_sd(__m128d __a, __m128d __b)
|
|
|
1194
1162
|
/// compared to the lower double-precision value of \a __a.
|
|
1195
1163
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1196
1164
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1197
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1198
|
-
|
|
1199
|
-
{
|
|
1165
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomile_sd(__m128d __a,
|
|
1166
|
+
__m128d __b) {
|
|
1200
1167
|
return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
|
|
1201
1168
|
}
|
|
1202
1169
|
|
|
@@ -1220,9 +1187,8 @@ _mm_ucomile_sd(__m128d __a, __m128d __b)
|
|
|
1220
1187
|
/// compared to the lower double-precision value of \a __a.
|
|
1221
1188
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1222
1189
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1223
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1224
|
-
|
|
1225
|
-
{
|
|
1190
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomigt_sd(__m128d __a,
|
|
1191
|
+
__m128d __b) {
|
|
1226
1192
|
return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
|
|
1227
1193
|
}
|
|
1228
1194
|
|
|
@@ -1246,9 +1212,8 @@ _mm_ucomigt_sd(__m128d __a, __m128d __b)
|
|
|
1246
1212
|
/// compared to the lower double-precision value of \a __a.
|
|
1247
1213
|
/// \returns An integer containing the comparison results. If either of the two
|
|
1248
1214
|
/// lower double-precision values is NaN, 0 is returned.
|
|
1249
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1250
|
-
|
|
1251
|
-
{
|
|
1215
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomige_sd(__m128d __a,
|
|
1216
|
+
__m128d __b) {
|
|
1252
1217
|
return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
|
|
1253
1218
|
}
|
|
1254
1219
|
|
|
@@ -1272,9 +1237,8 @@ _mm_ucomige_sd(__m128d __a, __m128d __b)
|
|
|
1272
1237
|
/// compared to the lower double-precision value of \a __a.
|
|
1273
1238
|
/// \returns An integer containing the comparison result. If either of the two
|
|
1274
1239
|
/// lower double-precision values is NaN, 1 is returned.
|
|
1275
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1276
|
-
|
|
1277
|
-
{
|
|
1240
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_ucomineq_sd(__m128d __a,
|
|
1241
|
+
__m128d __b) {
|
|
1278
1242
|
return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
|
|
1279
1243
|
}
|
|
1280
1244
|
|
|
@@ -1291,9 +1255,7 @@ _mm_ucomineq_sd(__m128d __a, __m128d __b)
|
|
|
1291
1255
|
/// A 128-bit vector of [2 x double].
|
|
1292
1256
|
/// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
|
|
1293
1257
|
/// converted values. The upper 64 bits are set to zero.
|
|
1294
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1295
|
-
_mm_cvtpd_ps(__m128d __a)
|
|
1296
|
-
{
|
|
1258
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtpd_ps(__m128d __a) {
|
|
1297
1259
|
return __builtin_ia32_cvtpd2ps((__v2df)__a);
|
|
1298
1260
|
}
|
|
1299
1261
|
|
|
@@ -1311,9 +1273,7 @@ _mm_cvtpd_ps(__m128d __a)
|
|
|
1311
1273
|
/// floating-point elements are converted to double-precision values. The
|
|
1312
1274
|
/// upper two elements are unused.
|
|
1313
1275
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1314
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1315
|
-
_mm_cvtps_pd(__m128 __a)
|
|
1316
|
-
{
|
|
1276
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtps_pd(__m128 __a) {
|
|
1317
1277
|
return (__m128d) __builtin_convertvector(
|
|
1318
1278
|
__builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
|
|
1319
1279
|
}
|
|
@@ -1334,9 +1294,7 @@ _mm_cvtps_pd(__m128 __a)
|
|
|
1334
1294
|
///
|
|
1335
1295
|
/// The upper two elements are unused.
|
|
1336
1296
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1337
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1338
|
-
_mm_cvtepi32_pd(__m128i __a)
|
|
1339
|
-
{
|
|
1297
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtepi32_pd(__m128i __a) {
|
|
1340
1298
|
return (__m128d) __builtin_convertvector(
|
|
1341
1299
|
__builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
|
|
1342
1300
|
}
|
|
@@ -1354,9 +1312,7 @@ _mm_cvtepi32_pd(__m128i __a)
|
|
|
1354
1312
|
/// A 128-bit vector of [2 x double].
|
|
1355
1313
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
1356
1314
|
/// converted values. The upper 64 bits are set to zero.
|
|
1357
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1358
|
-
_mm_cvtpd_epi32(__m128d __a)
|
|
1359
|
-
{
|
|
1315
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtpd_epi32(__m128d __a) {
|
|
1360
1316
|
return __builtin_ia32_cvtpd2dq((__v2df)__a);
|
|
1361
1317
|
}
|
|
1362
1318
|
|
|
@@ -1371,9 +1327,7 @@ _mm_cvtpd_epi32(__m128d __a)
|
|
|
1371
1327
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
1372
1328
|
/// conversion.
|
|
1373
1329
|
/// \returns A 32-bit signed integer containing the converted value.
|
|
1374
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1375
|
-
_mm_cvtsd_si32(__m128d __a)
|
|
1376
|
-
{
|
|
1330
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsd_si32(__m128d __a) {
|
|
1377
1331
|
return __builtin_ia32_cvtsd2si((__v2df)__a);
|
|
1378
1332
|
}
|
|
1379
1333
|
|
|
@@ -1396,9 +1350,8 @@ _mm_cvtsd_si32(__m128d __a)
|
|
|
1396
1350
|
/// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
|
|
1397
1351
|
/// converted value from the second parameter. The upper 96 bits are copied
|
|
1398
1352
|
/// from the upper 96 bits of the first parameter.
|
|
1399
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
1400
|
-
|
|
1401
|
-
{
|
|
1353
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtsd_ss(__m128 __a,
|
|
1354
|
+
__m128d __b) {
|
|
1402
1355
|
return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
|
|
1403
1356
|
}
|
|
1404
1357
|
|
|
@@ -1419,9 +1372,8 @@ _mm_cvtsd_ss(__m128 __a, __m128d __b)
|
|
|
1419
1372
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
1420
1373
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
1421
1374
|
/// from the upper 64 bits of the first parameter.
|
|
1422
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1423
|
-
|
|
1424
|
-
{
|
|
1375
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi32_sd(__m128d __a,
|
|
1376
|
+
int __b) {
|
|
1425
1377
|
__a[0] = __b;
|
|
1426
1378
|
return __a;
|
|
1427
1379
|
}
|
|
@@ -1445,9 +1397,8 @@ _mm_cvtsi32_sd(__m128d __a, int __b)
|
|
|
1445
1397
|
/// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
|
|
1446
1398
|
/// converted value from the second parameter. The upper 64 bits are copied
|
|
1447
1399
|
/// from the upper 64 bits of the first parameter.
|
|
1448
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1449
|
-
|
|
1450
|
-
{
|
|
1400
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtss_sd(__m128d __a,
|
|
1401
|
+
__m128 __b) {
|
|
1451
1402
|
__a[0] = __b[0];
|
|
1452
1403
|
return __a;
|
|
1453
1404
|
}
|
|
@@ -1469,9 +1420,7 @@ _mm_cvtss_sd(__m128d __a, __m128 __b)
|
|
|
1469
1420
|
/// A 128-bit vector of [2 x double].
|
|
1470
1421
|
/// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
|
|
1471
1422
|
/// converted values. The upper 64 bits are set to zero.
|
|
1472
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1473
|
-
_mm_cvttpd_epi32(__m128d __a)
|
|
1474
|
-
{
|
|
1423
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttpd_epi32(__m128d __a) {
|
|
1475
1424
|
return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
|
|
1476
1425
|
}
|
|
1477
1426
|
|
|
@@ -1487,9 +1436,7 @@ _mm_cvttpd_epi32(__m128d __a)
|
|
|
1487
1436
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
1488
1437
|
/// conversion.
|
|
1489
1438
|
/// \returns A 32-bit signed integer containing the converted value.
|
|
1490
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
1491
|
-
_mm_cvttsd_si32(__m128d __a)
|
|
1492
|
-
{
|
|
1439
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvttsd_si32(__m128d __a) {
|
|
1493
1440
|
return __builtin_ia32_cvttsd2si((__v2df)__a);
|
|
1494
1441
|
}
|
|
1495
1442
|
|
|
@@ -1504,9 +1451,7 @@ _mm_cvttsd_si32(__m128d __a)
|
|
|
1504
1451
|
/// \param __a
|
|
1505
1452
|
/// A 128-bit vector of [2 x double].
|
|
1506
1453
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
|
1507
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
1508
|
-
_mm_cvtpd_pi32(__m128d __a)
|
|
1509
|
-
{
|
|
1454
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvtpd_pi32(__m128d __a) {
|
|
1510
1455
|
return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
|
|
1511
1456
|
}
|
|
1512
1457
|
|
|
@@ -1524,9 +1469,7 @@ _mm_cvtpd_pi32(__m128d __a)
|
|
|
1524
1469
|
/// \param __a
|
|
1525
1470
|
/// A 128-bit vector of [2 x double].
|
|
1526
1471
|
/// \returns A 64-bit vector of [2 x i32] containing the converted values.
|
|
1527
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
1528
|
-
_mm_cvttpd_pi32(__m128d __a)
|
|
1529
|
-
{
|
|
1472
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_cvttpd_pi32(__m128d __a) {
|
|
1530
1473
|
return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
|
|
1531
1474
|
}
|
|
1532
1475
|
|
|
@@ -1541,9 +1484,7 @@ _mm_cvttpd_pi32(__m128d __a)
|
|
|
1541
1484
|
/// \param __a
|
|
1542
1485
|
/// A 64-bit vector of [2 x i32].
|
|
1543
1486
|
/// \returns A 128-bit vector of [2 x double] containing the converted values.
|
|
1544
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX
|
|
1545
|
-
_mm_cvtpi32_pd(__m64 __a)
|
|
1546
|
-
{
|
|
1487
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX _mm_cvtpi32_pd(__m64 __a) {
|
|
1547
1488
|
return __builtin_ia32_cvtpi2pd((__v2si)__a);
|
|
1548
1489
|
}
|
|
1549
1490
|
|
|
@@ -1558,9 +1499,7 @@ _mm_cvtpi32_pd(__m64 __a)
|
|
|
1558
1499
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
|
|
1559
1500
|
/// \returns A double-precision floating-point value copied from the lower 64
|
|
1560
1501
|
/// bits of \a __a.
|
|
1561
|
-
static __inline__ double __DEFAULT_FN_ATTRS
|
|
1562
|
-
_mm_cvtsd_f64(__m128d __a)
|
|
1563
|
-
{
|
|
1502
|
+
static __inline__ double __DEFAULT_FN_ATTRS _mm_cvtsd_f64(__m128d __a) {
|
|
1564
1503
|
return __a[0];
|
|
1565
1504
|
}
|
|
1566
1505
|
|
|
@@ -1575,10 +1514,8 @@ _mm_cvtsd_f64(__m128d __a)
|
|
|
1575
1514
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
1576
1515
|
/// location has to be 16-byte aligned.
|
|
1577
1516
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
|
1578
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1579
|
-
|
|
1580
|
-
{
|
|
1581
|
-
return *(const __m128d*)__dp;
|
|
1517
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_pd(double const *__dp) {
|
|
1518
|
+
return *(const __m128d *)__dp;
|
|
1582
1519
|
}
|
|
1583
1520
|
|
|
1584
1521
|
/// Loads a double-precision floating-point value from a specified memory
|
|
@@ -1593,17 +1530,15 @@ _mm_load_pd(double const *__dp)
|
|
|
1593
1530
|
/// A pointer to a memory location containing a double-precision value.
|
|
1594
1531
|
/// \returns A 128-bit vector of [2 x double] containing the loaded and
|
|
1595
1532
|
/// duplicated values.
|
|
1596
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1597
|
-
_mm_load1_pd(double const *__dp)
|
|
1598
|
-
{
|
|
1533
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load1_pd(double const *__dp) {
|
|
1599
1534
|
struct __mm_load1_pd_struct {
|
|
1600
1535
|
double __u;
|
|
1601
1536
|
} __attribute__((__packed__, __may_alias__));
|
|
1602
|
-
double __u = ((const struct __mm_load1_pd_struct*)__dp)->__u;
|
|
1603
|
-
return __extension__
|
|
1537
|
+
double __u = ((const struct __mm_load1_pd_struct *)__dp)->__u;
|
|
1538
|
+
return __extension__(__m128d){__u, __u};
|
|
1604
1539
|
}
|
|
1605
1540
|
|
|
1606
|
-
#define
|
|
1541
|
+
#define _mm_load_pd1(dp) _mm_load1_pd(dp)
|
|
1607
1542
|
|
|
1608
1543
|
/// Loads two double-precision values, in reverse order, from an aligned
|
|
1609
1544
|
/// memory location into a 128-bit vector of [2 x double].
|
|
@@ -1619,10 +1554,8 @@ _mm_load1_pd(double const *__dp)
|
|
|
1619
1554
|
/// loaded in reverse order.
|
|
1620
1555
|
/// \returns A 128-bit vector of [2 x double] containing the reversed loaded
|
|
1621
1556
|
/// values.
|
|
1622
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1623
|
-
|
|
1624
|
-
{
|
|
1625
|
-
__m128d __u = *(const __m128d*)__dp;
|
|
1557
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadr_pd(double const *__dp) {
|
|
1558
|
+
__m128d __u = *(const __m128d *)__dp;
|
|
1626
1559
|
return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
|
|
1627
1560
|
}
|
|
1628
1561
|
|
|
@@ -1637,13 +1570,11 @@ _mm_loadr_pd(double const *__dp)
|
|
|
1637
1570
|
/// A pointer to a 128-bit memory location. The address of the memory
|
|
1638
1571
|
/// location does not have to be aligned.
|
|
1639
1572
|
/// \returns A 128-bit vector of [2 x double] containing the loaded values.
|
|
1640
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1641
|
-
_mm_loadu_pd(double const *__dp)
|
|
1642
|
-
{
|
|
1573
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadu_pd(double const *__dp) {
|
|
1643
1574
|
struct __loadu_pd {
|
|
1644
1575
|
__m128d_u __v;
|
|
1645
1576
|
} __attribute__((__packed__, __may_alias__));
|
|
1646
|
-
return ((const struct __loadu_pd*)__dp)->__v;
|
|
1577
|
+
return ((const struct __loadu_pd *)__dp)->__v;
|
|
1647
1578
|
}
|
|
1648
1579
|
|
|
1649
1580
|
/// Loads a 64-bit integer value to the low element of a 128-bit integer
|
|
@@ -1657,14 +1588,12 @@ _mm_loadu_pd(double const *__dp)
|
|
|
1657
1588
|
/// A pointer to a 64-bit memory location. The address of the memory
|
|
1658
1589
|
/// location does not have to be aligned.
|
|
1659
1590
|
/// \returns A 128-bit vector of [2 x i64] containing the loaded value.
|
|
1660
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1661
|
-
_mm_loadu_si64(void const *__a)
|
|
1662
|
-
{
|
|
1591
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si64(void const *__a) {
|
|
1663
1592
|
struct __loadu_si64 {
|
|
1664
1593
|
long long __v;
|
|
1665
1594
|
} __attribute__((__packed__, __may_alias__));
|
|
1666
|
-
long long __u = ((const struct __loadu_si64*)__a)->__v;
|
|
1667
|
-
return __extension__
|
|
1595
|
+
long long __u = ((const struct __loadu_si64 *)__a)->__v;
|
|
1596
|
+
return __extension__(__m128i)(__v2di){__u, 0LL};
|
|
1668
1597
|
}
|
|
1669
1598
|
|
|
1670
1599
|
/// Loads a 32-bit integer value to the low element of a 128-bit integer
|
|
@@ -1678,14 +1607,12 @@ _mm_loadu_si64(void const *__a)
|
|
|
1678
1607
|
/// A pointer to a 32-bit memory location. The address of the memory
|
|
1679
1608
|
/// location does not have to be aligned.
|
|
1680
1609
|
/// \returns A 128-bit vector of [4 x i32] containing the loaded value.
|
|
1681
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1682
|
-
_mm_loadu_si32(void const *__a)
|
|
1683
|
-
{
|
|
1610
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si32(void const *__a) {
|
|
1684
1611
|
struct __loadu_si32 {
|
|
1685
1612
|
int __v;
|
|
1686
1613
|
} __attribute__((__packed__, __may_alias__));
|
|
1687
|
-
int __u = ((const struct __loadu_si32*)__a)->__v;
|
|
1688
|
-
return __extension__
|
|
1614
|
+
int __u = ((const struct __loadu_si32 *)__a)->__v;
|
|
1615
|
+
return __extension__(__m128i)(__v4si){__u, 0, 0, 0};
|
|
1689
1616
|
}
|
|
1690
1617
|
|
|
1691
1618
|
/// Loads a 16-bit integer value to the low element of a 128-bit integer
|
|
@@ -1699,14 +1626,12 @@ _mm_loadu_si32(void const *__a)
|
|
|
1699
1626
|
/// A pointer to a 16-bit memory location. The address of the memory
|
|
1700
1627
|
/// location does not have to be aligned.
|
|
1701
1628
|
/// \returns A 128-bit vector of [8 x i16] containing the loaded value.
|
|
1702
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
1703
|
-
_mm_loadu_si16(void const *__a)
|
|
1704
|
-
{
|
|
1629
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_loadu_si16(void const *__a) {
|
|
1705
1630
|
struct __loadu_si16 {
|
|
1706
1631
|
short __v;
|
|
1707
1632
|
} __attribute__((__packed__, __may_alias__));
|
|
1708
|
-
short __u = ((const struct __loadu_si16*)__a)->__v;
|
|
1709
|
-
return __extension__
|
|
1633
|
+
short __u = ((const struct __loadu_si16 *)__a)->__v;
|
|
1634
|
+
return __extension__(__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};
|
|
1710
1635
|
}
|
|
1711
1636
|
|
|
1712
1637
|
/// Loads a 64-bit double-precision value to the low element of a
|
|
@@ -1720,14 +1645,12 @@ _mm_loadu_si16(void const *__a)
|
|
|
1720
1645
|
/// A pointer to a memory location containing a double-precision value.
|
|
1721
1646
|
/// The address of the memory location does not have to be aligned.
|
|
1722
1647
|
/// \returns A 128-bit vector of [2 x double] containing the loaded value.
|
|
1723
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1724
|
-
_mm_load_sd(double const *__dp)
|
|
1725
|
-
{
|
|
1648
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_load_sd(double const *__dp) {
|
|
1726
1649
|
struct __mm_load_sd_struct {
|
|
1727
1650
|
double __u;
|
|
1728
1651
|
} __attribute__((__packed__, __may_alias__));
|
|
1729
|
-
double __u = ((const struct __mm_load_sd_struct*)__dp)->__u;
|
|
1730
|
-
return __extension__
|
|
1652
|
+
double __u = ((const struct __mm_load_sd_struct *)__dp)->__u;
|
|
1653
|
+
return __extension__(__m128d){__u, 0};
|
|
1731
1654
|
}
|
|
1732
1655
|
|
|
1733
1656
|
/// Loads a double-precision value into the high-order bits of a 128-bit
|
|
@@ -1747,14 +1670,13 @@ _mm_load_sd(double const *__dp)
|
|
|
1747
1670
|
/// [127:64] of the result. The address of the memory location does not have
|
|
1748
1671
|
/// to be aligned.
|
|
1749
1672
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1750
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1751
|
-
|
|
1752
|
-
{
|
|
1673
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadh_pd(__m128d __a,
|
|
1674
|
+
double const *__dp) {
|
|
1753
1675
|
struct __mm_loadh_pd_struct {
|
|
1754
1676
|
double __u;
|
|
1755
1677
|
} __attribute__((__packed__, __may_alias__));
|
|
1756
|
-
double __u = ((const struct __mm_loadh_pd_struct*)__dp)->__u;
|
|
1757
|
-
return __extension__
|
|
1678
|
+
double __u = ((const struct __mm_loadh_pd_struct *)__dp)->__u;
|
|
1679
|
+
return __extension__(__m128d){__a[0], __u};
|
|
1758
1680
|
}
|
|
1759
1681
|
|
|
1760
1682
|
/// Loads a double-precision value into the low-order bits of a 128-bit
|
|
@@ -1774,14 +1696,13 @@ _mm_loadh_pd(__m128d __a, double const *__dp)
|
|
|
1774
1696
|
/// [63:0] of the result. The address of the memory location does not have to
|
|
1775
1697
|
/// be aligned.
|
|
1776
1698
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1777
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1778
|
-
|
|
1779
|
-
{
|
|
1699
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_loadl_pd(__m128d __a,
|
|
1700
|
+
double const *__dp) {
|
|
1780
1701
|
struct __mm_loadl_pd_struct {
|
|
1781
1702
|
double __u;
|
|
1782
1703
|
} __attribute__((__packed__, __may_alias__));
|
|
1783
|
-
double __u = ((const struct __mm_loadl_pd_struct*)__dp)->__u;
|
|
1784
|
-
return __extension__
|
|
1704
|
+
double __u = ((const struct __mm_loadl_pd_struct *)__dp)->__u;
|
|
1705
|
+
return __extension__(__m128d){__u, __a[1]};
|
|
1785
1706
|
}
|
|
1786
1707
|
|
|
1787
1708
|
/// Constructs a 128-bit floating-point vector of [2 x double] with
|
|
@@ -1795,9 +1716,7 @@ _mm_loadl_pd(__m128d __a, double const *__dp)
|
|
|
1795
1716
|
///
|
|
1796
1717
|
/// \returns A 128-bit floating-point vector of [2 x double] with unspecified
|
|
1797
1718
|
/// content.
|
|
1798
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1799
|
-
_mm_undefined_pd(void)
|
|
1800
|
-
{
|
|
1719
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_undefined_pd(void) {
|
|
1801
1720
|
return (__m128d)__builtin_ia32_undef128();
|
|
1802
1721
|
}
|
|
1803
1722
|
|
|
@@ -1815,10 +1734,8 @@ _mm_undefined_pd(void)
|
|
|
1815
1734
|
/// \returns An initialized 128-bit floating-point vector of [2 x double]. The
|
|
1816
1735
|
/// lower 64 bits contain the value of the parameter. The upper 64 bits are
|
|
1817
1736
|
/// set to zero.
|
|
1818
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1819
|
-
|
|
1820
|
-
{
|
|
1821
|
-
return __extension__ (__m128d){ __w, 0 };
|
|
1737
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_sd(double __w) {
|
|
1738
|
+
return __extension__(__m128d){__w, 0};
|
|
1822
1739
|
}
|
|
1823
1740
|
|
|
1824
1741
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
|
@@ -1833,10 +1750,8 @@ _mm_set_sd(double __w)
|
|
|
1833
1750
|
/// A double-precision floating-point value used to initialize each vector
|
|
1834
1751
|
/// element of the result.
|
|
1835
1752
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1836
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1837
|
-
|
|
1838
|
-
{
|
|
1839
|
-
return __extension__ (__m128d){ __w, __w };
|
|
1753
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set1_pd(double __w) {
|
|
1754
|
+
return __extension__(__m128d){__w, __w};
|
|
1840
1755
|
}
|
|
1841
1756
|
|
|
1842
1757
|
/// Constructs a 128-bit floating-point vector of [2 x double], with each
|
|
@@ -1851,9 +1766,7 @@ _mm_set1_pd(double __w)
|
|
|
1851
1766
|
/// A double-precision floating-point value used to initialize each vector
|
|
1852
1767
|
/// element of the result.
|
|
1853
1768
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1854
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1855
|
-
_mm_set_pd1(double __w)
|
|
1856
|
-
{
|
|
1769
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd1(double __w) {
|
|
1857
1770
|
return _mm_set1_pd(__w);
|
|
1858
1771
|
}
|
|
1859
1772
|
|
|
@@ -1871,10 +1784,9 @@ _mm_set_pd1(double __w)
|
|
|
1871
1784
|
/// A double-precision floating-point value used to initialize the lower 64
|
|
1872
1785
|
/// bits of the result.
|
|
1873
1786
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1874
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1875
|
-
|
|
1876
|
-
{
|
|
1877
|
-
return __extension__ (__m128d){ __x, __w };
|
|
1787
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_set_pd(double __w,
|
|
1788
|
+
double __x) {
|
|
1789
|
+
return __extension__(__m128d){__x, __w};
|
|
1878
1790
|
}
|
|
1879
1791
|
|
|
1880
1792
|
/// Constructs a 128-bit floating-point vector of [2 x double],
|
|
@@ -1892,10 +1804,9 @@ _mm_set_pd(double __w, double __x)
|
|
|
1892
1804
|
/// A double-precision floating-point value used to initialize the upper 64
|
|
1893
1805
|
/// bits of the result.
|
|
1894
1806
|
/// \returns An initialized 128-bit floating-point vector of [2 x double].
|
|
1895
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1896
|
-
|
|
1897
|
-
{
|
|
1898
|
-
return __extension__ (__m128d){ __w, __x };
|
|
1807
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setr_pd(double __w,
|
|
1808
|
+
double __x) {
|
|
1809
|
+
return __extension__(__m128d){__w, __x};
|
|
1899
1810
|
}
|
|
1900
1811
|
|
|
1901
1812
|
/// Constructs a 128-bit floating-point vector of [2 x double]
|
|
@@ -1907,10 +1818,8 @@ _mm_setr_pd(double __w, double __x)
|
|
|
1907
1818
|
///
|
|
1908
1819
|
/// \returns An initialized 128-bit floating-point vector of [2 x double] with
|
|
1909
1820
|
/// all elements set to zero.
|
|
1910
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1911
|
-
|
|
1912
|
-
{
|
|
1913
|
-
return __extension__ (__m128d){ 0, 0 };
|
|
1821
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_setzero_pd(void) {
|
|
1822
|
+
return __extension__(__m128d){0.0, 0.0};
|
|
1914
1823
|
}
|
|
1915
1824
|
|
|
1916
1825
|
/// Constructs a 128-bit floating-point vector of [2 x double]. The lower
|
|
@@ -1928,9 +1837,8 @@ _mm_setzero_pd(void)
|
|
|
1928
1837
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
|
|
1929
1838
|
/// lower 64 bits of the result.
|
|
1930
1839
|
/// \returns A 128-bit vector of [2 x double] containing the moved values.
|
|
1931
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
1932
|
-
|
|
1933
|
-
{
|
|
1840
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_move_sd(__m128d __a,
|
|
1841
|
+
__m128d __b) {
|
|
1934
1842
|
__a[0] = __b[0];
|
|
1935
1843
|
return __a;
|
|
1936
1844
|
}
|
|
@@ -1946,13 +1854,12 @@ _mm_move_sd(__m128d __a, __m128d __b)
|
|
|
1946
1854
|
/// A pointer to a 64-bit memory location.
|
|
1947
1855
|
/// \param __a
|
|
1948
1856
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
1949
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1950
|
-
|
|
1951
|
-
{
|
|
1857
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_sd(double *__dp,
|
|
1858
|
+
__m128d __a) {
|
|
1952
1859
|
struct __mm_store_sd_struct {
|
|
1953
1860
|
double __u;
|
|
1954
1861
|
} __attribute__((__packed__, __may_alias__));
|
|
1955
|
-
((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
|
|
1862
|
+
((struct __mm_store_sd_struct *)__dp)->__u = __a[0];
|
|
1956
1863
|
}
|
|
1957
1864
|
|
|
1958
1865
|
/// Moves packed double-precision values from a 128-bit vector of
|
|
@@ -1968,10 +1875,9 @@ _mm_store_sd(double *__dp, __m128d __a)
|
|
|
1968
1875
|
/// \param __a
|
|
1969
1876
|
/// A packed 128-bit vector of [2 x double] containing the values to be
|
|
1970
1877
|
/// moved.
|
|
1971
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1972
|
-
|
|
1973
|
-
|
|
1974
|
-
*(__m128d*)__dp = __a;
|
|
1878
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd(double *__dp,
|
|
1879
|
+
__m128d __a) {
|
|
1880
|
+
*(__m128d *)__dp = __a;
|
|
1975
1881
|
}
|
|
1976
1882
|
|
|
1977
1883
|
/// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
|
|
@@ -1988,9 +1894,8 @@ _mm_store_pd(double *__dp, __m128d __a)
|
|
|
1988
1894
|
/// \param __a
|
|
1989
1895
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
1990
1896
|
/// of the values in \a __dp.
|
|
1991
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
1992
|
-
|
|
1993
|
-
{
|
|
1897
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store1_pd(double *__dp,
|
|
1898
|
+
__m128d __a) {
|
|
1994
1899
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
|
|
1995
1900
|
_mm_store_pd(__dp, __a);
|
|
1996
1901
|
}
|
|
@@ -2009,9 +1914,8 @@ _mm_store1_pd(double *__dp, __m128d __a)
|
|
|
2009
1914
|
/// \param __a
|
|
2010
1915
|
/// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
|
|
2011
1916
|
/// of the values in \a __dp.
|
|
2012
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2013
|
-
|
|
2014
|
-
{
|
|
1917
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_pd1(double *__dp,
|
|
1918
|
+
__m128d __a) {
|
|
2015
1919
|
_mm_store1_pd(__dp, __a);
|
|
2016
1920
|
}
|
|
2017
1921
|
|
|
@@ -2027,13 +1931,12 @@ _mm_store_pd1(double *__dp, __m128d __a)
|
|
|
2027
1931
|
/// location does not have to be aligned.
|
|
2028
1932
|
/// \param __a
|
|
2029
1933
|
/// A 128-bit vector of [2 x double] containing the values to be stored.
|
|
2030
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2031
|
-
|
|
2032
|
-
{
|
|
1934
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_pd(double *__dp,
|
|
1935
|
+
__m128d __a) {
|
|
2033
1936
|
struct __storeu_pd {
|
|
2034
1937
|
__m128d_u __v;
|
|
2035
1938
|
} __attribute__((__packed__, __may_alias__));
|
|
2036
|
-
((struct __storeu_pd*)__dp)->__v = __a;
|
|
1939
|
+
((struct __storeu_pd *)__dp)->__v = __a;
|
|
2037
1940
|
}
|
|
2038
1941
|
|
|
2039
1942
|
/// Stores two double-precision values, in reverse order, from a 128-bit
|
|
@@ -2050,9 +1953,8 @@ _mm_storeu_pd(double *__dp, __m128d __a)
|
|
|
2050
1953
|
/// \param __a
|
|
2051
1954
|
/// A 128-bit vector of [2 x double] containing the values to be reversed and
|
|
2052
1955
|
/// stored.
|
|
2053
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2054
|
-
|
|
2055
|
-
{
|
|
1956
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storer_pd(double *__dp,
|
|
1957
|
+
__m128d __a) {
|
|
2056
1958
|
__a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
|
|
2057
1959
|
*(__m128d *)__dp = __a;
|
|
2058
1960
|
}
|
|
@@ -2068,13 +1970,12 @@ _mm_storer_pd(double *__dp, __m128d __a)
|
|
|
2068
1970
|
/// A pointer to a 64-bit memory location.
|
|
2069
1971
|
/// \param __a
|
|
2070
1972
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
2071
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2072
|
-
|
|
2073
|
-
{
|
|
1973
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeh_pd(double *__dp,
|
|
1974
|
+
__m128d __a) {
|
|
2074
1975
|
struct __mm_storeh_pd_struct {
|
|
2075
1976
|
double __u;
|
|
2076
1977
|
} __attribute__((__packed__, __may_alias__));
|
|
2077
|
-
((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
|
|
1978
|
+
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[1];
|
|
2078
1979
|
}
|
|
2079
1980
|
|
|
2080
1981
|
/// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
|
|
@@ -2088,13 +1989,12 @@ _mm_storeh_pd(double *__dp, __m128d __a)
|
|
|
2088
1989
|
/// A pointer to a 64-bit memory location.
|
|
2089
1990
|
/// \param __a
|
|
2090
1991
|
/// A 128-bit vector of [2 x double] containing the value to be stored.
|
|
2091
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
2092
|
-
|
|
2093
|
-
{
|
|
1992
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_pd(double *__dp,
|
|
1993
|
+
__m128d __a) {
|
|
2094
1994
|
struct __mm_storeh_pd_struct {
|
|
2095
1995
|
double __u;
|
|
2096
1996
|
} __attribute__((__packed__, __may_alias__));
|
|
2097
|
-
((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
|
|
1997
|
+
((struct __mm_storeh_pd_struct *)__dp)->__u = __a[0];
|
|
2098
1998
|
}
|
|
2099
1999
|
|
|
2100
2000
|
/// Adds the corresponding elements of two 128-bit vectors of [16 x i8],
|
|
@@ -2113,9 +2013,8 @@ _mm_storel_pd(double *__dp, __m128d __a)
|
|
|
2113
2013
|
/// A 128-bit vector of [16 x i8].
|
|
2114
2014
|
/// \returns A 128-bit vector of [16 x i8] containing the sums of both
|
|
2115
2015
|
/// parameters.
|
|
2116
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2117
|
-
|
|
2118
|
-
{
|
|
2016
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi8(__m128i __a,
|
|
2017
|
+
__m128i __b) {
|
|
2119
2018
|
return (__m128i)((__v16qu)__a + (__v16qu)__b);
|
|
2120
2019
|
}
|
|
2121
2020
|
|
|
@@ -2135,9 +2034,8 @@ _mm_add_epi8(__m128i __a, __m128i __b)
|
|
|
2135
2034
|
/// A 128-bit vector of [8 x i16].
|
|
2136
2035
|
/// \returns A 128-bit vector of [8 x i16] containing the sums of both
|
|
2137
2036
|
/// parameters.
|
|
2138
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2139
|
-
|
|
2140
|
-
{
|
|
2037
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi16(__m128i __a,
|
|
2038
|
+
__m128i __b) {
|
|
2141
2039
|
return (__m128i)((__v8hu)__a + (__v8hu)__b);
|
|
2142
2040
|
}
|
|
2143
2041
|
|
|
@@ -2157,9 +2055,8 @@ _mm_add_epi16(__m128i __a, __m128i __b)
|
|
|
2157
2055
|
/// A 128-bit vector of [4 x i32].
|
|
2158
2056
|
/// \returns A 128-bit vector of [4 x i32] containing the sums of both
|
|
2159
2057
|
/// parameters.
|
|
2160
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2161
|
-
|
|
2162
|
-
{
|
|
2058
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi32(__m128i __a,
|
|
2059
|
+
__m128i __b) {
|
|
2163
2060
|
return (__m128i)((__v4su)__a + (__v4su)__b);
|
|
2164
2061
|
}
|
|
2165
2062
|
|
|
@@ -2175,9 +2072,8 @@ _mm_add_epi32(__m128i __a, __m128i __b)
|
|
|
2175
2072
|
/// \param __b
|
|
2176
2073
|
/// A 64-bit integer.
|
|
2177
2074
|
/// \returns A 64-bit integer containing the sum of both parameters.
|
|
2178
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2179
|
-
|
|
2180
|
-
{
|
|
2075
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_add_si64(__m64 __a,
|
|
2076
|
+
__m64 __b) {
|
|
2181
2077
|
return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
|
|
2182
2078
|
}
|
|
2183
2079
|
|
|
@@ -2197,9 +2093,8 @@ _mm_add_si64(__m64 __a, __m64 __b)
|
|
|
2197
2093
|
/// A 128-bit vector of [2 x i64].
|
|
2198
2094
|
/// \returns A 128-bit vector of [2 x i64] containing the sums of both
|
|
2199
2095
|
/// parameters.
|
|
2200
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2201
|
-
|
|
2202
|
-
{
|
|
2096
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_add_epi64(__m128i __a,
|
|
2097
|
+
__m128i __b) {
|
|
2203
2098
|
return (__m128i)((__v2du)__a + (__v2du)__b);
|
|
2204
2099
|
}
|
|
2205
2100
|
|
|
@@ -2218,10 +2113,9 @@ _mm_add_epi64(__m128i __a, __m128i __b)
|
|
|
2218
2113
|
/// A 128-bit signed [16 x i8] vector.
|
|
2219
2114
|
/// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
|
|
2220
2115
|
/// both parameters.
|
|
2221
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2222
|
-
|
|
2223
|
-
|
|
2224
|
-
return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
|
|
2116
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi8(__m128i __a,
|
|
2117
|
+
__m128i __b) {
|
|
2118
|
+
return (__m128i)__builtin_elementwise_add_sat((__v16qs)__a, (__v16qs)__b);
|
|
2225
2119
|
}
|
|
2226
2120
|
|
|
2227
2121
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2240,10 +2134,9 @@ _mm_adds_epi8(__m128i __a, __m128i __b)
|
|
|
2240
2134
|
/// A 128-bit signed [8 x i16] vector.
|
|
2241
2135
|
/// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
|
|
2242
2136
|
/// both parameters.
|
|
2243
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2244
|
-
|
|
2245
|
-
|
|
2246
|
-
return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
|
|
2137
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epi16(__m128i __a,
|
|
2138
|
+
__m128i __b) {
|
|
2139
|
+
return (__m128i)__builtin_elementwise_add_sat((__v8hi)__a, (__v8hi)__b);
|
|
2247
2140
|
}
|
|
2248
2141
|
|
|
2249
2142
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2261,10 +2154,9 @@ _mm_adds_epi16(__m128i __a, __m128i __b)
|
|
|
2261
2154
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2262
2155
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
|
|
2263
2156
|
/// of both parameters.
|
|
2264
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2265
|
-
|
|
2266
|
-
|
|
2267
|
-
return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
|
|
2157
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu8(__m128i __a,
|
|
2158
|
+
__m128i __b) {
|
|
2159
|
+
return (__m128i)__builtin_elementwise_add_sat((__v16qu)__a, (__v16qu)__b);
|
|
2268
2160
|
}
|
|
2269
2161
|
|
|
2270
2162
|
/// Adds, with saturation, the corresponding elements of two 128-bit
|
|
@@ -2282,10 +2174,9 @@ _mm_adds_epu8(__m128i __a, __m128i __b)
|
|
|
2282
2174
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2283
2175
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
|
|
2284
2176
|
/// of both parameters.
|
|
2285
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2286
|
-
|
|
2287
|
-
|
|
2288
|
-
return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
|
|
2177
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_adds_epu16(__m128i __a,
|
|
2178
|
+
__m128i __b) {
|
|
2179
|
+
return (__m128i)__builtin_elementwise_add_sat((__v8hu)__a, (__v8hu)__b);
|
|
2289
2180
|
}
|
|
2290
2181
|
|
|
2291
2182
|
/// Computes the rounded averages of corresponding elements of two
|
|
@@ -2302,9 +2193,8 @@ _mm_adds_epu16(__m128i __a, __m128i __b)
|
|
|
2302
2193
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2303
2194
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
|
|
2304
2195
|
/// averages of both parameters.
|
|
2305
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2306
|
-
|
|
2307
|
-
{
|
|
2196
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu8(__m128i __a,
|
|
2197
|
+
__m128i __b) {
|
|
2308
2198
|
return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);
|
|
2309
2199
|
}
|
|
2310
2200
|
|
|
@@ -2322,9 +2212,8 @@ _mm_avg_epu8(__m128i __a, __m128i __b)
|
|
|
2322
2212
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2323
2213
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
|
|
2324
2214
|
/// averages of both parameters.
|
|
2325
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2326
|
-
|
|
2327
|
-
{
|
|
2215
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_avg_epu16(__m128i __a,
|
|
2216
|
+
__m128i __b) {
|
|
2328
2217
|
return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);
|
|
2329
2218
|
}
|
|
2330
2219
|
|
|
@@ -2348,9 +2237,8 @@ _mm_avg_epu16(__m128i __a, __m128i __b)
|
|
|
2348
2237
|
/// A 128-bit signed [8 x i16] vector.
|
|
2349
2238
|
/// \returns A 128-bit signed [4 x i32] vector containing the sums of products
|
|
2350
2239
|
/// of both parameters.
|
|
2351
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2352
|
-
|
|
2353
|
-
{
|
|
2240
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_madd_epi16(__m128i __a,
|
|
2241
|
+
__m128i __b) {
|
|
2354
2242
|
return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
|
|
2355
2243
|
}
|
|
2356
2244
|
|
|
@@ -2368,10 +2256,9 @@ _mm_madd_epi16(__m128i __a, __m128i __b)
|
|
|
2368
2256
|
/// A 128-bit signed [8 x i16] vector.
|
|
2369
2257
|
/// \returns A 128-bit signed [8 x i16] vector containing the greater value of
|
|
2370
2258
|
/// each comparison.
|
|
2371
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2372
|
-
|
|
2373
|
-
|
|
2374
|
-
return (__m128i)__builtin_ia32_pmaxsw128((__v8hi)__a, (__v8hi)__b);
|
|
2259
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epi16(__m128i __a,
|
|
2260
|
+
__m128i __b) {
|
|
2261
|
+
return (__m128i)__builtin_elementwise_max((__v8hi)__a, (__v8hi)__b);
|
|
2375
2262
|
}
|
|
2376
2263
|
|
|
2377
2264
|
/// Compares corresponding elements of two 128-bit unsigned [16 x i8]
|
|
@@ -2388,10 +2275,9 @@ _mm_max_epi16(__m128i __a, __m128i __b)
|
|
|
2388
2275
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2389
2276
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
|
|
2390
2277
|
/// each comparison.
|
|
2391
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2392
|
-
|
|
2393
|
-
|
|
2394
|
-
return (__m128i)__builtin_ia32_pmaxub128((__v16qi)__a, (__v16qi)__b);
|
|
2278
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_max_epu8(__m128i __a,
|
|
2279
|
+
__m128i __b) {
|
|
2280
|
+
return (__m128i)__builtin_elementwise_max((__v16qu)__a, (__v16qu)__b);
|
|
2395
2281
|
}
|
|
2396
2282
|
|
|
2397
2283
|
/// Compares corresponding elements of two 128-bit signed [8 x i16]
|
|
@@ -2408,10 +2294,9 @@ _mm_max_epu8(__m128i __a, __m128i __b)
|
|
|
2408
2294
|
/// A 128-bit signed [8 x i16] vector.
|
|
2409
2295
|
/// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
|
|
2410
2296
|
/// each comparison.
|
|
2411
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2412
|
-
|
|
2413
|
-
|
|
2414
|
-
return (__m128i)__builtin_ia32_pminsw128((__v8hi)__a, (__v8hi)__b);
|
|
2297
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epi16(__m128i __a,
|
|
2298
|
+
__m128i __b) {
|
|
2299
|
+
return (__m128i)__builtin_elementwise_min((__v8hi)__a, (__v8hi)__b);
|
|
2415
2300
|
}
|
|
2416
2301
|
|
|
2417
2302
|
/// Compares corresponding elements of two 128-bit unsigned [16 x i8]
|
|
@@ -2428,10 +2313,9 @@ _mm_min_epi16(__m128i __a, __m128i __b)
|
|
|
2428
2313
|
/// A 128-bit unsigned [16 x i8] vector.
|
|
2429
2314
|
/// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
|
|
2430
2315
|
/// each comparison.
|
|
2431
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2432
|
-
|
|
2433
|
-
|
|
2434
|
-
return (__m128i)__builtin_ia32_pminub128((__v16qi)__a, (__v16qi)__b);
|
|
2316
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,
|
|
2317
|
+
__m128i __b) {
|
|
2318
|
+
return (__m128i)__builtin_elementwise_min((__v16qu)__a, (__v16qu)__b);
|
|
2435
2319
|
}
|
|
2436
2320
|
|
|
2437
2321
|
/// Multiplies the corresponding elements of two signed [8 x i16]
|
|
@@ -2448,9 +2332,8 @@ _mm_min_epu8(__m128i __a, __m128i __b)
|
|
|
2448
2332
|
/// A 128-bit signed [8 x i16] vector.
|
|
2449
2333
|
/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
|
|
2450
2334
|
/// each of the eight 32-bit products.
|
|
2451
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2452
|
-
|
|
2453
|
-
{
|
|
2335
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
|
|
2336
|
+
__m128i __b) {
|
|
2454
2337
|
return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
|
|
2455
2338
|
}
|
|
2456
2339
|
|
|
@@ -2468,9 +2351,8 @@ _mm_mulhi_epi16(__m128i __a, __m128i __b)
|
|
|
2468
2351
|
/// A 128-bit unsigned [8 x i16] vector.
|
|
2469
2352
|
/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
|
|
2470
2353
|
/// of each of the eight 32-bit products.
|
|
2471
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2472
|
-
|
|
2473
|
-
{
|
|
2354
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
|
|
2355
|
+
__m128i __b) {
|
|
2474
2356
|
return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
|
|
2475
2357
|
}
|
|
2476
2358
|
|
|
@@ -2488,9 +2370,8 @@ _mm_mulhi_epu16(__m128i __a, __m128i __b)
|
|
|
2488
2370
|
/// A 128-bit signed [8 x i16] vector.
|
|
2489
2371
|
/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
|
|
2490
2372
|
/// each of the eight 32-bit products.
|
|
2491
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2492
|
-
|
|
2493
|
-
{
|
|
2373
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,
|
|
2374
|
+
__m128i __b) {
|
|
2494
2375
|
return (__m128i)((__v8hu)__a * (__v8hu)__b);
|
|
2495
2376
|
}
|
|
2496
2377
|
|
|
@@ -2507,9 +2388,8 @@ _mm_mullo_epi16(__m128i __a, __m128i __b)
|
|
|
2507
2388
|
/// \param __b
|
|
2508
2389
|
/// A 64-bit integer containing one of the source operands.
|
|
2509
2390
|
/// \returns A 64-bit integer vector containing the product of both operands.
|
|
2510
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2511
|
-
|
|
2512
|
-
{
|
|
2391
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_mul_su32(__m64 __a,
|
|
2392
|
+
__m64 __b) {
|
|
2513
2393
|
return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
|
|
2514
2394
|
}
|
|
2515
2395
|
|
|
@@ -2526,9 +2406,8 @@ _mm_mul_su32(__m64 __a, __m64 __b)
|
|
|
2526
2406
|
/// \param __b
|
|
2527
2407
|
/// A [2 x i64] vector containing one of the source operands.
|
|
2528
2408
|
/// \returns A [2 x i64] vector containing the product of both operands.
|
|
2529
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2530
|
-
|
|
2531
|
-
{
|
|
2409
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mul_epu32(__m128i __a,
|
|
2410
|
+
__m128i __b) {
|
|
2532
2411
|
return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
|
|
2533
2412
|
}
|
|
2534
2413
|
|
|
@@ -2548,9 +2427,8 @@ _mm_mul_epu32(__m128i __a, __m128i __b)
|
|
|
2548
2427
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2549
2428
|
/// \returns A [2 x i64] vector containing the sums of the sets of absolute
|
|
2550
2429
|
/// differences between both operands.
|
|
2551
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2552
|
-
|
|
2553
|
-
{
|
|
2430
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sad_epu8(__m128i __a,
|
|
2431
|
+
__m128i __b) {
|
|
2554
2432
|
return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
|
|
2555
2433
|
}
|
|
2556
2434
|
|
|
@@ -2566,9 +2444,8 @@ _mm_sad_epu8(__m128i __a, __m128i __b)
|
|
|
2566
2444
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2567
2445
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2568
2446
|
/// in the operands.
|
|
2569
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2570
|
-
|
|
2571
|
-
{
|
|
2447
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi8(__m128i __a,
|
|
2448
|
+
__m128i __b) {
|
|
2572
2449
|
return (__m128i)((__v16qu)__a - (__v16qu)__b);
|
|
2573
2450
|
}
|
|
2574
2451
|
|
|
@@ -2584,9 +2461,8 @@ _mm_sub_epi8(__m128i __a, __m128i __b)
|
|
|
2584
2461
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2585
2462
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2586
2463
|
/// in the operands.
|
|
2587
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2588
|
-
|
|
2589
|
-
{
|
|
2464
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi16(__m128i __a,
|
|
2465
|
+
__m128i __b) {
|
|
2590
2466
|
return (__m128i)((__v8hu)__a - (__v8hu)__b);
|
|
2591
2467
|
}
|
|
2592
2468
|
|
|
@@ -2602,9 +2478,8 @@ _mm_sub_epi16(__m128i __a, __m128i __b)
|
|
|
2602
2478
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2603
2479
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2604
2480
|
/// in the operands.
|
|
2605
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2606
|
-
|
|
2607
|
-
{
|
|
2481
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi32(__m128i __a,
|
|
2482
|
+
__m128i __b) {
|
|
2608
2483
|
return (__m128i)((__v4su)__a - (__v4su)__b);
|
|
2609
2484
|
}
|
|
2610
2485
|
|
|
@@ -2621,9 +2496,8 @@ _mm_sub_epi32(__m128i __a, __m128i __b)
|
|
|
2621
2496
|
/// A 64-bit integer vector containing the subtrahend.
|
|
2622
2497
|
/// \returns A 64-bit integer vector containing the difference of the values in
|
|
2623
2498
|
/// the operands.
|
|
2624
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
|
|
2625
|
-
|
|
2626
|
-
{
|
|
2499
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX _mm_sub_si64(__m64 __a,
|
|
2500
|
+
__m64 __b) {
|
|
2627
2501
|
return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
|
|
2628
2502
|
}
|
|
2629
2503
|
|
|
@@ -2639,9 +2513,8 @@ _mm_sub_si64(__m64 __a, __m64 __b)
|
|
|
2639
2513
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2640
2514
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2641
2515
|
/// in the operands.
|
|
2642
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2643
|
-
|
|
2644
|
-
{
|
|
2516
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sub_epi64(__m128i __a,
|
|
2517
|
+
__m128i __b) {
|
|
2645
2518
|
return (__m128i)((__v2du)__a - (__v2du)__b);
|
|
2646
2519
|
}
|
|
2647
2520
|
|
|
@@ -2660,10 +2533,9 @@ _mm_sub_epi64(__m128i __a, __m128i __b)
|
|
|
2660
2533
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2661
2534
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2662
2535
|
/// in the operands.
|
|
2663
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2664
|
-
|
|
2665
|
-
|
|
2666
|
-
return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
|
|
2536
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi8(__m128i __a,
|
|
2537
|
+
__m128i __b) {
|
|
2538
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v16qs)__a, (__v16qs)__b);
|
|
2667
2539
|
}
|
|
2668
2540
|
|
|
2669
2541
|
/// Subtracts corresponding 16-bit signed integer values in the input and
|
|
@@ -2681,10 +2553,9 @@ _mm_subs_epi8(__m128i __a, __m128i __b)
|
|
|
2681
2553
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2682
2554
|
/// \returns A 128-bit integer vector containing the differences of the values
|
|
2683
2555
|
/// in the operands.
|
|
2684
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2685
|
-
|
|
2686
|
-
|
|
2687
|
-
return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
|
|
2556
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epi16(__m128i __a,
|
|
2557
|
+
__m128i __b) {
|
|
2558
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v8hi)__a, (__v8hi)__b);
|
|
2688
2559
|
}
|
|
2689
2560
|
|
|
2690
2561
|
/// Subtracts corresponding 8-bit unsigned integer values in the input
|
|
@@ -2701,10 +2572,9 @@ _mm_subs_epi16(__m128i __a, __m128i __b)
|
|
|
2701
2572
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2702
2573
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
2703
2574
|
/// differences of the values in the operands.
|
|
2704
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2705
|
-
|
|
2706
|
-
|
|
2707
|
-
return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
|
|
2575
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu8(__m128i __a,
|
|
2576
|
+
__m128i __b) {
|
|
2577
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v16qu)__a, (__v16qu)__b);
|
|
2708
2578
|
}
|
|
2709
2579
|
|
|
2710
2580
|
/// Subtracts corresponding 16-bit unsigned integer values in the input
|
|
@@ -2721,10 +2591,9 @@ _mm_subs_epu8(__m128i __a, __m128i __b)
|
|
|
2721
2591
|
/// A 128-bit integer vector containing the subtrahends.
|
|
2722
2592
|
/// \returns A 128-bit integer vector containing the unsigned integer
|
|
2723
2593
|
/// differences of the values in the operands.
|
|
2724
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2725
|
-
|
|
2726
|
-
|
|
2727
|
-
return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
|
|
2594
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_subs_epu16(__m128i __a,
|
|
2595
|
+
__m128i __b) {
|
|
2596
|
+
return (__m128i)__builtin_elementwise_sub_sat((__v8hu)__a, (__v8hu)__b);
|
|
2728
2597
|
}
|
|
2729
2598
|
|
|
2730
2599
|
/// Performs a bitwise AND of two 128-bit integer vectors.
|
|
@@ -2739,9 +2608,8 @@ _mm_subs_epu16(__m128i __a, __m128i __b)
|
|
|
2739
2608
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2740
2609
|
/// \returns A 128-bit integer vector containing the bitwise AND of the values
|
|
2741
2610
|
/// in both operands.
|
|
2742
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2743
|
-
|
|
2744
|
-
{
|
|
2611
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_and_si128(__m128i __a,
|
|
2612
|
+
__m128i __b) {
|
|
2745
2613
|
return (__m128i)((__v2du)__a & (__v2du)__b);
|
|
2746
2614
|
}
|
|
2747
2615
|
|
|
@@ -2759,9 +2627,8 @@ _mm_and_si128(__m128i __a, __m128i __b)
|
|
|
2759
2627
|
/// A 128-bit vector containing the right source operand.
|
|
2760
2628
|
/// \returns A 128-bit integer vector containing the bitwise AND of the one's
|
|
2761
2629
|
/// complement of the first operand and the values in the second operand.
|
|
2762
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2763
|
-
|
|
2764
|
-
{
|
|
2630
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_andnot_si128(__m128i __a,
|
|
2631
|
+
__m128i __b) {
|
|
2765
2632
|
return (__m128i)(~(__v2du)__a & (__v2du)__b);
|
|
2766
2633
|
}
|
|
2767
2634
|
/// Performs a bitwise OR of two 128-bit integer vectors.
|
|
@@ -2776,9 +2643,8 @@ _mm_andnot_si128(__m128i __a, __m128i __b)
|
|
|
2776
2643
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2777
2644
|
/// \returns A 128-bit integer vector containing the bitwise OR of the values
|
|
2778
2645
|
/// in both operands.
|
|
2779
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2780
|
-
|
|
2781
|
-
{
|
|
2646
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_or_si128(__m128i __a,
|
|
2647
|
+
__m128i __b) {
|
|
2782
2648
|
return (__m128i)((__v2du)__a | (__v2du)__b);
|
|
2783
2649
|
}
|
|
2784
2650
|
|
|
@@ -2794,9 +2660,8 @@ _mm_or_si128(__m128i __a, __m128i __b)
|
|
|
2794
2660
|
/// A 128-bit integer vector containing one of the source operands.
|
|
2795
2661
|
/// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
|
|
2796
2662
|
/// values in both operands.
|
|
2797
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2798
|
-
|
|
2799
|
-
{
|
|
2663
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_xor_si128(__m128i __a,
|
|
2664
|
+
__m128i __b) {
|
|
2800
2665
|
return (__m128i)((__v2du)__a ^ (__v2du)__b);
|
|
2801
2666
|
}
|
|
2802
2667
|
|
|
@@ -2817,11 +2682,13 @@ _mm_xor_si128(__m128i __a, __m128i __b)
|
|
|
2817
2682
|
/// An immediate value specifying the number of bytes to left-shift operand
|
|
2818
2683
|
/// \a a.
|
|
2819
2684
|
/// \returns A 128-bit integer vector containing the left-shifted value.
|
|
2820
|
-
#define _mm_slli_si128(a, imm)
|
|
2821
|
-
(__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2685
|
+
#define _mm_slli_si128(a, imm) \
|
|
2686
|
+
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2687
|
+
(int)(imm)))
|
|
2822
2688
|
|
|
2823
|
-
#define _mm_bslli_si128(a, imm)
|
|
2824
|
-
(__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2689
|
+
#define _mm_bslli_si128(a, imm) \
|
|
2690
|
+
((__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2691
|
+
(int)(imm)))
|
|
2825
2692
|
|
|
2826
2693
|
/// Left-shifts each 16-bit value in the 128-bit integer vector operand
|
|
2827
2694
|
/// by the specified number of bits. Low-order bits are cleared.
|
|
@@ -2836,9 +2703,8 @@ _mm_xor_si128(__m128i __a, __m128i __b)
|
|
|
2836
2703
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2837
2704
|
/// in operand \a __a.
|
|
2838
2705
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2839
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2840
|
-
|
|
2841
|
-
{
|
|
2706
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi16(__m128i __a,
|
|
2707
|
+
int __count) {
|
|
2842
2708
|
return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
|
|
2843
2709
|
}
|
|
2844
2710
|
|
|
@@ -2855,9 +2721,8 @@ _mm_slli_epi16(__m128i __a, int __count)
|
|
|
2855
2721
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2856
2722
|
/// to left-shift each value in operand \a __a.
|
|
2857
2723
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2858
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2859
|
-
|
|
2860
|
-
{
|
|
2724
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi16(__m128i __a,
|
|
2725
|
+
__m128i __count) {
|
|
2861
2726
|
return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
|
|
2862
2727
|
}
|
|
2863
2728
|
|
|
@@ -2874,9 +2739,8 @@ _mm_sll_epi16(__m128i __a, __m128i __count)
|
|
|
2874
2739
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2875
2740
|
/// in operand \a __a.
|
|
2876
2741
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2877
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2878
|
-
|
|
2879
|
-
{
|
|
2742
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi32(__m128i __a,
|
|
2743
|
+
int __count) {
|
|
2880
2744
|
return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
|
|
2881
2745
|
}
|
|
2882
2746
|
|
|
@@ -2893,9 +2757,8 @@ _mm_slli_epi32(__m128i __a, int __count)
|
|
|
2893
2757
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2894
2758
|
/// to left-shift each value in operand \a __a.
|
|
2895
2759
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2896
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2897
|
-
|
|
2898
|
-
{
|
|
2760
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi32(__m128i __a,
|
|
2761
|
+
__m128i __count) {
|
|
2899
2762
|
return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
|
|
2900
2763
|
}
|
|
2901
2764
|
|
|
@@ -2912,9 +2775,8 @@ _mm_sll_epi32(__m128i __a, __m128i __count)
|
|
|
2912
2775
|
/// An integer value specifying the number of bits to left-shift each value
|
|
2913
2776
|
/// in operand \a __a.
|
|
2914
2777
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2915
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2916
|
-
|
|
2917
|
-
{
|
|
2778
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_slli_epi64(__m128i __a,
|
|
2779
|
+
int __count) {
|
|
2918
2780
|
return __builtin_ia32_psllqi128((__v2di)__a, __count);
|
|
2919
2781
|
}
|
|
2920
2782
|
|
|
@@ -2931,9 +2793,8 @@ _mm_slli_epi64(__m128i __a, int __count)
|
|
|
2931
2793
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2932
2794
|
/// to left-shift each value in operand \a __a.
|
|
2933
2795
|
/// \returns A 128-bit integer vector containing the left-shifted values.
|
|
2934
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2935
|
-
|
|
2936
|
-
{
|
|
2796
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sll_epi64(__m128i __a,
|
|
2797
|
+
__m128i __count) {
|
|
2937
2798
|
return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
|
|
2938
2799
|
}
|
|
2939
2800
|
|
|
@@ -2951,9 +2812,8 @@ _mm_sll_epi64(__m128i __a, __m128i __count)
|
|
|
2951
2812
|
/// An integer value specifying the number of bits to right-shift each value
|
|
2952
2813
|
/// in operand \a __a.
|
|
2953
2814
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2954
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2955
|
-
|
|
2956
|
-
{
|
|
2815
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi16(__m128i __a,
|
|
2816
|
+
int __count) {
|
|
2957
2817
|
return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
|
|
2958
2818
|
}
|
|
2959
2819
|
|
|
@@ -2971,9 +2831,8 @@ _mm_srai_epi16(__m128i __a, int __count)
|
|
|
2971
2831
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
2972
2832
|
/// to right-shift each value in operand \a __a.
|
|
2973
2833
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2974
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2975
|
-
|
|
2976
|
-
{
|
|
2834
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi16(__m128i __a,
|
|
2835
|
+
__m128i __count) {
|
|
2977
2836
|
return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
|
|
2978
2837
|
}
|
|
2979
2838
|
|
|
@@ -2991,9 +2850,8 @@ _mm_sra_epi16(__m128i __a, __m128i __count)
|
|
|
2991
2850
|
/// An integer value specifying the number of bits to right-shift each value
|
|
2992
2851
|
/// in operand \a __a.
|
|
2993
2852
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
2994
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
2995
|
-
|
|
2996
|
-
{
|
|
2853
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srai_epi32(__m128i __a,
|
|
2854
|
+
int __count) {
|
|
2997
2855
|
return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
|
|
2998
2856
|
}
|
|
2999
2857
|
|
|
@@ -3011,9 +2869,8 @@ _mm_srai_epi32(__m128i __a, int __count)
|
|
|
3011
2869
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3012
2870
|
/// to right-shift each value in operand \a __a.
|
|
3013
2871
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3014
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3015
|
-
|
|
3016
|
-
{
|
|
2872
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_sra_epi32(__m128i __a,
|
|
2873
|
+
__m128i __count) {
|
|
3017
2874
|
return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
|
|
3018
2875
|
}
|
|
3019
2876
|
|
|
@@ -3034,11 +2891,13 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
|
|
|
3034
2891
|
/// An immediate value specifying the number of bytes to right-shift operand
|
|
3035
2892
|
/// \a a.
|
|
3036
2893
|
/// \returns A 128-bit integer vector containing the right-shifted value.
|
|
3037
|
-
#define _mm_srli_si128(a, imm)
|
|
3038
|
-
(__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2894
|
+
#define _mm_srli_si128(a, imm) \
|
|
2895
|
+
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2896
|
+
(int)(imm)))
|
|
3039
2897
|
|
|
3040
|
-
#define _mm_bsrli_si128(a, imm)
|
|
3041
|
-
(__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a),
|
|
2898
|
+
#define _mm_bsrli_si128(a, imm) \
|
|
2899
|
+
((__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), \
|
|
2900
|
+
(int)(imm)))
|
|
3042
2901
|
|
|
3043
2902
|
/// Right-shifts each of 16-bit values in the 128-bit integer vector
|
|
3044
2903
|
/// operand by the specified number of bits. High-order bits are cleared.
|
|
@@ -3053,9 +2912,8 @@ _mm_sra_epi32(__m128i __a, __m128i __count)
|
|
|
3053
2912
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3054
2913
|
/// in operand \a __a.
|
|
3055
2914
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3056
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3057
|
-
|
|
3058
|
-
{
|
|
2915
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi16(__m128i __a,
|
|
2916
|
+
int __count) {
|
|
3059
2917
|
return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
|
|
3060
2918
|
}
|
|
3061
2919
|
|
|
@@ -3072,9 +2930,8 @@ _mm_srli_epi16(__m128i __a, int __count)
|
|
|
3072
2930
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3073
2931
|
/// to right-shift each value in operand \a __a.
|
|
3074
2932
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3075
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3076
|
-
|
|
3077
|
-
{
|
|
2933
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi16(__m128i __a,
|
|
2934
|
+
__m128i __count) {
|
|
3078
2935
|
return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
|
|
3079
2936
|
}
|
|
3080
2937
|
|
|
@@ -3091,9 +2948,8 @@ _mm_srl_epi16(__m128i __a, __m128i __count)
|
|
|
3091
2948
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3092
2949
|
/// in operand \a __a.
|
|
3093
2950
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3094
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3095
|
-
|
|
3096
|
-
{
|
|
2951
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi32(__m128i __a,
|
|
2952
|
+
int __count) {
|
|
3097
2953
|
return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
|
|
3098
2954
|
}
|
|
3099
2955
|
|
|
@@ -3110,9 +2966,8 @@ _mm_srli_epi32(__m128i __a, int __count)
|
|
|
3110
2966
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3111
2967
|
/// to right-shift each value in operand \a __a.
|
|
3112
2968
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3113
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3114
|
-
|
|
3115
|
-
{
|
|
2969
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi32(__m128i __a,
|
|
2970
|
+
__m128i __count) {
|
|
3116
2971
|
return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
|
|
3117
2972
|
}
|
|
3118
2973
|
|
|
@@ -3129,9 +2984,8 @@ _mm_srl_epi32(__m128i __a, __m128i __count)
|
|
|
3129
2984
|
/// An integer value specifying the number of bits to right-shift each value
|
|
3130
2985
|
/// in operand \a __a.
|
|
3131
2986
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3132
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3133
|
-
|
|
3134
|
-
{
|
|
2987
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srli_epi64(__m128i __a,
|
|
2988
|
+
int __count) {
|
|
3135
2989
|
return __builtin_ia32_psrlqi128((__v2di)__a, __count);
|
|
3136
2990
|
}
|
|
3137
2991
|
|
|
@@ -3148,9 +3002,8 @@ _mm_srli_epi64(__m128i __a, int __count)
|
|
|
3148
3002
|
/// A 128-bit integer vector in which bits [63:0] specify the number of bits
|
|
3149
3003
|
/// to right-shift each value in operand \a __a.
|
|
3150
3004
|
/// \returns A 128-bit integer vector containing the right-shifted values.
|
|
3151
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3152
|
-
|
|
3153
|
-
{
|
|
3005
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_srl_epi64(__m128i __a,
|
|
3006
|
+
__m128i __count) {
|
|
3154
3007
|
return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
|
|
3155
3008
|
}
|
|
3156
3009
|
|
|
@@ -3167,9 +3020,8 @@ _mm_srl_epi64(__m128i __a, __m128i __count)
|
|
|
3167
3020
|
/// \param __b
|
|
3168
3021
|
/// A 128-bit integer vector.
|
|
3169
3022
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3170
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3171
|
-
|
|
3172
|
-
{
|
|
3023
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi8(__m128i __a,
|
|
3024
|
+
__m128i __b) {
|
|
3173
3025
|
return (__m128i)((__v16qi)__a == (__v16qi)__b);
|
|
3174
3026
|
}
|
|
3175
3027
|
|
|
@@ -3186,9 +3038,8 @@ _mm_cmpeq_epi8(__m128i __a, __m128i __b)
|
|
|
3186
3038
|
/// \param __b
|
|
3187
3039
|
/// A 128-bit integer vector.
|
|
3188
3040
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3189
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3190
|
-
|
|
3191
|
-
{
|
|
3041
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi16(__m128i __a,
|
|
3042
|
+
__m128i __b) {
|
|
3192
3043
|
return (__m128i)((__v8hi)__a == (__v8hi)__b);
|
|
3193
3044
|
}
|
|
3194
3045
|
|
|
@@ -3205,9 +3056,8 @@ _mm_cmpeq_epi16(__m128i __a, __m128i __b)
|
|
|
3205
3056
|
/// \param __b
|
|
3206
3057
|
/// A 128-bit integer vector.
|
|
3207
3058
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3208
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3209
|
-
|
|
3210
|
-
{
|
|
3059
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpeq_epi32(__m128i __a,
|
|
3060
|
+
__m128i __b) {
|
|
3211
3061
|
return (__m128i)((__v4si)__a == (__v4si)__b);
|
|
3212
3062
|
}
|
|
3213
3063
|
|
|
@@ -3225,9 +3075,8 @@ _mm_cmpeq_epi32(__m128i __a, __m128i __b)
|
|
|
3225
3075
|
/// \param __b
|
|
3226
3076
|
/// A 128-bit integer vector.
|
|
3227
3077
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3228
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3229
|
-
|
|
3230
|
-
{
|
|
3078
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi8(__m128i __a,
|
|
3079
|
+
__m128i __b) {
|
|
3231
3080
|
/* This function always performs a signed comparison, but __v16qi is a char
|
|
3232
3081
|
which may be signed or unsigned, so use __v16qs. */
|
|
3233
3082
|
return (__m128i)((__v16qs)__a > (__v16qs)__b);
|
|
@@ -3248,9 +3097,8 @@ _mm_cmpgt_epi8(__m128i __a, __m128i __b)
|
|
|
3248
3097
|
/// \param __b
|
|
3249
3098
|
/// A 128-bit integer vector.
|
|
3250
3099
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3251
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3252
|
-
|
|
3253
|
-
{
|
|
3100
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi16(__m128i __a,
|
|
3101
|
+
__m128i __b) {
|
|
3254
3102
|
return (__m128i)((__v8hi)__a > (__v8hi)__b);
|
|
3255
3103
|
}
|
|
3256
3104
|
|
|
@@ -3269,9 +3117,8 @@ _mm_cmpgt_epi16(__m128i __a, __m128i __b)
|
|
|
3269
3117
|
/// \param __b
|
|
3270
3118
|
/// A 128-bit integer vector.
|
|
3271
3119
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3272
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3273
|
-
|
|
3274
|
-
{
|
|
3120
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmpgt_epi32(__m128i __a,
|
|
3121
|
+
__m128i __b) {
|
|
3275
3122
|
return (__m128i)((__v4si)__a > (__v4si)__b);
|
|
3276
3123
|
}
|
|
3277
3124
|
|
|
@@ -3290,9 +3137,8 @@ _mm_cmpgt_epi32(__m128i __a, __m128i __b)
|
|
|
3290
3137
|
/// \param __b
|
|
3291
3138
|
/// A 128-bit integer vector.
|
|
3292
3139
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3293
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3294
|
-
|
|
3295
|
-
{
|
|
3140
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi8(__m128i __a,
|
|
3141
|
+
__m128i __b) {
|
|
3296
3142
|
return _mm_cmpgt_epi8(__b, __a);
|
|
3297
3143
|
}
|
|
3298
3144
|
|
|
@@ -3311,9 +3157,8 @@ _mm_cmplt_epi8(__m128i __a, __m128i __b)
|
|
|
3311
3157
|
/// \param __b
|
|
3312
3158
|
/// A 128-bit integer vector.
|
|
3313
3159
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3314
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3315
|
-
|
|
3316
|
-
{
|
|
3160
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi16(__m128i __a,
|
|
3161
|
+
__m128i __b) {
|
|
3317
3162
|
return _mm_cmpgt_epi16(__b, __a);
|
|
3318
3163
|
}
|
|
3319
3164
|
|
|
@@ -3332,9 +3177,8 @@ _mm_cmplt_epi16(__m128i __a, __m128i __b)
|
|
|
3332
3177
|
/// \param __b
|
|
3333
3178
|
/// A 128-bit integer vector.
|
|
3334
3179
|
/// \returns A 128-bit integer vector containing the comparison results.
|
|
3335
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3336
|
-
|
|
3337
|
-
{
|
|
3180
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cmplt_epi32(__m128i __a,
|
|
3181
|
+
__m128i __b) {
|
|
3338
3182
|
return _mm_cmpgt_epi32(__b, __a);
|
|
3339
3183
|
}
|
|
3340
3184
|
|
|
@@ -3356,9 +3200,8 @@ _mm_cmplt_epi32(__m128i __a, __m128i __b)
|
|
|
3356
3200
|
/// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
|
|
3357
3201
|
/// converted value of the second operand. The upper 64 bits are copied from
|
|
3358
3202
|
/// the upper 64 bits of the first operand.
|
|
3359
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
3360
|
-
|
|
3361
|
-
{
|
|
3203
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_cvtsi64_sd(__m128d __a,
|
|
3204
|
+
long long __b) {
|
|
3362
3205
|
__a[0] = __b;
|
|
3363
3206
|
return __a;
|
|
3364
3207
|
}
|
|
@@ -3374,9 +3217,7 @@ _mm_cvtsi64_sd(__m128d __a, long long __b)
|
|
|
3374
3217
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
3375
3218
|
/// conversion.
|
|
3376
3219
|
/// \returns A 64-bit signed integer containing the converted value.
|
|
3377
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3378
|
-
_mm_cvtsd_si64(__m128d __a)
|
|
3379
|
-
{
|
|
3220
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsd_si64(__m128d __a) {
|
|
3380
3221
|
return __builtin_ia32_cvtsd2si64((__v2df)__a);
|
|
3381
3222
|
}
|
|
3382
3223
|
|
|
@@ -3392,9 +3233,7 @@ _mm_cvtsd_si64(__m128d __a)
|
|
|
3392
3233
|
/// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
|
|
3393
3234
|
/// conversion.
|
|
3394
3235
|
/// \returns A 64-bit signed integer containing the converted value.
|
|
3395
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3396
|
-
_mm_cvttsd_si64(__m128d __a)
|
|
3397
|
-
{
|
|
3236
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvttsd_si64(__m128d __a) {
|
|
3398
3237
|
return __builtin_ia32_cvttsd2si64((__v2df)__a);
|
|
3399
3238
|
}
|
|
3400
3239
|
#endif
|
|
@@ -3408,10 +3247,8 @@ _mm_cvttsd_si64(__m128d __a)
|
|
|
3408
3247
|
/// \param __a
|
|
3409
3248
|
/// A 128-bit integer vector.
|
|
3410
3249
|
/// \returns A 128-bit vector of [4 x float] containing the converted values.
|
|
3411
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
3412
|
-
|
|
3413
|
-
{
|
|
3414
|
-
return (__m128)__builtin_convertvector((__v4si)__a, __v4sf);
|
|
3250
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_cvtepi32_ps(__m128i __a) {
|
|
3251
|
+
return (__m128) __builtin_convertvector((__v4si)__a, __v4sf);
|
|
3415
3252
|
}
|
|
3416
3253
|
|
|
3417
3254
|
/// Converts a vector of [4 x float] into a vector of [4 x i32].
|
|
@@ -3424,9 +3261,7 @@ _mm_cvtepi32_ps(__m128i __a)
|
|
|
3424
3261
|
/// A 128-bit vector of [4 x float].
|
|
3425
3262
|
/// \returns A 128-bit integer vector of [4 x i32] containing the converted
|
|
3426
3263
|
/// values.
|
|
3427
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3428
|
-
_mm_cvtps_epi32(__m128 __a)
|
|
3429
|
-
{
|
|
3264
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtps_epi32(__m128 __a) {
|
|
3430
3265
|
return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
|
|
3431
3266
|
}
|
|
3432
3267
|
|
|
@@ -3441,9 +3276,7 @@ _mm_cvtps_epi32(__m128 __a)
|
|
|
3441
3276
|
/// \param __a
|
|
3442
3277
|
/// A 128-bit vector of [4 x float].
|
|
3443
3278
|
/// \returns A 128-bit vector of [4 x i32] containing the converted values.
|
|
3444
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3445
|
-
_mm_cvttps_epi32(__m128 __a)
|
|
3446
|
-
{
|
|
3279
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvttps_epi32(__m128 __a) {
|
|
3447
3280
|
return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
|
|
3448
3281
|
}
|
|
3449
3282
|
|
|
@@ -3457,29 +3290,24 @@ _mm_cvttps_epi32(__m128 __a)
|
|
|
3457
3290
|
/// \param __a
|
|
3458
3291
|
/// A 32-bit signed integer operand.
|
|
3459
3292
|
/// \returns A 128-bit vector of [4 x i32].
|
|
3460
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3461
|
-
|
|
3462
|
-
{
|
|
3463
|
-
return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 };
|
|
3293
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi32_si128(int __a) {
|
|
3294
|
+
return __extension__(__m128i)(__v4si){__a, 0, 0, 0};
|
|
3464
3295
|
}
|
|
3465
3296
|
|
|
3466
|
-
#ifdef __x86_64__
|
|
3467
3297
|
/// Returns a vector of [2 x i64] where the lower element is the input
|
|
3468
3298
|
/// operand and the upper element is zero.
|
|
3469
3299
|
///
|
|
3470
3300
|
/// \headerfile <x86intrin.h>
|
|
3471
3301
|
///
|
|
3472
|
-
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
|
|
3302
|
+
/// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction
|
|
3303
|
+
/// in 64-bit mode.
|
|
3473
3304
|
///
|
|
3474
3305
|
/// \param __a
|
|
3475
3306
|
/// A 64-bit signed integer operand containing the value to be converted.
|
|
3476
3307
|
/// \returns A 128-bit vector of [2 x i64] containing the converted value.
|
|
3477
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3478
|
-
|
|
3479
|
-
{
|
|
3480
|
-
return __extension__ (__m128i)(__v2di){ __a, 0 };
|
|
3308
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtsi64_si128(long long __a) {
|
|
3309
|
+
return __extension__(__m128i)(__v2di){__a, 0};
|
|
3481
3310
|
}
|
|
3482
|
-
#endif
|
|
3483
3311
|
|
|
3484
3312
|
/// Moves the least significant 32 bits of a vector of [4 x i32] to a
|
|
3485
3313
|
/// 32-bit signed integer value.
|
|
@@ -3492,14 +3320,11 @@ _mm_cvtsi64_si128(long long __a)
|
|
|
3492
3320
|
/// A vector of [4 x i32]. The least significant 32 bits are moved to the
|
|
3493
3321
|
/// destination.
|
|
3494
3322
|
/// \returns A 32-bit signed integer containing the moved value.
|
|
3495
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
3496
|
-
_mm_cvtsi128_si32(__m128i __a)
|
|
3497
|
-
{
|
|
3323
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_cvtsi128_si32(__m128i __a) {
|
|
3498
3324
|
__v4si __b = (__v4si)__a;
|
|
3499
3325
|
return __b[0];
|
|
3500
3326
|
}
|
|
3501
3327
|
|
|
3502
|
-
#ifdef __x86_64__
|
|
3503
3328
|
/// Moves the least significant 64 bits of a vector of [2 x i64] to a
|
|
3504
3329
|
/// 64-bit signed integer value.
|
|
3505
3330
|
///
|
|
@@ -3511,12 +3336,9 @@ _mm_cvtsi128_si32(__m128i __a)
|
|
|
3511
3336
|
/// A vector of [2 x i64]. The least significant 64 bits are moved to the
|
|
3512
3337
|
/// destination.
|
|
3513
3338
|
/// \returns A 64-bit signed integer containing the moved value.
|
|
3514
|
-
static __inline__ long long __DEFAULT_FN_ATTRS
|
|
3515
|
-
_mm_cvtsi128_si64(__m128i __a)
|
|
3516
|
-
{
|
|
3339
|
+
static __inline__ long long __DEFAULT_FN_ATTRS _mm_cvtsi128_si64(__m128i __a) {
|
|
3517
3340
|
return __a[0];
|
|
3518
3341
|
}
|
|
3519
|
-
#endif
|
|
3520
3342
|
|
|
3521
3343
|
/// Moves packed integer values from an aligned 128-bit memory location
|
|
3522
3344
|
/// to elements in a 128-bit integer vector.
|
|
@@ -3529,8 +3351,7 @@ _mm_cvtsi128_si64(__m128i __a)
|
|
|
3529
3351
|
/// An aligned pointer to a memory location containing integer values.
|
|
3530
3352
|
/// \returns A 128-bit integer vector containing the moved values.
|
|
3531
3353
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3532
|
-
_mm_load_si128(__m128i const *__p)
|
|
3533
|
-
{
|
|
3354
|
+
_mm_load_si128(__m128i const *__p) {
|
|
3534
3355
|
return *__p;
|
|
3535
3356
|
}
|
|
3536
3357
|
|
|
@@ -3545,12 +3366,11 @@ _mm_load_si128(__m128i const *__p)
|
|
|
3545
3366
|
/// A pointer to a memory location containing integer values.
|
|
3546
3367
|
/// \returns A 128-bit integer vector containing the moved values.
|
|
3547
3368
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3548
|
-
_mm_loadu_si128(__m128i_u const *__p)
|
|
3549
|
-
{
|
|
3369
|
+
_mm_loadu_si128(__m128i_u const *__p) {
|
|
3550
3370
|
struct __loadu_si128 {
|
|
3551
3371
|
__m128i_u __v;
|
|
3552
3372
|
} __attribute__((__packed__, __may_alias__));
|
|
3553
|
-
return ((const struct __loadu_si128*)__p)->__v;
|
|
3373
|
+
return ((const struct __loadu_si128 *)__p)->__v;
|
|
3554
3374
|
}
|
|
3555
3375
|
|
|
3556
3376
|
/// Returns a vector of [2 x i64] where the lower element is taken from
|
|
@@ -3566,12 +3386,12 @@ _mm_loadu_si128(__m128i_u const *__p)
|
|
|
3566
3386
|
/// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
|
|
3567
3387
|
/// moved value. The higher order bits are cleared.
|
|
3568
3388
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3569
|
-
_mm_loadl_epi64(__m128i_u const *__p)
|
|
3570
|
-
{
|
|
3389
|
+
_mm_loadl_epi64(__m128i_u const *__p) {
|
|
3571
3390
|
struct __mm_loadl_epi64_struct {
|
|
3572
3391
|
long long __u;
|
|
3573
3392
|
} __attribute__((__packed__, __may_alias__));
|
|
3574
|
-
return __extension__
|
|
3393
|
+
return __extension__(__m128i){
|
|
3394
|
+
((const struct __mm_loadl_epi64_struct *)__p)->__u, 0};
|
|
3575
3395
|
}
|
|
3576
3396
|
|
|
3577
3397
|
/// Generates a 128-bit vector of [4 x i32] with unspecified content.
|
|
@@ -3583,9 +3403,7 @@ _mm_loadl_epi64(__m128i_u const *__p)
|
|
|
3583
3403
|
/// This intrinsic has no corresponding instruction.
|
|
3584
3404
|
///
|
|
3585
3405
|
/// \returns A 128-bit vector of [4 x i32] with unspecified content.
|
|
3586
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3587
|
-
_mm_undefined_si128(void)
|
|
3588
|
-
{
|
|
3406
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_undefined_si128(void) {
|
|
3589
3407
|
return (__m128i)__builtin_ia32_undef128();
|
|
3590
3408
|
}
|
|
3591
3409
|
|
|
@@ -3605,10 +3423,9 @@ _mm_undefined_si128(void)
|
|
|
3605
3423
|
/// destination vector of [2 x i64].
|
|
3606
3424
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
3607
3425
|
/// provided in the operands.
|
|
3608
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3609
|
-
|
|
3610
|
-
{
|
|
3611
|
-
return __extension__ (__m128i)(__v2di){ __q0, __q1 };
|
|
3426
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64x(long long __q1,
|
|
3427
|
+
long long __q0) {
|
|
3428
|
+
return __extension__(__m128i)(__v2di){__q0, __q1};
|
|
3612
3429
|
}
|
|
3613
3430
|
|
|
3614
3431
|
/// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
|
|
@@ -3627,9 +3444,8 @@ _mm_set_epi64x(long long __q1, long long __q0)
|
|
|
3627
3444
|
/// destination vector of [2 x i64].
|
|
3628
3445
|
/// \returns An initialized 128-bit vector of [2 x i64] containing the values
|
|
3629
3446
|
/// provided in the operands.
|
|
3630
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3631
|
-
|
|
3632
|
-
{
|
|
3447
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi64(__m64 __q1,
|
|
3448
|
+
__m64 __q0) {
|
|
3633
3449
|
return _mm_set_epi64x((long long)__q1, (long long)__q0);
|
|
3634
3450
|
}
|
|
3635
3451
|
|
|
@@ -3655,10 +3471,9 @@ _mm_set_epi64(__m64 __q1, __m64 __q0)
|
|
|
3655
3471
|
/// vector.
|
|
3656
3472
|
/// \returns An initialized 128-bit vector of [4 x i32] containing the values
|
|
3657
3473
|
/// provided in the operands.
|
|
3658
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3659
|
-
|
|
3660
|
-
{
|
|
3661
|
-
return __extension__ (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
|
|
3474
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set_epi32(int __i3, int __i2,
|
|
3475
|
+
int __i1, int __i0) {
|
|
3476
|
+
return __extension__(__m128i)(__v4si){__i0, __i1, __i2, __i3};
|
|
3662
3477
|
}
|
|
3663
3478
|
|
|
3664
3479
|
/// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
|
|
@@ -3696,9 +3511,10 @@ _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
|
|
|
3696
3511
|
/// \returns An initialized 128-bit vector of [8 x i16] containing the values
|
|
3697
3512
|
/// provided in the operands.
|
|
3698
3513
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3699
|
-
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
3700
|
-
{
|
|
3701
|
-
return __extension__
|
|
3514
|
+
_mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3,
|
|
3515
|
+
short __w2, short __w1, short __w0) {
|
|
3516
|
+
return __extension__(__m128i)(__v8hi){__w0, __w1, __w2, __w3,
|
|
3517
|
+
__w4, __w5, __w6, __w7};
|
|
3702
3518
|
}
|
|
3703
3519
|
|
|
3704
3520
|
/// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
|
|
@@ -3744,9 +3560,12 @@ _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short
|
|
|
3744
3560
|
/// \returns An initialized 128-bit vector of [16 x i8] containing the values
|
|
3745
3561
|
/// provided in the operands.
|
|
3746
3562
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3747
|
-
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
3748
|
-
|
|
3749
|
-
|
|
3563
|
+
_mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11,
|
|
3564
|
+
char __b10, char __b9, char __b8, char __b7, char __b6, char __b5,
|
|
3565
|
+
char __b4, char __b3, char __b2, char __b1, char __b0) {
|
|
3566
|
+
return __extension__(__m128i)(__v16qi){
|
|
3567
|
+
__b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7,
|
|
3568
|
+
__b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15};
|
|
3750
3569
|
}
|
|
3751
3570
|
|
|
3752
3571
|
/// Initializes both values in a 128-bit integer vector with the
|
|
@@ -3762,9 +3581,7 @@ _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __
|
|
|
3762
3581
|
/// vector.
|
|
3763
3582
|
/// \returns An initialized 128-bit integer vector of [2 x i64] with both
|
|
3764
3583
|
/// elements containing the value provided in the operand.
|
|
3765
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3766
|
-
_mm_set1_epi64x(long long __q)
|
|
3767
|
-
{
|
|
3584
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64x(long long __q) {
|
|
3768
3585
|
return _mm_set_epi64x(__q, __q);
|
|
3769
3586
|
}
|
|
3770
3587
|
|
|
@@ -3781,9 +3598,7 @@ _mm_set1_epi64x(long long __q)
|
|
|
3781
3598
|
/// vector.
|
|
3782
3599
|
/// \returns An initialized 128-bit vector of [2 x i64] with all elements
|
|
3783
3600
|
/// containing the value provided in the operand.
|
|
3784
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3785
|
-
_mm_set1_epi64(__m64 __q)
|
|
3786
|
-
{
|
|
3601
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi64(__m64 __q) {
|
|
3787
3602
|
return _mm_set_epi64(__q, __q);
|
|
3788
3603
|
}
|
|
3789
3604
|
|
|
@@ -3800,9 +3615,7 @@ _mm_set1_epi64(__m64 __q)
|
|
|
3800
3615
|
/// vector.
|
|
3801
3616
|
/// \returns An initialized 128-bit vector of [4 x i32] with all elements
|
|
3802
3617
|
/// containing the value provided in the operand.
|
|
3803
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3804
|
-
_mm_set1_epi32(int __i)
|
|
3805
|
-
{
|
|
3618
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi32(int __i) {
|
|
3806
3619
|
return _mm_set_epi32(__i, __i, __i, __i);
|
|
3807
3620
|
}
|
|
3808
3621
|
|
|
@@ -3819,9 +3632,7 @@ _mm_set1_epi32(int __i)
|
|
|
3819
3632
|
/// vector.
|
|
3820
3633
|
/// \returns An initialized 128-bit vector of [8 x i16] with all elements
|
|
3821
3634
|
/// containing the value provided in the operand.
|
|
3822
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3823
|
-
_mm_set1_epi16(short __w)
|
|
3824
|
-
{
|
|
3635
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi16(short __w) {
|
|
3825
3636
|
return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);
|
|
3826
3637
|
}
|
|
3827
3638
|
|
|
@@ -3838,10 +3649,9 @@ _mm_set1_epi16(short __w)
|
|
|
3838
3649
|
/// vector.
|
|
3839
3650
|
/// \returns An initialized 128-bit vector of [16 x i8] with all elements
|
|
3840
3651
|
/// containing the value provided in the operand.
|
|
3841
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3842
|
-
|
|
3843
|
-
|
|
3844
|
-
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b);
|
|
3652
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_set1_epi8(char __b) {
|
|
3653
|
+
return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b,
|
|
3654
|
+
__b, __b, __b, __b, __b);
|
|
3845
3655
|
}
|
|
3846
3656
|
|
|
3847
3657
|
/// Constructs a 128-bit integer vector, initialized in reverse order
|
|
@@ -3858,9 +3668,8 @@ _mm_set1_epi8(char __b)
|
|
|
3858
3668
|
/// A 64-bit integral value used to initialize the upper 64 bits of the
|
|
3859
3669
|
/// result.
|
|
3860
3670
|
/// \returns An initialized 128-bit integer vector.
|
|
3861
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3862
|
-
|
|
3863
|
-
{
|
|
3671
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi64(__m64 __q0,
|
|
3672
|
+
__m64 __q1) {
|
|
3864
3673
|
return _mm_set_epi64(__q1, __q0);
|
|
3865
3674
|
}
|
|
3866
3675
|
|
|
@@ -3881,9 +3690,9 @@ _mm_setr_epi64(__m64 __q0, __m64 __q1)
|
|
|
3881
3690
|
/// \param __i3
|
|
3882
3691
|
/// A 32-bit integral value used to initialize bits [127:96] of the result.
|
|
3883
3692
|
/// \returns An initialized 128-bit integer vector.
|
|
3884
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3885
|
-
|
|
3886
|
-
{
|
|
3693
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setr_epi32(int __i0, int __i1,
|
|
3694
|
+
int __i2,
|
|
3695
|
+
int __i3) {
|
|
3887
3696
|
return _mm_set_epi32(__i3, __i2, __i1, __i0);
|
|
3888
3697
|
}
|
|
3889
3698
|
|
|
@@ -3913,8 +3722,8 @@ _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
|
|
|
3913
3722
|
/// A 16-bit integral value used to initialize bits [127:112] of the result.
|
|
3914
3723
|
/// \returns An initialized 128-bit integer vector.
|
|
3915
3724
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3916
|
-
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
3917
|
-
{
|
|
3725
|
+
_mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4,
|
|
3726
|
+
short __w5, short __w6, short __w7) {
|
|
3918
3727
|
return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);
|
|
3919
3728
|
}
|
|
3920
3729
|
|
|
@@ -3960,9 +3769,11 @@ _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short
|
|
|
3960
3769
|
/// An 8-bit integral value used to initialize bits [127:120] of the result.
|
|
3961
3770
|
/// \returns An initialized 128-bit integer vector.
|
|
3962
3771
|
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3963
|
-
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
3964
|
-
|
|
3965
|
-
|
|
3772
|
+
_mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
3773
|
+
char __b6, char __b7, char __b8, char __b9, char __b10,
|
|
3774
|
+
char __b11, char __b12, char __b13, char __b14, char __b15) {
|
|
3775
|
+
return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8,
|
|
3776
|
+
__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
|
|
3966
3777
|
}
|
|
3967
3778
|
|
|
3968
3779
|
/// Creates a 128-bit integer vector initialized to zero.
|
|
@@ -3973,10 +3784,8 @@ _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
|
|
|
3973
3784
|
///
|
|
3974
3785
|
/// \returns An initialized 128-bit integer vector with all elements set to
|
|
3975
3786
|
/// zero.
|
|
3976
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
3977
|
-
|
|
3978
|
-
{
|
|
3979
|
-
return __extension__ (__m128i)(__v2di){ 0LL, 0LL };
|
|
3787
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_setzero_si128(void) {
|
|
3788
|
+
return __extension__(__m128i)(__v2di){0LL, 0LL};
|
|
3980
3789
|
}
|
|
3981
3790
|
|
|
3982
3791
|
/// Stores a 128-bit integer vector to a memory location aligned on a
|
|
@@ -3991,9 +3800,8 @@ _mm_setzero_si128(void)
|
|
|
3991
3800
|
/// values.
|
|
3992
3801
|
/// \param __b
|
|
3993
3802
|
/// A 128-bit integer vector containing the values to be moved.
|
|
3994
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
3995
|
-
|
|
3996
|
-
{
|
|
3803
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_store_si128(__m128i *__p,
|
|
3804
|
+
__m128i __b) {
|
|
3997
3805
|
*__p = __b;
|
|
3998
3806
|
}
|
|
3999
3807
|
|
|
@@ -4007,13 +3815,12 @@ _mm_store_si128(__m128i *__p, __m128i __b)
|
|
|
4007
3815
|
/// A pointer to a memory location that will receive the integer values.
|
|
4008
3816
|
/// \param __b
|
|
4009
3817
|
/// A 128-bit integer vector containing the values to be moved.
|
|
4010
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4011
|
-
|
|
4012
|
-
{
|
|
3818
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si128(__m128i_u *__p,
|
|
3819
|
+
__m128i __b) {
|
|
4013
3820
|
struct __storeu_si128 {
|
|
4014
3821
|
__m128i_u __v;
|
|
4015
3822
|
} __attribute__((__packed__, __may_alias__));
|
|
4016
|
-
((struct __storeu_si128*)__p)->__v = __b;
|
|
3823
|
+
((struct __storeu_si128 *)__p)->__v = __b;
|
|
4017
3824
|
}
|
|
4018
3825
|
|
|
4019
3826
|
/// Stores a 64-bit integer value from the low element of a 128-bit integer
|
|
@@ -4028,13 +3835,12 @@ _mm_storeu_si128(__m128i_u *__p, __m128i __b)
|
|
|
4028
3835
|
/// location does not have to be aligned.
|
|
4029
3836
|
/// \param __b
|
|
4030
3837
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4031
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4032
|
-
|
|
4033
|
-
{
|
|
3838
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si64(void *__p,
|
|
3839
|
+
__m128i __b) {
|
|
4034
3840
|
struct __storeu_si64 {
|
|
4035
3841
|
long long __v;
|
|
4036
3842
|
} __attribute__((__packed__, __may_alias__));
|
|
4037
|
-
((struct __storeu_si64*)__p)->__v = ((__v2di)__b)[0];
|
|
3843
|
+
((struct __storeu_si64 *)__p)->__v = ((__v2di)__b)[0];
|
|
4038
3844
|
}
|
|
4039
3845
|
|
|
4040
3846
|
/// Stores a 32-bit integer value from the low element of a 128-bit integer
|
|
@@ -4049,13 +3855,12 @@ _mm_storeu_si64(void *__p, __m128i __b)
|
|
|
4049
3855
|
/// location does not have to be aligned.
|
|
4050
3856
|
/// \param __b
|
|
4051
3857
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4052
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4053
|
-
|
|
4054
|
-
{
|
|
3858
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si32(void *__p,
|
|
3859
|
+
__m128i __b) {
|
|
4055
3860
|
struct __storeu_si32 {
|
|
4056
3861
|
int __v;
|
|
4057
3862
|
} __attribute__((__packed__, __may_alias__));
|
|
4058
|
-
((struct __storeu_si32*)__p)->__v = ((__v4si)__b)[0];
|
|
3863
|
+
((struct __storeu_si32 *)__p)->__v = ((__v4si)__b)[0];
|
|
4059
3864
|
}
|
|
4060
3865
|
|
|
4061
3866
|
/// Stores a 16-bit integer value from the low element of a 128-bit integer
|
|
@@ -4070,13 +3875,12 @@ _mm_storeu_si32(void *__p, __m128i __b)
|
|
|
4070
3875
|
/// location does not have to be aligned.
|
|
4071
3876
|
/// \param __b
|
|
4072
3877
|
/// A 128-bit integer vector containing the value to be stored.
|
|
4073
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4074
|
-
|
|
4075
|
-
{
|
|
3878
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storeu_si16(void *__p,
|
|
3879
|
+
__m128i __b) {
|
|
4076
3880
|
struct __storeu_si16 {
|
|
4077
3881
|
short __v;
|
|
4078
3882
|
} __attribute__((__packed__, __may_alias__));
|
|
4079
|
-
((struct __storeu_si16*)__p)->__v = ((__v8hi)__b)[0];
|
|
3883
|
+
((struct __storeu_si16 *)__p)->__v = ((__v8hi)__b)[0];
|
|
4080
3884
|
}
|
|
4081
3885
|
|
|
4082
3886
|
/// Moves bytes selected by the mask from the first operand to the
|
|
@@ -4100,9 +3904,9 @@ _mm_storeu_si16(void *__p, __m128i __b)
|
|
|
4100
3904
|
/// \param __p
|
|
4101
3905
|
/// A pointer to an unaligned 128-bit memory location where the specified
|
|
4102
3906
|
/// values are moved.
|
|
4103
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4104
|
-
|
|
4105
|
-
{
|
|
3907
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_maskmoveu_si128(__m128i __d,
|
|
3908
|
+
__m128i __n,
|
|
3909
|
+
char *__p) {
|
|
4106
3910
|
__builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
|
|
4107
3911
|
}
|
|
4108
3912
|
|
|
@@ -4119,13 +3923,12 @@ _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
|
|
|
4119
3923
|
/// \param __a
|
|
4120
3924
|
/// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
|
|
4121
3925
|
/// value to be stored.
|
|
4122
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4123
|
-
|
|
4124
|
-
{
|
|
3926
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_storel_epi64(__m128i_u *__p,
|
|
3927
|
+
__m128i __a) {
|
|
4125
3928
|
struct __mm_storel_epi64_struct {
|
|
4126
3929
|
long long __u;
|
|
4127
3930
|
} __attribute__((__packed__, __may_alias__));
|
|
4128
|
-
((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
|
|
3931
|
+
((struct __mm_storel_epi64_struct *)__p)->__u = __a[0];
|
|
4129
3932
|
}
|
|
4130
3933
|
|
|
4131
3934
|
/// Stores a 128-bit floating point vector of [2 x double] to a 128-bit
|
|
@@ -4142,10 +3945,9 @@ _mm_storel_epi64(__m128i_u *__p, __m128i __a)
|
|
|
4142
3945
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
4143
3946
|
/// \param __a
|
|
4144
3947
|
/// A vector of [2 x double] containing the 64-bit values to be stored.
|
|
4145
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4146
|
-
|
|
4147
|
-
|
|
4148
|
-
__builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
|
|
3948
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_pd(double *__p,
|
|
3949
|
+
__m128d __a) {
|
|
3950
|
+
__builtin_nontemporal_store((__v2df)__a, (__v2df *)__p);
|
|
4149
3951
|
}
|
|
4150
3952
|
|
|
4151
3953
|
/// Stores a 128-bit integer vector to a 128-bit aligned memory location.
|
|
@@ -4161,10 +3963,9 @@ _mm_stream_pd(double *__p, __m128d __a)
|
|
|
4161
3963
|
/// A pointer to the 128-bit aligned memory location used to store the value.
|
|
4162
3964
|
/// \param __a
|
|
4163
3965
|
/// A 128-bit integer vector containing the values to be stored.
|
|
4164
|
-
static __inline__ void __DEFAULT_FN_ATTRS
|
|
4165
|
-
|
|
4166
|
-
|
|
4167
|
-
__builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
|
|
3966
|
+
static __inline__ void __DEFAULT_FN_ATTRS _mm_stream_si128(__m128i *__p,
|
|
3967
|
+
__m128i __a) {
|
|
3968
|
+
__builtin_nontemporal_store((__v2di)__a, (__v2di *)__p);
|
|
4168
3969
|
}
|
|
4169
3970
|
|
|
4170
3971
|
/// Stores a 32-bit integer value in the specified memory location.
|
|
@@ -4180,9 +3981,9 @@ _mm_stream_si128(__m128i *__p, __m128i __a)
|
|
|
4180
3981
|
/// A pointer to the 32-bit memory location used to store the value.
|
|
4181
3982
|
/// \param __a
|
|
4182
3983
|
/// A 32-bit integer containing the value to be stored.
|
|
4183
|
-
static __inline__ void
|
|
4184
|
-
|
|
4185
|
-
{
|
|
3984
|
+
static __inline__ void
|
|
3985
|
+
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
3986
|
+
_mm_stream_si32(int *__p, int __a) {
|
|
4186
3987
|
__builtin_ia32_movnti(__p, __a);
|
|
4187
3988
|
}
|
|
4188
3989
|
|
|
@@ -4200,9 +4001,9 @@ _mm_stream_si32(int *__p, int __a)
|
|
|
4200
4001
|
/// A pointer to the 64-bit memory location used to store the value.
|
|
4201
4002
|
/// \param __a
|
|
4202
4003
|
/// A 64-bit integer containing the value to be stored.
|
|
4203
|
-
static __inline__ void
|
|
4204
|
-
|
|
4205
|
-
{
|
|
4004
|
+
static __inline__ void
|
|
4005
|
+
__attribute__((__always_inline__, __nodebug__, __target__("sse2")))
|
|
4006
|
+
_mm_stream_si64(long long *__p, long long __a) {
|
|
4206
4007
|
__builtin_ia32_movnti64(__p, __a);
|
|
4207
4008
|
}
|
|
4208
4009
|
#endif
|
|
@@ -4221,7 +4022,7 @@ extern "C" {
|
|
|
4221
4022
|
/// \param __p
|
|
4222
4023
|
/// A pointer to the memory location used to identify the cache line to be
|
|
4223
4024
|
/// flushed.
|
|
4224
|
-
void _mm_clflush(void const *
|
|
4025
|
+
void _mm_clflush(void const *__p);
|
|
4225
4026
|
|
|
4226
4027
|
/// Forces strong memory ordering (serialization) between load
|
|
4227
4028
|
/// instructions preceding this instruction and load instructions following
|
|
@@ -4271,9 +4072,8 @@ void _mm_mfence(void);
|
|
|
4271
4072
|
/// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
|
|
4272
4073
|
/// written to the higher 64 bits of the result.
|
|
4273
4074
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
|
4274
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4275
|
-
|
|
4276
|
-
{
|
|
4075
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi16(__m128i __a,
|
|
4076
|
+
__m128i __b) {
|
|
4277
4077
|
return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
|
|
4278
4078
|
}
|
|
4279
4079
|
|
|
@@ -4299,9 +4099,8 @@ _mm_packs_epi16(__m128i __a, __m128i __b)
|
|
|
4299
4099
|
/// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
|
|
4300
4100
|
/// are written to the higher 64 bits of the result.
|
|
4301
4101
|
/// \returns A 128-bit vector of [8 x i16] containing the converted values.
|
|
4302
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4303
|
-
|
|
4304
|
-
{
|
|
4102
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packs_epi32(__m128i __a,
|
|
4103
|
+
__m128i __b) {
|
|
4305
4104
|
return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
|
|
4306
4105
|
}
|
|
4307
4106
|
|
|
@@ -4327,9 +4126,8 @@ _mm_packs_epi32(__m128i __a, __m128i __b)
|
|
|
4327
4126
|
/// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
|
|
4328
4127
|
/// written to the higher 64 bits of the result.
|
|
4329
4128
|
/// \returns A 128-bit vector of [16 x i8] containing the converted values.
|
|
4330
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4331
|
-
|
|
4332
|
-
{
|
|
4129
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_packus_epi16(__m128i __a,
|
|
4130
|
+
__m128i __b) {
|
|
4333
4131
|
return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
|
|
4334
4132
|
}
|
|
4335
4133
|
|
|
@@ -4338,26 +4136,30 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4338
4136
|
///
|
|
4339
4137
|
/// \headerfile <x86intrin.h>
|
|
4340
4138
|
///
|
|
4139
|
+
/// \code
|
|
4140
|
+
/// __m128i _mm_extract_epi16(__m128i a, const int imm);
|
|
4141
|
+
/// \endcode
|
|
4142
|
+
///
|
|
4341
4143
|
/// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
|
|
4342
4144
|
///
|
|
4343
|
-
/// \param
|
|
4145
|
+
/// \param a
|
|
4344
4146
|
/// A 128-bit integer vector.
|
|
4345
|
-
/// \param
|
|
4346
|
-
/// An immediate value. Bits [2:0] selects values from \a
|
|
4147
|
+
/// \param imm
|
|
4148
|
+
/// An immediate value. Bits [2:0] selects values from \a a to be assigned
|
|
4347
4149
|
/// to bits[15:0] of the result. \n
|
|
4348
|
-
/// 000: assign values from bits [15:0] of \a
|
|
4349
|
-
/// 001: assign values from bits [31:16] of \a
|
|
4350
|
-
/// 010: assign values from bits [47:32] of \a
|
|
4351
|
-
/// 011: assign values from bits [63:48] of \a
|
|
4352
|
-
/// 100: assign values from bits [79:64] of \a
|
|
4353
|
-
/// 101: assign values from bits [95:80] of \a
|
|
4354
|
-
/// 110: assign values from bits [111:96] of \a
|
|
4355
|
-
/// 111: assign values from bits [127:112] of \a
|
|
4150
|
+
/// 000: assign values from bits [15:0] of \a a. \n
|
|
4151
|
+
/// 001: assign values from bits [31:16] of \a a. \n
|
|
4152
|
+
/// 010: assign values from bits [47:32] of \a a. \n
|
|
4153
|
+
/// 011: assign values from bits [63:48] of \a a. \n
|
|
4154
|
+
/// 100: assign values from bits [79:64] of \a a. \n
|
|
4155
|
+
/// 101: assign values from bits [95:80] of \a a. \n
|
|
4156
|
+
/// 110: assign values from bits [111:96] of \a a. \n
|
|
4157
|
+
/// 111: assign values from bits [127:112] of \a a.
|
|
4356
4158
|
/// \returns An integer, whose lower 16 bits are selected from the 128-bit
|
|
4357
4159
|
/// integer vector parameter and the remaining bits are assigned zeros.
|
|
4358
|
-
#define _mm_extract_epi16(a, imm)
|
|
4359
|
-
(int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a),
|
|
4360
|
-
|
|
4160
|
+
#define _mm_extract_epi16(a, imm) \
|
|
4161
|
+
((int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \
|
|
4162
|
+
(int)(imm)))
|
|
4361
4163
|
|
|
4362
4164
|
/// Constructs a 128-bit integer vector by first making a copy of the
|
|
4363
4165
|
/// 128-bit integer vector parameter, and then inserting the lower 16 bits
|
|
@@ -4366,22 +4168,26 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4366
4168
|
///
|
|
4367
4169
|
/// \headerfile <x86intrin.h>
|
|
4368
4170
|
///
|
|
4171
|
+
/// \code
|
|
4172
|
+
/// __m128i _mm_insert_epi16(__m128i a, int b, const int imm);
|
|
4173
|
+
/// \endcode
|
|
4174
|
+
///
|
|
4369
4175
|
/// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
|
|
4370
4176
|
///
|
|
4371
|
-
/// \param
|
|
4177
|
+
/// \param a
|
|
4372
4178
|
/// A 128-bit integer vector of [8 x i16]. This vector is copied to the
|
|
4373
4179
|
/// result and then one of the eight elements in the result is replaced by
|
|
4374
|
-
/// the lower 16 bits of \a
|
|
4375
|
-
/// \param
|
|
4180
|
+
/// the lower 16 bits of \a b.
|
|
4181
|
+
/// \param b
|
|
4376
4182
|
/// An integer. The lower 16 bits of this parameter are written to the
|
|
4377
|
-
/// result beginning at an offset specified by \a
|
|
4378
|
-
/// \param
|
|
4183
|
+
/// result beginning at an offset specified by \a imm.
|
|
4184
|
+
/// \param imm
|
|
4379
4185
|
/// An immediate value specifying the bit offset in the result at which the
|
|
4380
|
-
/// lower 16 bits of \a
|
|
4186
|
+
/// lower 16 bits of \a b are written.
|
|
4381
4187
|
/// \returns A 128-bit integer vector containing the constructed values.
|
|
4382
|
-
#define _mm_insert_epi16(a, b, imm)
|
|
4383
|
-
(__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b),
|
|
4384
|
-
|
|
4188
|
+
#define _mm_insert_epi16(a, b, imm) \
|
|
4189
|
+
((__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \
|
|
4190
|
+
(int)(imm)))
|
|
4385
4191
|
|
|
4386
4192
|
/// Copies the values of the most significant bits from each 8-bit
|
|
4387
4193
|
/// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask
|
|
@@ -4395,9 +4201,7 @@ _mm_packus_epi16(__m128i __a, __m128i __b)
|
|
|
4395
4201
|
/// A 128-bit integer vector containing the values with bits to be extracted.
|
|
4396
4202
|
/// \returns The most significant bits from each 8-bit element in \a __a,
|
|
4397
4203
|
/// written to bits [15:0]. The other bits are assigned zeros.
|
|
4398
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
4399
|
-
_mm_movemask_epi8(__m128i __a)
|
|
4400
|
-
{
|
|
4204
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_epi8(__m128i __a) {
|
|
4401
4205
|
return __builtin_ia32_pmovmskb128((__v16qi)__a);
|
|
4402
4206
|
}
|
|
4403
4207
|
|
|
@@ -4427,10 +4231,13 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4427
4231
|
/// 00: assign values from bits [31:0] of \a a. \n
|
|
4428
4232
|
/// 01: assign values from bits [63:32] of \a a. \n
|
|
4429
4233
|
/// 10: assign values from bits [95:64] of \a a. \n
|
|
4430
|
-
/// 11: assign values from bits [127:96] of \a a.
|
|
4234
|
+
/// 11: assign values from bits [127:96] of \a a. \n
|
|
4235
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4236
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4237
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4431
4238
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4432
|
-
#define _mm_shuffle_epi32(a, imm)
|
|
4433
|
-
(__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm))
|
|
4239
|
+
#define _mm_shuffle_epi32(a, imm) \
|
|
4240
|
+
((__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm)))
|
|
4434
4241
|
|
|
4435
4242
|
/// Constructs a 128-bit integer vector by shuffling four lower 16-bit
|
|
4436
4243
|
/// elements of a 128-bit integer vector of [8 x i16], using the immediate
|
|
@@ -4458,9 +4265,12 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4458
4265
|
/// 01: assign values from bits [31:16] of \a a. \n
|
|
4459
4266
|
/// 10: assign values from bits [47:32] of \a a. \n
|
|
4460
4267
|
/// 11: assign values from bits [63:48] of \a a. \n
|
|
4268
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4269
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4270
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4461
4271
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4462
|
-
#define _mm_shufflelo_epi16(a, imm)
|
|
4463
|
-
(__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm))
|
|
4272
|
+
#define _mm_shufflelo_epi16(a, imm) \
|
|
4273
|
+
((__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm)))
|
|
4464
4274
|
|
|
4465
4275
|
/// Constructs a 128-bit integer vector by shuffling four upper 16-bit
|
|
4466
4276
|
/// elements of a 128-bit integer vector of [8 x i16], using the immediate
|
|
@@ -4488,9 +4298,12 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4488
4298
|
/// 01: assign values from bits [95:80] of \a a. \n
|
|
4489
4299
|
/// 10: assign values from bits [111:96] of \a a. \n
|
|
4490
4300
|
/// 11: assign values from bits [127:112] of \a a. \n
|
|
4301
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE macro.
|
|
4302
|
+
/// <c>_MM_SHUFFLE(b6, b4, b2, b0)</c> can create an 8-bit mask of the form
|
|
4303
|
+
/// <c>[b6, b4, b2, b0]</c>.
|
|
4491
4304
|
/// \returns A 128-bit integer vector containing the shuffled values.
|
|
4492
|
-
#define _mm_shufflehi_epi16(a, imm)
|
|
4493
|
-
(__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm))
|
|
4305
|
+
#define _mm_shufflehi_epi16(a, imm) \
|
|
4306
|
+
((__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm)))
|
|
4494
4307
|
|
|
4495
4308
|
/// Unpacks the high-order (index 8-15) values from two 128-bit vectors
|
|
4496
4309
|
/// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
|
|
@@ -4521,10 +4334,11 @@ _mm_movemask_epi8(__m128i __a)
|
|
|
4521
4334
|
/// Bits [119:112] are written to bits [111:104] of the result. \n
|
|
4522
4335
|
/// Bits [127:120] are written to bits [127:120] of the result.
|
|
4523
4336
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
|
4524
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4525
|
-
|
|
4526
|
-
|
|
4527
|
-
|
|
4337
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi8(__m128i __a,
|
|
4338
|
+
__m128i __b) {
|
|
4339
|
+
return (__m128i)__builtin_shufflevector(
|
|
4340
|
+
(__v16qi)__a, (__v16qi)__b, 8, 16 + 8, 9, 16 + 9, 10, 16 + 10, 11,
|
|
4341
|
+
16 + 11, 12, 16 + 12, 13, 16 + 13, 14, 16 + 14, 15, 16 + 15);
|
|
4528
4342
|
}
|
|
4529
4343
|
|
|
4530
4344
|
/// Unpacks the high-order (index 4-7) values from two 128-bit vectors of
|
|
@@ -4548,10 +4362,10 @@ _mm_unpackhi_epi8(__m128i __a, __m128i __b)
|
|
|
4548
4362
|
/// Bits [111:96] are written to bits [95:80] of the result. \n
|
|
4549
4363
|
/// Bits [127:112] are written to bits [127:112] of the result.
|
|
4550
4364
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
|
4551
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4552
|
-
|
|
4553
|
-
|
|
4554
|
-
|
|
4365
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi16(__m128i __a,
|
|
4366
|
+
__m128i __b) {
|
|
4367
|
+
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8 + 4, 5,
|
|
4368
|
+
8 + 5, 6, 8 + 6, 7, 8 + 7);
|
|
4555
4369
|
}
|
|
4556
4370
|
|
|
4557
4371
|
/// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
|
|
@@ -4571,10 +4385,10 @@ _mm_unpackhi_epi16(__m128i __a, __m128i __b)
|
|
|
4571
4385
|
/// Bits [95:64] are written to bits [64:32] of the destination. \n
|
|
4572
4386
|
/// Bits [127:96] are written to bits [127:96] of the destination.
|
|
4573
4387
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
|
4574
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4575
|
-
|
|
4576
|
-
|
|
4577
|
-
|
|
4388
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi32(__m128i __a,
|
|
4389
|
+
__m128i __b) {
|
|
4390
|
+
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4 + 2, 3,
|
|
4391
|
+
4 + 3);
|
|
4578
4392
|
}
|
|
4579
4393
|
|
|
4580
4394
|
/// Unpacks the high-order 64-bit elements from two 128-bit vectors of
|
|
@@ -4592,10 +4406,9 @@ _mm_unpackhi_epi32(__m128i __a, __m128i __b)
|
|
|
4592
4406
|
/// A 128-bit vector of [2 x i64]. \n
|
|
4593
4407
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
4594
4408
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
|
4595
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4596
|
-
|
|
4597
|
-
|
|
4598
|
-
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
|
|
4409
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpackhi_epi64(__m128i __a,
|
|
4410
|
+
__m128i __b) {
|
|
4411
|
+
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2 + 1);
|
|
4599
4412
|
}
|
|
4600
4413
|
|
|
4601
4414
|
/// Unpacks the low-order (index 0-7) values from two 128-bit vectors of
|
|
@@ -4627,10 +4440,11 @@ _mm_unpackhi_epi64(__m128i __a, __m128i __b)
|
|
|
4627
4440
|
/// Bits [55:48] are written to bits [111:104] of the result. \n
|
|
4628
4441
|
/// Bits [63:56] are written to bits [127:120] of the result.
|
|
4629
4442
|
/// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
|
|
4630
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4631
|
-
|
|
4632
|
-
|
|
4633
|
-
|
|
4443
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi8(__m128i __a,
|
|
4444
|
+
__m128i __b) {
|
|
4445
|
+
return (__m128i)__builtin_shufflevector(
|
|
4446
|
+
(__v16qi)__a, (__v16qi)__b, 0, 16 + 0, 1, 16 + 1, 2, 16 + 2, 3, 16 + 3, 4,
|
|
4447
|
+
16 + 4, 5, 16 + 5, 6, 16 + 6, 7, 16 + 7);
|
|
4634
4448
|
}
|
|
4635
4449
|
|
|
4636
4450
|
/// Unpacks the low-order (index 0-3) values from each of the two 128-bit
|
|
@@ -4655,10 +4469,10 @@ _mm_unpacklo_epi8(__m128i __a, __m128i __b)
|
|
|
4655
4469
|
/// Bits [47:32] are written to bits [95:80] of the result. \n
|
|
4656
4470
|
/// Bits [63:48] are written to bits [127:112] of the result.
|
|
4657
4471
|
/// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
|
|
4658
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4659
|
-
|
|
4660
|
-
|
|
4661
|
-
|
|
4472
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi16(__m128i __a,
|
|
4473
|
+
__m128i __b) {
|
|
4474
|
+
return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8 + 0, 1,
|
|
4475
|
+
8 + 1, 2, 8 + 2, 3, 8 + 3);
|
|
4662
4476
|
}
|
|
4663
4477
|
|
|
4664
4478
|
/// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
|
|
@@ -4678,10 +4492,10 @@ _mm_unpacklo_epi16(__m128i __a, __m128i __b)
|
|
|
4678
4492
|
/// Bits [31:0] are written to bits [64:32] of the destination. \n
|
|
4679
4493
|
/// Bits [63:32] are written to bits [127:96] of the destination.
|
|
4680
4494
|
/// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
|
|
4681
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4682
|
-
|
|
4683
|
-
|
|
4684
|
-
|
|
4495
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi32(__m128i __a,
|
|
4496
|
+
__m128i __b) {
|
|
4497
|
+
return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4 + 0, 1,
|
|
4498
|
+
4 + 1);
|
|
4685
4499
|
}
|
|
4686
4500
|
|
|
4687
4501
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors of
|
|
@@ -4699,10 +4513,9 @@ _mm_unpacklo_epi32(__m128i __a, __m128i __b)
|
|
|
4699
4513
|
/// A 128-bit vector of [2 x i64]. \n
|
|
4700
4514
|
/// Bits [63:0] are written to bits [127:64] of the destination. \n
|
|
4701
4515
|
/// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
|
|
4702
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4703
|
-
|
|
4704
|
-
|
|
4705
|
-
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
|
|
4516
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_unpacklo_epi64(__m128i __a,
|
|
4517
|
+
__m128i __b) {
|
|
4518
|
+
return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2 + 0);
|
|
4706
4519
|
}
|
|
4707
4520
|
|
|
4708
4521
|
/// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
|
|
@@ -4716,9 +4529,7 @@ _mm_unpacklo_epi64(__m128i __a, __m128i __b)
|
|
|
4716
4529
|
/// A 128-bit integer vector operand. The lower 64 bits are moved to the
|
|
4717
4530
|
/// destination.
|
|
4718
4531
|
/// \returns A 64-bit integer containing the lower 64 bits of the parameter.
|
|
4719
|
-
static __inline__ __m64 __DEFAULT_FN_ATTRS
|
|
4720
|
-
_mm_movepi64_pi64(__m128i __a)
|
|
4721
|
-
{
|
|
4532
|
+
static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_movepi64_pi64(__m128i __a) {
|
|
4722
4533
|
return (__m64)__a[0];
|
|
4723
4534
|
}
|
|
4724
4535
|
|
|
@@ -4733,10 +4544,8 @@ _mm_movepi64_pi64(__m128i __a)
|
|
|
4733
4544
|
/// A 64-bit value.
|
|
4734
4545
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
4735
4546
|
/// the operand. The upper 64 bits are assigned zeros.
|
|
4736
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4737
|
-
|
|
4738
|
-
{
|
|
4739
|
-
return __extension__ (__m128i)(__v2di){ (long long)__a, 0 };
|
|
4547
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_movpi64_epi64(__m64 __a) {
|
|
4548
|
+
return __extension__(__m128i)(__v2di){(long long)__a, 0};
|
|
4740
4549
|
}
|
|
4741
4550
|
|
|
4742
4551
|
/// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
|
|
@@ -4751,9 +4560,7 @@ _mm_movpi64_epi64(__m64 __a)
|
|
|
4751
4560
|
/// destination.
|
|
4752
4561
|
/// \returns A 128-bit integer vector. The lower 64 bits contain the value from
|
|
4753
4562
|
/// the operand. The upper 64 bits are assigned zeros.
|
|
4754
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4755
|
-
_mm_move_epi64(__m128i __a)
|
|
4756
|
-
{
|
|
4563
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_move_epi64(__m128i __a) {
|
|
4757
4564
|
return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);
|
|
4758
4565
|
}
|
|
4759
4566
|
|
|
@@ -4772,10 +4579,9 @@ _mm_move_epi64(__m128i __a)
|
|
|
4772
4579
|
/// A 128-bit vector of [2 x double]. \n
|
|
4773
4580
|
/// Bits [127:64] are written to bits [127:64] of the destination.
|
|
4774
4581
|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
|
4775
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4776
|
-
|
|
4777
|
-
|
|
4778
|
-
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
|
|
4582
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpackhi_pd(__m128d __a,
|
|
4583
|
+
__m128d __b) {
|
|
4584
|
+
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2 + 1);
|
|
4779
4585
|
}
|
|
4780
4586
|
|
|
4781
4587
|
/// Unpacks the low-order 64-bit elements from two 128-bit vectors
|
|
@@ -4793,10 +4599,9 @@ _mm_unpackhi_pd(__m128d __a, __m128d __b)
|
|
|
4793
4599
|
/// A 128-bit vector of [2 x double]. \n
|
|
4794
4600
|
/// Bits [63:0] are written to bits [127:64] of the destination.
|
|
4795
4601
|
/// \returns A 128-bit vector of [2 x double] containing the interleaved values.
|
|
4796
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4797
|
-
|
|
4798
|
-
|
|
4799
|
-
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
|
|
4602
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_unpacklo_pd(__m128d __a,
|
|
4603
|
+
__m128d __b) {
|
|
4604
|
+
return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2 + 0);
|
|
4800
4605
|
}
|
|
4801
4606
|
|
|
4802
4607
|
/// Extracts the sign bits of the double-precision values in the 128-bit
|
|
@@ -4812,13 +4617,10 @@ _mm_unpacklo_pd(__m128d __a, __m128d __b)
|
|
|
4812
4617
|
/// be extracted.
|
|
4813
4618
|
/// \returns The sign bits from each of the double-precision elements in \a __a,
|
|
4814
4619
|
/// written to bits [1:0]. The remaining bits are assigned values of zero.
|
|
4815
|
-
static __inline__ int __DEFAULT_FN_ATTRS
|
|
4816
|
-
_mm_movemask_pd(__m128d __a)
|
|
4817
|
-
{
|
|
4620
|
+
static __inline__ int __DEFAULT_FN_ATTRS _mm_movemask_pd(__m128d __a) {
|
|
4818
4621
|
return __builtin_ia32_movmskpd((__v2df)__a);
|
|
4819
4622
|
}
|
|
4820
4623
|
|
|
4821
|
-
|
|
4822
4624
|
/// Constructs a 128-bit floating-point vector of [2 x double] from two
|
|
4823
4625
|
/// 128-bit vector parameters of [2 x double], using the immediate-value
|
|
4824
4626
|
/// parameter as a specifier.
|
|
@@ -4842,10 +4644,13 @@ _mm_movemask_pd(__m128d __a)
|
|
|
4842
4644
|
/// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
|
|
4843
4645
|
/// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
|
|
4844
4646
|
/// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
|
|
4647
|
+
/// Note: To generate a mask, you can use the \c _MM_SHUFFLE2 macro.
|
|
4648
|
+
/// <c>_MM_SHUFFLE2(b1, b0)</c> can create a 2-bit mask of the form
|
|
4649
|
+
/// <c>[b1, b0]</c>.
|
|
4845
4650
|
/// \returns A 128-bit vector of [2 x double] containing the shuffled values.
|
|
4846
|
-
#define _mm_shuffle_pd(a, b, i)
|
|
4847
|
-
(__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b),
|
|
4848
|
-
|
|
4651
|
+
#define _mm_shuffle_pd(a, b, i) \
|
|
4652
|
+
((__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
|
|
4653
|
+
(int)(i)))
|
|
4849
4654
|
|
|
4850
4655
|
/// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
|
|
4851
4656
|
/// floating-point vector of [4 x float].
|
|
@@ -4858,9 +4663,7 @@ _mm_movemask_pd(__m128d __a)
|
|
|
4858
4663
|
/// A 128-bit floating-point vector of [2 x double].
|
|
4859
4664
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
4860
4665
|
/// bitwise pattern as the parameter.
|
|
4861
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
4862
|
-
_mm_castpd_ps(__m128d __a)
|
|
4863
|
-
{
|
|
4666
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castpd_ps(__m128d __a) {
|
|
4864
4667
|
return (__m128)__a;
|
|
4865
4668
|
}
|
|
4866
4669
|
|
|
@@ -4875,9 +4678,7 @@ _mm_castpd_ps(__m128d __a)
|
|
|
4875
4678
|
/// A 128-bit floating-point vector of [2 x double].
|
|
4876
4679
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
4877
4680
|
/// parameter.
|
|
4878
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4879
|
-
_mm_castpd_si128(__m128d __a)
|
|
4880
|
-
{
|
|
4681
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castpd_si128(__m128d __a) {
|
|
4881
4682
|
return (__m128i)__a;
|
|
4882
4683
|
}
|
|
4883
4684
|
|
|
@@ -4892,9 +4693,7 @@ _mm_castpd_si128(__m128d __a)
|
|
|
4892
4693
|
/// A 128-bit floating-point vector of [4 x float].
|
|
4893
4694
|
/// \returns A 128-bit floating-point vector of [2 x double] containing the same
|
|
4894
4695
|
/// bitwise pattern as the parameter.
|
|
4895
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4896
|
-
_mm_castps_pd(__m128 __a)
|
|
4897
|
-
{
|
|
4696
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castps_pd(__m128 __a) {
|
|
4898
4697
|
return (__m128d)__a;
|
|
4899
4698
|
}
|
|
4900
4699
|
|
|
@@ -4909,9 +4708,7 @@ _mm_castps_pd(__m128 __a)
|
|
|
4909
4708
|
/// A 128-bit floating-point vector of [4 x float].
|
|
4910
4709
|
/// \returns A 128-bit integer vector containing the same bitwise pattern as the
|
|
4911
4710
|
/// parameter.
|
|
4912
|
-
static __inline__ __m128i __DEFAULT_FN_ATTRS
|
|
4913
|
-
_mm_castps_si128(__m128 __a)
|
|
4914
|
-
{
|
|
4711
|
+
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_castps_si128(__m128 __a) {
|
|
4915
4712
|
return (__m128i)__a;
|
|
4916
4713
|
}
|
|
4917
4714
|
|
|
@@ -4926,9 +4723,7 @@ _mm_castps_si128(__m128 __a)
|
|
|
4926
4723
|
/// A 128-bit integer vector.
|
|
4927
4724
|
/// \returns A 128-bit floating-point vector of [4 x float] containing the same
|
|
4928
4725
|
/// bitwise pattern as the parameter.
|
|
4929
|
-
static __inline__ __m128 __DEFAULT_FN_ATTRS
|
|
4930
|
-
_mm_castsi128_ps(__m128i __a)
|
|
4931
|
-
{
|
|
4726
|
+
static __inline__ __m128 __DEFAULT_FN_ATTRS _mm_castsi128_ps(__m128i __a) {
|
|
4932
4727
|
return (__m128)__a;
|
|
4933
4728
|
}
|
|
4934
4729
|
|
|
@@ -4943,9 +4738,7 @@ _mm_castsi128_ps(__m128i __a)
|
|
|
4943
4738
|
/// A 128-bit integer vector.
|
|
4944
4739
|
/// \returns A 128-bit floating-point vector of [2 x double] containing the same
|
|
4945
4740
|
/// bitwise pattern as the parameter.
|
|
4946
|
-
static __inline__ __m128d __DEFAULT_FN_ATTRS
|
|
4947
|
-
_mm_castsi128_pd(__m128i __a)
|
|
4948
|
-
{
|
|
4741
|
+
static __inline__ __m128d __DEFAULT_FN_ATTRS _mm_castsi128_pd(__m128i __a) {
|
|
4949
4742
|
return (__m128d)__a;
|
|
4950
4743
|
}
|
|
4951
4744
|
|
|
@@ -4970,12 +4763,13 @@ void _mm_pause(void);
|
|
|
4970
4763
|
|
|
4971
4764
|
#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
|
|
4972
4765
|
|
|
4973
|
-
#define _MM_DENORMALS_ZERO_ON
|
|
4974
|
-
#define _MM_DENORMALS_ZERO_OFF
|
|
4766
|
+
#define _MM_DENORMALS_ZERO_ON (0x0040U)
|
|
4767
|
+
#define _MM_DENORMALS_ZERO_OFF (0x0000U)
|
|
4975
4768
|
|
|
4976
4769
|
#define _MM_DENORMALS_ZERO_MASK (0x0040U)
|
|
4977
4770
|
|
|
4978
4771
|
#define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
|
|
4979
|
-
#define _MM_SET_DENORMALS_ZERO_MODE(x)
|
|
4772
|
+
#define _MM_SET_DENORMALS_ZERO_MODE(x) \
|
|
4773
|
+
(_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
|
|
4980
4774
|
|
|
4981
4775
|
#endif /* __EMMINTRIN_H */
|