@codingame/monaco-editor-wrapper 1.7.0 → 1.8.0

package/dist/verilog-systemverilog.js

@@ -1,395 +1,208 @@
-var assign = {
-	prefix: "assign",
-	body: [
-		"assign ${1:var} = ${2:value};$0"
-	],
-	description: "Snippet for an assignment"
+var bit = {
+	prefix: "bit",
+	body: "bit ${1:bit_name} = ${2:value};"
 };
-var force = {
-	prefix: "force",
-	body: [
-		"force ${1:var} = ${2:value};$0"
-	],
-	description: "Snippet for a force assignment"
+var int = {
+	prefix: "int",
+	body: "int ${1:int_name} = ${2:value};"
 };
-var always = {
-	prefix: "always",
-	body: [
-		"always @(${1:sensitivity_list})",
-		"begin",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for an always block"
+var shortint = {
+	prefix: "shortint",
+	body: "shortint ${1:name} = ${2:value};"
 };
-var always_ff = {
-	prefix: "always_ff",
-	body: [
-		"always_ff @(posedge ${1:clk} or negedge ${2:rst_n})",
-		"begin",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for an always_ff block"
+var longint = {
+	prefix: "longint",
+	body: "longint ${1:name} = ${2:value};"
 };
-var always_latch = {
-	prefix: "always_latch",
-	body: [
-		"always_latch",
-		"begin",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for an always_latch block"
-};
-var always_comb = {
-	prefix: "always_comb",
-	body: [
-		"always_comb",
-		"begin",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for an always_comb block"
+var byte = {
+	prefix: "byte",
+	body: "byte ${1:byte:_name} = ${2:value};"
 };
-var elseif = {
-	prefix: "else if",
-	body: [
-		"else if (${1:condition})",
-		"begin${2:: block_name}",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for an else if"
+var logic = {
+	prefix: "logic",
+	body: "logic ${1:logic_name} = ${2:value};"
 };
-var foreach = {
-	prefix: "foreach",
-	body: [
-		"foreach (${1:arr}[${2:i}])",
-		"begin",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for a foreach loop"
+var packed = {
+	prefix: "packed",
+	body: "packed"
 };
 var task = {
 	prefix: "task",
 	body: [
-		"task ${1:name}(${2:port_list});",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endtask"
-	],
-	description: "Snippet for a task definition"
-};
-var program = {
-	prefix: "program",
-	body: [
-		"program ${1:name}(${2:port_list});",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endprogram"
-	],
-	description: "Snippet for a program definition"
-};
-var module = {
-	prefix: "module",
-	body: [
-		"module ${1:name} (",
-		"\t${2:port_list}",
-		");",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endmodule"
-	],
-	description: "Snippet for a module definition"
-};
-var assert = {
-	prefix: "assert",
-	body: [
-		"${1:label}: assert (${2:test})",
-		"\telse \\$error(\"${0:Assertion ${1:label} failed!}\");"
-	],
-	description: "Snippet for an immediate assertion"
-};
-var property = {
-	prefix: "property",
-	body: [
-		"property ${1:name};",
-		"\t@(posedge ${2:clk}) ${0:test}",
-		"endproperty"
-	],
-	description: "Snippet for a property"
-};
-var generate = {
-	prefix: "generate",
-	body: [
-		"generate",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endgenerate"
-	],
-	description: "Snippet for a generate block"
-};
-var ternary = {
-	prefix: "ter",
-	body: [
-		"$1 ? $2 : $3"
-	],
-	description: "Snippet for a ternary operator expression"
-};
-var reg = {
-	prefix: "reg",
-	body: [
-		"reg $1;$0"
+		"task ${1:automatic} ${2:taskName}(${3:arguments});",
+		"\t$0",
+		"endtask //$1"
 	],
-	description: "Snippet for a register declaration"
+	description: "task name; ... endtask"
 };
-var regarray = {
-	prefix: "rega",
+var modport = {
+	prefix: "modport",
 	body: [
-		"reg [$1:$2] $3;$0"
+		"modport ${1:identifier} (",
+		"input ${2:input_ports},",
+		"output ${3:output_ports}",
+		");"
 	],
-	description: "Snippet for a multi-bit register declaration"
+	description: "modport name (input ports_in, output ports_out); "
 };
-var regmemory = {
-	prefix: "regm",
+var display = {
+	prefix: "display",
 	body: [
-		"reg [$1:$2] $3 [$4:$5];$0"
+		"\\$display(\"$1\"$2);$0"
 	],
-	description: "Snippet for a memory register declaration"
+	description: "$display(\"...\", params...)"
 };
-var wire = {
-	prefix: "wire",
-	body: [
-		"wire $1;$0"
-	],
-	description: "Snippet for a wire declaration"
+var queue = {
+	prefix: "queue",
+	body: "${1:data_type} ${2:queue_name}[\\$];",
+	description: "insert queue."
 };
-var wirearray = {
-	prefix: "wirea",
+var mailbox = {
+	prefix: "mailbox",
 	body: [
-		"wire [$1:$2] $3;$0"
+		"mailbox mbx",
+		"${1:mbx = new();}"
 	],
-	description: "Snippet for a multi-bit wire declaration"
-};
-var logic = {
-	prefix: "logic",
-	body: [
-		"logic $1;$0"
-	],
-	description: "Snippet for a logic signal declaration"
-};
-var logicarray = {
-	prefix: "logica",
-	body: [
-		"logic [$1:$2] $3;$0"
-	],
-	description: "Snippet for a multi-bit logic signal declaration"
-};
-var array = {
-	prefix: "array",
-	body: "[${1:8}:${2:0}]$0",
-	description: "Snippet for a multi-bit register declaration"
-};
-var associative_array = {
-	prefix: "assoc",
-	body: "${1:type} ${2:name}[${3:index_type}];$0",
-	description: "Snippet for a associative array declaration"
+	description: "insert mailbox instance"
 };
-var separator = {
-	prefix: "separator",
-	body: [
-		"// -------------------------------------------------------\n$0"
-	],
-	description: "Snippet for a separator"
-};
-var heading = {
-	prefix: "heading",
+var assert = {
+	prefix: "assert",
 	body: [
-		"// -------------------------------------------------------",
-		"// -- ${1:heading}",
-		"// -------------------------------------------------------\n$0"
+		"assert (${1:condition}) $2",
+		"else   ${3:error_process}"
 	],
-	description: "Snippet for a heading"
+	description: "insert assert() ... else ..."
 };
 var verilogSystemverilog = {
-	assign: assign,
-	force: force,
-	always: always,
-	always_ff: always_ff,
-	always_latch: always_latch,
-	always_comb: always_comb,
-	"if": {
-	prefix: "if",
-	body: [
-		"if (${1:condition})",
-		"begin${2:: block_name}",
-		"\t${3:pass}",
-		"end"
-	],
-	description: "Snippet for an if statement"
-},
-	"if/else": {
-	prefix: "if/else",
+	"always_ff block": {
+	prefix: "always_ff",
 	body: [
-		"if (${1:condition})",
-		"begin${2:: block_name}",
-		"\t${3:pass}",
-		"end",
-		"else",
-		"begin${4:: block_name}",
-		"\t${5:pass}",
+		"always_ff @( ${1:clock} ) begin : ${2:blockName}",
+		"\t$0",
 		"end"
 	],
-	description: "Snippet for an if statement with else"
+	description: "Insert an always_ff block"
 },
-	elseif: elseif,
-	"else": {
-	prefix: "else",
+	"always_comb block": {
+	prefix: "always_comb",
 	body: [
-		"else",
-		"begin${1:: block_name}",
-		"\t${0:${TM_SELECTED_TEXT}}",
+		"always_comb begin : ${1:blockName}",
+		"\t$0",
 		"end"
 	],
-	description: "Snippet for an else"
-},
-	"case": {
-	prefix: "case",
-	body: [
-		"case (${1:variable})",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endcase"
-	],
-	description: "Snippet for a case statement"
+	description: "Insert an always_comb block"
 },
-	"case/default": {
-	prefix: "case/default",
-	body: [
-		"case (${1:variable})",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"\tdefault:",
-		"\tbegin${2:: block_name}",
-		"\t\t${3:default_case}",
-		"\tend",
-		"endcase"
-	],
-	description: "Snippet for a case statement with default"
-},
-	"while": {
-	prefix: "while",
+	"always_latch block": {
+	prefix: "always_latch",
 	body: [
-		"while (${1:expression})",
-		"begin",
-		"\t${0:${TM_SELECTED_TEXT}}",
+		"always_latch begin : ${1:blockName}",
+		"\t$0",
 		"end"
 	],
-	description: "Snippet for a while loop"
+	description: "Insert an always_latch block"
 },
-	"for": {
-	prefix: "for",
-	body: [
-		"for (int ${1:i}=0; ${1:i}<${2:MAX}; ++${1:i})",
-		"begin${3:: block_name}",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"end"
-	],
-	description: "Snippet for a for loop"
+	bit: bit,
+	int: int,
+	shortint: shortint,
+	longint: longint,
+	byte: byte,
+	logic: logic,
+	packed: packed,
+	"this": {
+	prefix: "this",
+	body: "this"
 },
-	foreach: foreach,
-	"function": {
-	prefix: "function",
+	"typedef struct packed": {
+	prefix: "typedef struct packed",
 	body: [
-		"function ${1:return_value} ${2:name}(${3:port_list});",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endfunction"
+		"typedef struct packed {",
+		"\t$0",
+		"} ${1:struct_name};"
 	],
-	description: "Snippet for a function definition"
+	description: "typedef struct packed { ... } name"
 },
-	task: task,
 	"class": {
 	prefix: "class",
 	body: [
-		"class ${1:name};",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endclass"
+		"class ${1:className};",
+		"\tfunction new();",
+		"\t\t$0",
+		"\tendfunction //new()",
+		"endclass //$1"
 	],
-	description: "Snippet for a class definition"
+	description: "class name; ... endclass"
 },
-	"class/extends": {
-	prefix: "class/extends",
+	"class extends": {
+	prefix: "class extends",
 	body: [
-		"class ${1:name} extends ${2:super};",
+		"class ${1:className} extends ${2:superClass};",
 		"\tfunction new();",
-		"\t\t${0:${TM_SELECTED_TEXT}}",
-		"\tendfunction",
-		"endclass"
+		"\t\t$0",
+		"\tendfunction //new()",
+		"endclass //$1 extends $2"
 	],
-	description: "Snippet for a class definition with extends"
+	description: "class name extends super; ... endclass"
 },
-	program: program,
-	module: module,
-	"module#(param)": {
-	prefix: "module #(",
+	task: task,
+	"package": {
+	prefix: "package",
 	body: [
-		"module ${1:name} #(",
-		"\t${2:parameters}",
-		") (",
-		"\t${3:port_list}",
-		");",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endmodule"
+		"package ${1:package_name}",
+		"\t$2",
+		"endpackage"
 	],
-	description: "Snippet for a parameterized module definition"
+	description: "package name; ... endpackage"
 },
-	assert: assert,
-	property: property,
-	generate: generate,
-	"typedef/struct": {
-	prefix: "typedef/struct",
+	"import": {
+	prefix: "import",
+	body: "import ${1:name}::${2:scope};",
+	description: "import name::scope"
+},
+	"interface": {
+	prefix: "interface",
 	body: [
-		"typedef struct packed {",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"} ${1:name};"
+		"interface ${1:interfacename};",
+		"\t$0",
+		"endinterface //$1"
 	],
-	description: "Snippet for a structure type definition"
+	description: "interface name; ... endinterface"
 },
-	"typedef/enum": {
-	prefix: "typedef/enum",
+	modport: modport,
+	display: display,
+	"typedef enum": {
+	prefix: "typedef enum",
 	body: [
-		"typedef enum ${1:type} { ${0:${TM_SELECTED_TEXT}} } ${2:name};"
+		"typedef enum ${1:data_type} { $0 } ${2:name};"
 	],
-	description: "Snippet for a enumeration type definition"
+	description: "typedef enum (data_type) { ... } name"
 },
-	"interface": {
-	prefix: "interface",
+	"enum": {
+	prefix: [
+		"en",
+		"enum"
+	],
 	body: [
-		"interface ${1:name};",
-		"\t${0:${TM_SELECTED_TEXT}}",
-		"endinterface"
+		"enum ${1:data_type} { $0 } ${2:name}"
 	],
-	description: "Snippet for an interface definition"
+	description: "enum (data_type) { ... } name"
 },
-	ternary: ternary,
-	reg: reg,
-	regarray: regarray,
-	regmemory: regmemory,
-	wire: wire,
-	wirearray: wirearray,
-	logic: logic,
-	logicarray: logicarray,
-	array: array,
-	associative_array: associative_array,
-	separator: separator,
-	heading: heading,
-	"heading+description": {
-	prefix: "heading+description",
+	queue: queue,
+	mailbox: mailbox,
+	"associative array": {
+	prefix: "AA",
+	body: "${1:data_type} ${2:name}[${3:index_type}];$0",
+	description: "insert Associative array(AA)."
+},
+	assert: assert,
+	"fork-join": {
+	prefix: "fork join",
 	body: [
-		"// -------------------------------------------------------",
-		"// -- ${1:heading}",
-		"// -------------------------------------------------------",
-		"// ${2:description}",
-		"// -------------------------------------------------------\n$0"
+		"fork",
+		"\t$0",
+		"join"
 	],
-	description: "Snippet for a heading with a block for description"
+	description: "fork ... join"
 }
 };
 
-export { always, always_comb, always_ff, always_latch, array, assert, assign, associative_array, verilogSystemverilog as default, elseif, force, foreach, generate, heading, logic, logicarray, module, program, property, reg, regarray, regmemory, separator, task, ternary, wire, wirearray };
+export { assert, bit, byte, verilogSystemverilog as default, display, int, logic, longint, mailbox, modport, packed, queue, shortint, task };