@brightchain/brightchain-lib 0.1.0

package/src/lib/cpus/instructionTables.js

@@ -0,0 +1,150 @@
+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+exports.buildInstructionMapForCpu = buildInstructionMapForCpu;
+exports.buildInstructionArray = buildInstructionArray;
+exports.X83Instructions = X83Instructions;
+exports.fn0x81Instructions = fn0x81Instructions;
+exports.syscallInstructions = syscallInstructions;
+exports.fn0x0fInstructions = fn0x0fInstructions;
+exports.getSysCallInstruction = getSysCallInstruction;
+exports.getInterruptInstruction = getInterruptInstruction;
+exports.getFn0x0fInstruction = getFn0x0fInstruction;
+exports.getFn0x81Instruction = getFn0x81Instruction;
+exports.getX83Instruction = getX83Instruction;
+const cpuInstructions_1 = require("../enumerations/cpuInstructions");
+const cpuRegisters_1 = require("../enumerations/cpuRegisters");
+const instructions = require("./instructions");
+function buildInstructionMapForCpu(cpu) {
+    return new Map([
+        [cpuInstructions_1.CpuInstructions.fn0x0f, instructions.invokeFn0x0f(cpu)],
+        [cpuInstructions_1.CpuInstructions.movImm8RegEAX, instructions.mov(cpu, cpuRegisters_1.CpuRegisters.EAX)],
+        [cpuInstructions_1.CpuInstructions.movImm8RegECX, instructions.mov(cpu, cpuRegisters_1.CpuRegisters.ECX)],
+        [cpuInstructions_1.CpuInstructions.movImm8RegEDX, instructions.mov(cpu, cpuRegisters_1.CpuRegisters.EDX)],
+        [cpuInstructions_1.CpuInstructions.movImm8RegEBX, instructions.mov(cpu, cpuRegisters_1.CpuRegisters.EBX)],
+        [cpuInstructions_1.CpuInstructions.movImm8RegESP, instructions.mov(cpu, cpuRegisters_1.CpuRegisters.ESP)],
+        [cpuInstructions_1.CpuInstructions.decEAX, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.EAX)],
+        [cpuInstructions_1.CpuInstructions.decECX, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.ECX)],
+        [cpuInstructions_1.CpuInstructions.decEDX, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.EDX)],
+        [cpuInstructions_1.CpuInstructions.decEBX, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.EBX)],
+        [cpuInstructions_1.CpuInstructions.decESP, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.ESP)],
+        [cpuInstructions_1.CpuInstructions.decEBP, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.EBP)],
+        [cpuInstructions_1.CpuInstructions.decESI, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.ESI)],
+        [cpuInstructions_1.CpuInstructions.decEDI, instructions.dec(cpu, cpuRegisters_1.CpuRegisters.EDI)],
+        [cpuInstructions_1.CpuInstructions.pushEAX, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.EAX)],
+        [cpuInstructions_1.CpuInstructions.pushECX, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.ECX)],
+        [cpuInstructions_1.CpuInstructions.pushEDX, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.EDX)],
+        [cpuInstructions_1.CpuInstructions.pushEBX, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.EBX)],
+        [cpuInstructions_1.CpuInstructions.pushESP, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.ESP)],
+        [cpuInstructions_1.CpuInstructions.pushEBP, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.EBP)],
+        [cpuInstructions_1.CpuInstructions.pushESI, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.ESI)],
+        [cpuInstructions_1.CpuInstructions.pushEDI, instructions.pushr(cpu, cpuRegisters_1.CpuRegisters.EDI)],
+        [cpuInstructions_1.CpuInstructions.popEAX, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.EAX)],
+        [cpuInstructions_1.CpuInstructions.popECX, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.ECX)],
+        [cpuInstructions_1.CpuInstructions.popEDX, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.EDX)],
+        [cpuInstructions_1.CpuInstructions.popEBX, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.EBX)],
+        [cpuInstructions_1.CpuInstructions.popESP, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.ESP)],
+        [cpuInstructions_1.CpuInstructions.popEBP, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.EBP)],
+        [cpuInstructions_1.CpuInstructions.popESI, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.ESI)],
+        [cpuInstructions_1.CpuInstructions.popEDI, instructions.popr(cpu, cpuRegisters_1.CpuRegisters.EDI)],
+        [cpuInstructions_1.CpuInstructions.pushImm8, instructions.pushi(cpu)],
+        [cpuInstructions_1.CpuInstructions.movRegReg, instructions.movRegReg(cpu)],
+        [cpuInstructions_1.CpuInstructions.yam, instructions.yam(cpu)],
+        [cpuInstructions_1.CpuInstructions.ret, instructions.ret(cpu)],
+        [cpuInstructions_1.CpuInstructions.movl, instructions.movl(cpu)],
+        [cpuInstructions_1.CpuInstructions.lea, instructions.lea(cpu)],
+        [cpuInstructions_1.CpuInstructions.addReg, instructions.addReg(cpu)],
+        [cpuInstructions_1.CpuInstructions.addRegPad, instructions.addRegPad(cpu)],
+        [cpuInstructions_1.CpuInstructions.addEAX, instructions.addEAX(cpu)],
+        [cpuInstructions_1.CpuInstructions.subRAX, instructions.subRAX(cpu)],
+        [cpuInstructions_1.CpuInstructions.jge, instructions.jge(cpu)],
+        [cpuInstructions_1.CpuInstructions.x81, instructions.invokeX81(cpu)],
+        [cpuInstructions_1.CpuInstructions.x83, instructions.invokeX83(cpu)],
+        [cpuInstructions_1.CpuInstructions.int, instructions.int(cpu)],
+        [cpuInstructions_1.CpuInstructions.call, instructions.call(cpu)],
+        [cpuInstructions_1.CpuInstructions.jmpImm8, instructions.jmpImm8(cpu)],
+    ]);
+}
+function buildInstructionArray(cpu) {
+    const instructionList = buildInstructionMapForCpu(cpu);
+    const instructionArray = new Array(0xff);
+    for (let i = 0; i < instructionArray.length; i++) {
+        instructionArray[i] = instructions.noOp();
+    }
+    instructionList.forEach((value, key) => {
+        instructionArray[key] = value;
+    });
+    return instructionArray;
+}
+function X83Instructions(cpu) {
+    return new Map([
+        // add
+        [0x00, instructions.x83Add(cpu)],
+        // sub
+        [0x05, instructions.x83Sub(cpu)],
+        // cmp
+        [0x07, instructions.x83Cmp(cpu)],
+    ]);
+}
+function fn0x81Instructions(cpu) {
+    return new Map([
+        // sub
+        [0x05, instructions.invokeX81_05Sub(cpu)],
+        // cmpl
+        [0x07, instructions.invokeX81_07Cmp(cpu)],
+    ]);
+}
+function syscallInstructions(cpu) {
+    return new Map([
+        [0x1, instructions.sysCallExit(cpu)],
+        [0x80, instructions.sysCallInterrupt(cpu)],
+    ]);
+}
+// Prefix 0x0F
+function fn0x0fInstructions(cpu) {
+    return new Map([
+        // jge
+        [0x8d, instructions.fn0x0f8dJge(cpu)],
+        // jle short jump
+        [0x8e, instructions.fn0x0f8eJle(cpu)],
+        // imul
+        [0xaf, instructions.fn0x0fAfImul(cpu)],
+        // noop
+        [0x1f, instructions.noOp()],
+    ]);
+}
+function getSysCallInstruction(cpu, opcode) {
+    const instruction = cpu.Syscalls.get(opcode);
+    if (instruction === undefined) {
+        throw new Error('Invalid opcode');
+    }
+    return instruction;
+}
+function getInterruptInstruction(cpu, opcode) {
+    const instruction = cpu.Interrupts.get(opcode);
+    if (instruction === undefined) {
+        throw new Error('Invalid opcode');
+    }
+    return instruction;
+}
+function getFn0x0fInstruction(cpu, opcode) {
+    const instruction = fn0x0fInstructions(cpu).get(opcode);
+    if (instruction === undefined) {
+        throw new Error('Invalid opcode');
+    }
+    return instruction;
+}
+function getFn0x81Instruction(cpu, opcode) {
+    const instruction = fn0x81Instructions(cpu).get(opcode);
+    if (instruction === undefined) {
+        throw new Error('Invalid opcode');
+    }
+    return instruction;
+}
+function getX83Instruction(cpu, opcode) {
+    const instruction = X83Instructions(cpu).get(opcode);
+    if (instruction === undefined) {
+        throw new Error('Invalid opcode');
+    }
+    return instruction;
+}
+//# sourceMappingURL=instructionTables.js.map

package/src/lib/cpus/instructionTables.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"instructionTables.js","sourceRoot":"","sources":["../../../../../brightchain-lib/src/lib/cpus/instructionTables.ts"],"names":[],"mappings":";;AAKA,8DAmDC;AAED,sDAUC;AAED,0CAaC;AAED,gDAUC;AAED,kDAKC;AAGD,gDAcC;AAED,sDAMC;AAED,0DASC;AAED,oDAMC;AAED,oDASC;AAED,8CASC;AAxKD,qEAAkE;AAClE,+DAA4D;AAC5D,+CAA+C;AAG/C,SAAgB,yBAAyB,CACvC,GAAW;IAEX,OAAO,IAAI,GAAG,CAAqB;QACjC,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,YAAY,CAAC,GAAG,CAAC,CAAC;QACxD,CAAC,iCAAe,CAAC,aAAa,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACxE,CAAC,iCAAe,CAAC,aAAa,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACxE,CAAC,iCAAe,CAAC,aAAa,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACxE,CAAC,iCAAe,CAAC,aAAa,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACxE,CAAC,iCAAe,CAAC,aAAa,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACxE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACjE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QACpE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,EAAE,2BAAY,CAAC,GAAG,CAAC,CAAC;QAClE,CAAC,iCAAe,CAAC,QAAQ,EAAE,YAAY,CAAC,KAAK,CAAC,GAAG,CAAC,CAAC;QACnD,CAAC,iCAAe,CAAC,SAAS,EAAE,YAAY,CAAC,SAAS,CAAC,GAAG,CAAC,CAAC;QACxD,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,CAAC,CAAC;QAC5C,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,CAAC,CAAC;QAC5C,CAAC,iCAAe,CAAC,IAAI,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,CAAC,CAAC;QAC9C,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,CAAC,CAAC;QAC5C,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,MAAM,CAAC,GAAG,CAAC,CAAC;QAClD,CAAC,iCAAe,CAAC,SAAS,EAAE,YAAY,CAAC,SAAS,CAAC,GAAG,CAAC,CAAC;QACxD,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,MAAM,CAAC,GAAG,CAAC,CAAC;QAClD,CAAC,iCAAe,CAAC,MAAM,EAAE,YAAY,CAAC,MAAM,CAAC,GAAG,CAAC,CAAC;QAClD,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,CAAC,CAAC;QAC5C,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,SAAS,CAAC,GAAG,CAAC,CAAC;QAClD,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,SAAS,CAAC,GAAG,CAAC,CAAC;QAClD,CAAC,iCAAe,CAAC,GAAG,EAAE,YAAY,CAAC,GAAG,CAAC,GAAG,CAAC,CAAC;QAC5C,CAAC,iCAAe,CAAC,IAAI,EAAE,YAAY,CAAC,IAAI,CAAC,GAAG,CAAC,CAAC;QAC9C,CAAC,iCAAe,CAAC,OAAO,EAAE,YAAY,CAAC,OAAO,CAAC,GAAG,CAAC,CAAC;KACrD,CAAC,CAAC;AACL,CAAC;AAED,SAAgB,qBAAqB,CAAC,GAAW;IAC/C,MAAM,eAAe,GAAG,yBAAyB,CAAC,GAAG,CAAC,CAAC;IACvD,MAAM,gBAAgB,GAAG,IAAI,KAAK,CAAa,IAAI,CAAC,CAAC;IACrD,KAAK,IAAI,CAAC,GAAG,CAAC,EAAE,CAAC,GAAG,gBAAgB,CAAC,MAAM,EAAE,CAAC,EAAE,EAAE,CAAC;QACjD,gBAAgB,CAAC,CAAC,CAAC,GAAG,YAAY,CAAC,IAAI,EAAE,CAAC;IAC5C,CAAC;IACD,eAAe,CAAC,OAAO,CAAC,CAAC,KAAK,EAAE,GAAG,EAAE,EAAE;QACrC,gBAAgB,CAAC,GAAG,CAAC,GAAG,KAAK,CAAC;IAChC,CAAC,CAAC,CAAC;IACH,OAAO,gBAAgB,CAAC;AAC1B,CAAC;AAED,SAAgB,eAAe,CAC7B,GAAW;IAEX,OAAO,IAAI,GAAG,CAA6C;QACzD,MAAM;QACN,CAAC,IAAI,EAAE,YAAY,CAAC,MAAM,CAAC,GAAG,CAAC,CAAC;QAEhC,MAAM;QACN,CAAC,IAAI,EAAE,YAAY,CAAC,MAAM,CAAC,GAAG,CAAC,CAAC;QAEhC,MAAM;QACN,CAAC,IAAI,EAAE,YAAY,CAAC,MAAM,CAAC,GAAG,CAAC,CAAC;KACjC,CAAC,CAAC;AACL,CAAC;AAED,SAAgB,kBAAkB,CAChC,GAAW;IAEX,OAAO,IAAI,GAAG,CAAgD;QAC5D,MAAM;QACN,CAAC,IAAI,EAAE,YAAY,CAAC,eAAe,CAAC,GAAG,CAAC,CAAC;QAEzC,OAAO;QACP,CAAC,IAAI,EAAE,YAAY,CAAC,eAAe,CAAC,GAAG,CAAC,CAAC;KAC1C,CAAC,CAAC;AACL,CAAC;AAED,SAAgB,mBAAmB,CAAC,GAAW;IAC7C,OAAO,IAAI,GAAG,CAAqB;QACjC,CAAC,GAAG,EAAE,YAAY,CAAC,WAAW,CAAC,GAAG,CAAC,CAAC;QACpC,CAAC,IAAI,EAAE,YAAY,CAAC,gBAAgB,CAAC,GAAG,CAAC,CAAC;KAC3C,CAAC,CAAC;AACL,CAAC;AAED,cAAc;AACd,SAAgB,kBAAkB,CAAC,GAAW;IAC5C,OAAO,IAAI,GAAG,CAAqB;QACjC,MAAM;QACN,CAAC,IAAI,EAAE,YAAY,CAAC,WAAW,CAAC,GAAG,CAAC,CAAC;QAErC,iBAAiB;QACjB,CAAC,IAAI,EAAE,YAAY,CAAC,WAAW,CAAC,GAAG,CAAC,CAAC;QAErC,OAAO;QACP,CAAC,IAAI,EAAE,YAAY,CAAC,YAAY,CAAC,GAAG,CAAC,CAAC;QAEtC,OAAO;QACP,CAAC,IAAI,EAAE,YAAY,CAAC,IAAI,EAAE,CAAC;KAC5B,CAAC,CAAC;AACL,CAAC;AAED,SAAgB,qBAAqB,CAAC,GAAW,EAAE,MAAc;IAC/D,MAAM,WAAW,GAAG,GAAG,CAAC,QAAQ,CAAC,GAAG,CAAC,MAAM,CAAC,CAAC;IAC7C,IAAI,WAAW,KAAK,SAAS,EAAE,CAAC;QAC9B,MAAM,IAAI,KAAK,CAAC,gBAAgB,CAAC,CAAC;IACpC,CAAC;IACD,OAAO,WAAW,CAAC;AACrB,CAAC;AAED,SAAgB,uBAAuB,CACrC,GAAW,EACX,MAAc;IAEd,MAAM,WAAW,GAAG,GAAG,CAAC,UAAU,CAAC,GAAG,CAAC,MAAM,CAAC,CAAC;IAC/C,IAAI,WAAW,KAAK,SAAS,EAAE,CAAC;QAC9B,MAAM,IAAI,KAAK,CAAC,gBAAgB,CAAC,CAAC;IACpC,CAAC;IACD,OAAO,WAAW,CAAC;AACrB,CAAC;AAED,SAAgB,oBAAoB,CAAC,GAAW,EAAE,MAAc;IAC9D,MAAM,WAAW,GAAG,kBAAkB,CAAC,GAAG,CAAC,CAAC,GAAG,CAAC,MAAM,CAAC,CAAC;IACxD,IAAI,WAAW,KAAK,SAAS,EAAE,CAAC;QAC9B,MAAM,IAAI,KAAK,CAAC,gBAAgB,CAAC,CAAC;IACpC,CAAC;IACD,OAAO,WAAW,CAAC;AACrB,CAAC;AAED,SAAgB,oBAAoB,CAClC,GAAW,EACX,MAAc;IAEd,MAAM,WAAW,GAAG,kBAAkB,CAAC,GAAG,CAAC,CAAC,GAAG,CAAC,MAAM,CAAC,CAAC;IACxD,IAAI,WAAW,KAAK,SAAS,EAAE,CAAC;QAC9B,MAAM,IAAI,KAAK,CAAC,gBAAgB,CAAC,CAAC;IACpC,CAAC;IACD,OAAO,WAAW,CAAC;AACrB,CAAC;AAED,SAAgB,iBAAiB,CAC/B,GAAW,EACX,MAAc;IAEd,MAAM,WAAW,GAAG,eAAe,CAAC,GAAG,CAAC,CAAC,GAAG,CAAC,MAAM,CAAC,CAAC;IACrD,IAAI,WAAW,KAAK,SAAS,EAAE,CAAC;QAC9B,MAAM,IAAI,KAAK,CAAC,gBAAgB,CAAC,CAAC;IACpC,CAAC;IACD,OAAO,WAAW,CAAC;AACrB,CAAC"}

package/src/lib/cpus/instructions.d.ts

@@ -0,0 +1,35 @@
+import { X86Cpu } from './x86Cpu';
+export declare function popr(cpu: X86Cpu, reg: number): () => void;
+export declare function pushi(cpu: X86Cpu): () => void;
+export declare function pushr(cpu: X86Cpu, register: number): () => void;
+export declare function mov(cpu: X86Cpu, register: number): () => void;
+export declare function movRegReg(cpu: X86Cpu): () => void;
+export declare function movl(cpu: X86Cpu): () => void;
+export declare function yam(cpu: X86Cpu): () => void;
+export declare function lea(cpu: X86Cpu): () => void;
+export declare function addReg(cpu: X86Cpu): () => void;
+export declare function addRegPad(cpu: X86Cpu): () => void;
+export declare function addEAX(cpu: X86Cpu): () => void;
+export declare function subRAX(cpu: X86Cpu): () => void;
+export declare function invokeX83(cpu: X86Cpu): () => void;
+export declare function x83Add(cpu: X86Cpu): (reg: number, op2: number) => void;
+export declare function x83Sub(cpu: X86Cpu): (reg: number, op2: number) => void;
+export declare function x83Cmp(cpu: X86Cpu): (reg: number, op2: number) => void;
+export declare function invokeX81_05Sub(cpu: X86Cpu): (reg: number, value?: number) => void;
+export declare function invokeX81_07Cmp(cpu: X86Cpu): (reg: number) => void;
+export declare function invokeX81(cpu: X86Cpu): () => void;
+export declare function fn0x0f8dJge(cpu: X86Cpu): () => void;
+export declare function invokeFn0x0f(cpu: X86Cpu): () => void;
+export declare function fn0x0f8eJle(cpu: X86Cpu): () => void;
+export declare function fn0x0fAfImul(cpu: X86Cpu): () => void;
+export declare function noOp(): () => void;
+export declare function jmpImm32(cpu: X86Cpu): () => void;
+export declare function jmpImm8(cpu: X86Cpu): () => void;
+export declare function jge(cpu: X86Cpu): () => void;
+export declare function dec(cpu: X86Cpu, register: number): () => void;
+export declare function call(cpu: X86Cpu): () => void;
+export declare function ret(cpu: X86Cpu): () => void;
+export declare function int(cpu: X86Cpu): () => void;
+export declare function sysCallExit(cpu: X86Cpu): () => void;
+export declare function sysCallInterrupt(cpu: X86Cpu): () => void;
+//# sourceMappingURL=instructions.d.ts.map

package/src/lib/cpus/instructions.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"instructions.d.ts","sourceRoot":"","sources":["../../../../../brightchain-lib/src/lib/cpus/instructions.ts"],"names":[],"mappings":"AAQA,OAAO,EAAE,MAAM,EAAE,MAAM,UAAU,CAAC;AAGlC,wBAAgB,IAAI,CAAC,GAAG,EAAE,MAAM,EAAE,GAAG,EAAE,MAAM,cAI5C;AAED,wBAAgB,KAAK,CAAC,GAAG,EAAE,MAAM,cAIhC;AAED,wBAAgB,KAAK,CAAC,GAAG,EAAE,MAAM,EAAE,QAAQ,EAAE,MAAM,GAAG,MAAM,IAAI,CAI/D;AAED,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,EAAE,QAAQ,EAAE,MAAM,GAAG,MAAM,IAAI,CAI7D;AAED,wBAAgB,SAAS,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAejD;AAED,wBAAgB,IAAI,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAW5C;AAED,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAQ3C;AAED,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAW3C;AAED,wBAAgB,MAAM,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAO9C;AAED,wBAAgB,SAAS,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAQjD;AAED,wBAAgB,MAAM,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAI9C;AAED,wBAAgB,MAAM,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAI9C;AAED,wBAAgB,SAAS,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CASjD;AAED,wBAAgB,MAAM,CAAC,GAAG,EAAE,MAAM,IACf,KAAK,MAAM,EAAE,KAAK,MAAM,UAG1C;AAED,wBAAgB,MAAM,CAAC,GAAG,EAAE,MAAM,IACf,KAAK,MAAM,EAAE,KAAK,MAAM,UAG1C;AAED,wBAAgB,MAAM,CAAC,GAAG,EAAE,MAAM,IACf,KAAK,MAAM,EAAE,KAAK,MAAM,UAK1C;AAED,wBAAgB,eAAe,CAAC,GAAG,EAAE,MAAM,IACxB,KAAK,MAAM,EAAE,QAAQ,MAAM,UAM7C;AAED,wBAAgB,eAAe,CAAC,GAAG,EAAE,MAAM,IACxB,KAAK,MAAM,UAO7B;AAED,wBAAgB,SAAS,CAAC,GAAG,EAAE,MAAM,cAQpC;AAED,wBAAgB,WAAW,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAOnD;AAED,wBAAgB,YAAY,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAOpD;AAED,wBAAgB,WAAW,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAOnD;AAED,wBAAgB,YAAY,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAOpD;AAED,wBAAgB,IAAI,IAAI,MAAM,IAAI,CAIjC;AAED,wBAAgB,QAAQ,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAKhD;AAGD,wBAAgB,OAAO,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAK/C;AAED,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAO3C;AAGD,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,EAAE,QAAQ,EAAE,MAAM,cAIhD;AAED,wBAAgB,IAAI,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAM5C;AAED,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAI3C;AAED,wBAAgB,GAAG,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAM3C;AAED,wBAAgB,WAAW,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAQnD;AAED,wBAAgB,gBAAgB,CAAC,GAAG,EAAE,MAAM,GAAG,MAAM,IAAI,CAMxD"}

package/src/lib/cpus/instructions.js

@@ -0,0 +1,285 @@
+"use strict";
+Object.defineProperty(exports, "__esModule", { value: true });
+exports.popr = popr;
+exports.pushi = pushi;
+exports.pushr = pushr;
+exports.mov = mov;
+exports.movRegReg = movRegReg;
+exports.movl = movl;
+exports.yam = yam;
+exports.lea = lea;
+exports.addReg = addReg;
+exports.addRegPad = addRegPad;
+exports.addEAX = addEAX;
+exports.subRAX = subRAX;
+exports.invokeX83 = invokeX83;
+exports.x83Add = x83Add;
+exports.x83Sub = x83Sub;
+exports.x83Cmp = x83Cmp;
+exports.invokeX81_05Sub = invokeX81_05Sub;
+exports.invokeX81_07Cmp = invokeX81_07Cmp;
+exports.invokeX81 = invokeX81;
+exports.fn0x0f8dJge = fn0x0f8dJge;
+exports.invokeFn0x0f = invokeFn0x0f;
+exports.fn0x0f8eJle = fn0x0f8eJle;
+exports.fn0x0fAfImul = fn0x0fAfImul;
+exports.noOp = noOp;
+exports.jmpImm32 = jmpImm32;
+exports.jmpImm8 = jmpImm8;
+exports.jge = jge;
+exports.dec = dec;
+exports.call = call;
+exports.ret = ret;
+exports.int = int;
+exports.sysCallExit = sysCallExit;
+exports.sysCallInterrupt = sysCallInterrupt;
+const cpuRegisters_1 = require("../enumerations/cpuRegisters");
+const instructionTables_1 = require("./instructionTables");
+// pop reg
+function popr(cpu, reg) {
+    return function () {
+        cpu.Registers[reg] = cpu.pop();
+    };
+}
+function pushi(cpu) {
+    return function () {
+        cpu.push(cpu.read(1));
+    };
+}
+function pushr(cpu, register) {
+    return function () {
+        cpu.push(cpu.Registers[register]);
+    };
+}
+function mov(cpu, register) {
+    return function () {
+        cpu.Registers[register] = cpu.read(4);
+    };
+}
+function movRegReg(cpu) {
+    return function () {
+        const rm = cpu.read(1);
+        const r0 = (rm >> 3) & 7;
+        const r1 = rm & 7;
+        if (!(rm & (1 << 7))) {
+            let offset = cpu.read(-1) >> 2;
+            if (rm & 4 && offset == 9) {
+                offset = 0;
+            }
+            cpu.Stack[cpu.Registers[r1] + offset] = cpu.Registers[r0];
+        }
+        else {
+            cpu.Registers[r1] = cpu.Registers[r0];
+        }
+    };
+}
+function movl(cpu) {
+    return function () {
+        const op1 = cpu.read(1);
+        const reg = op1 & 7;
+        let offset = cpu.read(-1) >> 2;
+        if (!(op1 & (1 << 6))) {
+            offset = 0;
+        }
+        const sp = cpu.Registers[reg] + offset;
+        cpu.Stack[sp] = cpu.read(4);
+    };
+}
+function yam(cpu) {
+    return function () {
+        const rm = cpu.read(1);
+        const r0 = (rm >> 3) & 7;
+        const r1 = rm & 7;
+        const offset = cpu.read(-1) >> 2;
+        cpu.Registers[r0] = cpu.Stack[cpu.Registers[r1] + offset];
+    };
+}
+function lea(cpu) {
+    return function () {
+        const op1 = cpu.read(1);
+        const reg0 = (op1 >> 3) & 7;
+        const reg1 = op1 & 7;
+        let offset = cpu.read(-1);
+        if (!(op1 & (1 << 6))) {
+            offset = 0;
+        }
+        cpu.Registers[reg0] = cpu.Registers[reg1] + offset;
+    };
+}
+function addReg(cpu) {
+    return function () {
+        const rm = cpu.read(1) - 0xc0;
+        const r0 = rm >> 3;
+        const r1 = rm & 7;
+        cpu.Registers[r1] += cpu.Registers[r0];
+    };
+}
+function addRegPad(cpu) {
+    return function () {
+        const rm = cpu.read(1);
+        const r0 = (rm >> 3) & 7;
+        const r1 = rm & 7;
+        const offset = cpu.read(-1) >> 2;
+        cpu.Registers[r0] += cpu.Stack[cpu.Registers[r1] + offset];
+    };
+}
+function addEAX(cpu) {
+    return function () {
+        cpu.Registers[cpuRegisters_1.default.EAX] += cpu.read(4);
+    };
+}
+function subRAX(cpu) {
+    return function () {
+        cpu.Registers[cpuRegisters_1.default.EAX] -= cpu.read(4);
+    };
+}
+function invokeX83(cpu) {
+    return function () {
+        const op1 = cpu.read(1);
+        const fn = (op1 >> 3) & 7;
+        const reg = op1 & 7;
+        const op2 = cpu.read(1);
+        const fnFunc = (0, instructionTables_1.getX83Instruction)(cpu, fn);
+        fnFunc(reg, op2);
+    };
+}
+function x83Add(cpu) {
+    return function (reg, op2) {
+        cpu.Registers[reg] += op2 >> 2;
+    };
+}
+function x83Sub(cpu) {
+    return function (reg, op2) {
+        cpu.Registers[reg] -= op2 >> 2;
+    };
+}
+function x83Cmp(cpu) {
+    return function (reg, op2) {
+        const tmp = cpu.Registers[reg] - op2;
+        cpu.NZ = tmp != 0;
+        cpu.NG = tmp < 0;
+    };
+}
+function invokeX81_05Sub(cpu) {
+    return function (reg, value) {
+        if (value == undefined) {
+            throw new Error('value is undefined');
+        }
+        cpu.Registers[reg] -= cpu.read(4);
+    };
+}
+function invokeX81_07Cmp(cpu) {
+    return function (reg) {
+        const offset = cpu.read(-1) >> 2;
+        const value = cpu.read(4);
+        const tmp = cpu.Stack[cpu.Registers[reg] + offset] - value;
+        cpu.NZ = tmp != 0;
+        cpu.NG = tmp < 0;
+    };
+}
+function invokeX81(cpu) {
+    return function () {
+        const op1 = cpu.read(1);
+        const fn = (op1 >> 3) & 7;
+        const reg = op1 & 7;
+        const fnFunc = (0, instructionTables_1.getFn0x81Instruction)(cpu, fn);
+        fnFunc(reg, op1); // this may not be correct
+    };
+}
+function fn0x0f8dJge(cpu) {
+    return function () {
+        const dist = cpu.read(4);
+        if (!cpu.NG) {
+            cpu.PC += dist;
+        }
+    };
+}
+function invokeFn0x0f(cpu) {
+    return function () {
+        // Call the actual function inside the prefix
+        const op = cpu.read(1);
+        const fn = (0, instructionTables_1.getFn0x0fInstruction)(cpu, op);
+        fn();
+    };
+}
+function fn0x0f8eJle(cpu) {
+    return function () {
+        const dist = cpu.read(4);
+        if (cpu.NG || !cpu.NZ) {
+            cpu.PC += dist;
+        }
+    };
+}
+function fn0x0fAfImul(cpu) {
+    return function () {
+        const rm = cpu.read(1) - 0xc0;
+        const r0 = rm >> 3;
+        const r1 = rm & 7;
+        cpu.Registers[r0] = cpu.Registers[r0] * cpu.Registers[r1];
+    };
+}
+function noOp() {
+    return function () {
+        // noop
+    };
+}
+function jmpImm32(cpu) {
+    return function () {
+        const dst = cpu.read(4);
+        cpu.PC += dst;
+    };
+}
+// jmp imm8
+function jmpImm8(cpu) {
+    return function () {
+        const dst = cpu.read(1);
+        cpu.PC += dst;
+    };
+}
+function jge(cpu) {
+    return function () {
+        const dist = cpu.read(-1);
+        if (!cpu.NG) {
+            cpu.PC += dist;
+        }
+    };
+}
+// dec
+function dec(cpu, register) {
+    return function () {
+        cpu.Registers[register]--;
+    };
+}
+function call(cpu) {
+    return function () {
+        const dst = cpu.read(4);
+        cpu.push(cpu.PC);
+        cpu.PC += dst;
+    };
+}
+function ret(cpu) {
+    return function () {
+        cpu.PC = cpu.pop();
+    };
+}
+function int(cpu) {
+    return function () {
+        const op = cpu.read(1);
+        const fn = (0, instructionTables_1.getInterruptInstruction)(cpu, op);
+        fn();
+    };
+}
+function sysCallExit(cpu) {
+    return function () {
+        console.log('Program returned %s', cpu.Stack[cpu.Registers[cpuRegisters_1.default.ESP + 1]]);
+        cpu.PC = -1;
+    };
+}
+function sysCallInterrupt(cpu) {
+    return function () {
+        const syscallOp = cpu.Registers[cpuRegisters_1.default.EAX];
+        const syscallFunc = (0, instructionTables_1.getSysCallInstruction)(cpu, syscallOp);
+        syscallFunc();
+    };
+}
+//# sourceMappingURL=instructions.js.map

package/src/lib/cpus/instructions.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"instructions.js","sourceRoot":"","sources":["../../../../../brightchain-lib/src/lib/cpus/instructions.ts"],"names":[],"mappings":";;AAWA,oBAIC;AAED,sBAIC;AAED,sBAIC;AAED,kBAIC;AAED,8BAeC;AAED,oBAWC;AAED,kBAQC;AAED,kBAWC;AAED,wBAOC;AAED,8BAQC;AAED,wBAIC;AAED,wBAIC;AAED,8BASC;AAED,wBAIC;AAED,wBAIC;AAED,wBAMC;AAED,0CAOC;AAED,0CAQC;AAED,8BAQC;AAED,kCAOC;AAED,oCAOC;AAED,kCAOC;AAED,oCAOC;AAED,oBAIC;AAED,4BAKC;AAGD,0BAKC;AAED,kBAOC;AAGD,kBAIC;AAED,oBAMC;AAED,kBAIC;AAED,kBAMC;AAED,kCAQC;AAED,4CAMC;AAlSD,+DAAwD;AACxD,2DAM6B;AAG7B,UAAU;AACV,SAAgB,IAAI,CAAC,GAAW,EAAE,GAAW;IAC3C,OAAO;QACL,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,GAAG,GAAG,CAAC,GAAG,EAAE,CAAC;IACjC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,KAAK,CAAC,GAAW;IAC/B,OAAO;QACL,GAAG,CAAC,IAAI,CAAC,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,CAAC;IACxB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,KAAK,CAAC,GAAW,EAAE,QAAgB;IACjD,OAAO;QACL,GAAG,CAAC,IAAI,CAAC,GAAG,CAAC,SAAS,CAAC,QAAQ,CAAC,CAAC,CAAC;IACpC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,GAAG,CAAC,GAAW,EAAE,QAAgB;IAC/C,OAAO;QACL,GAAG,CAAC,SAAS,CAAC,QAAQ,CAAC,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;IACxC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,SAAS,CAAC,GAAW;IACnC,OAAO;QACL,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACvB,MAAM,EAAE,GAAG,CAAC,EAAE,IAAI,CAAC,CAAC,GAAG,CAAC,CAAC;QACzB,MAAM,EAAE,GAAG,EAAE,GAAG,CAAC,CAAC;QAClB,IAAI,CAAC,CAAC,EAAE,GAAG,CAAC,CAAC,IAAI,CAAC,CAAC,CAAC,EAAE,CAAC;YACrB,IAAI,MAAM,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;YAC/B,IAAI,EAAE,GAAG,CAAC,IAAI,MAAM,IAAI,CAAC,EAAE,CAAC;gBAC1B,MAAM,GAAG,CAAC,CAAC;YACb,CAAC;YACD,GAAG,CAAC,KAAK,CAAC,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,MAAM,CAAC,GAAG,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,CAAC;QAC5D,CAAC;aAAM,CAAC;YACN,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,CAAC;QACxC,CAAC;IACH,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,IAAI,CAAC,GAAW;IAC9B,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,MAAM,GAAG,GAAG,GAAG,GAAG,CAAC,CAAC;QACpB,IAAI,MAAM,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;QAC/B,IAAI,CAAC,CAAC,GAAG,GAAG,CAAC,CAAC,IAAI,CAAC,CAAC,CAAC,EAAE,CAAC;YACtB,MAAM,GAAG,CAAC,CAAC;QACb,CAAC;QACD,MAAM,EAAE,GAAG,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,GAAG,MAAM,CAAC;QACvC,GAAG,CAAC,KAAK,CAAC,EAAE,CAAC,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;IAC9B,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,GAAG,CAAC,GAAW;IAC7B,OAAO;QACL,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACvB,MAAM,EAAE,GAAG,CAAC,EAAE,IAAI,CAAC,CAAC,GAAG,CAAC,CAAC;QACzB,MAAM,EAAE,GAAG,EAAE,GAAG,CAAC,CAAC;QAClB,MAAM,MAAM,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;QACjC,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,GAAG,CAAC,KAAK,CAAC,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,MAAM,CAAC,CAAC;IAC5D,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,GAAG,CAAC,GAAW;IAC7B,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,MAAM,IAAI,GAAG,CAAC,GAAG,IAAI,CAAC,CAAC,GAAG,CAAC,CAAC;QAC5B,MAAM,IAAI,GAAG,GAAG,GAAG,CAAC,CAAC;QACrB,IAAI,MAAM,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,CAAC;QAC1B,IAAI,CAAC,CAAC,GAAG,GAAG,CAAC,CAAC,IAAI,CAAC,CAAC,CAAC,EAAE,CAAC;YACtB,MAAM,GAAG,CAAC,CAAC;QACb,CAAC;QACD,GAAG,CAAC,SAAS,CAAC,IAAI,CAAC,GAAG,GAAG,CAAC,SAAS,CAAC,IAAI,CAAC,GAAG,MAAM,CAAC;IACrD,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,MAAM,CAAC,GAAW;IAChC,OAAO;QACL,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,GAAG,IAAI,CAAC;QAC9B,MAAM,EAAE,GAAG,EAAE,IAAI,CAAC,CAAC;QACnB,MAAM,EAAE,GAAG,EAAE,GAAG,CAAC,CAAC;QAClB,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,IAAI,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,CAAC;IACzC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,SAAS,CAAC,GAAW;IACnC,OAAO;QACL,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACvB,MAAM,EAAE,GAAG,CAAC,EAAE,IAAI,CAAC,CAAC,GAAG,CAAC,CAAC;QACzB,MAAM,EAAE,GAAG,EAAE,GAAG,CAAC,CAAC;QAClB,MAAM,MAAM,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;QACjC,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,IAAI,GAAG,CAAC,KAAK,CAAC,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,MAAM,CAAC,CAAC;IAC7D,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,MAAM,CAAC,GAAW;IAChC,OAAO;QACL,GAAG,CAAC,SAAS,CAAC,sBAAY,CAAC,GAAG,CAAC,IAAI,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;IACjD,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,MAAM,CAAC,GAAW;IAChC,OAAO;QACL,GAAG,CAAC,SAAS,CAAC,sBAAY,CAAC,GAAG,CAAC,IAAI,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;IACjD,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,SAAS,CAAC,GAAW;IACnC,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,MAAM,EAAE,GAAG,CAAC,GAAG,IAAI,CAAC,CAAC,GAAG,CAAC,CAAC;QAC1B,MAAM,GAAG,GAAG,GAAG,GAAG,CAAC,CAAC;QACpB,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,MAAM,MAAM,GAAG,IAAA,qCAAiB,EAAC,GAAG,EAAE,EAAE,CAAC,CAAC;QAC1C,MAAM,CAAC,GAAG,EAAE,GAAG,CAAC,CAAC;IACnB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,MAAM,CAAC,GAAW;IAChC,OAAO,UAAU,GAAW,EAAE,GAAW;QACvC,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,IAAI,GAAG,IAAI,CAAC,CAAC;IACjC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,MAAM,CAAC,GAAW;IAChC,OAAO,UAAU,GAAW,EAAE,GAAW;QACvC,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,IAAI,GAAG,IAAI,CAAC,CAAC;IACjC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,MAAM,CAAC,GAAW;IAChC,OAAO,UAAU,GAAW,EAAE,GAAW;QACvC,MAAM,GAAG,GAAG,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,GAAG,GAAG,CAAC;QACrC,GAAG,CAAC,EAAE,GAAG,GAAG,IAAI,CAAC,CAAC;QAClB,GAAG,CAAC,EAAE,GAAG,GAAG,GAAG,CAAC,CAAC;IACnB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,eAAe,CAAC,GAAW;IACzC,OAAO,UAAU,GAAW,EAAE,KAAc;QAC1C,IAAI,KAAK,IAAI,SAAS,EAAE,CAAC;YACvB,MAAM,IAAI,KAAK,CAAC,oBAAoB,CAAC,CAAC;QACxC,CAAC;QACD,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,IAAI,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;IACpC,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,eAAe,CAAC,GAAW;IACzC,OAAO,UAAU,GAAW;QAC1B,MAAM,MAAM,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;QACjC,MAAM,KAAK,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QAC1B,MAAM,GAAG,GAAG,GAAG,CAAC,KAAK,CAAC,GAAG,CAAC,SAAS,CAAC,GAAG,CAAC,GAAG,MAAM,CAAC,GAAG,KAAK,CAAC;QAC3D,GAAG,CAAC,EAAE,GAAG,GAAG,IAAI,CAAC,CAAC;QAClB,GAAG,CAAC,EAAE,GAAG,GAAG,GAAG,CAAC,CAAC;IACnB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,SAAS,CAAC,GAAW;IACnC,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,MAAM,EAAE,GAAG,CAAC,GAAG,IAAI,CAAC,CAAC,GAAG,CAAC,CAAC;QAC1B,MAAM,GAAG,GAAG,GAAG,GAAG,CAAC,CAAC;QACpB,MAAM,MAAM,GAAG,IAAA,wCAAoB,EAAC,GAAG,EAAE,EAAE,CAAC,CAAC;QAC7C,MAAM,CAAC,GAAG,EAAE,GAAG,CAAC,CAAC,CAAC,0BAA0B;IAC9C,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,WAAW,CAAC,GAAW;IACrC,OAAO;QACL,MAAM,IAAI,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACzB,IAAI,CAAC,GAAG,CAAC,EAAE,EAAE,CAAC;YACZ,GAAG,CAAC,EAAE,IAAI,IAAI,CAAC;QACjB,CAAC;IACH,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,YAAY,CAAC,GAAW;IACtC,OAAO;QACL,6CAA6C;QAC7C,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACvB,MAAM,EAAE,GAAG,IAAA,wCAAoB,EAAC,GAAG,EAAE,EAAE,CAAC,CAAC;QACzC,EAAE,EAAE,CAAC;IACP,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,WAAW,CAAC,GAAW;IACrC,OAAO;QACL,MAAM,IAAI,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACzB,IAAI,GAAG,CAAC,EAAE,IAAI,CAAC,GAAG,CAAC,EAAE,EAAE,CAAC;YACtB,GAAG,CAAC,EAAE,IAAI,IAAI,CAAC;QACjB,CAAC;IACH,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,YAAY,CAAC,GAAW;IACtC,OAAO;QACL,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,GAAG,IAAI,CAAC;QAC9B,MAAM,EAAE,GAAG,EAAE,IAAI,CAAC,CAAC;QACnB,MAAM,EAAE,GAAG,EAAE,GAAG,CAAC,CAAC;QAClB,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,GAAG,GAAG,CAAC,SAAS,CAAC,EAAE,CAAC,CAAC;IAC5D,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,IAAI;IAClB,OAAO;QACL,OAAO;IACT,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,QAAQ,CAAC,GAAW;IAClC,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,GAAG,CAAC,EAAE,IAAI,GAAG,CAAC;IAChB,CAAC,CAAC;AACJ,CAAC;AAED,WAAW;AACX,SAAgB,OAAO,CAAC,GAAW;IACjC,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,GAAG,CAAC,EAAE,IAAI,GAAG,CAAC;IAChB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,GAAG,CAAC,GAAW;IAC7B,OAAO;QACL,MAAM,IAAI,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC,CAAC;QAC1B,IAAI,CAAC,GAAG,CAAC,EAAE,EAAE,CAAC;YACZ,GAAG,CAAC,EAAE,IAAI,IAAI,CAAC;QACjB,CAAC;IACH,CAAC,CAAC;AACJ,CAAC;AAED,MAAM;AACN,SAAgB,GAAG,CAAC,GAAW,EAAE,QAAgB;IAC/C,OAAO;QACL,GAAG,CAAC,SAAS,CAAC,QAAQ,CAAC,EAAE,CAAC;IAC5B,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,IAAI,CAAC,GAAW;IAC9B,OAAO;QACL,MAAM,GAAG,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACxB,GAAG,CAAC,IAAI,CAAC,GAAG,CAAC,EAAE,CAAC,CAAC;QACjB,GAAG,CAAC,EAAE,IAAI,GAAG,CAAC;IAChB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,GAAG,CAAC,GAAW;IAC7B,OAAO;QACL,GAAG,CAAC,EAAE,GAAG,GAAG,CAAC,GAAG,EAAE,CAAC;IACrB,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,GAAG,CAAC,GAAW;IAC7B,OAAO;QACL,MAAM,EAAE,GAAG,GAAG,CAAC,IAAI,CAAC,CAAC,CAAC,CAAC;QACvB,MAAM,EAAE,GAAG,IAAA,2CAAuB,EAAC,GAAG,EAAE,EAAE,CAAC,CAAC;QAC5C,EAAE,EAAE,CAAC;IACP,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,WAAW,CAAC,GAAW;IACrC,OAAO;QACL,OAAO,CAAC,GAAG,CACT,qBAAqB,EACrB,GAAG,CAAC,KAAK,CAAC,GAAG,CAAC,SAAS,CAAC,sBAAY,CAAC,GAAG,GAAG,CAAC,CAAC,CAAC,CAC/C,CAAC;QACF,GAAG,CAAC,EAAE,GAAG,CAAC,CAAC,CAAC;IACd,CAAC,CAAC;AACJ,CAAC;AAED,SAAgB,gBAAgB,CAAC,GAAW;IAC1C,OAAO;QACL,MAAM,SAAS,GAAG,GAAG,CAAC,SAAS,CAAC,sBAAY,CAAC,GAAG,CAAC,CAAC;QAClD,MAAM,WAAW,GAAG,IAAA,yCAAqB,EAAC,GAAG,EAAE,SAAS,CAAC,CAAC;QAC1D,WAAW,EAAE,CAAC;IAChB,CAAC,CAAC;AACJ,CAAC"}

package/src/lib/cpus/mach-o.d.ts

@@ -0,0 +1,7 @@
+import { X86Cpu } from './x86Cpu';
+export declare function loadBinary(file: Blob): void;
+export declare function readBinary(buffer: Buffer): X86Cpu;
+export declare function handleCommand(cpu: X86Cpu, buffer: Buffer, commandBuffer: Buffer): void;
+export declare function handleSegmentCommand(cpu: X86Cpu, buffer: Buffer, commandBuffer: Buffer): void;
+export declare function handleUnixThreadCommand(cpu: X86Cpu, buffer: Buffer, commandBuffer: Buffer): void;
+//# sourceMappingURL=mach-o.d.ts.map

package/src/lib/cpus/mach-o.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"mach-o.d.ts","sourceRoot":"","sources":["../../../../../brightchain-lib/src/lib/cpus/mach-o.ts"],"names":[],"mappings":"AAKA,OAAO,EAAE,MAAM,EAAE,MAAM,UAAU,CAAC;AAKlC,wBAAgB,UAAU,CAAC,IAAI,EAAE,IAAI,QAUpC;AAED,wBAAgB,UAAU,CAAC,MAAM,EAAE,MAAM,GAAG,MAAM,CA6BjD;AAED,wBAAgB,aAAa,CAC3B,GAAG,EAAE,MAAM,EACX,MAAM,EAAE,MAAM,EACd,aAAa,EAAE,MAAM,QAatB;AAED,wBAAgB,oBAAoB,CAClC,GAAG,EAAE,MAAM,EACX,MAAM,EAAE,MAAM,EACd,aAAa,EAAE,MAAM,QAgBtB;AAED,wBAAgB,uBAAuB,CACrC,GAAG,EAAE,MAAM,EACX,MAAM,EAAE,MAAM,EACd,aAAa,EAAE,MAAM,QAmBtB"}

package/src/lib/cpus/mach-o.js

@@ -0,0 +1,99 @@
+// https://gist.githubusercontent.com/tadeuzagallo/3853299f033bf9b746e4/raw/43467ba1bee7251e1b653123f29e6ff5643a0735/mach-o.js
+// https://gist.github.com/tadeuzagallo/3853299f033bf9b746e4
+'use strict';
+Object.defineProperty(exports, "__esModule", { value: true });
+exports.loadBinary = loadBinary;
+exports.readBinary = readBinary;
+exports.handleCommand = handleCommand;
+exports.handleSegmentCommand = handleSegmentCommand;
+exports.handleUnixThreadCommand = handleUnixThreadCommand;
+const cpuRegisters_1 = require("../enumerations/cpuRegisters");
+const x86Cpu_1 = require("./x86Cpu");
+const LC_SEGMENT = 0x00000001;
+const LC_UNIXTHREAD = 0x00000005;
+function loadBinary(file) {
+    const reader = new FileReader();
+    reader.addEventListener('loadend', function () {
+        if (typeof reader.result == 'string' || reader.result == null) {
+            throw new Error('Invalid Mach-O file');
+        }
+        else {
+            readBinary(Buffer.from(reader.result));
+        }
+    });
+    reader.readAsArrayBuffer(file);
+}
+function readBinary(buffer) {
+    const header = buffer.subarray(0, 7);
+    if (header[0] !== 0xfeedface) {
+        throw new Error('Invalid Mach magic');
+    }
+    const cpu = x86Cpu_1.X86Cpu.new(1048576, 8);
+    // var cpuType = header[1];
+    // var cpuSubtype = header[2];
+    // var fileType = header[3];
+    const numCommands = header[4];
+    // var commandsSize = header[5];
+    // var flags = header[6];
+    let currentCommandStart = 7;
+    for (let i = 0; i < numCommands; i++) {
+        const commandSize = buffer[currentCommandStart + 1];
+        const commandEnd = currentCommandStart + commandSize / 4;
+        const commandBuffer = buffer.subarray(currentCommandStart, commandEnd);
+        handleCommand(cpu, buffer, commandBuffer);
+        currentCommandStart = commandEnd;
+    }
+    if (cpu.PC !== -1) {
+        cpu.run();
+        return cpu;
+    }
+    cpu.PC = -1;
+    throw new Error('Invalid Mach-O file');
+}
+function handleCommand(cpu, buffer, commandBuffer) {
+    const command = commandBuffer[0];
+    switch (command) {
+        case LC_SEGMENT:
+            handleSegmentCommand(cpu, buffer, commandBuffer);
+            break;
+        case LC_UNIXTHREAD:
+            handleUnixThreadCommand(cpu, buffer, commandBuffer);
+            break;
+        default:
+        // Unhandled command
+    }
+}
+function handleSegmentCommand(cpu, buffer, commandBuffer) {
+    const vmAddress = commandBuffer[6] >> 2;
+    const vmSize = commandBuffer[7] >> 2;
+    const fileOffset = commandBuffer[8] >> 2;
+    const fileSize = commandBuffer[9] >> 2;
+    const fileEnd = fileOffset + fileSize;
+    const view = new Uint32Array(cpu.Program);
+    for (let i = 0; i < vmSize; i++) {
+        if (fileOffset + i >= fileEnd) {
+            break;
+        }
+        view[vmAddress + i] = buffer[fileOffset + i];
+    }
+}
+function handleUnixThreadCommand(cpu, buffer, commandBuffer) {
+    const offset = 4;
+    cpu.Registers[cpuRegisters_1.CpuRegisters.EAX] = commandBuffer[offset]; // eax
+    cpu.Registers[cpuRegisters_1.CpuRegisters.ECX] = commandBuffer[offset + 2]; // ecx
+    cpu.Registers[cpuRegisters_1.CpuRegisters.EDX] = commandBuffer[offset + 3]; // edx
+    cpu.Registers[cpuRegisters_1.CpuRegisters.EBX] = commandBuffer[offset + 1]; // ebx
+    cpu.Registers[cpuRegisters_1.CpuRegisters.ESP] = commandBuffer[offset + 7]; // esp
+    cpu.Registers[cpuRegisters_1.CpuRegisters.EBP] = commandBuffer[offset + 6]; // ebp
+    cpu.Registers[cpuRegisters_1.CpuRegisters.ESI] = commandBuffer[offset + 5]; // esi
+    cpu.Registers[cpuRegisters_1.CpuRegisters.EDI] = commandBuffer[offset + 4]; // edi
+    //var ss = commandBuffer[offset + 8];
+    //var eflags = commandBuffer[offset + 9];
+    cpu.PC = commandBuffer[offset + 10];
+    //var cs = commandBuffer[offset + 11];
+    //var ds = commandBuffer[offset + 12];
+    //var es = commandBuffer[offset + 13];
+    //var fs = commandBuffer[offset + 14];
+    //var gs = commandBuffer[offset + 15];
+}
+//# sourceMappingURL=mach-o.js.map

package/src/lib/cpus/mach-o.js.map

@@ -0,0 +1 @@
+{"version":3,"file":"mach-o.js","sourceRoot":"","sources":["../../../../../brightchain-lib/src/lib/cpus/mach-o.ts"],"names":[],"mappings":"AAAA,8HAA8H;AAC9H,4DAA4D;AAC5D,YAAY,CAAC;;AAQb,gCAUC;AAED,gCA6BC;AAED,sCAgBC;AAED,oDAmBC;AAED,0DAsBC;AA9GD,+DAA4D;AAC5D,qCAAkC;AAElC,MAAM,UAAU,GAAG,UAAU,CAAC;AAC9B,MAAM,aAAa,GAAG,UAAU,CAAC;AAEjC,SAAgB,UAAU,CAAC,IAAU;IACnC,MAAM,MAAM,GAAG,IAAI,UAAU,EAAE,CAAC;IAChC,MAAM,CAAC,gBAAgB,CAAC,SAAS,EAAE;QACjC,IAAI,OAAO,MAAM,CAAC,MAAM,IAAI,QAAQ,IAAI,MAAM,CAAC,MAAM,IAAI,IAAI,EAAE,CAAC;YAC9D,MAAM,IAAI,KAAK,CAAC,qBAAqB,CAAC,CAAC;QACzC,CAAC;aAAM,CAAC;YACN,UAAU,CAAC,MAAM,CAAC,IAAI,CAAC,MAAM,CAAC,MAAM,CAAC,CAAC,CAAC;QACzC,CAAC;IACH,CAAC,CAAC,CAAC;IACH,MAAM,CAAC,iBAAiB,CAAC,IAAI,CAAC,CAAC;AACjC,CAAC;AAED,SAAgB,UAAU,CAAC,MAAc;IACvC,MAAM,MAAM,GAAG,MAAM,CAAC,QAAQ,CAAC,CAAC,EAAE,CAAC,CAAC,CAAC;IACrC,IAAI,MAAM,CAAC,CAAC,CAAC,KAAK,UAAU,EAAE,CAAC;QAC7B,MAAM,IAAI,KAAK,CAAC,oBAAoB,CAAC,CAAC;IACxC,CAAC;IACD,MAAM,GAAG,GAAG,eAAM,CAAC,GAAG,CAAC,OAAO,EAAE,CAAC,CAAC,CAAC;IACnC,2BAA2B;IAC3B,8BAA8B;IAC9B,4BAA4B;IAC5B,MAAM,WAAW,GAAG,MAAM,CAAC,CAAC,CAAC,CAAC;IAC9B,gCAAgC;IAChC,yBAAyB;IACzB,IAAI,mBAAmB,GAAG,CAAC,CAAC;IAC5B,KAAK,IAAI,CAAC,GAAG,CAAC,EAAE,CAAC,GAAG,WAAW,EAAE,CAAC,EAAE,EAAE,CAAC;QACrC,MAAM,WAAW,GAAG,MAAM,CAAC,mBAAmB,GAAG,CAAC,CAAC,CAAC;QACpD,MAAM,UAAU,GAAG,mBAAmB,GAAG,WAAW,GAAG,CAAC,CAAC;QACzD,MAAM,aAAa,GAAG,MAAM,CAAC,QAAQ,CAAC,mBAAmB,EAAE,UAAU,CAAC,CAAC;QAEvE,aAAa,CAAC,GAAG,EAAE,MAAM,EAAE,aAAa,CAAC,CAAC;QAE1C,mBAAmB,GAAG,UAAU,CAAC;IACnC,CAAC;IAED,IAAI,GAAG,CAAC,EAAE,KAAK,CAAC,CAAC,EAAE,CAAC;QAClB,GAAG,CAAC,GAAG,EAAE,CAAC;QACV,OAAO,GAAG,CAAC;IACb,CAAC;IACD,GAAG,CAAC,EAAE,GAAG,CAAC,CAAC,CAAC;IACZ,MAAM,IAAI,KAAK,CAAC,qBAAqB,CAAC,CAAC;AACzC,CAAC;AAED,SAAgB,aAAa,CAC3B,GAAW,EACX,MAAc,EACd,aAAqB;IAErB,MAAM,OAAO,GAAG,aAAa,CAAC,CAAC,CAAC,CAAC;IACjC,QAAQ,OAAO,EAAE,CAAC;QAChB,KAAK,UAAU;YACb,oBAAoB,CAAC,GAAG,EAAE,MAAM,EAAE,aAAa,CAAC,CAAC;YACjD,MAAM;QACR,KAAK,aAAa;YAChB,uBAAuB,CAAC,GAAG,EAAE,MAAM,EAAE,aAAa,CAAC,CAAC;YACpD,MAAM;QACR,QAAQ;QACR,oBAAoB;IACtB,CAAC;AACH,CAAC;AAED,SAAgB,oBAAoB,CAClC,GAAW,EACX,MAAc,EACd,aAAqB;IAErB,MAAM,SAAS,GAAG,aAAa,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;IACxC,MAAM,MAAM,GAAG,aAAa,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;IACrC,MAAM,UAAU,GAAG,aAAa,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;IACzC,MAAM,QAAQ,GAAG,aAAa,CAAC,CAAC,CAAC,IAAI,CAAC,CAAC;IACvC,MAAM,OAAO,GAAG,UAAU,GAAG,QAAQ,CAAC;IAEtC,MAAM,IAAI,GAAG,IAAI,WAAW,CAAC,GAAG,CAAC,OAAO,CAAC,CAAC;IAE1C,KAAK,IAAI,CAAC,GAAG,CAAC,EAAE,CAAC,GAAG,MAAM,EAAE,CAAC,EAAE,EAAE,CAAC;QAChC,IAAI,UAAU,GAAG,CAAC,IAAI,OAAO,EAAE,CAAC;YAC9B,MAAM;QACR,CAAC;QACD,IAAI,CAAC,SAAS,GAAG,CAAC,CAAC,GAAG,MAAM,CAAC,UAAU,GAAG,CAAC,CAAC,CAAC;IAC/C,CAAC;AACH,CAAC;AAED,SAAgB,uBAAuB,CACrC,GAAW,EACX,MAAc,EACd,aAAqB;IAErB,MAAM,MAAM,GAAG,CAAC,CAAC;IACjB,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,CAAC,CAAC,CAAC,MAAM;IAC/D,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,GAAG,CAAC,SAAS,CAAC,2BAAY,CAAC,GAAG,CAAC,GAAG,aAAa,CAAC,MAAM,GAAG,CAAC,CAAC,CAAC,CAAC,MAAM;IACnE,qCAAqC;IACrC,yCAAyC;IACzC,GAAG,CAAC,EAAE,GAAG,aAAa,CAAC,MAAM,GAAG,EAAE,CAAC,CAAC;IACpC,sCAAsC;IACtC,sCAAsC;IACtC,sCAAsC;IACtC,sCAAsC;IACtC,sCAAsC;AACxC,CAAC"}

package/src/lib/cpus/x86Cpu.d.ts

@@ -0,0 +1,21 @@
+export declare class X86Cpu {
+    NG: boolean;
+    NZ: boolean;
+    static readonly StackSize = 1024;
+    static readonly RegisterCount = 8;
+    readonly Interrupts: Map<number, () => void>;
+    readonly Program: Uint8Array;
+    readonly Registers: Uint32Array;
+    PC: number;
+    Instructions: Array<() => void>;
+    Syscalls: Map<number, () => void>;
+    constructor(memory: ArrayBuffer | Uint8Array | number, registers: number | Uint32Array, pc: number);
+    readonly Stack: Uint32Array<ArrayBuffer>;
+    read(size: number): number;
+    pop(): number;
+    push(value: number): void;
+    static new(memory: number | Uint8Array | ArrayBuffer, registers: number | Uint32Array, pc?: number): X86Cpu;
+    run(): void;
+    static run(memory: number | Uint8Array | ArrayBuffer, registers: number | Uint32Array, pc: number): X86Cpu;
+}
+//# sourceMappingURL=x86Cpu.d.ts.map

package/src/lib/cpus/x86Cpu.d.ts.map

@@ -0,0 +1 @@
+{"version":3,"file":"x86Cpu.d.ts","sourceRoot":"","sources":["../../../../../brightchain-lib/src/lib/cpus/x86Cpu.ts"],"names":[],"mappings":"AASA,qBAAa,MAAM;IACV,EAAE,UAAS;IACX,EAAE,UAAS;IAElB,gBAAuB,SAAS,QAAQ;IACxC,gBAAuB,aAAa,KAAK;IAEzC,SAAgB,UAAU,EAAE,GAAG,CAAC,MAAM,EAAE,MAAM,IAAI,CAAC,CAG/C;IACJ,SAAgB,OAAO,EAAE,UAAU,CAAC;IACpC,SAAgB,SAAS,EAAE,WAAW,CAAC;IAChC,EAAE,EAAE,MAAM,CAAC;IACX,YAAY,EAAE,KAAK,CAAC,MAAM,IAAI,CAAC,CAAC;IAChC,QAAQ,EAAE,GAAG,CAAC,MAAM,EAAE,MAAM,IAAI,CAAC,CAAC;gBAGvC,MAAM,EAAE,WAAW,GAAG,UAAU,GAAG,MAAM,EACzC,SAAS,EAAE,MAAM,GAAG,WAAW,EAC/B,EAAE,EAAE,MAAM;IAkBZ,SAAgB,KAAK,2BAAqC;IAEnD,IAAI,CAAC,IAAI,EAAE,MAAM;IA2BjB,GAAG;IAIH,IAAI,CAAC,KAAK,EAAE,MAAM,GAAG,IAAI;WAIlB,GAAG,CACf,MAAM,EAAE,MAAM,GAAG,UAAU,GAAG,WAAW,EACzC,SAAS,EAAE,MAAM,GAAG,WAAW,EAC/B,EAAE,SAAK,GACN,MAAM;IAMF,GAAG;WAOI,GAAG,CACf,MAAM,EAAE,MAAM,GAAG,UAAU,GAAG,WAAW,EACzC,SAAS,EAAE,MAAM,GAAG,WAAW,EAC/B,EAAE,EAAE,MAAM,GACT,MAAM;CASV"}