ytljit 0.0.7 → 0.0.8
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- data/ext/memory.c +11 -5
- data/ext/ytljit.c +37 -0
- data/lib/ytljit/codespace.rb +6 -1
- data/lib/ytljit/instruction_ia.rb +33 -0
- data/lib/ytljit/util.rb +1 -0
- data/lib/ytljit/vm.rb +272 -80
- data/lib/ytljit/vm_codegen.rb +26 -10
- data/lib/ytljit/vm_cruby_obj.rb +49 -7
- data/lib/ytljit/vm_inline_method.rb +50 -18
- data/lib/ytljit/vm_sendnode.rb +317 -86
- data/lib/ytljit/vm_trans.rb +40 -3
- data/lib/ytljit/vm_type_gen.rb +16 -6
- data/lib/ytljit/vm_typeinf.rb +10 -2
- data/lib/ytljit.rb +3 -3
- data/test/test_assemble2.rb +28 -0
- metadata +3 -3
data/lib/ytljit/vm_codegen.rb
CHANGED
@@ -78,6 +78,7 @@ LO | | | |
|
|
78
78
|
@top_node = tnode
|
79
79
|
@modified_local_var = []
|
80
80
|
@modified_instance_var = Hash.new
|
81
|
+
@modified_global_var = Hash.new
|
81
82
|
@yield_node = []
|
82
83
|
|
83
84
|
# Options from user
|
@@ -87,6 +88,7 @@ LO | | | |
|
|
87
88
|
attr :top_node
|
88
89
|
attr_accessor :modified_local_var
|
89
90
|
attr_accessor :modified_instance_var
|
91
|
+
attr_accessor :modified_global_var
|
90
92
|
attr_accessor :yield_node
|
91
93
|
attr_accessor :options
|
92
94
|
|
@@ -269,7 +271,8 @@ LO | | | |
|
|
269
271
|
# @depth_reg = {}
|
270
272
|
@depth_reg = Hash.new(0)
|
271
273
|
@stack_content = []
|
272
|
-
@reg_content =
|
274
|
+
@reg_content = Hash.new(true)
|
275
|
+
@reg_history = Hash.new {|hash, key| hash[key] = []}
|
273
276
|
|
274
277
|
# Use only type inference compile mode
|
275
278
|
@slf = nil
|
@@ -386,17 +389,22 @@ LO | | | |
|
|
386
389
|
|
387
390
|
def reset_using_reg
|
388
391
|
@depth_reg = Hash.new(0)
|
392
|
+
# @depth_reg = {}
|
389
393
|
end
|
390
394
|
|
391
395
|
def start_using_reg_aux(reg)
|
392
396
|
if @depth_reg[reg] then
|
393
|
-
|
394
|
-
assembler.
|
395
|
-
|
397
|
+
if @reg_content[reg] then
|
398
|
+
assembler.with_retry do
|
399
|
+
assembler.push(reg)
|
400
|
+
cpustack_push(reg)
|
401
|
+
end
|
396
402
|
end
|
397
403
|
else
|
398
404
|
@depth_reg[reg] = 0
|
399
405
|
end
|
406
|
+
@reg_history[reg].push @reg_content[reg]
|
407
|
+
@reg_content[reg] = nil
|
400
408
|
@depth_reg[reg] += 1
|
401
409
|
end
|
402
410
|
|
@@ -426,13 +434,16 @@ LO | | | |
|
|
426
434
|
def end_using_reg_aux(reg)
|
427
435
|
if @depth_reg[reg] then
|
428
436
|
@depth_reg[reg] -= 1
|
437
|
+
@reg_content[reg] = @reg_history[reg].pop
|
429
438
|
else
|
430
439
|
raise "Not saved reg #{reg}"
|
431
440
|
end
|
432
441
|
if @depth_reg[reg] != -1 then
|
433
|
-
|
434
|
-
assembler.
|
435
|
-
|
442
|
+
if @reg_content[reg] then
|
443
|
+
assembler.with_retry do
|
444
|
+
assembler.pop(reg)
|
445
|
+
cpustack_pop(reg)
|
446
|
+
end
|
436
447
|
end
|
437
448
|
else
|
438
449
|
@depth_reg[reg] = nil
|
@@ -537,7 +548,10 @@ LO | | | |
|
|
537
548
|
asm.with_retry do
|
538
549
|
asm.mov(SPR, BPR)
|
539
550
|
asm.pop(BPR)
|
540
|
-
|
551
|
+
if @is_escape != :local_export and
|
552
|
+
@is_escape != :global_export then
|
553
|
+
asm.pop(THEPR)
|
554
|
+
end
|
541
555
|
asm.mov(SPR, BPR)
|
542
556
|
asm.pop(BPR)
|
543
557
|
end
|
@@ -584,7 +598,9 @@ LO | | | |
|
|
584
598
|
case siz
|
585
599
|
when Integer
|
586
600
|
add = lambda {
|
587
|
-
address_of("ytl_arena_alloca")
|
601
|
+
a = address_of("ytl_arena_alloca")
|
602
|
+
$symbol_table[a] = "ytl_arena_alloca"
|
603
|
+
a
|
588
604
|
}
|
589
605
|
alloca = OpVarMemAddress.new(add)
|
590
606
|
asm.with_retry do
|
@@ -605,7 +621,7 @@ LO | | | |
|
|
605
621
|
|
606
622
|
def gen_save_thepr(context)
|
607
623
|
casm = context.assembler
|
608
|
-
arenaaddr = context.top_node.
|
624
|
+
arenaaddr = context.top_node.get_local_arena_address
|
609
625
|
casm.with_retry do
|
610
626
|
casm.mov(TMPR, arenaaddr)
|
611
627
|
casm.mov(INDIRECT_TMPR, THEPR)
|
data/lib/ytljit/vm_cruby_obj.rb
CHANGED
@@ -4,6 +4,7 @@ module YTLJit
|
|
4
4
|
class CRubyInstanceVarRefNode<InstanceVarRefNode
|
5
5
|
include TypeListWithoutSignature
|
6
6
|
include CommonCodeGen
|
7
|
+
include UnboxedArrayUtil
|
7
8
|
|
8
9
|
def initialize(parent, name, mnode)
|
9
10
|
super
|
@@ -11,15 +12,41 @@ module YTLJit
|
|
11
12
|
end
|
12
13
|
|
13
14
|
def compile_main(context)
|
14
|
-
|
15
|
+
cursig = context.to_signature
|
16
|
+
asm = context.assembler
|
15
17
|
mivl = @class_top.end_nodes[0].modified_instance_var.keys
|
16
18
|
off = mivl.index(@name)
|
19
|
+
slfoff = @current_frame_info.offset_arg(2, BPR)
|
20
|
+
|
21
|
+
if !cursig[2].boxed then
|
22
|
+
context.start_using_reg(TMPR2)
|
23
|
+
asm.with_retry do
|
24
|
+
asm.mov(TMPR2, slfoff)
|
25
|
+
end
|
26
|
+
context = gen_ref_element(context, nil, off)
|
27
|
+
context.end_using_reg(TMPR2)
|
28
|
+
rtype = decide_type_once(cursig)
|
29
|
+
if rtype.ruby_type == Float and !rtype.boxed then
|
30
|
+
asm.with_retry do
|
31
|
+
asm.mov(XMM0, context.ret_reg)
|
32
|
+
end
|
33
|
+
context.ret_reg = XMM0
|
34
|
+
else
|
35
|
+
asm.with_retry do
|
36
|
+
asm.mov(RETR, context.ret_reg)
|
37
|
+
end
|
38
|
+
context.ret_reg = RETR
|
39
|
+
end
|
40
|
+
return context
|
41
|
+
end
|
42
|
+
|
17
43
|
addr = lambda {
|
18
|
-
address_of("ytl_ivar_get_boxing")
|
44
|
+
a = address_of("ytl_ivar_get_boxing")
|
45
|
+
$symbol_table[a] = "ytl_ivar_get_boxing"
|
46
|
+
a
|
19
47
|
}
|
20
48
|
ivarget = OpVarMemAddress.new(addr)
|
21
49
|
context.start_arg_reg
|
22
|
-
asm = context.assembler
|
23
50
|
asm.with_retry do
|
24
51
|
asm.mov(FUNC_ARG[0], slfoff)
|
25
52
|
asm.mov(FUNC_ARG[1], off)
|
@@ -32,7 +59,7 @@ module YTLJit
|
|
32
59
|
context.end_arg_reg
|
33
60
|
context.ret_reg = RETR
|
34
61
|
context.ret_node = self
|
35
|
-
decide_type_once(
|
62
|
+
decide_type_once(cursig)
|
36
63
|
if !@type.boxed then
|
37
64
|
context = @type.to_box.gen_unboxing(context)
|
38
65
|
end
|
@@ -43,6 +70,7 @@ module YTLJit
|
|
43
70
|
class CRubyInstanceVarAssignNode<InstanceVarAssignNode
|
44
71
|
include TypeListWithoutSignature
|
45
72
|
include CommonCodeGen
|
73
|
+
include UnboxedArrayUtil
|
46
74
|
|
47
75
|
def initialize(parent, name, mnode, val)
|
48
76
|
super
|
@@ -50,16 +78,30 @@ module YTLJit
|
|
50
78
|
end
|
51
79
|
|
52
80
|
def compile_main(context)
|
81
|
+
cursig = context.to_signature
|
53
82
|
slfoff = @current_frame_info.offset_arg(2, BPR)
|
54
83
|
mivl = @class_top.end_nodes[0].modified_instance_var.keys
|
55
84
|
off = mivl.index(@name)
|
85
|
+
rtype = @val.decide_type_once(cursig)
|
86
|
+
|
87
|
+
if !cursig[2].boxed then
|
88
|
+
asm = context.assembler
|
89
|
+
asm.with_retry do
|
90
|
+
asm.mov(TMPR2, slfoff)
|
91
|
+
end
|
92
|
+
context = gen_set_element(context, nil, off, @val)
|
93
|
+
return @body.compile(context)
|
94
|
+
end
|
95
|
+
|
56
96
|
addr = lambda {
|
57
|
-
address_of("ytl_ivar_set_boxing")
|
97
|
+
a = address_of("ytl_ivar_set_boxing")
|
98
|
+
$symbol_table[a] = "ytl_ivar_set_boxing"
|
99
|
+
a
|
58
100
|
}
|
59
101
|
ivarset = OpVarMemAddress.new(addr)
|
102
|
+
|
60
103
|
context = @val.compile(context)
|
61
|
-
|
62
|
-
if @val.is_escape != true then
|
104
|
+
if @val.is_escape != :global_export then
|
63
105
|
context = rtype.gen_boxing(context)
|
64
106
|
end
|
65
107
|
|
@@ -174,15 +174,42 @@ module YTLJit
|
|
174
174
|
end
|
175
175
|
end
|
176
176
|
|
177
|
+
module UnboxedObjectUtil
|
178
|
+
include AbsArch
|
179
|
+
def compile_object_unboxed(context, siz)
|
180
|
+
context = gen_alloca(context, siz)
|
181
|
+
asm = context.assembler
|
182
|
+
asm.with_retry do
|
183
|
+
(siz - 1).times do |i|
|
184
|
+
off = OpIndirect.new(THEPR, i * 8)
|
185
|
+
asm.mov(TMPR, OpImmidiateMachineWord.new(4))
|
186
|
+
asm.mov(off, TMPR)
|
187
|
+
end
|
188
|
+
end
|
189
|
+
context.ret_node = self
|
190
|
+
context
|
191
|
+
end
|
192
|
+
end
|
193
|
+
|
177
194
|
module UnboxedArrayUtil
|
178
195
|
include AbsArch
|
196
|
+
include UnboxedObjectUtil
|
197
|
+
|
198
|
+
def compile_array_unboxed(context)
|
199
|
+
siz = ((@element_node_list[1..-1].max_by {|a| a[3][0]})[3][0]) + 1
|
200
|
+
compile_object_unboxed(context, siz)
|
201
|
+
end
|
202
|
+
|
179
203
|
def gen_ref_element(context, slf, idx)
|
180
|
-
context.start_using_reg(TMPR2)
|
181
|
-
context = slf.compile(context)
|
182
204
|
asm = context.assembler
|
183
|
-
|
184
|
-
|
205
|
+
if slf then
|
206
|
+
context.start_using_reg(TMPR2)
|
207
|
+
context = slf.compile(context)
|
208
|
+
asm.with_retry do
|
209
|
+
asm.mov(TMPR2, context.ret_reg)
|
210
|
+
end
|
185
211
|
end
|
212
|
+
|
186
213
|
if idx.is_a?(Fixnum) then
|
187
214
|
idxval = idx
|
188
215
|
else
|
@@ -202,22 +229,22 @@ module YTLJit
|
|
202
229
|
asm.add(TMPR, TMPR) # * 4
|
203
230
|
asm.add(TMPR, TMPR) # * 8
|
204
231
|
end
|
205
|
-
asm.add(
|
206
|
-
asm.mov(RETR, INDIRECT_TMPR2)
|
232
|
+
asm.add(TMPR, TMPR2)
|
207
233
|
end
|
208
|
-
|
209
|
-
|
210
|
-
|
234
|
+
|
235
|
+
if slf then
|
236
|
+
context.end_using_reg(TMPR2)
|
237
|
+
end
|
238
|
+
context.ret_reg = INDIRECT_TMPR
|
211
239
|
context.ret_node = self
|
212
240
|
|
213
241
|
context
|
214
242
|
end
|
215
|
-
|
216
|
-
def gen_set_element(context, slf, idx, val)
|
217
|
-
context.start_using_reg(TMPR2)
|
218
243
|
|
244
|
+
def gen_set_element(context, slf, idx, val)
|
219
245
|
asm = context.assembler
|
220
246
|
if slf then
|
247
|
+
context.start_using_reg(TMPR2)
|
221
248
|
context = slf.compile(context)
|
222
249
|
asm.with_retry do
|
223
250
|
asm.mov(TMPR2, context.ret_reg)
|
@@ -245,15 +272,20 @@ module YTLJit
|
|
245
272
|
end
|
246
273
|
context = val.compile(context)
|
247
274
|
|
275
|
+
valreg = context.ret_reg
|
248
276
|
asm.with_retry do
|
249
|
-
if
|
250
|
-
asm.mov(RETR,
|
277
|
+
if !valreg.is_a?(OpRegistor) then
|
278
|
+
asm.mov(RETR, valreg)
|
279
|
+
valreg = RETR
|
251
280
|
end
|
252
|
-
|
281
|
+
|
282
|
+
asm.mov(INDIRECT_TMPR2, valreg)
|
253
283
|
end
|
254
|
-
|
255
|
-
|
256
|
-
|
284
|
+
|
285
|
+
if slf then
|
286
|
+
context.end_using_reg(TMPR2)
|
287
|
+
end
|
288
|
+
context.ret_reg = valreg
|
257
289
|
context.ret_node = self
|
258
290
|
context
|
259
291
|
end
|