ws2812 0.0.2
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- data/.gitignore +3 -0
- data/LICENSE.txt +339 -0
- data/README.md +41 -0
- data/Rakefile +39 -0
- data/examples/basic.rb +45 -0
- data/examples/binaryclock.rb +161 -0
- data/examples/digiclock.rb +167 -0
- data/examples/gamma-vs-direct.rb +31 -0
- data/examples/unicornhat-test.rb +47 -0
- data/ext/ws2812/COMPILING.txt +4 -0
- data/ext/ws2812/SOURCES.txt +2 -0
- data/ext/ws2812/board_info.c +143 -0
- data/ext/ws2812/board_info.h +6 -0
- data/ext/ws2812/clk.h +60 -0
- data/ext/ws2812/dma.c +79 -0
- data/ext/ws2812/dma.h +126 -0
- data/ext/ws2812/extconf.rb +24 -0
- data/ext/ws2812/gamma.h +20 -0
- data/ext/ws2812/gpio.h +108 -0
- data/ext/ws2812/lowlevel.i +48 -0
- data/ext/ws2812/lowlevel_wrap.c +3189 -0
- data/ext/ws2812/mailbox.c +311 -0
- data/ext/ws2812/mailbox.h +53 -0
- data/ext/ws2812/pwm.c +112 -0
- data/ext/ws2812/pwm.h +123 -0
- data/ext/ws2812/ws2811.c +685 -0
- data/ext/ws2812/ws2811.h +69 -0
- data/lib/ws2812.rb +20 -0
- data/lib/ws2812/basic.rb +195 -0
- data/lib/ws2812/color.rb +33 -0
- data/lib/ws2812/gamma_correction.rb +72 -0
- data/lib/ws2812/unicornhat.rb +209 -0
- metadata +114 -0
data/ext/ws2812/clk.h
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/*
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* clk.h
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*
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* Copyright (c) 2014 Jeremy Garff <jer @ jers.net>
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* 3. Neither the name of the owner nor the names of its contributors may be used to endorse
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* or promote products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef __CLK_H__
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#define __CLK_H__
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typedef struct {
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uint32_t ctl;
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#define CM_PWM_CTL_PASSWD (0x5a << 24)
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#define CM_PWM_CTL_MASH(val) ((val & 0x3) << 9)
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#define CM_PWM_CTL_FLIP (1 << 8)
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#define CM_PWM_CTL_BUSY (1 << 7)
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#define CM_PWM_CTL_KILL (1 << 5)
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#define CM_PWM_CTL_ENAB (1 << 4)
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#define CM_PWM_CTL_SRC_GND (0 << 0)
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#define CM_PWM_CTL_SRC_OSC (1 << 0)
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#define CM_PWM_CTL_SRC_TSTDBG0 (2 << 0)
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#define CM_PWM_CTL_SRC_TSTDBG1 (3 << 0)
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#define CM_PWM_CTL_SRC_PLLA (4 << 0)
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#define CM_PWM_CTL_SRC_PLLC (5 << 0)
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#define CM_PWM_CTL_SRC_PLLD (6 << 0)
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#define CM_PWM_CTL_SRC_HDMIAUX (7 << 0)
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uint32_t div;
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#define CM_PWM_DIV_PASSWD (0x5a << 24)
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#define CM_PWM_DIV_DIVI(val) ((val & 0xfff) << 12)
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#define CM_PWM_DIV_DIVF(val) ((val & 0xfff) << 0)
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} __attribute__ ((packed)) cm_pwm_t;
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#define CM_PWM_OFFSET (0x001010a0)
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#endif /* __CLK_H__ */
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data/ext/ws2812/dma.c
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/*
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* dma.c
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*
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* Copyright (c) 2014 Jeremy Garff <jer @ jers.net>
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* 3. Neither the name of the owner nor the names of its contributors may be used to endorse
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* or promote products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <sys/mman.h>
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#include "board_info.h"
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#include "dma.h"
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// DMA address mapping by DMA number index
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const static uint32_t dma_offset[] =
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{
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DMA0_OFFSET,
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DMA1_OFFSET,
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DMA2_OFFSET,
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DMA3_OFFSET,
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DMA4_OFFSET,
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DMA5_OFFSET,
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DMA6_OFFSET,
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DMA7_OFFSET,
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DMA8_OFFSET,
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DMA9_OFFSET,
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DMA10_OFFSET,
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DMA11_OFFSET,
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DMA12_OFFSET,
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DMA13_OFFSET,
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DMA14_OFFSET,
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DMA15_OFFSET,
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};
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uint32_t dmanum_to_phys(int dmanum)
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{
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int array_size = sizeof(dma_offset) / sizeof(dma_offset[0]);
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if (dmanum >= array_size)
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{
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return 0;
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}
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return dma_offset[dmanum] + board_info_peripheral_base_addr();
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}
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data/ext/ws2812/dma.h
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/*
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* dma.h
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*
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* Copyright (c) 2014 Jeremy Garff <jer @ jers.net>
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification, are permitted
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* provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* 3. Neither the name of the owner nor the names of its contributors may be used to endorse
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* or promote products derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef __DMA_H__
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#define __DMA_H__
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/*
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* DMA Control Block in Main Memory
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*
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* Note: Must start at a 256 byte aligned address.
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* Use corresponding register field definitions.
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*/
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typedef struct
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{
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uint32_t ti;
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uint32_t source_ad;
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uint32_t dest_ad;
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uint32_t txfr_len;
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uint32_t stride;
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uint32_t nextconbk;
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uint32_t resvd_0x18[2];
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} __attribute__((packed)) dma_cb_t;
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/*
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* DMA register set
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*/
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typedef struct
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{
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uint32_t cs;
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#define RPI_DMA_CS_RESET (1 << 31)
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#define RPI_DMA_CS_ABORT (1 << 30)
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#define RPI_DMA_CS_DISDEBUG (1 << 29)
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#define RPI_DMA_CS_WAIT_OUTSTANDING_WRITES (1 << 28)
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#define RPI_DMA_CS_PANIC_PRIORITY(val) ((val & 0xf) << 20)
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#define RPI_DMA_CS_PRIORITY(val) ((val & 0xf) << 16)
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#define RPI_DMA_CS_ERROR (1 << 8)
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#define RPI_DMA_CS_WAITING_OUTSTANDING_WRITES (1 << 6)
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#define RPI_DMA_CS_DREQ_STOPS_DMA (1 << 5)
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#define RPI_DMA_CS_PAUSED (1 << 4)
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#define RPI_DMA_CS_DREQ (1 << 3)
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#define RPI_DMA_CS_INT (1 << 2)
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#define RPI_DMA_CS_END (1 << 1)
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#define RPI_DMA_CS_ACTIVE (1 << 0)
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uint32_t conblk_ad;
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uint32_t ti;
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#define RPI_DMA_TI_NO_WIDE_BURSTS (1 << 26)
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#define RPI_DMA_TI_WAITS(val) ((val & 0x1f) << 21)
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#define RPI_DMA_TI_PERMAP(val) ((val & 0x1f) << 16)
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#define RPI_DMA_TI_BURST_LENGTH(val) ((val & 0xf) << 12)
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#define RPI_DMA_TI_SRC_IGNORE (1 << 11)
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#define RPI_DMA_TI_SRC_DREQ (1 << 10)
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#define RPI_DMA_TI_SRC_WIDTH (1 << 9)
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#define RPI_DMA_TI_SRC_INC (1 << 8)
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#define RPI_DMA_TI_DEST_IGNORE (1 << 7)
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#define RPI_DMA_TI_DEST_DREQ (1 << 6)
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#define RPI_DMA_TI_DEST_WIDTH (1 << 5)
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#define RPI_DMA_TI_DEST_INC (1 << 4)
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#define RPI_DMA_TI_WAIT_RESP (1 << 3)
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#define RPI_DMA_TI_TDMODE (1 << 1)
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#define RPI_DMA_TI_INTEN (1 << 0)
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uint32_t source_ad;
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uint32_t dest_ad;
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uint32_t txfr_len;
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#define RPI_DMA_TXFR_LEN_YLENGTH(val) ((val & 0xffff) << 16)
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#define RPI_DMA_TXFR_LEN_XLENGTH(val) ((val & 0xffff) << 0)
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uint32_t stride;
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#define RPI_DMA_STRIDE_D_STRIDE(val) ((val & 0xffff) << 16)
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#define RPI_DMA_STRIDE_S_STRIDE(val) ((val & 0xffff) << 0)
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uint32_t nextconbk;
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uint32_t debug;
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} __attribute__((packed)) dma_t;
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#define DMA0_OFFSET (0x00007000)
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#define DMA1_OFFSET (0x00007100)
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#define DMA2_OFFSET (0x00007200)
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#define DMA3_OFFSET (0x00007300)
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#define DMA4_OFFSET (0x00007400)
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#define DMA5_OFFSET (0x00007500)
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#define DMA6_OFFSET (0x00007600)
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#define DMA7_OFFSET (0x00007700)
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#define DMA8_OFFSET (0x00007800)
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#define DMA9_OFFSET (0x00007900)
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#define DMA10_OFFSET (0x00007a00)
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#define DMA11_OFFSET (0x00007b00)
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#define DMA12_OFFSET (0x00007c00)
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#define DMA13_OFFSET (0x00007d00)
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#define DMA14_OFFSET (0x00007e00)
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#define DMA15_OFFSET (0x00e05000)
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#define PAGE_SIZE (1 << 12)
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#define PAGE_MASK (~(PAGE_SIZE - 1))
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#define PAGE_OFFSET(page) (page & (PAGE_SIZE - 1))
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uint32_t dmanum_to_phys(int dmanum);
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#endif /* __DMA_H__ */
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#!/usr/bin/env ruby
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require 'mkmf'
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unless FileTest.exists?(File.dirname(__FILE__) + '/lowlevel_wrap.c')
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Dir.chdir(File.dirname(__FILE__)) do
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system *%w[swig2.0 -Wall -ruby -prefix ws2812:: -initname lowlevel lowlevel.i]
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fail "swig failed; perhaps aptitude install swig2.0" unless $?.exitstatus.zero?
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end
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end
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create_makefile 'ws2812/lowlevel'
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File.open('Makefile', 'at') do |mk|
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mk.puts <<EOF
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clean: clean-rpilowlevel
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distclean: distclean-rpilowlevel
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clean-rpilowlevel:
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rm -f Makefile
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distclean-rpilowlevel:
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rm -f *_wrap.c
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EOF
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end
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data/ext/ws2812/gamma.h
ADDED
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#ifndef GAMMA_H
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#define GAMMA_H
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const unsigned int ws281x_gamma[] = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2,
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2, 2, 2, 3, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5,
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6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 11, 11,
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11, 12, 12, 13, 13, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18,
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19, 19, 20, 21, 21, 22, 22, 23, 23, 24, 25, 25, 26, 27, 27, 28,
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29, 29, 30, 31, 31, 32, 33, 34, 34, 35, 36, 37, 37, 38, 39, 40,
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40, 41, 42, 43, 44, 45, 46, 46, 47, 48, 49, 50, 51, 52, 53, 54,
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55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70,
|
13
|
+
71, 72, 73, 74, 76, 77, 78, 79, 80, 81, 83, 84, 85, 86, 88, 89,
|
14
|
+
90, 91, 93, 94, 95, 96, 98, 99,100,102,103,104,106,107,109,110,
|
15
|
+
111,113,114,116,117,119,120,121,123,124,126,128,129,131,132,134,
|
16
|
+
135,137,138,140,142,143,145,146,148,150,151,153,155,157,158,160,
|
17
|
+
162,163,165,167,169,170,172,174,176,178,179,181,183,185,187,189,
|
18
|
+
191,193,194,196,198,200,202,204,206,208,210,212,214,216,218,220,
|
19
|
+
222,224,227,229,231,233,235,237,239,241,244,246,248,250,252,255};
|
20
|
+
#endif
|
data/ext/ws2812/gpio.h
ADDED
@@ -0,0 +1,108 @@
|
|
1
|
+
/*
|
2
|
+
* gpio.h
|
3
|
+
*
|
4
|
+
* Copyright (c) 2014 Jeremy Garff <jer @ jers.net>
|
5
|
+
*
|
6
|
+
* All rights reserved.
|
7
|
+
*
|
8
|
+
* Redistribution and use in source and binary forms, with or without modification, are permitted
|
9
|
+
* provided that the following conditions are met:
|
10
|
+
*
|
11
|
+
* 1. Redistributions of source code must retain the above copyright notice, this list of
|
12
|
+
* conditions and the following disclaimer.
|
13
|
+
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
|
14
|
+
* of conditions and the following disclaimer in the documentation and/or other materials
|
15
|
+
* provided with the distribution.
|
16
|
+
* 3. Neither the name of the owner nor the names of its contributors may be used to endorse
|
17
|
+
* or promote products derived from this software without specific prior written permission.
|
18
|
+
*
|
19
|
+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR
|
20
|
+
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
|
21
|
+
* FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE
|
22
|
+
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
23
|
+
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
24
|
+
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
25
|
+
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
26
|
+
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
27
|
+
*
|
28
|
+
*/
|
29
|
+
|
30
|
+
#ifndef __GPIO_H__
|
31
|
+
#define __GPIO_H__
|
32
|
+
|
33
|
+
|
34
|
+
typedef struct
|
35
|
+
{
|
36
|
+
uint32_t fsel[6]; // GPIO Function Select
|
37
|
+
uint32_t resvd_0x18;
|
38
|
+
uint32_t set[2]; // GPIO Pin Output Set
|
39
|
+
uint32_t resvd_0x24;
|
40
|
+
uint32_t clr[2]; // GPIO Pin Output Clear
|
41
|
+
uint32_t resvd_0x30;
|
42
|
+
uint32_t lev[2]; // GPIO Pin Level
|
43
|
+
uint32_t resvd_0x3c;
|
44
|
+
uint32_t eds[2]; // GPIO Pin Event Detect Status
|
45
|
+
uint32_t resvd_0x48;
|
46
|
+
uint32_t ren[2]; // GPIO Pin Rising Edge Detect Enable
|
47
|
+
uint32_t resvd_0x54;
|
48
|
+
uint32_t fen[2]; // GPIO Pin Falling Edge Detect Enable
|
49
|
+
uint32_t resvd_0x60;
|
50
|
+
uint32_t hen[2]; // GPIO Pin High Detect Enable
|
51
|
+
uint32_t resvd_0x6c;
|
52
|
+
uint32_t len[2]; // GPIO Pin Low Detect Enable
|
53
|
+
uint32_t resvd_0x78;
|
54
|
+
uint32_t aren[2]; // GPIO Pin Async Rising Edge Detect
|
55
|
+
uint32_t resvd_0x84;
|
56
|
+
uint32_t afen[2]; // GPIO Pin Async Falling Edge Detect
|
57
|
+
uint32_t resvd_0x90;
|
58
|
+
uint32_t pud; // GPIO Pin Pull up/down Enable
|
59
|
+
uint32_t pudclk[2]; // GPIO Pin Pull up/down Enable Clock
|
60
|
+
uint32_t resvd_0xa0[4];
|
61
|
+
uint32_t test;
|
62
|
+
} __attribute__((packed)) gpio_t;
|
63
|
+
|
64
|
+
|
65
|
+
#define GPIO_OFFSET (0x00200000)
|
66
|
+
|
67
|
+
|
68
|
+
static inline void gpio_function_set(volatile gpio_t *gpio, uint8_t pin, uint8_t function)
|
69
|
+
{
|
70
|
+
int regnum = pin / 10;
|
71
|
+
int offset = (pin % 10) * 3;
|
72
|
+
uint8_t funcmap[] = { 4, 5, 6, 7, 3, 2 }; // See datasheet for mapping
|
73
|
+
|
74
|
+
if (function > 5)
|
75
|
+
{
|
76
|
+
return;
|
77
|
+
}
|
78
|
+
|
79
|
+
gpio->fsel[regnum] &= ~(0x7 << offset);
|
80
|
+
gpio->fsel[regnum] |= ((funcmap[function]) << offset);
|
81
|
+
}
|
82
|
+
|
83
|
+
static inline void gpio_level_set(volatile gpio_t *gpio, uint8_t pin, uint8_t level)
|
84
|
+
{
|
85
|
+
int regnum = pin >> 5;
|
86
|
+
int offset = (pin & 0x1f);
|
87
|
+
|
88
|
+
if (level)
|
89
|
+
{
|
90
|
+
gpio->set[regnum] = (1 << offset);
|
91
|
+
}
|
92
|
+
else
|
93
|
+
{
|
94
|
+
gpio->clr[regnum] = (1 << offset);
|
95
|
+
}
|
96
|
+
}
|
97
|
+
|
98
|
+
static inline void gpio_output_set(volatile gpio_t *gpio, uint8_t pin, uint8_t output)
|
99
|
+
{
|
100
|
+
int regnum = pin / 10;
|
101
|
+
int offset = (pin % 10) * 3;
|
102
|
+
uint8_t function = output ? 1 : 0; // See datasheet for mapping
|
103
|
+
|
104
|
+
gpio->fsel[regnum] &= ~(0x7 << offset);
|
105
|
+
gpio->fsel[regnum] |= ((function & 0x7) << offset);
|
106
|
+
}
|
107
|
+
|
108
|
+
#endif /* __GPIO_H__ */
|
@@ -0,0 +1,48 @@
|
|
1
|
+
// SWIG interface file to define rpi_ws281x library python wrapper.
|
2
|
+
// Author: Tony DiCola (tony@tonydicola.com), Jeremy Garff (jer@jers.net)
|
3
|
+
// Modified by: Michal Jirku (box@wejn.org) for Ruby
|
4
|
+
|
5
|
+
// Define module name lowlevel.
|
6
|
+
%module lowlevel
|
7
|
+
|
8
|
+
// Include standard SWIG types & array support for support of uint32_t
|
9
|
+
// parameters and arrays.
|
10
|
+
%include "stdint.i"
|
11
|
+
%include "carrays.i"
|
12
|
+
|
13
|
+
// Declare functions which will be exported as anything in the ws2811.h header.
|
14
|
+
%{
|
15
|
+
#include "ws2811.h"
|
16
|
+
%}
|
17
|
+
|
18
|
+
// Process ws2811.h header and export all included functions.
|
19
|
+
%include "ws2811.h"
|
20
|
+
|
21
|
+
%inline %{
|
22
|
+
uint32_t ws2811_led_get(ws2811_channel_t *channel, int lednum)
|
23
|
+
{
|
24
|
+
if (lednum >= channel->count)
|
25
|
+
{
|
26
|
+
return -1;
|
27
|
+
}
|
28
|
+
|
29
|
+
return channel->leds[lednum];
|
30
|
+
}
|
31
|
+
|
32
|
+
int ws2811_led_set(ws2811_channel_t *channel, int lednum, uint32_t color)
|
33
|
+
{
|
34
|
+
if (lednum >= channel->count)
|
35
|
+
{
|
36
|
+
return -1;
|
37
|
+
}
|
38
|
+
|
39
|
+
channel->leds[lednum] = color;
|
40
|
+
|
41
|
+
return 0;
|
42
|
+
}
|
43
|
+
|
44
|
+
ws2811_channel_t *ws2811_channel_get(ws2811_t *ws, int channelnum)
|
45
|
+
{
|
46
|
+
return &ws->channel[channelnum];
|
47
|
+
}
|
48
|
+
%}
|