vertigo_vhdl 0.8.10 → 0.8.11

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA256:
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-  data.tar.gz: f190bce2287c4d40b69a191e5c34ae6bfaee628f3c19213ddec253d8c4fb6a0f
+  metadata.gz: 5f66142ff1aa2f02093dbc99c8cd22a78a44ae177d0ecaf41e1cc3289b505e80
+  data.tar.gz: 406108f6e1fc88d54cd96b38708772e7051788b8c9ab9417a15bef96326004e1
 SHA512:
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+  metadata.gz: 9c3f59eea1d1a2ca3ec6c22361bcd5eb54512b95a9b76e60465d6aa2749072d730fc0d79d28cfe0b2d11048f49a29f655d55aabc34cf6f0c8fcbd0c82b3f440c
+  data.tar.gz: a12214d7979e71a31172ce35fa67ac7ca3bbf69c4a3e8730acdeae20c451cb9344b3a2c1d567389db41ffa699a896db6244f8ec3fdd4f9d15600d9caf7ef857e

data/lib/vertigo/tb_generator.rb

@@ -13,15 +13,19 @@ module Vertigo
     end
 
     def generate_from ast
-      @ast=ast
-      entity_arch=find_entity_arch()
-      detecting_clk_and_reset(entity_arch)
-      vhdl_tb=gen_code()
-      @tb_name=@entity_name+"_tb"
-      tb_filename=@tb_name+".vhd"
-      File.open(tb_filename,'w'){|f| f.puts vhdl_tb}
-      puts "=> generated testbench : #{tb_filename}" unless options[:mute]
-      return tb_filename
+      begin
+        @ast=ast
+        entity_arch=find_entity_arch()
+        detecting_clk_and_reset(entity_arch)
+        vhdl_tb=gen_code()
+        @tb_name=@entity_name+"_tb"
+        tb_filename=@tb_name+".vhd"
+        File.open(tb_filename,'w'){|f| f.puts vhdl_tb}
+        puts "=> generated testbench : #{tb_filename}" unless options[:mute]
+        return tb_filename
+      rescue Exception => e
+        puts e.backtrace
+      end
     end
 
     def line n=80
@@ -113,7 +117,9 @@ module Vertigo
       code << line
       code << comment("Design Under Test")
       code << line
-      code << "dut : entity work.#{@entity_name}(#{@arch_name})"
+      str="dut : entity work.#{@entity_name}"
+      str+="(#{@arch_name})" if @arch_name
+      code << str
       code.indent=2
       code << "port map ("
       code.indent=4
@@ -164,13 +170,13 @@ module Vertigo
       puts "=> found entity '#{entity.name.str}'" unless options[:mute]
       @arch=ast.design_units.find{|du| du.is_a? Architecture}
       if @arch.nil?
-        puts msg="ERROR : no architecture found"
-        raise msg
+        puts msg="WARNING : no architecture found"
+      else
+        puts "=> found architecture '#{arch.name.str}'" unless options[:mute]
       end
 
-      puts "=> found architecture '#{arch.name.str}'" unless options[:mute]
       @entity_name=@entity.name.str
-      @arch_name=@arch.name.str
+      @arch_name=@arch.name.str if @arch
       [@entity,@arch]
     end
 
@@ -182,7 +188,18 @@ module Vertigo
       @rst = inputs.sort_by{|input| levenshtein_distance(input.name.str,"reset_n")}.first
       puts "\t-most probable clk   : #{@clk.name.str}" unless options[:mute]
       puts "\t-most probable reset : #{@rst.name.str}" unless options[:mute]
+
       @max_length_str=entity.ports.map{|port| port.name.str.size}.max
+
+      print "\t-validate [Y/n] ? "
+      answer=$stdin.gets.chomp
+      if answer=="n"
+        puts "ok, switching to 'clk' and 'reset_n'"
+        @reset_name="reset_n"
+        @clk_name="clk"
+        @excluded=[]
+        return
+      end
       @excluded=[@clk,@rst]
       @reset_name=@rst.name.str
       @clk_name=@clk.name.str

data/lib/vertigo/version.rb

@@ -1,3 +1,3 @@
 module Vertigo
-  VERSION="0.8.10"
+  VERSION="0.8.11"
 end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: vertigo_vhdl
 version: !ruby/object:Gem::Version
-  version: 0.8.10
+  version: 0.8.11
 platform: ruby
 authors:
 - Jean-Christophe Le Lann
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2021-09-07 00:00:00.000000000 Z
+date: 2021-11-02 00:00:00.000000000 Z
 dependencies: []
 description: A Ruby handwritten VHDL parser and utilities
 email: jean-christophe.le_lann@ensta-bretagne.fr