udb 0.1.3 → 0.1.4

data/.data/spec/std/isa/inst/Zicsr/csrrw.yaml

@@ -57,34 +57,3 @@ operation(): |
   # writes the value in X[xs1] to the CSR,
   # performing any WARL transformations first
   csr_sw_write(csr_handle, initial_value);
-
-# SPDX-SnippetBegin
-# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model <https://github.com/riscv/sail-riscv/blob/master/LICENCE>
-# SPDX-License-Identifier: BSD-2-Clause
-sail(): |
-  {
-    let rs1_val : xlenbits = if is_imm then zero_extend(rs1) else X(rs1);
-    let isWrite : bool = match op {
-      CSRRW  => true,
-      _      => if is_imm then unsigned(rs1_val) != 0 else unsigned(rs1) != 0
-    };
-    if not(check_CSR(csr, cur_privilege, isWrite))
-    then { handle_illegal(); RETIRE_FAIL }
-    else if not(ext_check_CSR(csr, cur_privilege, isWrite))
-    then { ext_check_CSR_fail(); RETIRE_FAIL }
-    else {
-      let csr_val = readCSR(csr); /* could have side-effects, so technically shouldn't perform for CSRW[I] with rd == 0 */
-      if isWrite then {
-        let new_val : xlenbits = match op {
-          CSRRW => rs1_val,
-          CSRRS => csr_val | rs1_val,
-          CSRRC => csr_val & ~(rs1_val)
-        };
-        writeCSR(csr, new_val)
-      };
-      X(rd) = csr_val;
-      RETIRE_SUCCESS
-    }
-  }
-
-# SPDX-SnippetEnd

data/.data/spec/std/isa/inst/Zicsr/csrrwi.yaml

@@ -55,34 +55,3 @@ operation(): |
   # writes the zero-extended immediate to the CSR,
   # performing any WARL transformations first
   csr_sw_write(csr_handle, {{MXLEN-5{1'b0}}, imm});
-
-# SPDX-SnippetBegin
-# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model <https://github.com/riscv/sail-riscv/blob/master/LICENCE>
-# SPDX-License-Identifier: BSD-2-Clause
-sail(): |
-  {
-    let rs1_val : xlenbits = if is_imm then zero_extend(rs1) else X(rs1);
-    let isWrite : bool = match op {
-      CSRRW  => true,
-      _      => if is_imm then unsigned(rs1_val) != 0 else unsigned(rs1) != 0
-    };
-    if not(check_CSR(csr, cur_privilege, isWrite))
-    then { handle_illegal(); RETIRE_FAIL }
-    else if not(ext_check_CSR(csr, cur_privilege, isWrite))
-    then { ext_check_CSR_fail(); RETIRE_FAIL }
-    else {
-      let csr_val = readCSR(csr); /* could have side-effects, so technically shouldn't perform for CSRW[I] with rd == 0 */
-      if isWrite then {
-        let new_val : xlenbits = match op {
-          CSRRW => rs1_val,
-          CSRRS => csr_val | rs1_val,
-          CSRRC => csr_val & ~(rs1_val)
-        };
-        writeCSR(csr, new_val)
-      };
-      X(rd) = csr_val;
-      RETIRE_SUCCESS
-    }
-  }
-
-# SPDX-SnippetEnd

data/.data/spec/std/isa/inst/Zifencei/fence.i.yaml

@@ -55,11 +55,3 @@ access:
   vu: always
 operation(): |
   ifence();
-
-# SPDX-SnippetBegin
-# SPDX-FileCopyrightText: 2017-2025 Contributors to the RISCV Sail Model <https://github.com/riscv/sail-riscv/blob/master/LICENCE>
-# SPDX-License-Identifier: BSD-2-Clause
-sail(): |
-  { /* __barrier(Barrier_RISCV_i); */ RETIRE_SUCCESS }
-
-# SPDX-SnippetEnd

data/.data/spec/std/isa/isa/globals.isa

@@ -1281,7 +1281,7 @@ function access_check {
     }
 
     # check PMP
-    if (implemented?(ExtensionName::Smpmp)) {
+    if (NUM_PMP_ENTRIES > 0) {
       if (!pmp_check(paddr[PHYS_ADDR_WIDTH-1:0], access_size, type)) {
         raise(fault_type, from_mode, vaddr);
       }

data/.data/spec/std/isa/manual_version/isa/20240411/isa_20240411.yaml

@@ -207,8 +207,6 @@ volumes:
       - { name: Smcdeleg, version: "1.0.0" }
       - { name: S, version: "1.12.0" }
       - { name: Sm, version: "1.12.0" }
-      - { name: Smhpm, version: "1.12.0" }
-      - { name: Smpmp, version: "1.12.0" }
       - { name: Sv32, version: "1.12.0" }
       - { name: Sv39, version: "1.12.0" }
       - { name: Sv48, version: "1.12.0" }

data/.data/spec/std/isa/param/HPM_COUNTER_EN.yaml

@@ -11,8 +11,8 @@ description: |
   There is one entry for each hpmcounter.
 
   The first three entries *must* be false (as they correspond to CY, IR, TM in, _e.g._ `mhmpcountinhibit`)
-  Index 3 in HPM_COUNTER_EN corresponds to hpmcounter3.
-  Index 31 in HPM_COUNTER_EN corresponds to hpmcounter31.
+  Index 3 in HPM_COUNTER_EN corresponds to mhpmcounter3.
+  Index 31 in HPM_COUNTER_EN corresponds to mhpmcounter31.
 long_name: TODO
 schema:
   type: array
@@ -26,4 +26,4 @@ schema:
   minItems: 32
 definedBy:
   extension:
-    name: Smhpm
+    name: Sm

data/.data/spec/std/isa/param/HPM_EVENTS.yaml

@@ -6,9 +6,7 @@
 $schema: param_schema.json#
 kind: parameter
 name: HPM_EVENTS
-description: "List of defined event numbers that can be written into hpmeventN
-
-  "
+description: List of defined event numbers that can be written into mhpmeventN
 long_name: TODO
 schema:
   type: array
@@ -19,5 +17,98 @@ schema:
   minItems: 0
   maxItems: 18446744073709551616 # 2**64
 definedBy:
-  extension:
-    name: Smhpm
+  allOf:
+    - extension:
+        name: Sm
+    - param:
+        anyOf:
+          - name: HPM_COUNTER_EN
+            index: 3
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 4
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 4
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 5
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 6
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 7
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 8
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 9
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 10
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 11
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 12
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 13
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 14
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 15
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 16
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 17
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 18
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 19
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 20
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 21
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 22
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 23
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 24
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 25
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 26
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 27
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 28
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 29
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 30
+            equal: true
+          - name: HPM_COUNTER_EN
+            index: 31
+            equal: true

data/.data/spec/std/isa/param/MCOUNTENABLE_EN.yaml

@@ -24,9 +24,9 @@ schema:
   minItems: 32
 definedBy:
   extension:
-    name: U
+    name: Sm
 requirements:
   idl(): |
     for (U32 i=3; i < 32; i++) {
-      MCOUNTENABLE_EN[i] -> !implemented?(ExtensionName::Smhpm) || HPM_COUNTER_EN[i];
+      MCOUNTENABLE_EN[i] -> HPM_COUNTER_EN[i];
     }

data/.data/spec/std/isa/param/NUM_PMP_ENTRIES.yaml

@@ -39,4 +39,4 @@ schema:
   maximum: 64
 definedBy:
   extension:
-    name: Smpmp
+    name: Sm

data/.data/spec/std/isa/param/PMP_GRANULARITY.yaml

@@ -22,4 +22,4 @@ schema:
   maximum: 66
 definedBy:
   extension:
-    name: Smpmp
+    name: Sm

data/.data/spec/std/isa/param/SCOUNTENABLE_EN.yaml

@@ -29,7 +29,7 @@ requirements:
     }
     for (U32 i = 3; i < 32; i++) {
       !implemented?(ExtensionName::Zihpm) -> !SCOUNTENABLE_EN[i];
-      (implemented?(ExtensionName::Smhpm) && !HPM_COUNTER_EN[i]) -> !SCOUNTENABLE_EN[i];
+      (!HPM_COUNTER_EN[i]) -> !SCOUNTENABLE_EN[i];
     }
   reason: |
     Counters 0-2 are defined by Zicntr
@@ -39,8 +39,4 @@ requirements:
     When mhpmcounter[i] does not exist, it cannot be enabled.
 definedBy:
   extension:
-    allOf:
-      - name: S
-      - anyOf:
-          - name: Zicntr
-          - name: Zihpm
+    name: Sm

data/.data/spec/std/isa/proc_cert_model/MC200-32.yaml

@@ -30,9 +30,9 @@ introduction: |
   It supports either a 32-bit (MC200-32) or 64-bit (MC200-64) base ISA.
   The MC200 adds the following mandatory extensions to the MC100:
 
-  * M extension (mandatory)
+  * M extension
   * U extension (User-mode privilege level)
-  * Smpmp extension (M-mode PMP)
+  * Zihpm extension (hardware performance counters)
   * B (Bitfield) extension
   * Zce extension (additional 16-bit instructions suitable for microcontrollers)
   * CLIC extension (if/when ratified)
@@ -56,5 +56,5 @@ extensions:
     presence: mandatory
   U:
     presence: mandatory
-  Smpmp:
+  Zihpm:
     presence: mandatory

data/.data/spec/std/isa/profile/RVB23M64.yaml

@@ -28,9 +28,6 @@ extensions:
   Sm:
     version: "~> 1.13"
     presence: mandatory
-  Smpmp:
-    version: "~> 1.13"
-    presence: mandatory
 
   #########################################################################
   # OPTIONAL LOCALIZED extensions in RVB23M64

data/lib/udb/cli.rb

@@ -10,6 +10,7 @@ require "pastel"
 require "thor"
 require "terminal-table"
 
+require_relative "global_opts"
 require_relative "resolver"
 
 class SubCommandBase < Thor
@@ -81,9 +82,12 @@ module Udb
       method_option :custom, type: :string, desc: "Path to custom specification directory, if needed", default: Udb.default_custom_isa_path.to_s
       method_option :config_dir, type: :string, desc: "Path to directory with config files", default: Udb.default_cfgs_path.to_s
       method_option :gen, type: :string, desc: "Path to folder used for generation", default: Udb.default_gen_path.to_s
+      method_option :z3parallel, type: :boolean, desc: "Use parallel.enable for Z3", default: true
       def cfg(name_or_path)
         raise ArgumentError, "Spec directory does not exist: #{options[:std]}" unless File.directory?(options[:std])
 
+        Udb.global_options.parallel_z3 = options[:z3parallel]
+
         cfg_file =
           if File.file?(name_or_path)
             Pathname.new(name_or_path)

data/lib/udb/global_opts.rb

@@ -0,0 +1,18 @@
+# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+# SPDX-License-Identifier: BSD-3-Clause-Clear
+
+# typed: true
+# frozen_string_literal: true
+
+require "sorbet-runtime"
+
+module Udb
+  class GlobalOptions < T::Struct
+    # when true, set Z3's parallel.enable param to true
+    prop :parallel_z3, T::Boolean, default: true
+  end
+
+  def self.global_options
+    @global_options ||= GlobalOptions.new
+  end
+end

data/lib/udb/obj/extension.rb

@@ -664,6 +664,9 @@ module Udb
     sig { returns(T.nilable(String)) }
     def ratification_date = @data["ratification_date"]
 
+    sig { returns(T.nilable(String)) }
+    def release_date = @data["release_date"]
+
     sig { returns(T.nilable(T::Array[String])) }
     def changes = @data["changes"].nil? ? [] : T.cast(@data.fetch("changes"), T::Array[String])
 

data/lib/udb/version.rb

@@ -5,5 +5,5 @@
 # frozen_string_literal: true
 
 module Udb
-  def self.version = "0.1.3"
+  def self.version = "0.1.4"
 end

data/lib/udb/yaml/yaml_resolver.rb

@@ -355,7 +355,7 @@ module Udb
         end
 
         if @compile_idl
-          idl_keys = obj.keys.select { |k| k.end_with?(")") }.reject { |k| k == "sail()" }
+          idl_keys = obj.keys.select { |k| k.end_with?(")") }
           idl_keys.each do |key|
             idl_source = obj[key]
 
@@ -677,7 +677,7 @@ module Udb
             key_text = key_node.value
 
             # Check if this is an IDL function key
-            if key_text.is_a?(String) && key_text.end_with?(")") && key_text != "sail()"
+            if key_text.is_a?(String) && key_text.end_with?(")")
               # Validate the value node
               if value_node.is_a?(Psych::Nodes::Scalar)
                 # Check if it's a multiline plain scalar
@@ -735,7 +735,7 @@ module Udb
         when Psych::Nodes::Scalar
           return unless keys.any?
 
-          is_idl_key = keys.last.is_a?(String) && T.must(keys.last).end_with?(")") && keys.last != "sail()"
+          is_idl_key = keys.last.is_a?(String) && T.must(keys.last).end_with?(")")
           marked_offset = cumulative_offsets.fetch(node.start_line) + node.start_column
 
           if is_idl_key

data/lib/udb/z3.rb

@@ -14,6 +14,8 @@
 require "forwardable"
 require "sorbet-runtime"
 require "udb/version_spec"
+
+require_relative "global_opts"
 require_relative "z3_loader"
 
 # Ensure Z3 library is available before requiring the z3 gem
@@ -1057,9 +1059,48 @@ module Udb
     sig { returns(Z3::Solver) }
     attr_reader :solver
 
+    @parallel_enabled = T.let(nil, T.nilable(T::Boolean))
+
+    class << self
+      extend T::Sig
+
+      sig { returns(T.nilable(T::Boolean)) }
+      def parallel_enabled
+        @parallel_enabled
+      end
+
+      sig { params(value: T.nilable(T::Boolean)).void }
+      def parallel_enabled=(value)
+        @parallel_enabled = value
+      end
+
+      sig { params(desired: T::Boolean).void }
+      def configure_parallelization(desired)
+        previous = parallel_enabled
+
+        if !previous.nil? && previous != desired
+          if desired
+            Udb.logger.warn "Z3 parallelization was previously disabled, but is now being enabled"
+          else
+            Udb.logger.warn "Z3 parallelization was previously enabled, but is now being disabled"
+          end
+        end
+
+        Z3.set_param("parallel.enable", desired ? "true" : "false")
+        self.parallel_enabled = desired
+      end
+    end
+
     sig { void }
     def initialize
+      if Udb.global_options.parallel_z3
+        Z3Solver.configure_parallelization(true)
+      else
+        Z3Solver.configure_parallelization(false)
+      end
+
       @solver = T.let(Z3::Solver.new, Z3::Solver)
+
       # Stacks for incremental solving with push/pop
       @ext_vers = T.let([{}], T::Array[T::Hash[String, Z3ExtensionVersion]])
       @ext_reqs = T.let([{}], T::Array[T::Hash[String, Z3ExtensionRequirement]])

metadata

@@ -1,7 +1,7 @@
 --- !ruby/object:Gem::Specification
 name: udb
 version: !ruby/object:Gem::Version
-  version: 0.1.3
+  version: 0.1.4
 platform: ruby
 authors:
 - Derek Hower
@@ -9,7 +9,7 @@ authors:
 autorequire:
 bindir: bin
 cert_chain: []
-date: 2026-03-22 00:00:00.000000000 Z
+date: 2026-03-26 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: activesupport
@@ -1151,6 +1151,7 @@ files:
 - ".data/spec/std/isa/csr/sie.yaml"
 - ".data/spec/std/isa/csr/sip.yaml"
 - ".data/spec/std/isa/csr/sscratch.yaml"
+- ".data/spec/std/isa/csr/ssp.yaml"
 - ".data/spec/std/isa/csr/sstateen0.yaml"
 - ".data/spec/std/isa/csr/sstateen1.yaml"
 - ".data/spec/std/isa/csr/sstateen2.yaml"
@@ -1218,10 +1219,8 @@ files:
 - ".data/spec/std/isa/ext/Smctr.yaml"
 - ".data/spec/std/isa/ext/Smdbltrp.yaml"
 - ".data/spec/std/isa/ext/Smepmp.yaml"
-- ".data/spec/std/isa/ext/Smhpm.yaml"
 - ".data/spec/std/isa/ext/Smmpm.yaml"
 - ".data/spec/std/isa/ext/Smnpm.yaml"
-- ".data/spec/std/isa/ext/Smpmp.yaml"
 - ".data/spec/std/isa/ext/Smrnmi.yaml"
 - ".data/spec/std/isa/ext/Smstateen.yaml"
 - ".data/spec/std/isa/ext/Ssaia.yaml"
@@ -3038,6 +3037,7 @@ files:
 - lib/udb/eqn.rb
 - lib/udb/eqn_parser.rb
 - lib/udb/external_documentation_renderer.rb
+- lib/udb/global_opts.rb
 - lib/udb/idl/condition_to_udb.rb
 - lib/udb/log.rb
 - lib/udb/logic.rb

data/.data/spec/std/isa/ext/Smhpm.yaml

@@ -1,29 +0,0 @@
-# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
-# SPDX-License-Identifier: BSD-3-Clause-Clear
-
-# yaml-language-server: $schema=../../../schemas/ext_schema.json
-
-$schema: "ext_schema.json#"
-kind: extension
-name: Smhpm
-long_name: M-mode programmable hardware performance counters
-description: M-mode programmable hardware performance counters
-type: privileged
-versions:
-  - version: "1.11.0"
-    state: ratified
-    ratification_date: 2019-12
-    changes:
-      - Defined the `mcountinhibit` CSR, which stops performance counters from
-        incrementing to reduce energy consumption.
-  - version: "1.12.0"
-    state: ratified
-    ratification_date: 2021-12
-    changes:
-      - PMP changes require an SFENCE.VMA on any hart that implements
-        page-based virtual memory, even if VM is not currently enabled.
-      - PMP reset values are now platform-defined.
-      - An additional 48 optional PMP registers have been defined.
-  - version: "1.13.0"
-    state: frozen
-    ratification_date: 2023-12

data/.data/spec/std/isa/ext/Smpmp.yaml

@@ -1,42 +0,0 @@
-# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
-# SPDX-License-Identifier: BSD-3-Clause-Clear
-
-# yaml-language-server: $schema=../../../schemas/ext_schema.json
-
-$schema: "ext_schema.json#"
-kind: extension
-name: Smpmp
-type: privileged
-long_name: Physical Memory Protection
-versions:
-  - version: "1.11.0"
-    state: ratified
-    ratification_date: 2019-12
-    changes:
-      - Made the unused `pmpaddr` and `pmpcfg` fields *WARL*, rather than *WIRI*.
-      - Specified semantics for PMP regions coarser than four bytes.
-  - version: "1.12.0"
-    state: ratified
-    ratification_date: 2021-12
-    changes:
-      - PMP changes require an SFENCE.VMA on any hart that implements
-        page-based virtual memory, even if VM is not currently enabled.
-      - PMP reset values are now platform-defined.
-      - An additional 48 optional PMP registers have been defined.
-  - version: "1.13.0"
-    state: frozen
-    ratification_date: 2023-12
-description: |
-  To support secure processing and contain faults, it is desirable to limit the physical addresses
-  accessible by software running on a hart. The optional PMP (Physical Memory Protection) unit
-  provides per-hart machine-mode control registers to allow physical memory access privileges (read,
-  write, execute) to be specified for each physical memory region. The PMP values are checked in
-  parallel with the PMA checks.
-
-  [NOTE]
-  --
-  This is a placeholder extension name defined by the `riscv-unified-db` and isn't considered an extension in
-  the Privileged ISA manual. This was chosen as an extension rather than a M-mode parameter since the
-  PMP has no visible ISA features (such as read-only-0 CSRs) if not present in an implementation.
-  Making it an extension in the database prevents having the PMP CSRs show up in implementations that don't have a PMP.
-  --