ruby-vpi 11.1.0 → 11.1.1
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- data/Rakefile +8 -37
- data/bin/generate_test_tpl/bench.v +1 -1
- data/doc/{src/LICENSE → LICENSE} +0 -0
- data/doc/Rakefile +39 -14
- data/doc/common.css +144 -0
- data/doc/common.tpl +49 -0
- data/doc/figures/figures.dia +1589 -0
- data/doc/history.erb +18 -0
- data/doc/history.html +1726 -0
- data/doc/history.rb +14 -0
- data/doc/history.yml +686 -0
- data/doc/images/{COPYING → LICENSE} +0 -0
- data/doc/intro.inc +48 -0
- data/doc/lib/doc_format.rb +62 -0
- data/doc/lib/doc_proxy.rb +160 -0
- data/doc/lib/erb_content.rb +67 -0
- data/doc/lib/erb_proxy.rb +48 -0
- data/doc/manual.erb +768 -0
- data/doc/manual.html +2107 -0
- data/doc/manual.rb +5 -0
- data/{MEMO → doc/memo.erb} +0 -0
- data/{memo.part.html → doc/memo.html} +38 -5
- data/doc/readme.erb +36 -0
- data/doc/readme.html +171 -0
- data/index.html +1 -0
- data/lib/ruby-vpi/float.rb +52 -0
- data/lib/ruby-vpi/rspec.rb +6 -1
- data/lib/ruby-vpi/verilog_parser.rb +4 -5
- data/ref/c/annotated.html +1 -6
- data/ref/c/common_8h.html +1 -1
- data/ref/c/files.html +1 -3
- data/ref/c/functions.html +24 -44
- data/ref/c/functions_vars.html +24 -44
- data/ref/c/globals.html +5 -211
- data/ref/c/globals_0x63.html +32 -49
- data/ref/c/globals_0x65.html +3 -10
- data/ref/c/globals_0x66.html +3 -20
- data/ref/c/globals_0x70.html +19 -26
- data/ref/c/globals_0x72.html +4 -15
- data/ref/c/globals_0x73.html +13 -199
- data/ref/c/globals_0x74.html +2 -9
- data/ref/c/globals_0x76.html +415 -426
- data/ref/c/globals_0x78.html +3 -10
- data/ref/c/globals_defs.html +30 -35
- data/ref/c/globals_defs_0x65.html +2 -7
- data/ref/c/globals_defs_0x70.html +3 -8
- data/ref/c/globals_defs_0x76.html +413 -420
- data/ref/c/globals_defs_0x78.html +2 -7
- data/ref/c/globals_enum.html +1 -1
- data/ref/c/globals_eval.html +1 -1
- data/ref/c/globals_func.html +14 -173
- data/ref/c/globals_type.html +26 -29
- data/ref/c/globals_vars.html +4 -88
- data/ref/c/index.html +1 -1
- data/ref/c/relay_8c.html +1 -1
- data/ref/c/relay_8h.html +1 -1
- data/ref/c/structrelay____RubyOptions____def.html +1 -1
- data/ref/c/structt__cb__data.html +6 -23
- data/ref/c/structt__vpi__delay.html +3 -20
- data/ref/c/structt__vpi__error__info.html +3 -71
- data/ref/c/structt__vpi__strengthval.html +3 -3
- data/ref/c/structt__vpi__systf__data.html +12 -46
- data/ref/c/structt__vpi__time.html +3 -3
- data/ref/c/structt__vpi__value.html +3 -113
- data/ref/c/structt__vpi__vecval.html +3 -3
- data/ref/c/structt__vpi__vlog__info.html +3 -54
- data/ref/c/swig_8c.html +2 -2
- data/ref/c/swig_8h.html +1 -1
- data/ref/c/verilog_8h.html +1 -1
- data/ref/c/vlog_8c.html +1 -1
- data/ref/c/vlog_8h.html +1 -1
- data/ref/c/vpi__user_8h.html +16 -16
- data/ref/ruby/classes/ERB.html +5 -5
- data/ref/ruby/classes/ERB.src/{M000034.html → M000036.html} +0 -0
- data/ref/ruby/classes/FileUtils.html +10 -10
- data/ref/ruby/classes/FileUtils.src/{M000081.html → M000083.html} +0 -0
- data/ref/ruby/classes/FileUtils.src/{M000082.html → M000084.html} +0 -0
- data/ref/ruby/classes/Float.html +140 -0
- data/ref/ruby/classes/Float.src/M000031.html +19 -0
- data/ref/ruby/classes/RDoc.html +5 -5
- data/ref/ruby/classes/RDoc.src/{M000095.html → M000097.html} +0 -0
- data/ref/ruby/classes/RubyVpi.html +10 -10
- data/ref/ruby/classes/RubyVpi.src/{M000083.html → M000085.html} +0 -0
- data/ref/ruby/classes/RubyVpi.src/{M000084.html → M000086.html} +0 -0
- data/ref/ruby/classes/String.html +33 -10
- data/ref/ruby/classes/String.src/M000033.html +28 -5
- data/ref/ruby/classes/String.src/M000034.html +18 -0
- data/ref/ruby/classes/String.src/M000035.html +36 -0
- data/ref/ruby/classes/Template.html +5 -5
- data/ref/ruby/classes/Template.src/{M000031.html → M000032.html} +0 -0
- data/ref/ruby/classes/VerilogParser/Module.src/M000006.html +9 -8
- data/ref/ruby/classes/VerilogParser/Module/Parameter.src/M000011.html +5 -7
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000007.html +7 -7
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000008.html +4 -4
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000009.html +4 -4
- data/ref/ruby/classes/VerilogParser/Module/Port.src/M000010.html +4 -4
- data/ref/ruby/classes/Vpi/Handle.html +46 -46
- data/ref/ruby/classes/Vpi/Handle.src/M000087.html +5 -9
- data/ref/ruby/classes/Vpi/Handle.src/M000088.html +5 -31
- data/ref/ruby/classes/Vpi/Handle.src/M000089.html +9 -74
- data/ref/ruby/classes/Vpi/Handle.src/M000090.html +31 -17
- data/ref/ruby/classes/Vpi/Handle.src/M000091.html +74 -11
- data/ref/ruby/classes/Vpi/Handle.src/M000092.html +30 -0
- data/ref/ruby/classes/Vpi/Handle.src/M000093.html +11 -55
- data/ref/ruby/classes/Vpi/Handle.src/M000095.html +68 -0
- data/ref/ruby/classes/Vpi/Handle/Property.html +5 -5
- data/ref/ruby/classes/Vpi/Handle/Property.src/{M000094.html → M000096.html} +0 -0
- data/ref/ruby/classes/XX/Document.html +45 -45
- data/ref/ruby/classes/XX/Document.src/M000074.html +9 -7
- data/ref/ruby/classes/XX/Document.src/M000075.html +7 -7
- data/ref/ruby/classes/XX/Document.src/M000076.html +7 -9
- data/ref/ruby/classes/XX/Document.src/M000077.html +7 -8
- data/ref/ruby/classes/XX/Document.src/M000078.html +9 -8
- data/ref/ruby/classes/XX/Document.src/M000079.html +8 -21
- data/ref/ruby/classes/XX/Document.src/M000080.html +8 -85
- data/ref/ruby/classes/XX/Document.src/M000081.html +34 -0
- data/ref/ruby/classes/XX/Document.src/M000082.html +98 -0
- data/ref/ruby/classes/XX/HTML4.html +5 -5
- data/ref/ruby/classes/XX/HTML4.src/{M000036.html → M000038.html} +0 -0
- data/ref/ruby/classes/XX/HTML4/Strict.html +5 -5
- data/ref/ruby/classes/XX/HTML4/Strict.src/{M000038.html → M000040.html} +0 -0
- data/ref/ruby/classes/XX/HTML4/Transitional.html +5 -5
- data/ref/ruby/classes/XX/HTML4/Transitional.src/{M000037.html → M000039.html} +0 -0
- data/ref/ruby/classes/XX/Markup.html +5 -5
- data/ref/ruby/classes/XX/Markup.src/{M000043.html → M000045.html} +0 -0
- data/ref/ruby/classes/XX/Markup/ClassMethods.html +40 -40
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000046.html +9 -12
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000047.html +7 -7
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000048.html +12 -14
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000049.html +7 -7
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000050.html +14 -14
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000051.html +7 -9
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000052.html +27 -0
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000053.html +22 -0
- data/ref/ruby/classes/XX/Markup/InstanceMethods.html +100 -100
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000054.html +43 -18
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000055.html +20 -35
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000056.html +18 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000057.html +35 -18
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000058.html +7 -19
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000059.html +18 -19
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000060.html +19 -15
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000061.html +19 -10
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000062.html +15 -13
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000063.html +10 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000064.html +13 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000065.html +7 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000066.html +7 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000067.html +7 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000068.html +7 -8
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000069.html +7 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000070.html +8 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000071.html +7 -7
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000072.html +20 -0
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000073.html +20 -0
- data/ref/ruby/classes/XX/XHTML.html +5 -5
- data/ref/ruby/classes/XX/XHTML.src/{M000039.html → M000041.html} +0 -0
- data/ref/ruby/classes/XX/XHTML/Strict.html +5 -5
- data/ref/ruby/classes/XX/XHTML/Strict.src/{M000041.html → M000043.html} +0 -0
- data/ref/ruby/classes/XX/XHTML/Transitional.html +5 -5
- data/ref/ruby/classes/XX/XHTML/Transitional.src/{M000040.html → M000042.html} +0 -0
- data/ref/ruby/classes/XX/XML.html +5 -5
- data/ref/ruby/classes/XX/XML.src/{M000035.html → M000037.html} +0 -0
- data/ref/ruby/classes/XX/XMLish.html +5 -5
- data/ref/ruby/classes/XX/XMLish.src/{M000042.html → M000044.html} +0 -0
- data/ref/ruby/created.rid +1 -1
- data/ref/ruby/files/lib/ruby-vpi/float_rb.html +101 -0
- data/ref/ruby/files/lib/ruby-vpi/rspec_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/runner_rb.html +1 -1
- data/ref/ruby/files/lib/ruby-vpi/verilog_parser_rb.html +1 -1
- data/ref/ruby/fr_class_index.html +1 -0
- data/ref/ruby/fr_file_index.html +1 -0
- data/ref/ruby/fr_method_index.html +69 -67
- data/samp/counter/counter.v +4 -4
- data/samp/counter/counter_rspec_spec.rb +4 -8
- data/samp/counter/counter_xunit_spec.rb +4 -8
- metadata +112 -196
- data/HEADER +0 -97
- data/HISTORY +0 -687
- data/README +0 -23
- data/doc/background.html +0 -3
- data/doc/background.methodology.html +0 -3
- data/doc/background.organization.html +0 -10
- data/doc/background.running-tests.html +0 -3
- data/doc/background.terminology.html +0 -3
- data/doc/gfdl-0.html +0 -18
- data/doc/gfdl-1.html +0 -70
- data/doc/gfdl-10.html +0 -15
- data/doc/gfdl-2.html +0 -13
- data/doc/gfdl-3.html +0 -31
- data/doc/gfdl-4.html +0 -75
- data/doc/gfdl-5.html +0 -20
- data/doc/gfdl-6.html +0 -12
- data/doc/gfdl-7.html +0 -16
- data/doc/gfdl-8.html +0 -17
- data/doc/gfdl-9.html +0 -9
- data/doc/gfdl-addendum.html +0 -25
- data/doc/gfdl.html +0 -11
- data/doc/glossary.html +0 -3
- data/doc/hacking.html +0 -3
- data/doc/hacking.release-packages.html +0 -7
- data/doc/images/ChangeLog +0 -27
- data/doc/images/blank.png +0 -0
- data/doc/images/callouts/1.png +0 -0
- data/doc/images/callouts/10.png +0 -0
- data/doc/images/callouts/11.png +0 -0
- data/doc/images/callouts/12.png +0 -0
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- data/doc/images/callouts/14.png +0 -0
- data/doc/images/callouts/15.png +0 -0
- data/doc/images/callouts/2.png +0 -0
- data/doc/images/callouts/3.png +0 -0
- data/doc/images/callouts/4.png +0 -0
- data/doc/images/callouts/5.png +0 -0
- data/doc/images/callouts/6.png +0 -0
- data/doc/images/callouts/7.png +0 -0
- data/doc/images/callouts/8.png +0 -0
- data/doc/images/callouts/9.png +0 -0
- data/doc/images/callouts/ChangeLog +0 -15
- data/doc/images/copyright +0 -55
- data/doc/images/draft.png +0 -0
- data/doc/images/toc-blank.png +0 -0
- data/doc/images/toc-minus.png +0 -0
- data/doc/images/toc-plus.png +0 -0
- data/doc/index.html +0 -4
- data/doc/introduction.html +0 -3
- data/doc/introduction.license.html +0 -3
- data/doc/introduction.manifest.html +0 -3
- data/doc/introduction.related-works.html +0 -3
- data/doc/introduction.resources.html +0 -3
- data/doc/manual.txt +0 -1852
- data/doc/problem.ivl.html +0 -18
- data/doc/problems.html +0 -3
- data/doc/problems.ruby.html +0 -3
- data/doc/problems.vsim.html +0 -3
- data/doc/setup.html +0 -3
- data/doc/setup.installation.html +0 -9
- data/doc/setup.maintenance.html +0 -3
- data/doc/setup.reqs.html +0 -3
- data/doc/src/figures.dia +0 -0
- data/doc/src/license.xml +0 -446
- data/doc/src/manual.xml +0 -1824
- data/doc/src/manual.xsl +0 -23
- data/doc/src/shared.dtd +0 -62
- data/doc/styles/manual.css +0 -91
- data/doc/usage.examples.html +0 -3
- data/doc/usage.html +0 -3
- data/doc/usage.tools.html +0 -9
- data/doc/usage.tutorial.html +0 -189
- data/header.html +0 -95
- data/header.part.html +0 -95
- data/history.html +0 -1442
- data/history.part.html +0 -1346
- data/memo.html +0 -211
- data/readme.html +0 -138
- data/readme.part.html +0 -42
- data/ref/c/globals_0x62.html +0 -62
- data/ref/c/globals_0x67.html +0 -64
- data/ref/c/globals_0x69.html +0 -62
- data/ref/c/globals_0x6c.html +0 -64
- data/ref/c/globals_0x6d.html +0 -62
- data/ref/c/globals_0x6e.html +0 -63
- data/ref/c/globals_0x75.html +0 -63
- data/ref/c/globals_defs_0x6c.html +0 -57
- data/ref/c/globals_defs_0x6e.html +0 -56
- data/ref/c/globals_defs_0x72.html +0 -57
- data/ref/c/globals_defs_0x73.html +0 -164
- data/ref/c/globals_defs_0x75.html +0 -56
- data/ref/c/globals_func_0x66.html +0 -62
- data/ref/c/globals_func_0x67.html +0 -55
- data/ref/c/globals_func_0x69.html +0 -53
- data/ref/c/globals_func_0x70.html +0 -53
- data/ref/c/globals_func_0x72.html +0 -57
- data/ref/c/globals_func_0x73.html +0 -114
- data/ref/c/globals_func_0x76.html +0 -57
- data/ref/c/structswig__cast__info.html +0 -98
- data/ref/c/structswig__class.html +0 -115
- data/ref/c/structswig__module__info.html +0 -132
- data/ref/c/structswig__type__info.html +0 -132
- data/ref/c/swig__vpi_8h.html +0 -8739
- data/ref/c/swig__wrap_8cin.html +0 -11556
- data/ref/c/unions__vpi__value__value.html +0 -166
- data/ref/ruby/classes/String.src/M000032.html +0 -41
- data/ref/ruby/classes/Vpi/Handle.src/M000085.html +0 -18
- data/ref/ruby/classes/Vpi/Handle.src/M000086.html +0 -18
- data/ref/ruby/classes/XX/Document.src/M000072.html +0 -22
- data/ref/ruby/classes/XX/Document.src/M000073.html +0 -20
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000044.html +0 -22
- data/ref/ruby/classes/XX/Markup/ClassMethods.src/M000045.html +0 -20
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000052.html +0 -56
- data/ref/ruby/classes/XX/Markup/InstanceMethods.src/M000053.html +0 -33
- data/style.css +0 -47
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<h1>Contents</h1>
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<li><a href="#usage.tools.generate-test">Automated test generation</a></li>
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<li><a href="#usage.tools.verilog-ruby-conv">Verilog to Ruby conversion</a></li>
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<li><a href="#usage.tutorial.declare-design">Start with a design</a></li>
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<li><a href="#usage.tutorial.generate-test">Generate a test</a></li>
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<li><a href="#usage.tutorial.specification">Specify your expectations</a></li>
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<li><a href="#usage.tutorial.implement-proto">Implement the prototype</a></li>
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<li><a href="#usage.tutorial.test-proto">Verify the prototype</a></li>
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<li><a href="#usage.tutorial.implement-design">Implement the design</a></li>
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<li><a href="#usage.examples">Examples</a></li>
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<li><a href="#hacking">Hacking</a>
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<ul>
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<li><a href="#hacking.release-packages">Building release packages</a></li>
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<li><a href="#problems">Known problems</a>
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<li><a href="#problems.ruby.SystemStackError">SystemStackError</a></li>
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<li><a href="#problem.ivl">Icarus Verilog</a>
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<ul>
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<li><a href="#problems.ivl.vpi_handle_by_name">Vpi::vpi_handle_by_name</a>
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<ul>
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<li><a href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li>
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<li><a href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li>
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</li>
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<li><a href="#problems.ivl.vpi_reset">Vpi::reset</a></li>
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</li>
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<li><a href="#problems.vsim">Mentor Modelsim</a>
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<ul>
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<li><a href="#problems.vsim.ruby_run">ruby_run();</a></li>
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<li><a href="#glossary">Glossary</a>
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<li><a href="#glossary.bench">Bench</a></li>
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<li><a href="#glossary.BDD"><span class="caps">BDD</span></a></li>
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<li><a href="#glossary.design">Design</a></li>
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<li><a href="#glossary.expectation">Expectation</a></li>
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<li><a href="#glossary.handle">Handle</a></li>
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<li><a href="#glossary.rake">Rake</a></li>
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<li><a href="#glossary.rspec">rSpec</a></li>
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<li><a href="#glossary.specification">Specification</a></li>
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<li><a href="#glossary.TDD"><span class="caps">TDD</span></a></li>
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<li><a href="#glossary.test">Test</a></li>
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<li><a href="#glossary.test_bench">Test bench</a></li>
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</ul></li>
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</ul>
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<h2>Examples</h2>
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<ol>
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<li><a href="#example1">Examples of accessing a handle’s <span class="caps">VPI</span> properties</a></li>
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<li><a href="#fig..counter.v_decl">Declaration of a simple up-counter with synchronous reset</a></li>
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141
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<li><a href="#fig..generate-test.rspec">Generating a test with specification in rSpec format</a></li>
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<li><a href="#fig..generate-test.unit-test">Generating a test with specification in xUnit format</a></li>
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<li><a href="#fig..counter_rspec_spec.rb">Specification implemented in rSpec format</a></li>
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<li><a href="#fig..counter_xunit_spec.rb">Specification implemented in xUnit format</a></li>
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<li><a href="#fig..counter_proto.rb">Ruby prototype of our Verilog design</a></li>
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<li><a href="#fig..test-proto.rspec">Running a test with specification in rSpec format</a></li>
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<li><a href="#fig..test-proto.unit-test">Running a test with specification in xUnit format</a></li>
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<li><a href="#fig..counter.v_impl">Implementation of a simple up-counter with synchronous reset</a></li>
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<li><a href="#fig..test-design.rspec">Running a test with specification in rSpec format</a></li>
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<li><a href="#fig..test-design.unit-test">Running a test with specification in xUnit format</a></li>
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<li><a href="#ex..TestFoo">Part of a bench which instantiates a Verilog design</a></li>
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<li><a href="#ex..TestFoo_bad">Bad design with unconnected registers</a></li>
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<li><a href="#ex..TestFoo_fix">Fixed design with wired registers</a></li>
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</ol>
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<h2>Figures</h2>
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<ol>
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<li><a href="#fig..organization">Overall organization of a test</a></li>
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<li><a href="#fig..organization.detail">Detailed organization of a test</a></li>
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<li><a href="#figure3">Parts of speech for accessing a handle’s <span class="caps">VPI</span> properties</a></li>
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<li><a href="#fig..ruby_init">Initialization of a test</a></li>
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<li><a href="#fig..ruby_relay">Execution of a test</a></li>
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</ol>
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|
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<h2>Importants</h2>
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<ol>
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<li><a href="#important1">Before we continue…</a></li>
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<li><a href="#important2">Before we continue…</a></li>
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<li><a href="#important3">Before we continue…</a></li>
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<li><a href="#important4">Before we continue…</a></li>
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</ol>
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|
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<h2>Notes</h2>
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<ol>
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<li><a href="#note1">Fixed in 2.0.0.</a></li>
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<li><a href="#note2">note2</a></li>
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<li><a href="#note3">note3</a></li>
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</ol>
|
|
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|
|
180
|
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<h2>Sections</h2>
|
|
181
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<ol>
|
|
182
|
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<li><a href="#anchor0">Ruby-VPI user manual</a></li>
|
|
183
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<li><a href="#terms">Terms</a></li>
|
|
184
|
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<li><a href="#intro">Introduction</a></li>
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<li><a href="#intro.features">Features</a></li>
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<li><a href="#intro.appetizers">Appetizers</a></li>
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187
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<li><a href="#intro.license">License</a></li>
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188
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<li><a href="#intro.related-works">Related works</a></li>
|
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189
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<li><a href="#intro.related-works.pli">Ye olde <span class="caps">PLI</span></a></li>
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190
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<li><a href="#background">Background</a></li>
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|
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<li><a href="#background.methodology">Methodology</a></li>
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<li><a href="#background.vocab">Terminology</a></li>
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|
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<li><a href="#background.org">Organization</a></li>
|
|
194
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<li><a href="#background.org.vpi">Interface to <span class="caps">VPI</span></a></li>
|
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195
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<li><a href="#background.org.vpi.util"><span class="caps">VPI</span> utility layer</a></li>
|
|
196
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<li><a href="#background.running-tests">Running a test</a></li>
|
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197
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<li><a href="#background.running-tests.init">Initialization</a></li>
|
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198
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<li><a href="#background.running-tests.exec">Execution</a></li>
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199
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<li><a href="#setup">Setup</a></li>
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<li><a href="#setup.manifest">Manifest</a></li>
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<li><a href="#setup.reqs">Requirements</a></li>
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<li><a href="#setup.recom">Recommendations</a></li>
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203
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<li><a href="#setup.recom.merger">Text merging tool</a></li>
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<li><a href="#setup.installation">Installation</a></li>
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<li><a href="#setup.installation.windows">Installing on Windows</a></li>
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<li><a href="#setup.maintenance">Maintenance</a></li>
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207
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<li><a href="#usage">Usage</a></li>
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208
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<li><a href="#usage.tools">Tools</a></li>
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209
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<li><a href="#usage.tools.generate-test">Automated test generation</a></li>
|
|
210
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<li><a href="#usage.tools.verilog-ruby-conv">Verilog to Ruby conversion</a></li>
|
|
211
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<li><a href="#usage.tutorial">Tutorial</a></li>
|
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212
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<li><a href="#usage.tutorial.declare-design">Start with a design</a></li>
|
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213
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<li><a href="#usage.tutorial.generate-test">Generate a test</a></li>
|
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214
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<li><a href="#usage.tutorial.specification">Specify your expectations</a></li>
|
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215
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<li><a href="#usage.tutorial.implement-proto">Implement the prototype</a></li>
|
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216
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<li><a href="#usage.tutorial.test-proto">Verify the prototype</a></li>
|
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217
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<li><a href="#usage.tutorial.implement-design">Implement the design</a></li>
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218
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<li><a href="#usage.tutorial.test-design">Verify the design</a></li>
|
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219
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<li><a href="#usage.examples">Examples</a></li>
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<li><a href="#hacking">Hacking</a></li>
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<li><a href="#hacking.release-packages">Building release packages</a></li>
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<li><a href="#problems">Known problems</a></li>
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<li><a href="#problems.ruby">Ruby</a></li>
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<li><a href="#problems.ruby.SystemStackError">SystemStackError</a></li>
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<li><a href="#problems.ruby.xUnit">test/unit</a></li>
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<li><a href="#problem.ivl">Icarus Verilog</a></li>
|
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227
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<li><a href="#problems.ivl.vpi_handle_by_name">Vpi::vpi_handle_by_name</a></li>
|
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<li><a href="#problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</a></li>
|
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<li><a href="#problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</a></li>
|
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<li><a href="#problems.ivl.vpi_reset">Vpi::reset</a></li>
|
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231
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<li><a href="#problems.vsim">Mentor Modelsim</a></li>
|
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232
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<li><a href="#problems.vsim.ruby_run">ruby_run();</a></li>
|
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233
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<li><a href="#glossary">Glossary</a></li>
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<li><a href="#glossary.bench">Bench</a></li>
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<li><a href="#glossary.BDD"><span class="caps">BDD</span></a></li>
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<li><a href="#glossary.design">Design</a></li>
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<li><a href="#glossary.expectation">Expectation</a></li>
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238
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<li><a href="#glossary.handle">Handle</a></li>
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<li><a href="#glossary.rake">Rake</a></li>
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<li><a href="#glossary.rspec">rSpec</a></li>
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<li><a href="#glossary.specification">Specification</a></li>
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<li><a href="#glossary.TDD"><span class="caps">TDD</span></a></li>
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<li><a href="#glossary.test">Test</a></li>
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<li><a href="#glossary.test_bench">Test bench</a></li>
|
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|
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</ol>
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246
|
+
|
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247
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<h2>Tables</h2>
|
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248
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<ol>
|
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249
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<li><a href="#table1">Possible accessors and their implications</a></li>
|
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250
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</ol>
|
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251
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+
|
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252
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<h2>Tips</h2>
|
|
253
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<ol>
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254
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<li><a href="#tip1">tip1</a></li>
|
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255
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<li><a href="#tip2">Using <strong>kdiff3</strong> with the automated test generator.</a></li>
|
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256
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<li><a href="#tip3">Reuse your specification.</a></li>
|
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257
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<li><a href="#tip4">What can the test runner do?</a></li>
|
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258
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<li><a href="#tip5">Running multiple tests at once.</a></li>
|
|
259
|
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</ol>
|
|
260
|
+
|
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261
|
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</div>
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|
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<div class="cover-page">
|
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|
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<h1 id="anchor0">Ruby-VPI user manual</h1>
|
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|
+
|
|
267
|
+
|
|
268
|
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<p>Suraj N. Kurapati</p>
|
|
269
|
+
|
|
270
|
+
|
|
271
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<p>Wed Nov 15 19:34:23 <span class="caps">PST 2006</span></p>
|
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</div>
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|
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<h2 id="terms">Terms</h2>
|
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277
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|
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278
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|
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<p>Permission is granted to copy, distribute and/or modify this document under the terms of the <a href="http://www.gnu.org/copyleft/fdl.html"><span class="caps">GNU</span> Free Documentation License</a>, Version 1.1 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts and no Back-Cover Texts. A copy of the license is included in the the file named <a href="./LICENSE"><span class="caps">LICENSE</span></a>.</p>
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<p>Admonition and navigation graphics are Copyright© 2005, 2006 <a href="http://tango.freedesktop.org">Tango Desktop Project</a>. They are licensed under <a href="./images/LICENSE">these terms</a>.</p>
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<h1 id="intro">Introduction</h1>
|
|
286
|
+
|
|
287
|
+
|
|
288
|
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<blockquote>
|
|
289
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<p>Ruby-VPI is a <a href="http://www.ruby-lang.org">Ruby</a> interface to <a href="http://ieeexplore.ieee.org/xpl/standardstoc.jsp?isnumber=33945">Verilog <span class="caps">VPI</span></a>. It lets you create complex Verilog test benches easily and wholly in Ruby.</p>
|
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</blockquote>
|
|
291
|
+
|
|
292
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|
|
293
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<h2 id="intro.features">Features</h2>
|
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294
|
+
|
|
295
|
+
|
|
296
|
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<ul>
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297
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<li>Supports the <em>entire</em> IEEE Std 1364-2005 <span class="caps">VPI</span> standard.</li>
|
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298
|
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</ul>
|
|
299
|
+
|
|
300
|
+
|
|
301
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<ul>
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302
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<li>Works with all <a href="manual.html#setup.reqs">major Verilog simulators</a> available today.</li>
|
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</ul>
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304
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+
|
|
305
|
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|
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306
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<ul>
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307
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<li>Enables <a href="http://www.agilealliance.org/intro">agile practices</a> such as
|
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308
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<ul>
|
|
309
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<li><a href="http://www.testdriven.com">test-driven</a> development</li>
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310
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<li><a href="http://behaviour-driven.org">behavior-driven</a> development</li>
|
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311
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<li><a href="manual.html#usage.tutorial.implement-proto">rapid prototyping</a> for design exploration</li>
|
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312
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</ul></li>
|
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</ul>
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314
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|
|
315
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+
|
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316
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<ul>
|
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317
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<li>Eliminates unneccesary work:
|
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318
|
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<ul>
|
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319
|
+
<li><a href="manual.html#usage.tutorial.specification">Specifications</a> are <em>readable</em>, portable, and executable.</li>
|
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320
|
+
<li>The <a href="manual.html#usage.tools.generate-test">automated test generator</a> helps you accomodate design changes with <em>minimal</em> effort.</li>
|
|
321
|
+
</ul></li>
|
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322
|
+
</ul>
|
|
323
|
+
|
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324
|
+
|
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325
|
+
<ul>
|
|
326
|
+
<li>Utilizes the <a href="http://www.ruby-lang.org/en/about/">power and elegance</a> of Ruby:
|
|
327
|
+
<ul>
|
|
328
|
+
<li>Unlimited length integers</li>
|
|
329
|
+
<li>Regular expressions</li>
|
|
330
|
+
<li>Multi-threading</li>
|
|
331
|
+
<li>System calls and I/O</li>
|
|
332
|
+
<li><a href="http://rubyforge.org"><em>ad infinium</em></a></li>
|
|
333
|
+
</ul></li>
|
|
334
|
+
</ul>
|
|
335
|
+
|
|
336
|
+
|
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337
|
+
<ul>
|
|
338
|
+
<li>Gives you the <em>freedom</em> to study, modify, and distribute this software, in accordance with the <a href="http://www.gnu.org/copyleft/gpl.html"><span class="caps">GNU</span> General Public License</a>.</li>
|
|
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|
+
</ul>
|
|
340
|
+
|
|
341
|
+
|
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342
|
+
<h2 id="intro.appetizers">Appetizers</h2>
|
|
343
|
+
|
|
344
|
+
|
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|
+
<p>Here is a modest sampling to whet your appetite.</p>
|
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346
|
+
|
|
347
|
+
|
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348
|
+
<ul>
|
|
349
|
+
<li>Assign the value 2<sup>2048</sup> to a register:</li>
|
|
350
|
+
</ul>
|
|
351
|
+
|
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352
|
+
|
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353
|
+
<blockquote>
|
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|
+
<p><code class="code">some_register.intVal = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#00D; font-weight:bold">2048</span></code></p>
|
|
355
|
+
</blockquote>
|
|
356
|
+
|
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357
|
+
|
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358
|
+
<ul>
|
|
359
|
+
<li>Check if all nets in a module are at high impedance:</li>
|
|
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|
+
</ul>
|
|
361
|
+
|
|
362
|
+
|
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363
|
+
<blockquote>
|
|
364
|
+
<p><code class="code">some_module.all_net? { |net| net.z? }</code></p>
|
|
365
|
+
</blockquote>
|
|
366
|
+
|
|
367
|
+
|
|
368
|
+
<ul>
|
|
369
|
+
<li>See a register’s path, width, and location (file & line number):</li>
|
|
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|
+
</ul>
|
|
371
|
+
|
|
372
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+
|
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|
+
<blockquote>
|
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|
+
<p><code class="code">puts some_register</code></p>
|
|
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|
+
</blockquote>
|
|
376
|
+
|
|
377
|
+
|
|
378
|
+
<ul>
|
|
379
|
+
<li>Simulate fifteen clock cycles:</li>
|
|
380
|
+
</ul>
|
|
381
|
+
|
|
382
|
+
|
|
383
|
+
<blockquote>
|
|
384
|
+
<p><code class="code"><span style="color:#00D; font-weight:bold">15</span>.times { relay_verilog }</code></p>
|
|
385
|
+
</blockquote>
|
|
386
|
+
|
|
387
|
+
|
|
388
|
+
<h2 id="intro.license">License</h2>
|
|
389
|
+
|
|
390
|
+
|
|
391
|
+
<p>Ruby-VPI is <a href="http://en.wikipedia.org/wiki/Free_software">free software</a> ; you can redistribute it and/or modify it under the terms of the <a href="http://www.gnu.org/copyleft/gpl.html"><span class="caps">GNU</span> General Public License</a> as published by the <a href="http://www.fsf.org">Free Software Foundation</a> ; either version 2 of the License, or (at your option) any later version.</p>
|
|
392
|
+
|
|
393
|
+
|
|
394
|
+
<h2 id="intro.related-works">Related works</h2>
|
|
395
|
+
|
|
396
|
+
|
|
397
|
+
<ul>
|
|
398
|
+
<li><a href="http://jove.sourceforge.net"><span class="caps">JOVE</span></a> is a Java interface to <span class="caps">VPI</span>.</li>
|
|
399
|
+
<li><a href="http://teal.sourceforge.net">Teal</a> is a C++ interface to <span class="caps">VPI</span>.</li>
|
|
400
|
+
<li><a href="http://embedded.eecs.berkeley.edu/Alumni/pinhong/scriptEDA/">ScriptEDA</a> is a Perl, Python, and Tcl interface to <span class="caps">VPI</span>.</li>
|
|
401
|
+
<li><a href="http://rhdl.rubyforge.org"><span class="caps">RHDL</span></a> is a hardware description and verification language based on Ruby.</li>
|
|
402
|
+
<li><a href="http://myhdl.jandecaluwe.com">MyHDL</a> is a hardware description and verification language based on Python, which features conversion to Verilog and co-simulation.</li>
|
|
403
|
+
</ul>
|
|
404
|
+
|
|
405
|
+
|
|
406
|
+
<h2 id="intro.related-works.pli">Ye olde <span class="caps">PLI</span></h2>
|
|
407
|
+
|
|
408
|
+
|
|
409
|
+
<p>The following projects utilize the archaic <strong>tf</strong> and <strong>acc</strong> PLI interfaces, which have been officially deprecated in <span class="caps">IEEE</span> Std 1364-2005.</p>
|
|
410
|
+
|
|
411
|
+
|
|
412
|
+
<ul>
|
|
413
|
+
<li><a href="http://www.nelsim.com">ScriptSim</a> is a Perl, Python, and Tcl/Tk interface to <span class="caps">PLI</span>.</li>
|
|
414
|
+
<li><a href="http://www.veripool.com/verilog-pli.html">Verilog::Pli</a> is a Perl interface to <span class="caps">PLI</span>.</li>
|
|
415
|
+
<li><a href="http://www.time-rover.com/jpli/"><span class="caps">JPLI</span></a> is a proprietary Java interface to <span class="caps">PLI</span>.</li>
|
|
416
|
+
</ul>
|
|
417
|
+
|
|
418
|
+
|
|
419
|
+
<h1 id="background">Background</h1>
|
|
420
|
+
|
|
421
|
+
|
|
422
|
+
<p>Ruby-VPI is a <a href="#glossary.bench">bench</a> which lets you <a href="#glossary.test">test</a> Verilog modules using the Ruby language.</p>
|
|
423
|
+
|
|
424
|
+
|
|
425
|
+
<h2 id="background.methodology">Methodology</h2>
|
|
426
|
+
|
|
427
|
+
|
|
428
|
+
<p>Ruby-VPI presents an open-ended interface to <span class="caps">VPI</span>. Thus, you can use any methodology you wish when writing tests.</p>
|
|
429
|
+
|
|
430
|
+
|
|
431
|
+
<h2 id="background.vocab">Terminology</h2>
|
|
432
|
+
|
|
433
|
+
|
|
434
|
+
<div class="admonition">
|
|
435
|
+
|
|
436
|
+
<div class="tip" id="tip1">
|
|
437
|
+
|
|
438
|
+
<p style="float:left"><img src="images/tip.png" title="tip" alt="tip" /></p>
|
|
439
|
+
|
|
440
|
+
|
|
441
|
+
<p class="title">Tip:</p>
|
|
442
|
+
|
|
443
|
+
|
|
444
|
+
<p>Have a look at the <a href="#glossary">glossary</a> for definitions of terms used in this manual.</p>
|
|
445
|
+
|
|
446
|
+
|
|
447
|
+
</div>
|
|
448
|
+
|
|
449
|
+
</div>
|
|
450
|
+
|
|
451
|
+
<p>As a newcomer into the world of Verilog, I often heard the term <strong>test bench</strong>: “I ran the test bench, but it didn’t work!” or “Are you crazy?!! You <em>still</em> haven’t written the test bench?”, for example. I flipped through my textbook and surfed the Internet for a definition of the term, but it was to no avail. Instead, both resources nonchalantly employed the term <em>throughout</em> their being, as if mocking my ignorance of what seems to be universal knowledge.</p>
|
|
452
|
+
|
|
453
|
+
|
|
454
|
+
<p>Defeated, I turned to my inner faculties to determine the answer. Let’s see, the term <em>test bench</em> has the word <em>test</em>—so it has something to do with testing—and it has the word <em>bench</em>—so maybe it’s referring to a table where the testing should occur. This reasoning grew increasingly familiar as my mind rummaged through towering stores of obsolescence and ultimately revealed dreaded memories of sleepless anguish: debugging electronics in the robotics laboratory.</p>
|
|
455
|
+
|
|
456
|
+
|
|
457
|
+
<p>Aha! I exclaimed hesitantly, trying to dismiss the past. The term has its roots in the testing of electronic devices, where an engineer would sit at a bench in an electronics laboratory and verify that an electronic component satisfies some criteria. The bench would be furnished with tools of measurement and manipulation—such as oscilloscopes, voltmeters, soldering irons, and so on—which help the engineer to verify the electronic component or locate the sources of defects in the component.</p>
|
|
458
|
+
|
|
459
|
+
|
|
460
|
+
<p>Alright, now I remember what a laboratory bench is, but how does that compare with the term test bench? Surely they cannot have the same meaning, because it doesn’t make sense to <em>run</em> a laboratory bench or to <em>write</em> one. Thus, to avoid propagating such confusion into this manual, I have attempted to clarify the terminology by <a href="#glossary">simplifying and reintroducing it in a new light</a>.</p>
|
|
461
|
+
|
|
462
|
+
|
|
463
|
+
<h2 id="background.org">Organization</h2>
|
|
464
|
+
|
|
465
|
+
|
|
466
|
+
<div class="formal">
|
|
467
|
+
|
|
468
|
+
<div class="figure" id="fig..organization">
|
|
469
|
+
|
|
470
|
+
<p class="title">Figure 1. Overall organization of a test</p>
|
|
471
|
+
|
|
472
|
+
|
|
473
|
+
<p><img src="figures/organization.png" alt="" /></p>
|
|
474
|
+
|
|
475
|
+
|
|
476
|
+
</div>
|
|
477
|
+
|
|
478
|
+
</div>
|
|
479
|
+
|
|
480
|
+
<p>As <a href="#fig..organization">the figure named “Overall organization of a test”</a> shows, a test is composed of a bench, a design, and a specification. To extend the <a href="#background.vocab">analogy of an electronics laboratory</a>, the first acts as the laboratory bench which provides measurement and manipulation tools. The second acts as the electronic component being verified by the engineer. And the third acts as the engineer who measures, manipulates, and verifies the electronic component.</p>
|
|
481
|
+
|
|
482
|
+
|
|
483
|
+
<h3 id="background.org.vpi">Interface to <span class="caps">VPI</span></h3>
|
|
484
|
+
|
|
485
|
+
|
|
486
|
+
<div class="formal">
|
|
487
|
+
|
|
488
|
+
<div class="figure" id="fig..organization.detail">
|
|
489
|
+
|
|
490
|
+
<p class="title">Figure 2. Detailed organization of a test</p>
|
|
491
|
+
|
|
492
|
+
|
|
493
|
+
<p><img src="figures/organization_detailed.png" alt="" /></p>
|
|
494
|
+
|
|
495
|
+
|
|
496
|
+
</div>
|
|
497
|
+
|
|
498
|
+
</div>
|
|
499
|
+
|
|
500
|
+
<p>In <a href="#fig..organization.detail">the figure named “Detailed organization of a test”</a>, Ruby-VPI acts as the bench, a Verilog simulator encapsulates the design, and a Ruby interpreter encapsulates the specification. Notice that Ruby-VPI encapsulates all communication between the Ruby interpreter and <span class="caps">VPI</span>. This allows the specification, or any Ruby program in general, to access <span class="caps">VPI</span> using nothing more than the Ruby language! Thus, Ruby-VPI removes the burden of having to write C programs in order to access <span class="caps">VPI</span>.</p>
|
|
501
|
+
|
|
502
|
+
|
|
503
|
+
<p>Furthermore, Ruby-VPI presents the <em>entire</em> IEEE Std 1364-2005 <span class="caps">VPI</span> interface to the Ruby interpreter, but with the following minor changes.</p>
|
|
504
|
+
|
|
505
|
+
|
|
506
|
+
<ul>
|
|
507
|
+
<li>The first letter in the name of every function, type, structure, and constant becomes capitalized. For example, the <code class="code">s_vpi_value</code> structure in C becomes the <code class="code"><span style="color:#036; font-weight:bold">S_vpi_value</span></code> class in Ruby. Likewise, the <code class="code">vpiIntVal</code> constant in C becomes the <code class="code"><span style="color:#036; font-weight:bold">VpiIntVal</span></code> constant in Ruby.</li>
|
|
508
|
+
</ul>
|
|
509
|
+
|
|
510
|
+
|
|
511
|
+
<ul>
|
|
512
|
+
<li>The <span class="caps">VPI</span> functions <code class="code">vpi_vprintf</code> and <code class="code">vpi_mcd_vprintf</code> are not made accessible to Ruby. However, this isn’t a big problem because you can use Ruby’s printf method instead.</li>
|
|
513
|
+
</ul>
|
|
514
|
+
|
|
515
|
+
|
|
516
|
+
<blockquote>
|
|
517
|
+
<p>The reason for this limitation is that some C compilers have trouble with pointers to the va_list type. For these compilers, the second line in the code shown below causes a “type mismatch” error.</p>
|
|
518
|
+
</blockquote>
|
|
519
|
+
|
|
520
|
+
|
|
521
|
+
<pre class="code" lang="c">
|
|
522
|
+
<span style="color:#339; font-weight:bold">void</span> foo(va_list ap) {
|
|
523
|
+
va_list *p = &ap;
|
|
524
|
+
}
|
|
525
|
+
</pre>
|
|
526
|
+
|
|
527
|
+
<h4 id="background.org.vpi.util"><span class="caps">VPI</span> utility layer</h4>
|
|
528
|
+
|
|
529
|
+
|
|
530
|
+
<p>From a user’s perspective, the <span class="caps">VPI</span> utility layer greatly enhances the ability to interact with handles. One simply invokes a handle’s methods, which are carefully named in the following manner, to access either (1) its children or (2) its <span class="caps">VPI</span> properties.</p>
|
|
531
|
+
|
|
532
|
+
|
|
533
|
+
<p>The children of a handle are simply the handles that are immediately contained within it in. For example, suppose that you had a Verilog module that contains some registers. The children, of a handle to the module, would be handles to the registers.</p>
|
|
534
|
+
|
|
535
|
+
|
|
536
|
+
<p>In the event that a child handle has the same name as a <span class="caps">VPI</span> property, the child is given priority. However, you can always access <span class="caps">VPI</span> properties explicitly via the <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::<span style="color:#036; font-weight:bold">Handle</span>.get_value</code> and <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::<span style="color:#036; font-weight:bold">Handle</span>.put_value</code> methods.</p>
|
|
537
|
+
|
|
538
|
+
|
|
539
|
+
<div class="formal">
|
|
540
|
+
|
|
541
|
+
<div class="figure" id="figure3">
|
|
542
|
+
|
|
543
|
+
<p class="title">Figure 3. Parts of speech for accessing a handle’s <span class="caps">VPI</span> properties</p>
|
|
544
|
+
|
|
545
|
+
|
|
546
|
+
<table>
|
|
547
|
+
<tr>
|
|
548
|
+
<th>Operation </th>
|
|
549
|
+
<th>_ </th>
|
|
550
|
+
<th>Property </th>
|
|
551
|
+
<th>_ </th>
|
|
552
|
+
<th>Accessor </th>
|
|
553
|
+
<th>Addendum </th>
|
|
554
|
+
</tr>
|
|
555
|
+
<tr>
|
|
556
|
+
<td colspan="2">optional </td>
|
|
557
|
+
<td> required </td>
|
|
558
|
+
<td colspan="3">optional </td>
|
|
559
|
+
</tr>
|
|
560
|
+
</table>
|
|
561
|
+
|
|
562
|
+
|
|
563
|
+
|
|
564
|
+
|
|
565
|
+
<ul>
|
|
566
|
+
<li><strong>Operation</strong> suggests a method that should be invoked in the context of the Property parameter.</li>
|
|
567
|
+
</ul>
|
|
568
|
+
|
|
569
|
+
|
|
570
|
+
<ul>
|
|
571
|
+
<li><strong>Property</strong> suggests a <span class="caps">VPI</span> property that should be accessed. The “vpi” prefix, which is common to all <span class="caps">VPI</span> properties, can be omitted if you wish. For example, the <span class="caps">VPI</span> property “vpiFullName” is considered equivalent to “fullName” and “FullName”, but not equivalent “full_name”.</li>
|
|
572
|
+
</ul>
|
|
573
|
+
|
|
574
|
+
|
|
575
|
+
<ul>
|
|
576
|
+
<li><strong>Accessor</strong> suggests a <span class="caps">VPI</span> function that should be used in order to access the <span class="caps">VPI</span> property. When this parameter is not specified, the <span class="caps">VPI</span> utility layer will attempt to <em>guess</em> the value of this parameter (<a href="../ref/ruby/classes/Vpi/Handle/Property.html">see the source code</a> of the <code class="code"><span style="color:#036; font-weight:bold">Property</span>.resolve</code> method for details).</li>
|
|
577
|
+
</ul>
|
|
578
|
+
|
|
579
|
+
|
|
580
|
+
<ul>
|
|
581
|
+
<li><strong>Addendum</strong> suggests that the specified <span class="caps">VPI</span> property should be queried as a boolean value when it is a question mark (?). This suggestion is the same as specifying “b” for the Accessor parameter. Also, when this parameter is an equal sign (=), it suggests that the specified <span class="caps">VPI</span> property should be written to.</li>
|
|
582
|
+
</ul>
|
|
583
|
+
|
|
584
|
+
|
|
585
|
+
</div>
|
|
586
|
+
|
|
587
|
+
</div>
|
|
588
|
+
|
|
589
|
+
<div class="formal">
|
|
590
|
+
|
|
591
|
+
<div class="table" id="table1">
|
|
592
|
+
|
|
593
|
+
<p class="title">Table 1. Possible accessors and their implications</p>
|
|
594
|
+
|
|
595
|
+
|
|
596
|
+
<table>
|
|
597
|
+
<tr>
|
|
598
|
+
<th>Accessor </th>
|
|
599
|
+
<th>Kind of value accessed </th>
|
|
600
|
+
<th><span class="caps">VPI</span> functions used to access the value </th>
|
|
601
|
+
</tr>
|
|
602
|
+
<tr>
|
|
603
|
+
<td> d </td>
|
|
604
|
+
<td> delay </td>
|
|
605
|
+
<td> <code class="code">vpi_get_delays</code>, <code class="code">vpi_put_delays</code> </td>
|
|
606
|
+
</tr>
|
|
607
|
+
<tr>
|
|
608
|
+
<td> l </td>
|
|
609
|
+
<td> logic </td>
|
|
610
|
+
<td> <code class="code">vpi_get_value</code>, <code class="code">vpi_put_value</code> </td>
|
|
611
|
+
</tr>
|
|
612
|
+
<tr>
|
|
613
|
+
<td> i </td>
|
|
614
|
+
<td> integer </td>
|
|
615
|
+
<td> <code class="code">vpi_get</code> </td>
|
|
616
|
+
</tr>
|
|
617
|
+
<tr>
|
|
618
|
+
<td> b </td>
|
|
619
|
+
<td> boolean </td>
|
|
620
|
+
<td> <code class="code">vpi_get</code> </td>
|
|
621
|
+
</tr>
|
|
622
|
+
<tr>
|
|
623
|
+
<td> s </td>
|
|
624
|
+
<td> string </td>
|
|
625
|
+
<td> <code class="code">vpi_get_str</code> </td>
|
|
626
|
+
</tr>
|
|
627
|
+
<tr>
|
|
628
|
+
<td> h </td>
|
|
629
|
+
<td> handle </td>
|
|
630
|
+
<td> <code class="code">vpi_handle</code> </td>
|
|
631
|
+
</tr>
|
|
632
|
+
</table>
|
|
633
|
+
|
|
634
|
+
|
|
635
|
+
|
|
636
|
+
|
|
637
|
+
</div>
|
|
638
|
+
|
|
639
|
+
</div>
|
|
640
|
+
|
|
641
|
+
<div class="formal">
|
|
642
|
+
|
|
643
|
+
<div class="example" id="example1">
|
|
644
|
+
|
|
645
|
+
<p class="title">Example 1. Examples of accessing a handle’s <span class="caps">VPI</span> properties</p>
|
|
646
|
+
|
|
647
|
+
|
|
648
|
+
<table>
|
|
649
|
+
<tr>
|
|
650
|
+
<th rowspan="2">Ruby expression </th>
|
|
651
|
+
<th colspan="6">Parts of speech </th>
|
|
652
|
+
<th rowspan="2">Description </th>
|
|
653
|
+
</tr>
|
|
654
|
+
<tr>
|
|
655
|
+
<th>Operation </th>
|
|
656
|
+
<th>_ </th>
|
|
657
|
+
<th>Property </th>
|
|
658
|
+
<th>_ </th>
|
|
659
|
+
<th>Accessor </th>
|
|
660
|
+
<th>Addendum </th>
|
|
661
|
+
</tr>
|
|
662
|
+
<tr>
|
|
663
|
+
<td> <code class="code">handle.vpiIntVal</code> </td>
|
|
664
|
+
<td> </td>
|
|
665
|
+
<td> </td>
|
|
666
|
+
<td> vpiIntVal </td>
|
|
667
|
+
<td> </td>
|
|
668
|
+
<td> </td>
|
|
669
|
+
<td> </td>
|
|
670
|
+
<td rowspan="4">These expressions access the logic value of the handle’s vpiIntVal property. </td>
|
|
671
|
+
</tr>
|
|
672
|
+
<tr>
|
|
673
|
+
<td> <code class="code">handle.vpiIntVal_l</code> </td>
|
|
674
|
+
<td> </td>
|
|
675
|
+
<td> </td>
|
|
676
|
+
<td> vpiIntVal </td>
|
|
677
|
+
<td> _ </td>
|
|
678
|
+
<td> l </td>
|
|
679
|
+
<td> </td>
|
|
680
|
+
</tr>
|
|
681
|
+
<tr>
|
|
682
|
+
<td> <code class="code">handle.intVal</code> </td>
|
|
683
|
+
<td> </td>
|
|
684
|
+
<td> </td>
|
|
685
|
+
<td> intVal </td>
|
|
686
|
+
<td> </td>
|
|
687
|
+
<td> </td>
|
|
688
|
+
<td> </td>
|
|
689
|
+
</tr>
|
|
690
|
+
<tr>
|
|
691
|
+
<td> <code class="code">handle.intVal_l</code> </td>
|
|
692
|
+
<td> </td>
|
|
693
|
+
<td> </td>
|
|
694
|
+
<td> intVal </td>
|
|
695
|
+
<td> _ </td>
|
|
696
|
+
<td> l </td>
|
|
697
|
+
<td> </td>
|
|
698
|
+
</tr>
|
|
699
|
+
<tr>
|
|
700
|
+
<td> <code class="code">handle.vpiIntVal = <span style="color:#00D; font-weight:bold">15</span></code> </td>
|
|
701
|
+
<td> </td>
|
|
702
|
+
<td> </td>
|
|
703
|
+
<td> vpiIntVal </td>
|
|
704
|
+
<td> </td>
|
|
705
|
+
<td> </td>
|
|
706
|
+
<td> = </td>
|
|
707
|
+
<td rowspan="4">These expressions assign the number 15 to the logic value of the handle’s vpiIntVal property. </td>
|
|
708
|
+
</tr>
|
|
709
|
+
<tr>
|
|
710
|
+
<td> <code class="code">handle.vpiIntVal_l = <span style="color:#00D; font-weight:bold">15</span></code> </td>
|
|
711
|
+
<td> </td>
|
|
712
|
+
<td> </td>
|
|
713
|
+
<td> vpiIntVal </td>
|
|
714
|
+
<td> _ </td>
|
|
715
|
+
<td> l </td>
|
|
716
|
+
<td> = </td>
|
|
717
|
+
</tr>
|
|
718
|
+
<tr>
|
|
719
|
+
<td> <code class="code">handle.intVal = <span style="color:#00D; font-weight:bold">15</span></code> </td>
|
|
720
|
+
<td> </td>
|
|
721
|
+
<td> </td>
|
|
722
|
+
<td> intVal </td>
|
|
723
|
+
<td> </td>
|
|
724
|
+
<td> </td>
|
|
725
|
+
<td> = </td>
|
|
726
|
+
</tr>
|
|
727
|
+
<tr>
|
|
728
|
+
<td> <code class="code">handle.intVal_l = <span style="color:#00D; font-weight:bold">15</span></code> </td>
|
|
729
|
+
<td> </td>
|
|
730
|
+
<td> </td>
|
|
731
|
+
<td> intVal </td>
|
|
732
|
+
<td> _ </td>
|
|
733
|
+
<td> l </td>
|
|
734
|
+
<td> = </td>
|
|
735
|
+
</tr>
|
|
736
|
+
<tr>
|
|
737
|
+
<td> <code class="code">handle.vpiType</code> </td>
|
|
738
|
+
<td> </td>
|
|
739
|
+
<td> </td>
|
|
740
|
+
<td> vpiType </td>
|
|
741
|
+
<td> </td>
|
|
742
|
+
<td> </td>
|
|
743
|
+
<td> </td>
|
|
744
|
+
<td rowspan="4">These expressions access the integer value of the handle’s vpiType property. </td>
|
|
745
|
+
</tr>
|
|
746
|
+
<tr>
|
|
747
|
+
<td> <code class="code">handle.vpiType_i</code> </td>
|
|
748
|
+
<td> </td>
|
|
749
|
+
<td> </td>
|
|
750
|
+
<td> vpiType </td>
|
|
751
|
+
<td> _ </td>
|
|
752
|
+
<td> i </td>
|
|
753
|
+
<td> </td>
|
|
754
|
+
</tr>
|
|
755
|
+
<tr>
|
|
756
|
+
<td> <code class="code">handle.type</code> </td>
|
|
757
|
+
<td> </td>
|
|
758
|
+
<td> </td>
|
|
759
|
+
<td> type </td>
|
|
760
|
+
<td> </td>
|
|
761
|
+
<td> </td>
|
|
762
|
+
<td> </td>
|
|
763
|
+
</tr>
|
|
764
|
+
<tr>
|
|
765
|
+
<td> <code class="code">handle.type_i</code> </td>
|
|
766
|
+
<td> </td>
|
|
767
|
+
<td> </td>
|
|
768
|
+
<td> type </td>
|
|
769
|
+
<td> _ </td>
|
|
770
|
+
<td> i </td>
|
|
771
|
+
<td> </td>
|
|
772
|
+
</tr>
|
|
773
|
+
<tr>
|
|
774
|
+
<td> <code class="code">handle.vpiProtected</code> </td>
|
|
775
|
+
<td> </td>
|
|
776
|
+
<td> </td>
|
|
777
|
+
<td> vpiProtected </td>
|
|
778
|
+
<td> </td>
|
|
779
|
+
<td> </td>
|
|
780
|
+
<td> </td>
|
|
781
|
+
<td rowspan="6">These expressions access the boolean value of the handle’s vpiProtected property. </td>
|
|
782
|
+
</tr>
|
|
783
|
+
<tr>
|
|
784
|
+
<td> <code class="code">handle.vpiProtected_b</code> </td>
|
|
785
|
+
<td> </td>
|
|
786
|
+
<td> </td>
|
|
787
|
+
<td> vpiProtected </td>
|
|
788
|
+
<td> _ </td>
|
|
789
|
+
<td> b </td>
|
|
790
|
+
<td> </td>
|
|
791
|
+
</tr>
|
|
792
|
+
<tr>
|
|
793
|
+
<td> <code class="code">handle.vpiProtected?</code> </td>
|
|
794
|
+
<td> </td>
|
|
795
|
+
<td> </td>
|
|
796
|
+
<td> vpiProtected </td>
|
|
797
|
+
<td> </td>
|
|
798
|
+
<td> </td>
|
|
799
|
+
<td> ? </td>
|
|
800
|
+
</tr>
|
|
801
|
+
<tr>
|
|
802
|
+
<td> <code class="code">handle.protected</code> </td>
|
|
803
|
+
<td> </td>
|
|
804
|
+
<td> </td>
|
|
805
|
+
<td> protected </td>
|
|
806
|
+
<td> </td>
|
|
807
|
+
<td> </td>
|
|
808
|
+
<td> </td>
|
|
809
|
+
</tr>
|
|
810
|
+
<tr>
|
|
811
|
+
<td> <code class="code">handle.protected_b</code> </td>
|
|
812
|
+
<td> </td>
|
|
813
|
+
<td> </td>
|
|
814
|
+
<td> protected </td>
|
|
815
|
+
<td> _ </td>
|
|
816
|
+
<td> b </td>
|
|
817
|
+
<td> </td>
|
|
818
|
+
</tr>
|
|
819
|
+
<tr>
|
|
820
|
+
<td> <code class="code">handle.protected?</code> </td>
|
|
821
|
+
<td> </td>
|
|
822
|
+
<td> </td>
|
|
823
|
+
<td> protected </td>
|
|
824
|
+
<td> </td>
|
|
825
|
+
<td> </td>
|
|
826
|
+
<td> ? </td>
|
|
827
|
+
</tr>
|
|
828
|
+
<tr>
|
|
829
|
+
<td> <code class="code">handle.vpiFullName</code> </td>
|
|
830
|
+
<td> </td>
|
|
831
|
+
<td> </td>
|
|
832
|
+
<td> vpiFullName </td>
|
|
833
|
+
<td> </td>
|
|
834
|
+
<td> </td>
|
|
835
|
+
<td> </td>
|
|
836
|
+
<td rowspan="4">These expressions access the string value of the handle’s vpiFullName property. </td>
|
|
837
|
+
</tr>
|
|
838
|
+
<tr>
|
|
839
|
+
<td> <code class="code">handle.vpiFullName_s</code> </td>
|
|
840
|
+
<td> </td>
|
|
841
|
+
<td> </td>
|
|
842
|
+
<td> vpiFullName </td>
|
|
843
|
+
<td> _ </td>
|
|
844
|
+
<td> s </td>
|
|
845
|
+
<td> </td>
|
|
846
|
+
</tr>
|
|
847
|
+
<tr>
|
|
848
|
+
<td> <code class="code">handle.fullName</code> </td>
|
|
849
|
+
<td> </td>
|
|
850
|
+
<td> </td>
|
|
851
|
+
<td> fullName </td>
|
|
852
|
+
<td> </td>
|
|
853
|
+
<td> </td>
|
|
854
|
+
<td> </td>
|
|
855
|
+
</tr>
|
|
856
|
+
<tr>
|
|
857
|
+
<td> <code class="code">handle.fullName_s</code> </td>
|
|
858
|
+
<td> </td>
|
|
859
|
+
<td> </td>
|
|
860
|
+
<td> fullName </td>
|
|
861
|
+
<td> _ </td>
|
|
862
|
+
<td> s </td>
|
|
863
|
+
<td> </td>
|
|
864
|
+
</tr>
|
|
865
|
+
<tr>
|
|
866
|
+
<td> <code class="code">handle.vpiParent</code> </td>
|
|
867
|
+
<td> </td>
|
|
868
|
+
<td> </td>
|
|
869
|
+
<td> vpiParent </td>
|
|
870
|
+
<td> </td>
|
|
871
|
+
<td> </td>
|
|
872
|
+
<td> </td>
|
|
873
|
+
<td rowspan="4">These expressions access the handle value of the handle’s vpiParent property. </td>
|
|
874
|
+
</tr>
|
|
875
|
+
<tr>
|
|
876
|
+
<td> <code class="code">handle.vpiParent_h</code> </td>
|
|
877
|
+
<td> </td>
|
|
878
|
+
<td> </td>
|
|
879
|
+
<td> vpiParent </td>
|
|
880
|
+
<td> _ </td>
|
|
881
|
+
<td> h </td>
|
|
882
|
+
<td> </td>
|
|
883
|
+
</tr>
|
|
884
|
+
<tr>
|
|
885
|
+
<td> <code class="code">handle.parent</code> </td>
|
|
886
|
+
<td> </td>
|
|
887
|
+
<td> </td>
|
|
888
|
+
<td> parent </td>
|
|
889
|
+
<td> </td>
|
|
890
|
+
<td> </td>
|
|
891
|
+
<td> </td>
|
|
892
|
+
</tr>
|
|
893
|
+
<tr>
|
|
894
|
+
<td> <code class="code">handle.parent_h</code> </td>
|
|
895
|
+
<td> </td>
|
|
896
|
+
<td> </td>
|
|
897
|
+
<td> parent </td>
|
|
898
|
+
<td> _ </td>
|
|
899
|
+
<td> h </td>
|
|
900
|
+
<td> </td>
|
|
901
|
+
</tr>
|
|
902
|
+
<tr>
|
|
903
|
+
<td> <code class="code">handle.each_vpiNet {|net| puts net.fullName}</code> </td>
|
|
904
|
+
<td> each </td>
|
|
905
|
+
<td> _ </td>
|
|
906
|
+
<td> vpiNet </td>
|
|
907
|
+
<td> </td>
|
|
908
|
+
<td> </td>
|
|
909
|
+
<td> </td>
|
|
910
|
+
<td rowspan="2">These expressions print the full name of each vpiNet object associated with the handle. </td>
|
|
911
|
+
</tr>
|
|
912
|
+
<tr>
|
|
913
|
+
<td> <code class="code">handle.each_net {|net| puts net.fullName}</code> </td>
|
|
914
|
+
<td> each </td>
|
|
915
|
+
<td> _ </td>
|
|
916
|
+
<td> net </td>
|
|
917
|
+
<td> </td>
|
|
918
|
+
<td> </td>
|
|
919
|
+
<td> </td>
|
|
920
|
+
</tr>
|
|
921
|
+
<tr>
|
|
922
|
+
<td> <code class="code">handle.all_vpiReg? {|reg| reg.size == <span style="color:#00D; font-weight:bold">1</span>}</code> </td>
|
|
923
|
+
<td> all? </td>
|
|
924
|
+
<td> _ </td>
|
|
925
|
+
<td> vpiReg </td>
|
|
926
|
+
<td> </td>
|
|
927
|
+
<td> </td>
|
|
928
|
+
<td> </td>
|
|
929
|
+
<td rowspan="2">These expressions check if all registers associated with the handle are capable of storing only one bit. </td>
|
|
930
|
+
</tr>
|
|
931
|
+
<tr>
|
|
932
|
+
<td> <code class="code">handle.all_reg? {|reg| reg.size == <span style="color:#00D; font-weight:bold">1</span>}</code> </td>
|
|
933
|
+
<td> all? </td>
|
|
934
|
+
<td> _ </td>
|
|
935
|
+
<td> reg </td>
|
|
936
|
+
<td> </td>
|
|
937
|
+
<td> </td>
|
|
938
|
+
<td> </td>
|
|
939
|
+
</tr>
|
|
940
|
+
<tr>
|
|
941
|
+
<td> <code class="code">handle.select_vpiNet {|net| net.x?}</code> </td>
|
|
942
|
+
<td> select </td>
|
|
943
|
+
<td> _ </td>
|
|
944
|
+
<td> VpiNet </td>
|
|
945
|
+
<td> </td>
|
|
946
|
+
<td> </td>
|
|
947
|
+
<td> </td>
|
|
948
|
+
<td rowspan="2">These expressions return a list of nets whose logic value is unknown or “don’t care” (x).</td>
|
|
949
|
+
</tr>
|
|
950
|
+
<tr>
|
|
951
|
+
<td> <code class="code">handle.select_net {|net| net.x?}</code> </td>
|
|
952
|
+
<td> select </td>
|
|
953
|
+
<td> _ </td>
|
|
954
|
+
<td> net </td>
|
|
955
|
+
<td> </td>
|
|
956
|
+
<td> </td>
|
|
957
|
+
<td> </td>
|
|
958
|
+
</tr>
|
|
959
|
+
</table>
|
|
960
|
+
|
|
961
|
+
|
|
962
|
+
|
|
963
|
+
|
|
964
|
+
</div>
|
|
965
|
+
|
|
966
|
+
</div>
|
|
967
|
+
|
|
968
|
+
<h2 id="background.running-tests">Running a test</h2>
|
|
969
|
+
|
|
970
|
+
|
|
971
|
+
<p>Unlike an engineer who can verify an electronic component in real-time, the Verilog simulator and the Ruby interpreter (see <a href="#fig..organization.detail">the figure named “Detailed organization of a test”</a>) take turns working with objects in a simulation when a test is run. In particular, they take turns manipulating the design and transfer control to each other when appropriate.</p>
|
|
972
|
+
|
|
973
|
+
|
|
974
|
+
<p>The situation is similar to a pair of friends playing catch. One friend throws a ball to the other, and the other throws it back. Either is able to inspect and modify the ball, but only when it is in hand.</p>
|
|
975
|
+
|
|
976
|
+
|
|
977
|
+
<h3 id="background.running-tests.init">Initialization</h3>
|
|
978
|
+
|
|
979
|
+
|
|
980
|
+
<div class="formal">
|
|
981
|
+
|
|
982
|
+
<div class="figure" id="fig..ruby_init">
|
|
983
|
+
|
|
984
|
+
<p class="title">Figure 4. Initialization of a test</p>
|
|
985
|
+
|
|
986
|
+
|
|
987
|
+
<p><img src="figures/ruby_init.png" alt="" /></p>
|
|
988
|
+
|
|
989
|
+
|
|
990
|
+
</div>
|
|
991
|
+
|
|
992
|
+
</div>
|
|
993
|
+
|
|
994
|
+
<p>A test is first initialized before it is <a href="#background.running-tests.exec">executed</a>. <a href="#fig..ruby_init">the figure named “Initialization of a test”</a> illustrates the initialization process <a href="#proc..ruby_init">described below</a>.</p>
|
|
995
|
+
|
|
996
|
+
|
|
997
|
+
<ol>
|
|
998
|
+
<li>The Verilog simulator initializes the Ruby interpreter by invoking the <code class="code"><span style="color:#d70; font-weight:bold">$ruby_init</span>;</code> system task/function, whose parameters represent the command-line invocation of the Ruby interpreter. For example, one would specify <code class="code"><span style="color:#d70; font-weight:bold">$ruby_init</span>(<span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">ruby</span><span style="color:#710">"</span></span>, <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">-w</span><span style="color:#710">"</span></span>);</code> in Verilog to achieve the same effect as running <pre>ruby -w</pre> at a command-prompt.</li>
|
|
999
|
+
<li>The Verilog simulator is paused and the Ruby interpreter is initialized with the arguments of the <code class="code"><span style="color:#d70; font-weight:bold">$ruby_init</span>;</code> system task/function.</li>
|
|
1000
|
+
<li>When the Ruby interpreter invokes the <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::relay_verilog</code> method, it is paused and the Verilog simulator is given control.</li>
|
|
1001
|
+
</ol>
|
|
1002
|
+
|
|
1003
|
+
|
|
1004
|
+
<h3 id="background.running-tests.exec">Execution</h3>
|
|
1005
|
+
|
|
1006
|
+
|
|
1007
|
+
<p>After a test is <a href="#background.running-tests.init">initialized</a>, it is executed such that the design is verified against the specification. <a href="#fig..ruby_relay">the figure named “Execution of a test”</a> illustrates the execution process <a href="#proc..ruby_relay">described below</a>.</p>
|
|
1008
|
+
|
|
1009
|
+
|
|
1010
|
+
<div class="formal">
|
|
1011
|
+
|
|
1012
|
+
<div class="figure" id="fig..ruby_relay">
|
|
1013
|
+
|
|
1014
|
+
<p class="title">Figure 5. Execution of a test</p>
|
|
1015
|
+
|
|
1016
|
+
|
|
1017
|
+
<p><img src="figures/ruby_relay.png" alt="" /></p>
|
|
1018
|
+
|
|
1019
|
+
|
|
1020
|
+
</div>
|
|
1021
|
+
|
|
1022
|
+
</div>
|
|
1023
|
+
|
|
1024
|
+
<ol>
|
|
1025
|
+
<li>The Verilog simulator transfers control to the Ruby interpreter by invoking the <code class="code"><span style="color:#d70; font-weight:bold">$ruby_relay</span>;</code> system task/function.</li>
|
|
1026
|
+
<li>The Verilog simulator is paused and the Ruby interpreter is given control.</li>
|
|
1027
|
+
<li>When the Ruby interpreter invokes the <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::relay_verilog</code> method, it is paused and the Verilog simulator is given control.</li>
|
|
1028
|
+
</ol>
|
|
1029
|
+
|
|
1030
|
+
|
|
1031
|
+
<h1 id="setup">Setup</h1>
|
|
1032
|
+
|
|
1033
|
+
|
|
1034
|
+
<h2 id="setup.manifest">Manifest</h2>
|
|
1035
|
+
|
|
1036
|
+
|
|
1037
|
+
<p>When you extract a release package, the following is what you would expect to find.</p>
|
|
1038
|
+
|
|
1039
|
+
|
|
1040
|
+
<ul>
|
|
1041
|
+
<li><tt>doc</tt> contains user documentation in various formats.</li>
|
|
1042
|
+
<li><tt>ref</tt> contains reference <span class="caps">API</span> documentation in <span class="caps">HTML</span> format.</li>
|
|
1043
|
+
<li><tt>ext</tt> contains source code, written in the C language, for the <a href="#background.org">core of Ruby-VPI</a>.</li>
|
|
1044
|
+
<li><tt>lib</tt> contains Ruby libraries provided by Ruby-VPI.</li>
|
|
1045
|
+
<li><tt>bin</tt> contains various tools. See <a href="#usage.tools">the section named “Tools”</a> for more information.</li>
|
|
1046
|
+
<li><tt>samp</tt> contains example tests. See <a href="#usage.examples">the section named “Examples”</a> for more information.</li>
|
|
1047
|
+
</ul>
|
|
1048
|
+
|
|
1049
|
+
|
|
1050
|
+
<h2 id="setup.reqs">Requirements</h2>
|
|
1051
|
+
|
|
1052
|
+
|
|
1053
|
+
<p>The following software is necessary in order to use Ruby-VPI.</p>
|
|
1054
|
+
|
|
1055
|
+
|
|
1056
|
+
<ul>
|
|
1057
|
+
<li>Verilog simulator
|
|
1058
|
+
– Ruby-VPI is known to work with the following simulators. However, you should be able to use it with any Verilog simulator that supports <span class="caps">VPI</span>.
|
|
1059
|
+
<ul>
|
|
1060
|
+
<li><a href="http://www.pragmatic-c.com/gpl-cver/"><span class="caps">GPL</span> Cver</a>
|
|
1061
|
+
– version 2.11a or newer is acceptable.</li>
|
|
1062
|
+
<li><a href="http://www.icarus.com/eda/Verilog/">Icarus Verilog</a>
|
|
1063
|
+
– version 0.8 or newer is acceptable.</li>
|
|
1064
|
+
<li><a href="http://www.synopsys.com/products/simulation/simulation.html">Synopsys <span class="caps">VCS</span></a>
|
|
1065
|
+
– any version that supports the <tt>-load</tt> option is acceptable.</li>
|
|
1066
|
+
<li><a href="http://www.model.com">Mentor Modelsim</a>
|
|
1067
|
+
– any version that supports the <tt>-pli</tt> option is acceptable.</li>
|
|
1068
|
+
</ul></li>
|
|
1069
|
+
</ul>
|
|
1070
|
+
|
|
1071
|
+
|
|
1072
|
+
<ul>
|
|
1073
|
+
<li><strong>make</strong>
|
|
1074
|
+
– any distribution should be acceptable.</li>
|
|
1075
|
+
</ul>
|
|
1076
|
+
|
|
1077
|
+
|
|
1078
|
+
<ul>
|
|
1079
|
+
<li>C compiler
|
|
1080
|
+
– the <a href="http://www.gnu.org/software/gcc/" title="GCC"><span class="caps">GNU</span> Compiler Collection</a> is preferred, but any C compiler should be acceptable.</li>
|
|
1081
|
+
</ul>
|
|
1082
|
+
|
|
1083
|
+
|
|
1084
|
+
<ul>
|
|
1085
|
+
<li><a href="http://en.wikipedia.org/wiki/Pthreads" title="pthreads"><span class="caps">POSIX</span> threads</a>
|
|
1086
|
+
– header and linkable object files, and operating system support for this library are necessary.</li>
|
|
1087
|
+
</ul>
|
|
1088
|
+
|
|
1089
|
+
|
|
1090
|
+
<ul>
|
|
1091
|
+
<li><a href="http://www.ruby-lang.org">Ruby</a>
|
|
1092
|
+
– version 1.8 or newer, including header and linkable object files for building extensions, is necessary. You can install Ruby by following <a href="http://www.rubygarden.org/faq/section/show/3">these instructions</a>.</li>
|
|
1093
|
+
</ul>
|
|
1094
|
+
|
|
1095
|
+
|
|
1096
|
+
<ul>
|
|
1097
|
+
<li><a href="http://rubyforge.org/frs/?group_id=126">RubyGems</a>
|
|
1098
|
+
– any recent version should be acceptable. You can install RubyGems by following <a href="http://www.rubygems.org/read/chapter/3">these instructions</a>.</li>
|
|
1099
|
+
</ul>
|
|
1100
|
+
|
|
1101
|
+
|
|
1102
|
+
<h2 id="setup.recom">Recommendations</h2>
|
|
1103
|
+
|
|
1104
|
+
|
|
1105
|
+
<p>The following software may make your interactions with Ruby-VPI more pleasant.</p>
|
|
1106
|
+
|
|
1107
|
+
|
|
1108
|
+
<h3 id="setup.recom.merger">Text merging tool</h3>
|
|
1109
|
+
|
|
1110
|
+
|
|
1111
|
+
An <em>interactive</em> text merging tool can greatly simplify the process of transferring wanted changes from one file to another. In particular, such tools are especially beneficial when using the <a href="#usage.tools.generate-test">automated test generator</a>. A handful of the currently available open-source text merging tools are listed below.
|
|
1112
|
+
<ul>
|
|
1113
|
+
<li><a href="http://kdiff3.sourceforge.net/"><strong>kdiff3</strong></a> is a graphical, three-way merging tool for <span class="caps">KDE</span>.</li>
|
|
1114
|
+
<li><a href="http://meld.sourceforge.net/"><strong>meld</strong></a> is a graphical, three-way merging tool for <span class="caps">GNOME</span>.</li>
|
|
1115
|
+
<li><a href="http://tkdiff.sourceforge.net/"><strong>tkdiff</strong></a> is a graphical, two-way merging tool that uses the cross-platform Tk windowing toolkit.</li>
|
|
1116
|
+
<li><a href="http://furius.ca/xxdiff/"><strong>xxdiff</strong></a> is a graphical, three-way merging tool.</li>
|
|
1117
|
+
<li><a href="http://elonen.iki.fi/code/imediff/"><strong>imediff2</strong></a> is a textual, fullscreen two-way merging tool. It is very useful when you are working remotely via <span class="caps">SSH</span>.</li>
|
|
1118
|
+
</ul>
|
|
1119
|
+
|
|
1120
|
+
|
|
1121
|
+
<h2 id="setup.installation">Installation</h2>
|
|
1122
|
+
|
|
1123
|
+
|
|
1124
|
+
<p>Once you have satisfied the <a href="#setup.reqs">necessary requirements</a>, you can install Ruby-VPI by running the <pre>gem install ruby-vpi</pre> command. RubyGems will install Ruby-VPI into the system gem directory, whose path can be determined by running the <pre>gem env gemdir</pre> command. Within this directory, there is a “gems” subdirectory which contains the Ruby-VPI installation, as illustrated below.</p>
|
|
1125
|
+
|
|
1126
|
+
|
|
1127
|
+
<pre>
|
|
1128
|
+
$ gem env gemdir
|
|
1129
|
+
/usr/lib/ruby/gems/1.8
|
|
1130
|
+
|
|
1131
|
+
$ ls -d /usr/lib/ruby/gems/1.8/gems/ruby-vpi*
|
|
1132
|
+
/usr/lib/ruby/gems/1.8/gems/ruby-vpi-7.0.0/
|
|
1133
|
+
</pre>
|
|
1134
|
+
|
|
1135
|
+
<h3 id="setup.installation.windows">Installing on Windows</h3>
|
|
1136
|
+
|
|
1137
|
+
|
|
1138
|
+
<ul>
|
|
1139
|
+
<li>Install <a href="http://www.cygwin.com">Cygwin</a>, the Linux-like environment for Windows.</li>
|
|
1140
|
+
</ul>
|
|
1141
|
+
|
|
1142
|
+
|
|
1143
|
+
<ul>
|
|
1144
|
+
<li>Search for object files whose names end with <tt>.so</tt>, <tt>.o</tt>, or <tt>.dll</tt> in your Verilog simulator’s installation directory.</li>
|
|
1145
|
+
</ul>
|
|
1146
|
+
|
|
1147
|
+
|
|
1148
|
+
<ul>
|
|
1149
|
+
<li>Determine which object files, among those found in the previous step, contain symbols whose names begin with “_vpi” by running the <pre>for x in *.{o,so,dll}; do nm $x | grep -q '[Tt] _vpi' > /dev/null && echo $x; done</pre> command in Cygwin.
|
|
1150
|
+
<ul>
|
|
1151
|
+
<li>If you are using Mentor Modelsim, the desired object file can be found at a path similar to <tt>C:\Modeltech\win32\libvsim.dll</tt>.</li>
|
|
1152
|
+
<li>If you are using <span class="caps">GPL</span> Cver, the desired object file can be found at a path similar to <tt>C:\gplcver\objs\v_vpi.o</tt>.</li>
|
|
1153
|
+
</ul></li>
|
|
1154
|
+
</ul>
|
|
1155
|
+
|
|
1156
|
+
|
|
1157
|
+
<div class="admonition">
|
|
1158
|
+
|
|
1159
|
+
<div class="note" id="note2">
|
|
1160
|
+
|
|
1161
|
+
<p style="float:left"><img src="images/note.png" title="note" alt="note" /></p>
|
|
1162
|
+
|
|
1163
|
+
|
|
1164
|
+
<p class="title">Note:</p>
|
|
1165
|
+
|
|
1166
|
+
|
|
1167
|
+
<p>Since Ruby-VPI makes use of the <span class="caps">VPI C</span>-language interface, it links to symbols whose names begin with “_vpi”. It is possible for these symbols to be undefined when Ruby-VPI is compiled under <span class="caps">GNU</span>/Linux and similar operating systems. In contrast, one <a href="http://sourceware.org/ml/cygwin/2001-12/msg01293.html">cannot compile a shared object file with references to undefined symbols under Windows</a>. Thus, we must find a Verilog simulator’s shared object file, which contains definitions of all <span class="caps">VPI</span> symbols, and give this file to the linker when compiling Ruby-VPI.</p>
|
|
1168
|
+
|
|
1169
|
+
|
|
1170
|
+
</div>
|
|
1171
|
+
|
|
1172
|
+
</div>
|
|
1173
|
+
|
|
1174
|
+
<ul>
|
|
1175
|
+
<li>Assign the path of the object file (determined in the previous step) to the <code class="code"><span style="color:#036; font-weight:bold">LDFLAGS</span></code> environment variable. For example, if the object file’s path is <tt>/foo/bar/vpi.so</tt>, then you would run the <pre>export LDFLAGS=/foo/bar/vpi.so</pre> command in Cygwin.</li>
|
|
1176
|
+
</ul>
|
|
1177
|
+
|
|
1178
|
+
|
|
1179
|
+
<ul>
|
|
1180
|
+
<li>You may now install Ruby-VPI by running the <pre>gem install ruby-vpi</pre> command in Cygwin.</li>
|
|
1181
|
+
</ul>
|
|
1182
|
+
|
|
1183
|
+
|
|
1184
|
+
<h2 id="setup.maintenance">Maintenance</h2>
|
|
1185
|
+
|
|
1186
|
+
|
|
1187
|
+
<ul>
|
|
1188
|
+
<li>You can uninstall Ruby-VPI by running the <pre>gem uninstall ruby-vpi</pre> command.</li>
|
|
1189
|
+
<li>You can upgrade to the latest release of Ruby-VPI by running the <pre>gem update ruby-vpi</pre> command.</li>
|
|
1190
|
+
</ul>
|
|
1191
|
+
|
|
1192
|
+
|
|
1193
|
+
<div class="admonition">
|
|
1194
|
+
|
|
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<div class="note" id="note3">
|
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|
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|
|
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<p style="float:left"><img src="images/note.png" title="note" alt="note" /></p>
|
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+
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|
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|
+
<p class="title">Note:</p>
|
|
1201
|
+
|
|
1202
|
+
|
|
1203
|
+
<p>Learn more about using and manipulating RubyGems in <a href="http://www.rubygems.org">the RubyGems user manual</a>.</p>
|
|
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|
+
|
|
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|
+
|
|
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|
+
</div>
|
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|
+
|
|
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|
+
</div>
|
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|
+
|
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|
+
<h1 id="usage">Usage</h1>
|
|
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|
+
|
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|
+
|
|
1213
|
+
<h2 id="usage.tools">Tools</h2>
|
|
1214
|
+
|
|
1215
|
+
|
|
1216
|
+
<p>The <tt>bin</tt> directory contains various utilities which ease the process of writing tests. Each tool provides help and usage information invoked with the <tt>—help</tt> option.</p>
|
|
1217
|
+
|
|
1218
|
+
|
|
1219
|
+
<h3 id="usage.tools.generate-test">Automated test generation</h3>
|
|
1220
|
+
|
|
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|
+
|
|
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|
+
<p>The automated test generator (<strong>generate_test.rb</strong>) generates tests from Verilog 2001 module declarations, as demonstrated <a href="#usage.tutorial.generate-test">in the tutorial</a>. A generated test is composed of the following parts:</p>
|
|
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|
+
|
|
1224
|
+
|
|
1225
|
+
<ul>
|
|
1226
|
+
<li>Runner
|
|
1227
|
+
– written in Rake, this file builds and runs the test.</li>
|
|
1228
|
+
<li>Bench
|
|
1229
|
+
– written in Verilog and Ruby, these files define the testing environment.</li>
|
|
1230
|
+
<li>Design
|
|
1231
|
+
– written in Ruby, this file provides an interface to the design being verified.</li>
|
|
1232
|
+
<li>Prototype
|
|
1233
|
+
– written in Ruby, this file defines a prototype of the design being verified.</li>
|
|
1234
|
+
<li>Specification
|
|
1235
|
+
– written in Ruby, this file describes the expected behavior of the design.</li>
|
|
1236
|
+
</ul>
|
|
1237
|
+
|
|
1238
|
+
|
|
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|
+
<p>The reason for dividing a single test into these parts is mainly to decouple the design from the specification. This allows you to focus on writing the specification while the remainder is automatically generated by the tool. For example, when the interface of a Verilog module changes, you would simply re-run this tool and incorporate those changes (using a <a href="#setup.recom">text merging tool</a>) into the test without diverting your focus from the specification.</p>
|
|
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|
+
|
|
1241
|
+
|
|
1242
|
+
<div class="admonition">
|
|
1243
|
+
|
|
1244
|
+
<div class="tip" id="tip2">
|
|
1245
|
+
|
|
1246
|
+
<p style="float:left"><img src="images/tip.png" title="tip" alt="tip" /></p>
|
|
1247
|
+
|
|
1248
|
+
|
|
1249
|
+
<p class="title">Tip: Using <strong>kdiff3</strong> with the automated test generator.</p>
|
|
1250
|
+
|
|
1251
|
+
|
|
1252
|
+
<ol>
|
|
1253
|
+
<li>Create a file named <tt>merge2</tt> with the following content: <pre class="code">
|
|
1254
|
+
<span style="color:#888">#!/bin/sh</span>
|
|
1255
|
+
<span style="color:#888"># args: old file, new file</span>
|
|
1256
|
+
kdiff3 --auto --output <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">$2</span><span style="color:#710">"</span></span> <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">$@</span><span style="color:#710">"</span></span>
|
|
1257
|
+
</pre></li>
|
|
1258
|
+
<li>Make the file executable by running the <pre>chmod +x merge2</pre> command.</li>
|
|
1259
|
+
<li>Place the file somewhere accessible by your <code class="code"><span style="color:#036; font-weight:bold">PATH</span></code> environment variable.</li>
|
|
1260
|
+
<li>Assign the value “merge2” to the <code class="code"><span style="color:#036; font-weight:bold">MERGER</span></code> environment variable using your shell’s <strong>export</strong> or <strong>setenv</strong> command.</li>
|
|
1261
|
+
</ol>
|
|
1262
|
+
|
|
1263
|
+
|
|
1264
|
+
<p>From now on, <strong>kdiff3</strong> will be invoked to help you transfer your changes between generated files. When you are finished transferring changes, simply issue the “save the file” command and terminate <strong>kdiff3</strong>. Or, if you do not want to transfer any changes, simply terminate <strong>kdiff3</strong>.</p>
|
|
1265
|
+
|
|
1266
|
+
|
|
1267
|
+
</div>
|
|
1268
|
+
|
|
1269
|
+
</div>
|
|
1270
|
+
|
|
1271
|
+
<h3 id="usage.tools.verilog-ruby-conv">Verilog to Ruby conversion</h3>
|
|
1272
|
+
|
|
1273
|
+
|
|
1274
|
+
<p>The <strong>header_to_ruby.rb</strong> tool can be used to convert Verilog header files into Ruby. You can try it by running the <pre>header_to_ruby.rb --help</pre> command.</p>
|
|
1275
|
+
|
|
1276
|
+
|
|
1277
|
+
<h2 id="usage.tutorial">Tutorial</h2>
|
|
1278
|
+
|
|
1279
|
+
|
|
1280
|
+
<ol>
|
|
1281
|
+
<li><a href="#usage.tutorial.declare-design">Declare the design</a>, which is a Verilog module, using Verilog 2001 syntax.</li>
|
|
1282
|
+
<li><a href="#usage.tutorial.generate-test">Generate a test</a> for the design using the <a href="#usage.tools.generate-test">automated test generator</a> tool.</li>
|
|
1283
|
+
<li><a href="#usage.tutorial.specification">Identify your expectations</a> for the design and implement them in the specification.</li>
|
|
1284
|
+
<li>(Optional) <a href="#usage.tutorial.implement-proto">Implement the prototype</a> of the design in Ruby.</li>
|
|
1285
|
+
<li>(Optional) <a href="#usage.tutorial.test-proto">Verify the prototype</a> against the specification.</li>
|
|
1286
|
+
<li><a href="#usage.tutorial.implement-design">Implement the design</a> in Verilog once the prototype has been verified.</li>
|
|
1287
|
+
<li><a href="#usage.tutorial.test-design">Verify the design</a> against the specification.</li>
|
|
1288
|
+
</ol>
|
|
1289
|
+
|
|
1290
|
+
|
|
1291
|
+
<h3 id="usage.tutorial.declare-design">Start with a design</h3>
|
|
1292
|
+
|
|
1293
|
+
|
|
1294
|
+
<p>First, we need a <a href="#glossary.design">design</a> to verify. In this tutorial, <a href="#fig..counter.v_decl">the example named “Declaration of a simple up-counter with synchronous reset”</a> will serve as our design. Its interface is composed of the following parts:</p>
|
|
1295
|
+
|
|
1296
|
+
|
|
1297
|
+
<ul>
|
|
1298
|
+
<li><code class="code"><span style="color:#036; font-weight:bold">Size</span></code> defines the number of bits used to represent the counter’s value.</li>
|
|
1299
|
+
<li><code class="code">clock</code> causes the <code class="code">count</code> register to increment whenever it reaches a positive edge.</li>
|
|
1300
|
+
<li><code class="code">reset</code> causes the <code class="code">count</code> register to become zero when asserted.</li>
|
|
1301
|
+
<li><code class="code">count</code> is a register that contains the counter’s value.</li>
|
|
1302
|
+
</ul>
|
|
1303
|
+
|
|
1304
|
+
|
|
1305
|
+
<div class="formal">
|
|
1306
|
+
|
|
1307
|
+
<div class="example" id="fig..counter.v_decl">
|
|
1308
|
+
|
|
1309
|
+
<p class="title">Example 2. Declaration of a simple up-counter with synchronous reset</p>
|
|
1310
|
+
|
|
1311
|
+
|
|
1312
|
+
<pre class="code" lang="verilog">
|
|
1313
|
+
module counter #(parameter Size = 5) (
|
|
1314
|
+
input clock,
|
|
1315
|
+
input reset,
|
|
1316
|
+
output reg [Size - 1 : 0] count
|
|
1317
|
+
);
|
|
1318
|
+
endmodule
|
|
1319
|
+
</pre>
|
|
1320
|
+
|
|
1321
|
+
</div>
|
|
1322
|
+
|
|
1323
|
+
</div>
|
|
1324
|
+
|
|
1325
|
+
<div class="admonition">
|
|
1326
|
+
|
|
1327
|
+
<div class="important" id="important1">
|
|
1328
|
+
|
|
1329
|
+
<p style="float:left"><img src="images/important.png" title="important" alt="important" /></p>
|
|
1330
|
+
|
|
1331
|
+
|
|
1332
|
+
<p class="title">Important: Before we continue…</p>
|
|
1333
|
+
|
|
1334
|
+
|
|
1335
|
+
<p>Save the source code shown in <a href="#fig..counter.v_decl">the example named “Declaration of a simple up-counter with synchronous reset”</a> into a file named <tt>counter.v</tt>.</p>
|
|
1336
|
+
|
|
1337
|
+
|
|
1338
|
+
</div>
|
|
1339
|
+
|
|
1340
|
+
</div>
|
|
1341
|
+
|
|
1342
|
+
<h3 id="usage.tutorial.generate-test">Generate a test</h3>
|
|
1343
|
+
|
|
1344
|
+
|
|
1345
|
+
<p>Now that we have a <a href="#glossary.design">design</a> to verify, let us generate a <a href="#glossary.test">test</a> for it using the <a href="#usage.tools.generate-test">automated test generator</a>. This tool allows us to implement our specification in either rSpec, xUnit, or our very own format.</p>
|
|
1346
|
+
|
|
1347
|
+
|
|
1348
|
+
Each format represents a different software development methodology:
|
|
1349
|
+
<ul>
|
|
1350
|
+
<li>rSpec represents <a href="#glossary.BDD"><span class="caps">BDD</span></a></li>
|
|
1351
|
+
<li>xUnit represents <a href="#glossary.TDD"><span class="caps">TDD</span></a></li>
|
|
1352
|
+
<li>our own format can represent another methodology</li>
|
|
1353
|
+
</ul>
|
|
1354
|
+
|
|
1355
|
+
|
|
1356
|
+
<p>Both rSpec and xUnit are presented in this tutorial.</p>
|
|
1357
|
+
|
|
1358
|
+
|
|
1359
|
+
<p>Once we have decided how we want to implement our specification, we can proceed to generate a test for our design. <a href="#fig..generate-test.rspec">the example named “Generating a test with specification in rSpec format”</a> and <a href="#fig..generate-test.unit-test">the example named “Generating a test with specification in xUnit format”</a> illustrate this process.</p>
|
|
1360
|
+
|
|
1361
|
+
|
|
1362
|
+
<div class="formal">
|
|
1363
|
+
|
|
1364
|
+
<div class="example" id="fig..generate-test.rspec">
|
|
1365
|
+
|
|
1366
|
+
<p class="title">Example 3. Generating a test with specification in rSpec format</p>
|
|
1367
|
+
|
|
1368
|
+
|
|
1369
|
+
<pre>
|
|
1370
|
+
$ generate_test.rb counter.v --rspec --name rspec
|
|
1371
|
+
|
|
1372
|
+
module counter
|
|
1373
|
+
create counter_rspec_runner.rake
|
|
1374
|
+
create counter_rspec_bench.v
|
|
1375
|
+
create counter_rspec_bench.rb
|
|
1376
|
+
create counter_rspec_design.rb
|
|
1377
|
+
create counter_rspec_proto.rb
|
|
1378
|
+
create counter_rspec_spec.rb
|
|
1379
|
+
</pre>
|
|
1380
|
+
|
|
1381
|
+
</div>
|
|
1382
|
+
|
|
1383
|
+
</div>
|
|
1384
|
+
|
|
1385
|
+
<div class="formal">
|
|
1386
|
+
|
|
1387
|
+
<div class="example" id="fig..generate-test.unit-test">
|
|
1388
|
+
|
|
1389
|
+
<p class="title">Example 4. Generating a test with specification in xUnit format</p>
|
|
1390
|
+
|
|
1391
|
+
|
|
1392
|
+
<pre>
|
|
1393
|
+
$ generate_test.rb counter.v --xunit --name xunit
|
|
1394
|
+
|
|
1395
|
+
module counter
|
|
1396
|
+
create counter_xunit_runner.rake
|
|
1397
|
+
create counter_xunit_bench.v
|
|
1398
|
+
create counter_xunit_bench.rb
|
|
1399
|
+
create counter_xunit_design.rb
|
|
1400
|
+
create counter_xunit_proto.rb
|
|
1401
|
+
create counter_xunit_spec.rb
|
|
1402
|
+
</pre>
|
|
1403
|
+
|
|
1404
|
+
</div>
|
|
1405
|
+
|
|
1406
|
+
</div>
|
|
1407
|
+
|
|
1408
|
+
<h3 id="usage.tutorial.specification">Specify your expectations</h3>
|
|
1409
|
+
|
|
1410
|
+
|
|
1411
|
+
<p>So far, the test generation tool has created a basic foundation for our <a href="#glossary.test">test</a>. Now we must build upon this foundation by identifying our <a href="#glossary.expectation">expectation</a> of the <a href="#glossary.design">design</a>. That is, how do we expect the design to <em>behave</em> under certain conditions?</p>
|
|
1412
|
+
|
|
1413
|
+
|
|
1414
|
+
Here are some reasonable expectations for our simple counter:
|
|
1415
|
+
<ul>
|
|
1416
|
+
<li>A resetted counter’s value should be zero.</li>
|
|
1417
|
+
<li>A resetted counter’s value should increment by one count upon each rising clock edge.</li>
|
|
1418
|
+
<li>A counter with the maximum value should overflow upon increment.</li>
|
|
1419
|
+
</ul>
|
|
1420
|
+
|
|
1421
|
+
|
|
1422
|
+
<p>Now that we have identified a set of expectations for our design, we are ready to implement them in our specification. <a href="#fig..counter_rspec_spec.rb">the example named “Specification implemented in rSpec format”</a> and <a href="#fig..counter_xunit_spec.rb">the example named “Specification implemented in xUnit format”</a> illustrate this process. Note the striking similarities between our expectations and their implementation.</p>
|
|
1423
|
+
|
|
1424
|
+
|
|
1425
|
+
<div class="formal">
|
|
1426
|
+
|
|
1427
|
+
<div class="example" id="fig..counter_rspec_spec.rb">
|
|
1428
|
+
|
|
1429
|
+
<p class="title">Example 5. Specification implemented in rSpec format</p>
|
|
1430
|
+
|
|
1431
|
+
|
|
1432
|
+
<pre class="code"><span style="color:#888"># This file is a behavioral specification for the design under test.</span>
|
|
1433
|
+
|
|
1434
|
+
<span style="color:#888"># lowest upper bound of counter's value</span>
|
|
1435
|
+
<span style="color:#036; font-weight:bold">LIMIT</span> = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#036; font-weight:bold">Counter</span>.<span style="color:#036; font-weight:bold">Size</span>.intVal
|
|
1436
|
+
|
|
1437
|
+
<span style="color:#888"># maximum allowed value for a counter</span>
|
|
1438
|
+
<span style="color:#036; font-weight:bold">MAX</span> = <span style="color:#036; font-weight:bold">LIMIT</span> - <span style="color:#00D; font-weight:bold">1</span>
|
|
1439
|
+
|
|
1440
|
+
context <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">A resetted counter's value</span><span style="color:#710">"</span></span> <span style="color:#080; font-weight:bold">do</span>
|
|
1441
|
+
setup <span style="color:#080; font-weight:bold">do</span>
|
|
1442
|
+
<span style="color:#036; font-weight:bold">Counter</span>.reset!
|
|
1443
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1444
|
+
|
|
1445
|
+
specify <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">should be zero</span><span style="color:#710">"</span></span> <span style="color:#080; font-weight:bold">do</span>
|
|
1446
|
+
<span style="color:#036; font-weight:bold">Counter</span>.count.intVal.should_equal <span style="color:#00D; font-weight:bold">0</span>
|
|
1447
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1448
|
+
|
|
1449
|
+
specify <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">should increment by one count upon each rising clock edge</span><span style="color:#710">"</span></span> <span style="color:#080; font-weight:bold">do</span>
|
|
1450
|
+
<span style="color:#036; font-weight:bold">LIMIT</span>.times <span style="color:#080; font-weight:bold">do</span> |i|
|
|
1451
|
+
<span style="color:#036; font-weight:bold">Counter</span>.count.intVal.should_equal i
|
|
1452
|
+
relay_verilog <span style="color:#888"># increment the counter</span>
|
|
1453
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1454
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1455
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1456
|
+
|
|
1457
|
+
context <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">A counter with the maximum value</span><span style="color:#710">"</span></span> <span style="color:#080; font-weight:bold">do</span>
|
|
1458
|
+
setup <span style="color:#080; font-weight:bold">do</span>
|
|
1459
|
+
<span style="color:#036; font-weight:bold">Counter</span>.reset!
|
|
1460
|
+
|
|
1461
|
+
<span style="color:#888"># increment the counter to maximum value</span>
|
|
1462
|
+
<span style="color:#036; font-weight:bold">MAX</span>.times {relay_verilog}
|
|
1463
|
+
<span style="color:#036; font-weight:bold">Counter</span>.count.intVal.should_equal <span style="color:#036; font-weight:bold">MAX</span>
|
|
1464
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1465
|
+
|
|
1466
|
+
specify <span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">should overflow upon increment</span><span style="color:#710">"</span></span> <span style="color:#080; font-weight:bold">do</span>
|
|
1467
|
+
relay_verilog <span style="color:#888"># increment the counter</span>
|
|
1468
|
+
<span style="color:#036; font-weight:bold">Counter</span>.count.intVal.should_equal <span style="color:#00D; font-weight:bold">0</span>
|
|
1469
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1470
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1471
|
+
</pre>
|
|
1472
|
+
|
|
1473
|
+
</div>
|
|
1474
|
+
|
|
1475
|
+
</div>
|
|
1476
|
+
|
|
1477
|
+
<div class="formal">
|
|
1478
|
+
|
|
1479
|
+
<div class="example" id="fig..counter_xunit_spec.rb">
|
|
1480
|
+
|
|
1481
|
+
<p class="title">Example 6. Specification implemented in xUnit format</p>
|
|
1482
|
+
|
|
1483
|
+
|
|
1484
|
+
<pre class="code"><span style="color:#888"># This file is a behavioral specification for the design under test.</span>
|
|
1485
|
+
|
|
1486
|
+
<span style="color:#888"># lowest upper bound of counter's value</span>
|
|
1487
|
+
<span style="color:#036; font-weight:bold">LIMIT</span> = <span style="color:#00D; font-weight:bold">2</span> ** <span style="color:#036; font-weight:bold">Counter</span>.<span style="color:#036; font-weight:bold">Size</span>.intVal
|
|
1488
|
+
|
|
1489
|
+
<span style="color:#888"># maximum allowed value for a counter</span>
|
|
1490
|
+
<span style="color:#036; font-weight:bold">MAX</span> = <span style="color:#036; font-weight:bold">LIMIT</span> - <span style="color:#00D; font-weight:bold">1</span>
|
|
1491
|
+
|
|
1492
|
+
<span style="color:#080; font-weight:bold">class</span> <span style="color:#B06; font-weight:bold">ResettedCounterValue</span> < <span style="color:#036; font-weight:bold">Test</span>::<span style="color:#036; font-weight:bold">Unit</span>::<span style="color:#036; font-weight:bold">TestCase</span>
|
|
1493
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">setup</span>
|
|
1494
|
+
<span style="color:#036; font-weight:bold">Counter</span>.reset!
|
|
1495
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1496
|
+
|
|
1497
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">test_zero</span>
|
|
1498
|
+
assert_equal <span style="color:#00D; font-weight:bold">0</span>, <span style="color:#036; font-weight:bold">Counter</span>.count.intVal
|
|
1499
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1500
|
+
|
|
1501
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">test_increment</span>
|
|
1502
|
+
<span style="color:#036; font-weight:bold">LIMIT</span>.times <span style="color:#080; font-weight:bold">do</span> |i|
|
|
1503
|
+
assert_equal i, <span style="color:#036; font-weight:bold">Counter</span>.count.intVal
|
|
1504
|
+
relay_verilog <span style="color:#888"># increment the counter</span>
|
|
1505
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1506
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1507
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1508
|
+
|
|
1509
|
+
<span style="color:#080; font-weight:bold">class</span> <span style="color:#B06; font-weight:bold">MaximumCounterValue</span> < <span style="color:#036; font-weight:bold">Test</span>::<span style="color:#036; font-weight:bold">Unit</span>::<span style="color:#036; font-weight:bold">TestCase</span>
|
|
1510
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">setup</span>
|
|
1511
|
+
<span style="color:#036; font-weight:bold">Counter</span>.reset!
|
|
1512
|
+
|
|
1513
|
+
<span style="color:#888"># increment the counter to maximum value</span>
|
|
1514
|
+
<span style="color:#036; font-weight:bold">MAX</span>.times {relay_verilog}
|
|
1515
|
+
assert_equal <span style="color:#036; font-weight:bold">MAX</span>, <span style="color:#036; font-weight:bold">Counter</span>.count.intVal
|
|
1516
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1517
|
+
|
|
1518
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#06B; font-weight:bold">test_overflow</span>
|
|
1519
|
+
relay_verilog <span style="color:#888"># increment the counter</span>
|
|
1520
|
+
assert_equal <span style="color:#00D; font-weight:bold">0</span>, <span style="color:#036; font-weight:bold">Counter</span>.count.intVal
|
|
1521
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1522
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1523
|
+
</pre>
|
|
1524
|
+
|
|
1525
|
+
</div>
|
|
1526
|
+
|
|
1527
|
+
</div>
|
|
1528
|
+
|
|
1529
|
+
<div class="admonition">
|
|
1530
|
+
|
|
1531
|
+
<div class="important" id="important2">
|
|
1532
|
+
|
|
1533
|
+
<p style="float:left"><img src="images/important.png" title="important" alt="important" /></p>
|
|
1534
|
+
|
|
1535
|
+
|
|
1536
|
+
<p class="title">Important: Before we continue…</p>
|
|
1537
|
+
|
|
1538
|
+
|
|
1539
|
+
<ol>
|
|
1540
|
+
<li>Replace the contents of the file named <tt>counter_rspec_spec.rb</tt> with the source code shown in <a href="#fig..counter_rspec_spec.rb">the example named “Specification implemented in rSpec format”</a>.</li>
|
|
1541
|
+
<li>Replace the contents of the file named <tt>counter_xunit_spec.rb</tt> with the source code shown in <a href="#fig..counter_xunit_spec.rb">the example named “Specification implemented in xUnit format”</a>.</li>
|
|
1542
|
+
<li>Replace the contents of the files named <tt>counter_rspec_design.rb</tt> and <tt>counter_xunit_design.rb</tt> with the following code. This code defines the reset! method which resets our Verilog design. <pre class="code">
|
|
1543
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#036; font-weight:bold">Counter</span>.reset!
|
|
1544
|
+
reset.intVal = <span style="color:#00D; font-weight:bold">1</span>
|
|
1545
|
+
|
|
1546
|
+
<span style="color:#888"># simulate one clock cycle</span>
|
|
1547
|
+
relay_verilog
|
|
1548
|
+
|
|
1549
|
+
reset.intVal = <span style="color:#00D; font-weight:bold">0</span>
|
|
1550
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1551
|
+
</pre></li>
|
|
1552
|
+
</ol>
|
|
1553
|
+
|
|
1554
|
+
|
|
1555
|
+
</div>
|
|
1556
|
+
|
|
1557
|
+
</div>
|
|
1558
|
+
|
|
1559
|
+
<h3 id="usage.tutorial.implement-proto">Implement the prototype</h3>
|
|
1560
|
+
|
|
1561
|
+
|
|
1562
|
+
<p>Now that we have a <a href="#glossary.specification">specification</a> against which to verify our <a href="#glossary.design">design</a>, let us build a prototype of our design. By doing so, we exercise our specification, experience potential problems that may arise when we later implement our design in Verilog, and gain confidence in our work. <a href="#fig..counter_proto.rb">the example named “Ruby prototype of our Verilog design”</a> shows the completed prototype for our design.</p>
|
|
1563
|
+
|
|
1564
|
+
|
|
1565
|
+
<div class="formal">
|
|
1566
|
+
|
|
1567
|
+
<div class="example" id="fig..counter_proto.rb">
|
|
1568
|
+
|
|
1569
|
+
<p class="title">Example 7. Ruby prototype of our Verilog design</p>
|
|
1570
|
+
|
|
1571
|
+
|
|
1572
|
+
<pre class="code">
|
|
1573
|
+
<span style="color:#080; font-weight:bold">def</span> <span style="color:#036; font-weight:bold">Counter</span>.simulate!
|
|
1574
|
+
<span style="color:#080; font-weight:bold">if</span> reset.intVal == <span style="color:#00D; font-weight:bold">1</span>
|
|
1575
|
+
count.intVal = <span style="color:#00D; font-weight:bold">0</span>
|
|
1576
|
+
<span style="color:#080; font-weight:bold">else</span>
|
|
1577
|
+
count.intVal += <span style="color:#00D; font-weight:bold">1</span>
|
|
1578
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1579
|
+
<span style="color:#080; font-weight:bold">end</span>
|
|
1580
|
+
</pre>
|
|
1581
|
+
|
|
1582
|
+
</div>
|
|
1583
|
+
|
|
1584
|
+
</div>
|
|
1585
|
+
|
|
1586
|
+
<div class="admonition">
|
|
1587
|
+
|
|
1588
|
+
<div class="important" id="important3">
|
|
1589
|
+
|
|
1590
|
+
<p style="float:left"><img src="images/important.png" title="important" alt="important" /></p>
|
|
1591
|
+
|
|
1592
|
+
|
|
1593
|
+
<p class="title">Important: Before we continue…</p>
|
|
1594
|
+
|
|
1595
|
+
|
|
1596
|
+
<p>Replace the contents of the files named <tt>counter_rspec_proto.rb</tt> and <tt>counter_xunit_proto.rb</tt> with the source code shown in <a href="#fig..counter_proto.rb">the example named “Ruby prototype of our Verilog design”</a></p>
|
|
1597
|
+
|
|
1598
|
+
|
|
1599
|
+
</div>
|
|
1600
|
+
|
|
1601
|
+
</div>
|
|
1602
|
+
|
|
1603
|
+
<h3 id="usage.tutorial.test-proto">Verify the prototype</h3>
|
|
1604
|
+
|
|
1605
|
+
|
|
1606
|
+
<p>Now that we have implemented our prototype, we are ready to verify it against our <a href="#glossary.specification">specification</a> by running the <a href="#glossary.test">test</a>. <a href="#fig..test-proto.rspec">the example named “Running a test with specification in rSpec format”</a> and <a href="#fig..test-proto.unit-test">the example named “Running a test with specification in xUnit format”</a> illustrate this process.</p>
|
|
1607
|
+
|
|
1608
|
+
|
|
1609
|
+
<div class="admonition">
|
|
1610
|
+
|
|
1611
|
+
<div class="tip" id="tip3">
|
|
1612
|
+
|
|
1613
|
+
<p style="float:left"><img src="images/tip.png" title="tip" alt="tip" /></p>
|
|
1614
|
+
|
|
1615
|
+
|
|
1616
|
+
<p class="title">Tip: Reuse your specification.</p>
|
|
1617
|
+
|
|
1618
|
+
|
|
1619
|
+
<p>The <em>same</em> specification can be used to verify both prototype and design.</p>
|
|
1620
|
+
|
|
1621
|
+
|
|
1622
|
+
</div>
|
|
1623
|
+
|
|
1624
|
+
</div>
|
|
1625
|
+
|
|
1626
|
+
<p>Here, the <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> environment variable is assigned a non-empty value while running the test, so that, instead of our design, our prototype is verified against our specification. You can also assign a value to <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> before running the test, by using your shell’s <strong>export</strong> or <strong>setenv</strong> command. Finally, the Icarus Verilog simulator, denoted by <em>cver</em>, is used to run the simulation.</p>
|
|
1627
|
+
|
|
1628
|
+
|
|
1629
|
+
<div class="admonition">
|
|
1630
|
+
|
|
1631
|
+
<div class="tip" id="tip4">
|
|
1632
|
+
|
|
1633
|
+
<p style="float:left"><img src="images/tip.png" title="tip" alt="tip" /></p>
|
|
1634
|
+
|
|
1635
|
+
|
|
1636
|
+
<p class="title">Tip: What can the test runner do?</p>
|
|
1637
|
+
|
|
1638
|
+
|
|
1639
|
+
<p>If you invoke the test runner (1) without any arguments or (2) with the <tt>-T</tt> option, it will show you a list of tasks that it can perform for you.</p>
|
|
1640
|
+
|
|
1641
|
+
|
|
1642
|
+
</div>
|
|
1643
|
+
|
|
1644
|
+
</div>
|
|
1645
|
+
|
|
1646
|
+
<div class="formal">
|
|
1647
|
+
|
|
1648
|
+
<div class="example" id="fig..test-proto.rspec">
|
|
1649
|
+
|
|
1650
|
+
<p class="title">Example 8. Running a test with specification in rSpec format</p>
|
|
1651
|
+
|
|
1652
|
+
|
|
1653
|
+
<pre>
|
|
1654
|
+
$ rake -f counter_rspec_runner.rake cver PROTOTYPE=1
|
|
1655
|
+
|
|
1656
|
+
Ruby-VPI: prototype has been enabled for test "counter_rspec"
|
|
1657
|
+
|
|
1658
|
+
A resetted counter's value
|
|
1659
|
+
- should be zero
|
|
1660
|
+
- should increment by one count upon each rising clock edge
|
|
1661
|
+
|
|
1662
|
+
A counter with the maximum value
|
|
1663
|
+
- should overflow upon increment
|
|
1664
|
+
|
|
1665
|
+
Finished in 0.018199 seconds
|
|
1666
|
+
|
|
1667
|
+
3 specifications, 0 failures
|
|
1668
|
+
</pre>
|
|
1669
|
+
|
|
1670
|
+
</div>
|
|
1671
|
+
|
|
1672
|
+
</div>
|
|
1673
|
+
|
|
1674
|
+
<div class="formal">
|
|
1675
|
+
|
|
1676
|
+
<div class="example" id="fig..test-proto.unit-test">
|
|
1677
|
+
|
|
1678
|
+
<p class="title">Example 9. Running a test with specification in xUnit format</p>
|
|
1679
|
+
|
|
1680
|
+
|
|
1681
|
+
<pre>
|
|
1682
|
+
$ rake -f counter_xunit_runner.rake cver PROTOTYPE=1
|
|
1683
|
+
|
|
1684
|
+
Ruby-VPI: prototype has been enabled for test "counter_xunit"
|
|
1685
|
+
|
|
1686
|
+
Loaded suite counter_xunit_bench
|
|
1687
|
+
Started
|
|
1688
|
+
...
|
|
1689
|
+
Finished in 0.040668 seconds.
|
|
1690
|
+
|
|
1691
|
+
3 tests, 35 assertions, 0 failures, 0 errors
|
|
1692
|
+
</pre>
|
|
1693
|
+
|
|
1694
|
+
</div>
|
|
1695
|
+
|
|
1696
|
+
</div>
|
|
1697
|
+
|
|
1698
|
+
<h3 id="usage.tutorial.implement-design">Implement the design</h3>
|
|
1699
|
+
|
|
1700
|
+
|
|
1701
|
+
<p>Now that we have implemented and verified our prototype, we are ready to implement our <a href="#glossary.design">design</a>. This is often quite simple because we translate <em>existing</em> code from Ruby (our prototype) into Verilog (our design). <a href="#fig..counter.v_impl">the example named “Implementation of a simple up-counter with synchronous reset”</a> illustrates the result of this process. Once again, note the striking similarities between the implementation of our prototype and design.</p>
|
|
1702
|
+
|
|
1703
|
+
|
|
1704
|
+
<div class="formal">
|
|
1705
|
+
|
|
1706
|
+
<div class="example" id="fig..counter.v_impl">
|
|
1707
|
+
|
|
1708
|
+
<p class="title">Example 10. Implementation of a simple up-counter with synchronous reset</p>
|
|
1709
|
+
|
|
1710
|
+
|
|
1711
|
+
<pre class="code" lang="verilog">/**
|
|
1712
|
+
A simple up-counter with synchronous reset.
|
|
1713
|
+
|
|
1714
|
+
@param Size Number of bits used to represent the counter's value.
|
|
1715
|
+
@param clock Increments the counter's value upon each positive edge.
|
|
1716
|
+
@param reset Zeroes the counter's value when asserted.
|
|
1717
|
+
@param count The counter's value.
|
|
1718
|
+
*/
|
|
1719
|
+
module counter #(parameter Size = 5) (
|
|
1720
|
+
input clock,
|
|
1721
|
+
input reset,
|
|
1722
|
+
output reg [Size - 1 : 0] count
|
|
1723
|
+
);
|
|
1724
|
+
always @(posedge clock) begin
|
|
1725
|
+
if (reset)
|
|
1726
|
+
count <= 0;
|
|
1727
|
+
else
|
|
1728
|
+
count <= count + 1;
|
|
1729
|
+
end
|
|
1730
|
+
endmodule
|
|
1731
|
+
</pre>
|
|
1732
|
+
|
|
1733
|
+
</div>
|
|
1734
|
+
|
|
1735
|
+
</div>
|
|
1736
|
+
|
|
1737
|
+
<div class="admonition">
|
|
1738
|
+
|
|
1739
|
+
<div class="important" id="important4">
|
|
1740
|
+
|
|
1741
|
+
<p style="float:left"><img src="images/important.png" title="important" alt="important" /></p>
|
|
1742
|
+
|
|
1743
|
+
|
|
1744
|
+
<p class="title">Important: Before we continue…</p>
|
|
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|
+
|
|
1746
|
+
|
|
1747
|
+
<p>Replace the contents of the file named <tt>counter.v</tt> with the source code shown in <a href="#fig..counter.v_impl">the example named “Implementation of a simple up-counter with synchronous reset”</a></p>
|
|
1748
|
+
|
|
1749
|
+
|
|
1750
|
+
</div>
|
|
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|
+
|
|
1752
|
+
</div>
|
|
1753
|
+
|
|
1754
|
+
<h3 id="usage.tutorial.test-design">Verify the design</h3>
|
|
1755
|
+
|
|
1756
|
+
|
|
1757
|
+
<p>Now that we have implemented our <a href="#glossary.design">design</a>, we are ready to verify it against our <a href="#glossary.specification">specification</a> by running the <a href="#glossary.test">test</a>. <a href="#fig..test-design.rspec">the example named “Running a test with specification in rSpec format”</a> and <a href="#fig..test-design.unit-test">the example named “Running a test with specification in xUnit format”</a> illustrate this process.</p>
|
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|
+
|
|
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|
+
|
|
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|
+
<p>Here, the <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code> environment variable is <em>not</em> specified while running the test, so that our design, instead of our prototype, is verified against our specification. You can also achieve this effect by assigning an empty value to <code class="code"><span style="color:#036; font-weight:bold">PROTOTYPE</span></code>, or by using your shell’s <strong>unset</strong> command. Finally, the <span class="caps">GPL</span> Cver Verilog simulator, denoted by <em>cver</em>, is used to run the simulation.</p>
|
|
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|
+
|
|
1762
|
+
|
|
1763
|
+
<div class="admonition">
|
|
1764
|
+
|
|
1765
|
+
<div class="tip" id="tip5">
|
|
1766
|
+
|
|
1767
|
+
<p style="float:left"><img src="images/tip.png" title="tip" alt="tip" /></p>
|
|
1768
|
+
|
|
1769
|
+
|
|
1770
|
+
<p class="title">Tip: Running multiple tests at once.</p>
|
|
1771
|
+
|
|
1772
|
+
|
|
1773
|
+
<p>Create a file named <tt>Rakefile</tt> containing the following line.</p>
|
|
1774
|
+
|
|
1775
|
+
|
|
1776
|
+
<blockquote>
|
|
1777
|
+
<p><code class="code">require <span style="background-color:#fff0f0"><span style="color:#710">'</span><span style="color:#D20">ruby-vpi/runner_proxy</span><span style="color:#710">'</span></span></code></p>
|
|
1778
|
+
</blockquote>
|
|
1779
|
+
|
|
1780
|
+
|
|
1781
|
+
<p>Now you can invoke all test runners in the current directory simply by executing <pre>rake cver</pre> (where <em>cver</em> denotes the <span class="caps">GPL</span> Cver simulator).</p>
|
|
1782
|
+
|
|
1783
|
+
|
|
1784
|
+
</div>
|
|
1785
|
+
|
|
1786
|
+
</div>
|
|
1787
|
+
|
|
1788
|
+
<div class="formal">
|
|
1789
|
+
|
|
1790
|
+
<div class="example" id="fig..test-design.rspec">
|
|
1791
|
+
|
|
1792
|
+
<p class="title">Example 11. Running a test with specification in rSpec format</p>
|
|
1793
|
+
|
|
1794
|
+
|
|
1795
|
+
<pre>
|
|
1796
|
+
$ rake -f counter_rspec_runner.rake cver
|
|
1797
|
+
|
|
1798
|
+
A resetted counter's value
|
|
1799
|
+
- should be zero
|
|
1800
|
+
- should increment by one count upon each rising clock edge
|
|
1801
|
+
|
|
1802
|
+
A counter with the maximum value
|
|
1803
|
+
- should overflow upon increment
|
|
1804
|
+
|
|
1805
|
+
Finished in 0.005628 seconds
|
|
1806
|
+
|
|
1807
|
+
3 specifications, 0 failures
|
|
1808
|
+
</pre>
|
|
1809
|
+
|
|
1810
|
+
</div>
|
|
1811
|
+
|
|
1812
|
+
</div>
|
|
1813
|
+
|
|
1814
|
+
<div class="formal">
|
|
1815
|
+
|
|
1816
|
+
<div class="example" id="fig..test-design.unit-test">
|
|
1817
|
+
|
|
1818
|
+
<p class="title">Example 12. Running a test with specification in xUnit format</p>
|
|
1819
|
+
|
|
1820
|
+
|
|
1821
|
+
<pre>
|
|
1822
|
+
$ rake -f counter_xunit_runner.rake cver
|
|
1823
|
+
|
|
1824
|
+
Loaded suite counter_xunit_bench
|
|
1825
|
+
Started
|
|
1826
|
+
...
|
|
1827
|
+
Finished in 0.006766 seconds.
|
|
1828
|
+
|
|
1829
|
+
3 tests, 35 assertions, 0 failures, 0 errors
|
|
1830
|
+
</pre>
|
|
1831
|
+
|
|
1832
|
+
</div>
|
|
1833
|
+
|
|
1834
|
+
</div>
|
|
1835
|
+
|
|
1836
|
+
<h2 id="usage.examples">Examples</h2>
|
|
1837
|
+
|
|
1838
|
+
|
|
1839
|
+
<p>The <tt>samp</tt> directory contains several example tests which illustrate how Ruby-VPI can be used. Each example has an associated <tt>Rakefile</tt> which simplifies the process of running it. Therefore, simply navigate into an example directory and run the <pre>rake</pre> command to get started.</p>
|
|
1840
|
+
|
|
1841
|
+
|
|
1842
|
+
<p>Also, some example specifications make use of <span class="caps">BDD</span> through the rSpec library. See <a href="#background.methodology">the section named “Methodology”</a> for a discussion of rSpec.</p>
|
|
1843
|
+
|
|
1844
|
+
|
|
1845
|
+
<h1 id="hacking">Hacking</h1>
|
|
1846
|
+
|
|
1847
|
+
|
|
1848
|
+
<h2 id="hacking.release-packages">Building release packages</h2>
|
|
1849
|
+
|
|
1850
|
+
|
|
1851
|
+
<p>In addition to the <a href="./doc/usage.requirements.html">normal requirements</a>, you need the following software to build release packages:</p>
|
|
1852
|
+
|
|
1853
|
+
|
|
1854
|
+
<ul>
|
|
1855
|
+
<li><a href="http://www.swig.org/"><span class="caps">SWIG</span></a></li>
|
|
1856
|
+
<li><a href="http://rubyforge.org/projects/redcloth/">RedCloth</a></li>
|
|
1857
|
+
<li><a href="http://rubyforge.org/projects/coderay/">CodeRay</a></li>
|
|
1858
|
+
</ul>
|
|
1859
|
+
|
|
1860
|
+
|
|
1861
|
+
<p>Once you have satisfied these requirements, you can run <pre>rake release</pre> to build the release packages. Also, see the output of <pre>rake -T</pre> for more build options.</p>
|
|
1862
|
+
|
|
1863
|
+
|
|
1864
|
+
<h1 id="problems">Known problems</h1>
|
|
1865
|
+
|
|
1866
|
+
|
|
1867
|
+
<p>This chapter presents known problems and possible solutions. In addition, previously solved problems have been retained for historical reference.</p>
|
|
1868
|
+
|
|
1869
|
+
|
|
1870
|
+
<h2 id="problems.ruby">Ruby</h2>
|
|
1871
|
+
|
|
1872
|
+
|
|
1873
|
+
<h3 id="problems.ruby.SystemStackError">SystemStackError</h3>
|
|
1874
|
+
|
|
1875
|
+
|
|
1876
|
+
<div class="admonition">
|
|
1877
|
+
|
|
1878
|
+
<div class="note" id="note1">
|
|
1879
|
+
|
|
1880
|
+
<p style="float:left"><img src="images/note.png" title="note" alt="note" /></p>
|
|
1881
|
+
|
|
1882
|
+
|
|
1883
|
+
<p class="title">Note: Fixed in 2.0.0.</p>
|
|
1884
|
+
|
|
1885
|
+
|
|
1886
|
+
</div>
|
|
1887
|
+
|
|
1888
|
+
</div>
|
|
1889
|
+
|
|
1890
|
+
<p>If a “stack level too deep (SystemStackError)” error occurs during the simulation, then increase the system-resource limit for stack-size by running the <pre>ulimit -s unlimited</pre> command before starting the simulation.</p>
|
|
1891
|
+
|
|
1892
|
+
|
|
1893
|
+
<h3 id="problems.ruby.xUnit">test/unit</h3>
|
|
1894
|
+
|
|
1895
|
+
|
|
1896
|
+
<div class="admonition">
|
|
1897
|
+
|
|
1898
|
+
<div class="note" id="note1">
|
|
1899
|
+
|
|
1900
|
+
<p style="float:left"><img src="images/note.png" title="note" alt="note" /></p>
|
|
1901
|
+
|
|
1902
|
+
|
|
1903
|
+
<p class="title">Note: Fixed in 2.0.0.</p>
|
|
1904
|
+
|
|
1905
|
+
|
|
1906
|
+
</div>
|
|
1907
|
+
|
|
1908
|
+
</div>
|
|
1909
|
+
|
|
1910
|
+
<p>If your specification employs Ruby’s unit testing framework, then you will encounter an error saying “[BUG] cross-thread violation on rb_gc()”.</p>
|
|
1911
|
+
|
|
1912
|
+
|
|
1913
|
+
<h2 id="problem.ivl">Icarus Verilog</h2>
|
|
1914
|
+
|
|
1915
|
+
|
|
1916
|
+
<h3 id="problems.ivl.vpi_handle_by_name">Vpi::vpi_handle_by_name</h3>
|
|
1917
|
+
|
|
1918
|
+
|
|
1919
|
+
<h4 id="problems.ivl.vpi_handle_by_name.absolute-paths">Give full paths to Verilog objects</h4>
|
|
1920
|
+
|
|
1921
|
+
|
|
1922
|
+
<p>In version 0.8 and snapshot 20061009 of Icarus Verilog, the <code class="code">vpi_handle_by_name</code> function requires an <em>absolute</em> path (including the name of the bench which instantiates the design) to a Verilog object. In addition, <code class="code">vpi_handle_by_name</code> is unable to retrieve the handle for a module parameter.</p>
|
|
1923
|
+
|
|
1924
|
+
|
|
1925
|
+
<p>For example, consider <a href="#ex..TestFoo">the example named “Part of a bench which instantiates a Verilog design”</a> Here, one needs to specify <code class="code"><span style="color:#036; font-weight:bold">TestFoo</span>.my_foo.clk</code> instead of <code class="code">my_foo.clk</code> in order to access the clk input of the my_foo module instance.</p>
|
|
1926
|
+
|
|
1927
|
+
|
|
1928
|
+
<div class="formal">
|
|
1929
|
+
|
|
1930
|
+
<div class="example" id="ex..TestFoo">
|
|
1931
|
+
|
|
1932
|
+
<p class="title">Example 13. Part of a bench which instantiates a Verilog design</p>
|
|
1933
|
+
|
|
1934
|
+
|
|
1935
|
+
<pre class="code" lang="verilog">
|
|
1936
|
+
module TestFoo;
|
|
1937
|
+
reg clk_reg;
|
|
1938
|
+
Foo my_foo(.clk(clk_reg));
|
|
1939
|
+
endmodule
|
|
1940
|
+
</pre>
|
|
1941
|
+
|
|
1942
|
+
</div>
|
|
1943
|
+
|
|
1944
|
+
</div>
|
|
1945
|
+
|
|
1946
|
+
<h4 id="problems.ivl.vpi_handle_by_name.connect-registers">Registers must be connected</h4>
|
|
1947
|
+
|
|
1948
|
+
|
|
1949
|
+
<p>In version 0.8 of Icarus Verilog, if you want to access a register in a design, then it must be connected to something (either assigned to a wire or passed as a parameter to a module instantiation). Otherwise, you will get a <code class="code"><span style="color:#038; font-weight:bold">nil</span></code> value as the result of <code class="code">vpi_handle_by_name</code> method.</p>
|
|
1950
|
+
|
|
1951
|
+
|
|
1952
|
+
<p>For example, suppose you wanted to access the <code class="code">clk_reg</code> register, from the bench shown in <a href="#ex..TestFoo_bad">the example named “Bad design with unconnected registers”</a> If you execute the statement <code class="code">clk_reg = vpi_handle_by_name(<span style="background-color:#fff0f0"><span style="color:#710">"</span><span style="color:#D20">TestFoo.clk_reg</span><span style="color:#710">"</span></span>, <span style="color:#038; font-weight:bold">nil</span>)</code> in a specification, then you will discover that the <code class="code">vpi_handle_by_name</code> method returns <code class="code"><span style="color:#038; font-weight:bold">nil</span></code> instead of a handle to the <code class="code">clk_reg</code> register.</p>
|
|
1953
|
+
|
|
1954
|
+
|
|
1955
|
+
<p>The solution is to change the design such that it appears like the one shown in <a href="#ex..TestFoo_fix">the example named “Fixed design with wired registers”</a> where the register is connected to a wire, or <a href="#ex..TestFoo">the example named “Part of a bench which instantiates a Verilog design”</a> where the register is connected to a module instantiation.</p>
|
|
1956
|
+
|
|
1957
|
+
|
|
1958
|
+
<div class="formal">
|
|
1959
|
+
|
|
1960
|
+
<div class="example" id="ex..TestFoo_bad">
|
|
1961
|
+
|
|
1962
|
+
<p class="title">Example 14. Bad design with unconnected registers</p>
|
|
1963
|
+
|
|
1964
|
+
|
|
1965
|
+
<pre class="code" lang="verilog">
|
|
1966
|
+
module TestFoo;
|
|
1967
|
+
reg clk_reg;
|
|
1968
|
+
endmodule
|
|
1969
|
+
</pre>
|
|
1970
|
+
|
|
1971
|
+
<p>Here the <code class="code">clk_reg</code> register is not connected to anything.</p>
|
|
1972
|
+
|
|
1973
|
+
|
|
1974
|
+
</div>
|
|
1975
|
+
|
|
1976
|
+
</div>
|
|
1977
|
+
|
|
1978
|
+
<div class="formal">
|
|
1979
|
+
|
|
1980
|
+
<div class="example" id="ex..TestFoo_fix">
|
|
1981
|
+
|
|
1982
|
+
<p class="title">Example 15. Fixed design with wired registers</p>
|
|
1983
|
+
|
|
1984
|
+
|
|
1985
|
+
<pre class="code" lang="verilog">
|
|
1986
|
+
module TestFoo;
|
|
1987
|
+
reg clk_reg;
|
|
1988
|
+
wire clk_wire;
|
|
1989
|
+
assign clk_wire = clk_reg;
|
|
1990
|
+
endmodule
|
|
1991
|
+
</pre>
|
|
1992
|
+
|
|
1993
|
+
<p>Here the <code class="code">clk_reg</code> register is connected to the <code class="code">clk_wire</code> wire.</p>
|
|
1994
|
+
|
|
1995
|
+
|
|
1996
|
+
</div>
|
|
1997
|
+
|
|
1998
|
+
</div>
|
|
1999
|
+
|
|
2000
|
+
<h3 id="problems.ivl.vpi_reset">Vpi::reset</h3>
|
|
2001
|
+
|
|
2002
|
+
|
|
2003
|
+
<div class="caution">The <code class="code">vpi_control</code> method was removed in release 3.0.0 (2006-04-23). Please use <code class="code"><span style="color:#036; font-weight:bold">Vpi</span>::vpi_control(<span style="color:#036; font-weight:bold">VpiReset</span>)</code> instead.</div>
|
|
2004
|
+
|
|
2005
|
+
<p>In version 0.8 of Icarus Verilog, the <code class="code">vpi_control(vpiReset)</code> VPI function causes an assertion to fail inside the simulator. As a result, the simulation terminates and a core dump is produced.</p>
|
|
2006
|
+
|
|
2007
|
+
|
|
2008
|
+
<h2 id="problems.vsim">Mentor Modelsim</h2>
|
|
2009
|
+
|
|
2010
|
+
|
|
2011
|
+
<h3 id="problems.vsim.ruby_run">ruby_run();</h3>
|
|
2012
|
+
|
|
2013
|
+
|
|
2014
|
+
<div class="admonition">
|
|
2015
|
+
|
|
2016
|
+
<div class="note" id="note1">
|
|
2017
|
+
|
|
2018
|
+
<p style="float:left"><img src="images/note.png" title="note" alt="note" /></p>
|
|
2019
|
+
|
|
2020
|
+
|
|
2021
|
+
<p class="title">Note: Fixed in 2.0.0.</p>
|
|
2022
|
+
|
|
2023
|
+
|
|
2024
|
+
</div>
|
|
2025
|
+
|
|
2026
|
+
</div>
|
|
2027
|
+
|
|
2028
|
+
<p>Version 6.1b of Mentor Modelsim doesn’t play nicely with either an embedded Ruby interpreter or <span class="caps">POSIX</span> threads in a <span class="caps">PLI</span> application. When Ruby-VPI invokes the ruby_run function (which starts the Ruby interpreter), the simulator terminates immediately with an exit status of 0.</p>
|
|
2029
|
+
|
|
2030
|
+
|
|
2031
|
+
<h1 id="glossary">Glossary</h1>
|
|
2032
|
+
|
|
2033
|
+
|
|
2034
|
+
<h2 id="glossary.bench">Bench</h2>
|
|
2035
|
+
|
|
2036
|
+
|
|
2037
|
+
<p>An environment in which a <a href="#glossary.design">design</a> is verified against a <a href="#glossary.specification">specification</a>. Often, it is used to emulate conditions in which the design will be eventually deployed.</p>
|
|
2038
|
+
|
|
2039
|
+
|
|
2040
|
+
<h2 id="glossary.BDD"><span class="caps">BDD</span></h2>
|
|
2041
|
+
|
|
2042
|
+
|
|
2043
|
+
<p>Behavior driven development.</p>
|
|
2044
|
+
|
|
2045
|
+
|
|
2046
|
+
<p>A software development methodology which emphasizes thinking in terms of behavior when designing, implementing, and verifying software. See the <a href="http://behaviour-driven.org/">official wiki</a> for more information.</p>
|
|
2047
|
+
|
|
2048
|
+
|
|
2049
|
+
<h2 id="glossary.design">Design</h2>
|
|
2050
|
+
|
|
2051
|
+
|
|
2052
|
+
<p>An idea or entity that is verified against a <a href="#glossary.specification">specification</a> in order to ensure correctness or soundness of its being. In other words, it is the thing being checked: does it work or not?</p>
|
|
2053
|
+
|
|
2054
|
+
|
|
2055
|
+
<h2 id="glossary.expectation">Expectation</h2>
|
|
2056
|
+
|
|
2057
|
+
|
|
2058
|
+
<p>The desired response to some stimulus.</p>
|
|
2059
|
+
|
|
2060
|
+
|
|
2061
|
+
<h2 id="glossary.handle">Handle</h2>
|
|
2062
|
+
|
|
2063
|
+
|
|
2064
|
+
<p>An object in a Verilog simulation. For example, a handle can represent a wire, register, module, if-statement, expression, and so on.</p>
|
|
2065
|
+
|
|
2066
|
+
|
|
2067
|
+
<h2 id="glossary.rake">Rake</h2>
|
|
2068
|
+
|
|
2069
|
+
|
|
2070
|
+
<blockquote>
|
|
2071
|
+
<p>Rake is a build tool, written in Ruby, using Ruby as a build language. Rake is similar to make in scope and purpose. —<a href="http://docs.rubyrake.org">Rake documentation</a></p>
|
|
2072
|
+
</blockquote>
|
|
2073
|
+
|
|
2074
|
+
|
|
2075
|
+
<p>See the <a href="http://rake.rubyforge.org">Rake website</a> for more information.</p>
|
|
2076
|
+
|
|
2077
|
+
|
|
2078
|
+
<h2 id="glossary.rspec">rSpec</h2>
|
|
2079
|
+
|
|
2080
|
+
|
|
2081
|
+
<p>Ruby framework for <span class="caps">BDD</span>. See the <a href="http://rspec.rubyforge.org">rSpec website</a> and <a href="http://rspec.rubyforge.org/tutorials/index.html">tutorial</a> for more information.</p>
|
|
2082
|
+
|
|
2083
|
+
|
|
2084
|
+
<h2 id="glossary.specification">Specification</h2>
|
|
2085
|
+
|
|
2086
|
+
|
|
2087
|
+
<p>A set of <a href="#glossary.expectations">expectation</a> which define the desired behavior of a <a href="#glossary.design">design</a> when it is subjected to certain conditions.</p>
|
|
2088
|
+
|
|
2089
|
+
|
|
2090
|
+
<h2 id="glossary.TDD"><span class="caps">TDD</span></h2>
|
|
2091
|
+
|
|
2092
|
+
|
|
2093
|
+
<p>Test Driven Development.</p>
|
|
2094
|
+
|
|
2095
|
+
|
|
2096
|
+
<h2 id="glossary.test">Test</h2>
|
|
2097
|
+
|
|
2098
|
+
|
|
2099
|
+
<p>Something that checks if a <a href="#glossary.design">design</a> satisfies a <a href="#glossary.specification">specification</a>.</p>
|
|
2100
|
+
|
|
2101
|
+
|
|
2102
|
+
<h2 id="glossary.test_bench">Test bench</h2>
|
|
2103
|
+
|
|
2104
|
+
|
|
2105
|
+
<p>An allusion to <a href="#background.vocab">a bench in an electronics laboratory</a>, or so it seems.</p>
|
|
2106
|
+
</body>
|
|
2107
|
+
</html>
|