rnes 0.1.0

data/lib/rnes/interrupt_line.rb

@@ -0,0 +1,30 @@
+module Rnes
+  class InterruptLine
+    # @return [Boolean]
+    attr_reader :irq
+
+    # @return [Boolean]
+    attr_reader :nmi
+
+    def initialize
+      @irq = false
+      @nmi = false
+    end
+
+    def assert_irq
+      @irq = true
+    end
+
+    def assert_nmi
+      @nmi = true
+    end
+
+    def deassert_irq
+      @irq = false
+    end
+
+    def deassert_nmi
+      @nmi = false
+    end
+  end
+end

data/lib/rnes/keypad.rb

@@ -0,0 +1,51 @@
+module Rnes
+  class Keypad
+    KEY_MAP = {
+      '.' => 0,
+      ',' => 1,
+      'n' => 2,
+      'm' => 3,
+      'w' => 4,
+      's' => 5,
+      'a' => 6,
+      'd' => 7,
+    }.freeze
+
+    def initialize
+      @buffer = 0
+      @copy = 0
+      @index = 0
+    end
+
+    def check
+      character = ::STDIN.read_nonblock(1)
+      index = KEY_MAP[character]
+      if index
+        @buffer |= 1 << index
+      end
+    rescue ::EOFError
+      # Rescue on no STDIN environment (e.g. CircleCI).
+    rescue ::IO::WaitReadable
+      # Rescue on no data in STDIN buffer.
+    end
+
+    # @return [Integer]
+    def read
+      value = @copy[@index]
+      @index = (@index + 1) % 0x10
+      value
+    end
+
+    # @param [Integer] value
+    def write(value)
+      if value[0] == 1
+        @set = true
+      elsif @set
+        @set = false
+        @copy = @buffer
+        @buffer = 0
+        @index = 0
+      end
+    end
+  end
+end

data/lib/rnes/logger.rb

@@ -0,0 +1,142 @@
+require 'rnes/operation/records'
+
+module Rnes
+  class Logger
+    # @param [Rnes::Cpu] cpu
+    # @param [String] path
+    # @param [Rnes::Ppu] ppu
+    def initialize(cpu:, path:, ppu:)
+      @cpu = cpu
+      @path = path
+      @ppu = ppu
+    end
+
+    def puts
+      file.puts(line)
+    end
+
+    private
+
+    # @return [File]
+    def file
+      @file ||= ::File.open(@path, 'w')
+    end
+
+    # @return [String]
+    def line
+      [
+        segment_cpu_program_counter,
+        '',
+        segment_operation_code,
+        segment_operand,
+        segment_operation_full_name,
+        segment_operand_humanized,
+        '',
+        segment_cpu_accumulator,
+        segment_cpu_index_x,
+        segment_cpu_index_y,
+        segment_cpu_status,
+        segment_ppu_control1,
+        segment_ppu_control2,
+        segment_cpu_stack_pointer,
+        segment_cycle,
+        segment_ppu_line,
+      ].join(' ')
+    end
+
+    # @return [String]
+    def segment_cpu_accumulator
+      format('A:%02X', @cpu.registers.accumulator)
+    end
+
+    # @return [String]
+    def segment_cpu_index_x
+      format('X:%02X', @cpu.registers.index_x)
+    end
+
+    # @return [String]
+    def segment_cpu_index_y
+      format('Y:%02X', @cpu.registers.index_y)
+    end
+
+    # @return [String]
+    def segment_cpu_program_counter
+      format('%04X', @cpu.registers.program_counter)
+    end
+
+    # @return [String]
+    def segment_cpu_stack_pointer
+      format('SP:%02X', @cpu.registers.stack_pointer - 0x100)
+    end
+
+    # @return [String]
+    def segment_cpu_status
+      format('P:%08b', @cpu.registers.status)
+    end
+
+    # @return [String]
+    def segment_cycle
+      format('CYC:%03d', @ppu.cycle)
+    end
+
+    # @return [String]
+    def segment_operand
+      program_counter = @cpu.registers.program_counter
+      operation = @cpu.read_operation
+      case operation.addressing_mode
+      when :absolute, :absolute_x, :absolute_y, :indirect_absolute, :pre_indexed_absolute, :post_indexed_absolute
+        format('%02X %02X', @cpu.bus.read(program_counter + 1), @cpu.bus.read(program_counter + 2))
+      when :immediate, :relative, :zero_page, :zero_page_x, :zero_page_y
+        format('%02X   ', @cpu.bus.read(program_counter + 1))
+      else
+        ' ' * 5
+      end
+    end
+
+    # @return [String]
+    def segment_operand_humanized
+      operation = @cpu.read_operation
+      program_counter = @cpu.registers.program_counter
+      string = begin
+        case operation.addressing_mode
+        when :absolute, :absolute_x, :absolute_y, :indirect_absolute, :pre_indexed_absolute, :post_indexed_absolute
+          format('$%02X%02X', @cpu.bus.read(program_counter + 2), @cpu.bus.read(program_counter + 1))
+        when :immediate, :relative, :zero_page, :zero_page_x, :zero_oage_y
+          format('#$%02X', @cpu.bus.read(program_counter + 1))
+        else
+          ''
+        end
+      end
+      format('%-5s', string)
+    end
+
+    # @return [String]
+    def segment_operation_code
+      operation = @cpu.read_operation
+      operation_code = ::Rnes::Operation::RECORDS.find_index(operation.to_hash)
+      format('%02X', operation_code)
+    end
+
+    # @return [String]
+    def segment_operation_full_name
+      operation = @cpu.read_operation
+      format('%-10s', operation.full_name)
+    end
+
+    # @return [String]
+    def segment_ppu_control1
+      format('CTRL1:%08b', @ppu.registers.control1)
+    end
+
+    # @return [String]
+    def segment_ppu_control2
+      format('CTRL2:%08b', @ppu.registers.control2)
+    end
+
+    # @note SL means "Scan Line".
+    # @return [String]
+    def segment_ppu_line
+      format('SL:%03d', @ppu.line)
+    end
+  end
+end

data/lib/rnes/operation.rb

@@ -0,0 +1,52 @@
+require 'rnes/errors'
+require 'rnes/operation/records'
+
+module Rnes
+  class Operation
+    class << self
+      # @param [Integer] operation_code
+      # @return [Rnes::Operation]
+      def build(operation_code)
+        record = ::Rnes::Operation::RECORDS[operation_code]
+        if record
+          new(record)
+        else
+          raise ::Rnes::InvalidOperationCodeError, "Invalid operation code: #{operation_code}"
+        end
+      end
+    end
+
+    # @return [Symbol]
+    attr_reader :addressing_mode
+
+    # @return [Integer]
+    attr_reader :cycle
+
+    # @return [Symbol]
+    attr_reader :full_name
+
+    # @return [Symbol]
+    attr_reader :name
+
+    # @param [Symbol] addressing_mode
+    # @param [Integer] cycle
+    # @param [Symbol] full_name
+    # @param [Symbol] name
+    def initialize(addressing_mode:, cycle:, full_name:, name:)
+      @addressing_mode = addressing_mode
+      @cycle = cycle
+      @full_name = full_name
+      @name = name
+    end
+
+    # @return [Hash]
+    def to_hash
+      {
+        addressing_mode: addressing_mode,
+        cycle: cycle,
+        full_name: full_name,
+        name: name,
+      }
+    end
+  end
+end

data/lib/rnes/operation/records.rb

@@ -0,0 +1,1477 @@
+module Rnes
+  class Operation
+    RECORDS = [
+      {
+        full_name: :BRK,
+        name: :BRK,
+        addressing_mode: :implied,
+        cycle: 7,
+      },
+      {
+        full_name: :ORA_INDX,
+        name: :ORA,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SLO_INDX,
+        name: :SLO,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 3,
+      },
+      {
+        full_name: :ORA_ZERO,
+        name: :ORA,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :ASL_ZERO,
+        name: :ASL,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :SLO_ZERO,
+        name: :SLO,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :PHP,
+        name: :PHP,
+        addressing_mode: :implied,
+        cycle: 3,
+      },
+      {
+        full_name: :ORA_IMM,
+        name: :ORA,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :ASL,
+        name: :ASL,
+        addressing_mode: :accumulator,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :ORA_ABS,
+        name: :ORA,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :ASL_ABS,
+        name: :ASL,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :SLO_ABS,
+        name: :SLO,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :BPL,
+        name: :BPL,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :ORA_INDY,
+        name: :ORA,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SLO_INDY,
+        name: :SLO,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :ORA_ZEROX,
+        name: :ORA,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :ASL_ZEROX,
+        name: :ASL,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SLO_ZEROX,
+        name: :SLO,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :CLC,
+        name: :CLC,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :ORA_ABSY,
+        name: :ORA,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SLO_ABSY,
+        name: :SLO,
+        addressing_mode: :absolute_y,
+        cycle: 7,
+      },
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :ORA_ABSX,
+        name: :ORA,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :ASL_ABSX,
+        name: :ASL,
+        addressing_mode: :absolute_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SLO_ABSX,
+        name: :SLO,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :JSR_ABS,
+        name: :JSR,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :AND_INDX,
+        name: :AND,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :RLA_INDX,
+        name: :RLA,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :BIT_ZERO,
+        name: :BIT,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :AND_ZERO,
+        name: :AND,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :ROL_ZERO,
+        name: :ROL,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :RLA_ZERO,
+        name: :RLA,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :PLP,
+        name: :PLP,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :AND_IMM,
+        name: :AND,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :ROL,
+        name: :ROL,
+        addressing_mode: :accumulator,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :BIT_ABS,
+        name: :BIT,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :AND_ABS,
+        name: :AND,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :ROL_ABS,
+        name: :ROL,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :RLA_ABS,
+        name: :RLA,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :BMI,
+        name: :BMI,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :AND_INDY,
+        name: :AND,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :RLA_INDY,
+        name: :RLA,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :AND_ZEROX,
+        name: :AND,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :ROL_ZEROX,
+        name: :ROL,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :RLA_ZEROX,
+        name: :RLA,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SEC,
+        name: :SEC,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :AND_ABSY,
+        name: :AND,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :RLA_ABSY,
+        name: :RLA,
+        addressing_mode: :absolute_y,
+        cycle: 7,
+      },
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :AND_ABSX,
+        name: :AND,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :ROL_ABSX,
+        name: :ROL,
+        addressing_mode: :absolute_x,
+        cycle: 6,
+      },
+      {
+        full_name: :RLA_ABSX,
+        name: :RLA,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :RTI,
+        name: :RTI,
+        addressing_mode: :implied,
+        cycle: 6,
+      },
+      {
+        full_name: :EOR_INDX,
+        name: :EOR,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SRE_INDX,
+        name: :SRE,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 3,
+      },
+      {
+        full_name: :EOR_ZERO,
+        name: :EOR,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :LSR_ZERO,
+        name: :LSR,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :SRE_ZERO,
+        name: :SRE,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :PHA,
+        name: :PHA,
+        addressing_mode: :implied,
+        cycle: 3,
+      },
+      {
+        full_name: :EOR_IMM,
+        name: :EOR,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :LSR,
+        name: :LSR,
+        addressing_mode: :accumulator,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :JMP_ABS,
+        name: :JMP,
+        addressing_mode: :absolute,
+        cycle: 3,
+      },
+      {
+        full_name: :EOR_ABS,
+        name: :EOR,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :LSR_ABS,
+        name: :LSR,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :SRE_ABS,
+        name: :SRE,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :BVC,
+        name: :BVC,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :EOR_INDY,
+        name: :EOR,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SRE_INDY,
+        name: :SRE,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :EOR_ZEROX,
+        name: :EOR,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :LSR_ZEROX,
+        name: :LSR,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SRE_ZEROX,
+        name: :SRE,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :CLI,
+        name: :CLI,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :EOR_ABSY,
+        name: :EOR,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SRE_ABSY,
+        name: :SRE,
+        addressing_mode: :absolute_y,
+        cycle: 7,
+      },
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :EOR_ABSX,
+        name: :EOR,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :LSR_ABSX,
+        name: :LSR,
+        addressing_mode: :absolute_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SRE_ABSX,
+        name: :SRE,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :RTS,
+        name: :RTS,
+        addressing_mode: :implied,
+        cycle: 6,
+      },
+      {
+        full_name: :ADC_INDX,
+        name: :ADC,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :RRA_INDX,
+        name: :RRA,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 3,
+      },
+      {
+        full_name: :ADC_ZERO,
+        name: :ADC,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :ROR_ZERO,
+        name: :ROR,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :RRA_ZERO,
+        name: :RRA,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :PLA,
+        name: :PLA,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :ADC_IMM,
+        name: :ADC,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :ROR,
+        name: :ROR,
+        addressing_mode: :accumulator,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :JMP_INDABS,
+        name: :JMP,
+        addressing_mode: :indirect_absolute,
+        cycle: 5,
+      },
+      {
+        full_name: :ADC_ABS,
+        name: :ADC,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :ROR_ABS,
+        name: :ROR,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :RRA_ABS,
+        name: :RRA,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :BVS,
+        name: :BVS,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :ADC_INDY,
+        name: :ADC,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :RRA_INDY,
+        name: :RRA,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :ADC_ZEROX,
+        name: :ADC,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :ROR_ZEROX,
+        name: :ROR,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :RRA_ZEROX,
+        name: :RRA,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SEI,
+        name: :SEI,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :ADC_ABSY,
+        name: :ADC,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :RRA_ABSY,
+        name: :RRA,
+        addressing_mode: :absolute_y,
+        cycle: 7,
+      },
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :ADC_ABSX,
+        name: :ADC,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :ROR_ABSX,
+        name: :ROR,
+        addressing_mode: :absolute_x,
+        cycle: 6,
+      },
+      {
+        full_name: :RRA_ABSX,
+        name: :RRA,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :STA_INDX,
+        name: :STA,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SAX_INDX,
+        name: :SAX,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :STY_ZERO,
+        name: :STY,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :STA_ZERO,
+        name: :STA,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :STX_ZERO,
+        name: :STX,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :SAX_ZERO,
+        name: :SAX,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :DEY,
+        name: :DEY,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :TXA,
+        name: :TXA,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :STY_ABS,
+        name: :STY,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :STA_ABS,
+        name: :STA,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :STX_ABS,
+        name: :STX,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :SAX_ABS,
+        name: :SAX,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :BCC,
+        name: :BCC,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :STA_INDY,
+        name: :STA,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :STY_ZEROX,
+        name: :STY,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :STA_ZEROX,
+        name: :STA,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :STX_ZEROY,
+        name: :STX,
+        addressing_mode: :zero_page_y,
+        cycle: 4,
+      },
+      {
+        full_name: :SAX_ZEROY,
+        name: :SAX,
+        addressing_mode: :zero_page_y,
+        cycle: 4,
+      },
+      {
+        full_name: :TYA,
+        name: :TYA,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :STA_ABSY,
+        name: :STA,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :TXS,
+        name: :TXS,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {},
+      {},
+      {
+        full_name: :STA_ABSX,
+        name: :STA,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {},
+      {},
+      {
+        full_name: :LDY_IMM,
+        name: :LDY,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :LDA_INDX,
+        name: :LDA,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :LDX_IMM,
+        name: :LDX,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :LAX_INDX,
+        name: :LAX,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :LDY_ZERO,
+        name: :LDY,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :LDA_ZERO,
+        name: :LDA,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :LDX_ZERO,
+        name: :LDX,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :LAX_ZERO,
+        name: :LAX,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :TAY,
+        name: :TAY,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :LDA_IMM,
+        name: :LDA,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :TAX,
+        name: :TAX,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :LDY_ABS,
+        name: :LDY,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :LDA_ABS,
+        name: :LDA,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :LDX_ABS,
+        name: :LDX,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :LAX_ABS,
+        name: :LAX,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :BCS,
+        name: :BCS,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :LDA_INDY,
+        name: :LDA,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :LAX_INDY,
+        name: :LAX,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :LDY_ZEROX,
+        name: :LDY,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :LDA_ZEROX,
+        name: :LDA,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :LDX_ZEROY,
+        name: :LDX,
+        addressing_mode: :zero_page_y,
+        cycle: 4,
+      },
+      {
+        full_name: :LAX_ZEROY,
+        name: :LAX,
+        addressing_mode: :zero_page_y,
+        cycle: 4,
+      },
+      {
+        full_name: :CLV,
+        name: :CLV,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :LDA_ABSY,
+        name: :LDA,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :TSX,
+        name: :TSX,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :LDY_ABSX,
+        name: :LDY,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :LDA_ABSX,
+        name: :LDA,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :LDX_ABSY,
+        name: :LDX,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :LAX_ABSY,
+        name: :LAX,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :CPY_IMM,
+        name: :CPY,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :CMP_INDX,
+        name: :CMP,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :DCP_INDX,
+        name: :DCP,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :CPY_ZERO,
+        name: :CPY,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :CMP_ZERO,
+        name: :CMP,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :DEC_ZERO,
+        name: :DEC,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :DCP_ZERO,
+        name: :DCP,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :INY,
+        name: :INY,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :CMP_IMM,
+        name: :CMP,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :DEX,
+        name: :DEX,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {},
+      {
+        full_name: :CPY_ABS,
+        name: :CPY,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :CMP_ABS,
+        name: :CMP,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :DEC_ABS,
+        name: :DEC,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :DCP_ABS,
+        name: :DCP,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :BNE,
+        name: :BNE,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :CMP_INDY,
+        name: :CMP,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :DCP_INDY,
+        name: :DCP,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :CMP_ZEROX,
+        name: :CMP,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :DEC_ZEROX,
+        name: :DEC,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :DCP_ZEROX,
+        name: :DCP,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :CLD,
+        name: :CLD,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :CMP_ABSY,
+        name: :CMP,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :DCP_ABSY,
+        name: :DCP,
+        addressing_mode: :absolute_y,
+        cycle: 2,
+      },
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :CMP_ABSX,
+        name: :CMP,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :DEC_ABSX,
+        name: :DEC,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :DCP_ABSX,
+        name: :DCP,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :CPX_IMM,
+        name: :CPX,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :SBC_INDX,
+        name: :SBC,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 6,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 3,
+      },
+      {
+        full_name: :ISB_INDX,
+        name: :ISB,
+        addressing_mode: :pre_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :CPX_ZERO,
+        name: :CPX,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :SBC_ZERO,
+        name: :SBC,
+        addressing_mode: :zero_page,
+        cycle: 3,
+      },
+      {
+        full_name: :INC_ZERO,
+        name: :INC,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :ISB_ZERO,
+        name: :ISB,
+        addressing_mode: :zero_page,
+        cycle: 5,
+      },
+      {
+        full_name: :INX,
+        name: :INX,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SBC_IMM,
+        name: :SBC,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SBC_IMM,
+        name: :SBC,
+        addressing_mode: :immediate,
+        cycle: 2,
+      },
+      {
+        full_name: :CPX_ABS,
+        name: :CPX,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :SBC_ABS,
+        name: :SBC,
+        addressing_mode: :absolute,
+        cycle: 4,
+      },
+      {
+        full_name: :INC_ABS,
+        name: :INC,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :ISB_ABS,
+        name: :ISB,
+        addressing_mode: :absolute,
+        cycle: 6,
+      },
+      {
+        full_name: :BEQ,
+        name: :BEQ,
+        addressing_mode: :relative,
+        cycle: 2,
+      },
+      {
+        full_name: :SBC_INDY,
+        name: :SBC,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 5,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :ISB_INDY,
+        name: :ISB,
+        addressing_mode: :post_indexed_indirect,
+        cycle: 8,
+      },
+      {
+        full_name: :NOPD,
+        name: :NOPD,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :SBC_ZEROX,
+        name: :SBC,
+        addressing_mode: :zero_page_x,
+        cycle: 4,
+      },
+      {
+        full_name: :INC_ZEROX,
+        name: :INC,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :ISB_ZEROX,
+        name: :ISB,
+        addressing_mode: :zero_page_x,
+        cycle: 6,
+      },
+      {
+        full_name: :SED,
+        name: :SED,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :SBC_ABSY,
+        name: :SBC,
+        addressing_mode: :absolute_y,
+        cycle: 4,
+      },
+      {
+        full_name: :NOP,
+        name: :NOP,
+        addressing_mode: :implied,
+        cycle: 2,
+      },
+      {
+        full_name: :ISB_ABSY,
+        name: :ISB,
+        addressing_mode: :absolute_y,
+        cycle: 2,
+      },
+      {
+        full_name: :NOPI,
+        name: :NOPI,
+        addressing_mode: :implied,
+        cycle: 4,
+      },
+      {
+        full_name: :SBC_ABSX,
+        name: :SBC,
+        addressing_mode: :absolute_x,
+        cycle: 4,
+      },
+      {
+        full_name: :INC_ABSX,
+        name: :INC,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+      {
+        full_name: :ISB_ABSX,
+        name: :ISB,
+        addressing_mode: :absolute_x,
+        cycle: 7,
+      },
+    ].freeze
+  end
+end