rggen 0.6.1 → 0.6.2
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- checksums.yaml +4 -4
- data/README.md +2 -2
- data/lib/rggen/core_components/register_map/generic_map.rb +10 -1
- data/lib/rggen/core_extensions/facets.rb +1 -0
- data/lib/rggen/exceptions.rb +11 -5
- data/lib/rggen/generator.rb +12 -4
- data/lib/rggen/input_base/component_factory.rb +4 -4
- data/lib/rggen/input_base/loader.rb +11 -2
- data/lib/rggen/version.rb +1 -1
- data/rtl/rggen_bus_splitter.sv +47 -48
- metadata +2 -2
checksums.yaml
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@@ -1,7 +1,7 @@
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---
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SHA1:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 19195a9804097d391d2ee4c629922ef49a1d1d82
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data.tar.gz: 7052fa9b494b2948f452649797f5280bef883af2
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SHA512:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 59827fbc8e93f033570dd65f7bfaaeb0123c977bc095d0b7d835c80b2f21f263058b880408fc840ed8a7a1da77e05da4e40884462526ade82824336d3ede4014
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data.tar.gz: f31b881ee297b1915fbfe6b60266b8eed027f73d7eb2f0161fe3fb15bddc2a5df4c64304051b2964d3dee59664abe3a0c52e158f2078014f5e498b9cae197a0d
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data/README.md
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@@ -8,8 +8,8 @@
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# RgGen
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RgGen is a code
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It will automatically generate source code for control registers
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RgGen is a code generator tool for SoC/IP/FPGA/RTL engineers.
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It will automatically generate source code for control/status registers, e.g. RTL, UVM RAL model, C header file, from its register map document.
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Also RgGen is customizable so you can build your specific generate tool.
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## Ruby
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@@ -2,7 +2,16 @@ module RgGen
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module RegisterMap
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class GenericMap
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class Cell
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Position = Struct.new(:file, :sheet, :row, :column)
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Position = Struct.new(:file, :sheet, :row, :column) do
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def to_s
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[
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"file: #{file}",
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"sheet: #{sheet}",
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"row: #{row}",
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"column: #{column}"
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].join(' ')
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end
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end
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def initialize(file, sheet, row, column)
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@position = Position.new(file, sheet, row, column)
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@@ -10,6 +10,7 @@ require 'facets/kernel/not_nil'
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require 'facets/method/curry' unless Method.public_method_defined?(:curry)
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require 'facets/module/attr_class_accessor'
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require 'facets/module/attr_setter'
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require 'facets/module/lastname'
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require 'facets/numeric/positive'
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require 'facets/object/itself' unless Object.public_method_defined?(:itself)
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require 'facets/pathname/to_path'
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data/lib/rggen/exceptions.rb
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@@ -5,18 +5,24 @@ module RgGen
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class BuilderError < RgGenError
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end
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class
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class RuntimeError < RgGenError
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end
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class
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class LoadError < RgGen::RuntimeError
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end
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class
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class ConfigurationError < RgGen::RuntimeError
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end
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class RegisterMapError < RgGen::RuntimeError
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def initialize(message, position = nil)
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super(message)
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@position = position
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end
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def to_s
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return super.to_s unless @position
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"#{super.to_s} -- #{@position}"
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end
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end
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end
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data/lib/rggen/generator.rb
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@@ -140,9 +140,11 @@ module RgGen
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parse_options(argv, context)
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load_setup(context)
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load_configuration(context)
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load_register_map(context, argv
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load_register_map(context, argv)
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write_files(context)
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end
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rescue RgGen::RuntimeError, OptionParser::ParseError => e
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abort "[#{e.class.lastname}] #{e.message}"
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end
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private
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end
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def load_setup(context)
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context.options[:setup].tap do |setup|
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File.exist?(setup) || (
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raise RgGen::LoadError, "cannot load such file -- #{setup}"
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)
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load(setup)
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end
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end
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def build_factory(component_name)
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build_factory(:configuration).create(context.options[:configuration])
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end
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def load_register_map(context,
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def load_register_map(context, argv)
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raise RgGen::LoadError, 'no register map is specified' if argv.empty?
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context.register_map =
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build_factory(:register_map).create(context.configuration,
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build_factory(:register_map).create(context.configuration, argv.first)
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end
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def write_files(context)
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end
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def load_file(file)
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find_loader(file).
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find_loader(file).load(file)
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end
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def find_loader(file)
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@loaders.find { |l| l.acceptable?(file) } || (
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raise RgGen::LoadError, "unsupported file type -- #{file}"
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)
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end
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end
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end
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class << self
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attr_writer :supported_types
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def acceptable?(
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ext = File.ext(
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def acceptable?(file)
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ext = File.ext(file).to_sym
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@supported_types.any? { |type| type.casecmp(ext) == 0 }
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end
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def load(file)
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new.load(file)
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end
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end
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def load(file)
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return load_file(file) if File.exist?(file)
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raise RgGen::LoadError, "cannot load such file -- #{file}"
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end
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end
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end
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data/lib/rggen/version.rb
CHANGED
data/rtl/rggen_bus_splitter.sv
CHANGED
@@ -9,29 +9,16 @@ module rggen_bus_splitter #(
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);
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import rggen_rtl_pkg::*;
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localparam
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localparam int STATUS_WIDTH = $bits(rggen_status);
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rggen_status status;
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} s_response;
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logic [TOTAL_REGISTERS:0] select;
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logic [TOTAL_REGISTERS:0] ready;
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s_response response[TOTAL_REGISTERS+1];
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logic [TOTAL_REGISTERS-1:0] select;
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logic [TOTAL_REGISTERS-1:0] ready;
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logic response_ready;
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logic
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logic register_selected;
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logic done;
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logic
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genvar g_i;
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assign bus_if.done = done;
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assign bus_if.read_done = read_done;
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assign bus_if.write_done = write_done;
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assign bus_if.read_data = selected_response.read_data;
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assign bus_if.status = selected_response.status;
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logic [DATA_WIDTH-1:0] selected_read_data;
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rggen_status selected_status;
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genvar g_i, g_j;
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generate for (g_i = 0;g_i < TOTAL_REGISTERS;++g_i) begin : g
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assign register_if[g_i].request = bus_if.request;
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assign register_if[g_i].write_strobe = bus_if.write_strobe;
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assign select[g_i] = register_if[g_i].select;
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assign ready[g_i] = register_if[g_i].ready;
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assign response[g_i].read_data = register_if[g_i].read_data;
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assign response[g_i].status = register_if[g_i].status;
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end endgenerate
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assign
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assign
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assign ready[TOTAL_REGISTERS] = no_register_selected;
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assign response[TOTAL_REGISTERS] = '{read_data: '0, status: RGGEN_SLAVE_ERROR};
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assign response_ready = |ready;
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assign bus_if.done = done;
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assign response_ready = |ready;
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assign register_selected = |select;
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always_ff @(posedge clk, negedge rst_n) begin
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if (!rst_n) begin
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done <= '0;
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read_done
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write_done
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bus_if.read_done <= '0;
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bus_if.write_done <= '0;
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bus_if.read_data <= '0;
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bus_if.status <= RGGEN_OKAY;
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end
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else if (bus_if.request && response_ready && (!done)) begin
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else if (bus_if.request && (response_ready || (!register_selected)) && (!done)) begin
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done <= '1;
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bus_if.read_done <= (bus_if.direction == RGGEN_READ ) ? '1 : '0;
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bus_if.write_done <= (bus_if.direction == RGGEN_WRITE) ? '1 : '0;
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if (register_selected) begin
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bus_if.read_data <= selected_read_data;
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bus_if.status <= selected_status;
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end
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else begin
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bus_if.read_data <= '0;
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bus_if.status <= RGGEN_SLAVE_ERROR;
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end
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end
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else begin
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done <= '0;
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read_done
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write_done
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bus_if.read_done <= '0;
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bus_if.write_done <= '0;
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bus_if.read_data <= '0;
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bus_if.status <= RGGEN_OKAY;
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end
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end
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for (
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logic [TOTAL_REGISTERS:0] temp;
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-
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-
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// Response Selection
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generate if (1) begin : read_data_selection
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for (g_i = 0;g_i < DATA_WIDTH;++g_i) begin : g
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logic [TOTAL_REGISTERS-1:0] temp;
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assign selected_read_data[g_i] = |temp;
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for (g_j = 0;g_j < TOTAL_REGISTERS;++g_j) begin : g
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assign temp[g_j] = register_if[g_j].read_data[g_i] & register_if[g_j].select;
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end
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end
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end endgenerate
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generate if (1) begin : status_selection
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for (g_i = 0;g_i < STATUS_WIDTH;++g_i) begin : g
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logic [TOTAL_REGISTERS-1:0] temp;
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assign selected_status[g_i] = |temp;
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for (g_j = 0;g_j < TOTAL_REGISTERS;++g_j) begin : g
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assign temp[g_j] = register_if[g_j].status[g_i] & register_if[g_j].select;
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end
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index[i] = |temp;
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end
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-
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endfunction
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end endgenerate
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endmodule
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metadata
CHANGED
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--- !ruby/object:Gem::Specification
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name: rggen
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version: !ruby/object:Gem::Version
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version: 0.6.
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version: 0.6.2
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platform: ruby
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authors:
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- Taichi Ishitani
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autorequire:
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bindir: bin
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cert_chain: []
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date: 2017-
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date: 2017-06-02 00:00:00.000000000 Z
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dependencies:
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- !ruby/object:Gem::Dependency
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name: baby_erubis
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