rggen 0.25.2 → 0.26.1
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- checksums.yaml +4 -4
- data/CONTRIBUTING.md +2 -2
- data/LICENSE +1 -1
- data/README.md +19 -12
- data/lib/rggen/version.rb +1 -1
- metadata +15 -14
checksums.yaml
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@@ -1,7 +1,7 @@
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SHA256:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 6185f8612cebd632d1ba9dfdf175070ef14137852b16cbb3ab9ea285a200df75
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data.tar.gz: a85e698497ba8d8b3c9e67929542871db7b967a1813b8de0466ecdcfc2c233f3
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SHA512:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 77ff09547cf2f76d9d953ed0364f9d3682ee5b7e3605110191f22a77778e8936d5e54b73f80f92be97edd9d08eea23b148aa6d6866d060fe3b8f17c6b6a5f20c
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data.tar.gz: a363140e1bb20352b053b2c4f9bbb1aa08e5e9fb65c7378aa8687aac7d388ca6c791e47080b9c67bee3a58b56c98862dc8ef8c83a16d0acbd71348e59f948611
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data/CONTRIBUTING.md
CHANGED
@@ -49,12 +49,12 @@ to fix the bug which you found or implement enhancements which you want.
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1. Create a working directory
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2. Clone your forked version of the repositories to the working directory
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-
3. Clone
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3. Clone following repositories for development tools to the working directory
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* https://github.com/rggen/rggen-devtools
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* https://github.com/rggen/rggen-checkout
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4. Clone other RgGen's repositories
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* Invoke commnad below on to the working directory
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* `./rggen-devtools/bin/checkout --list ./rggen-checkout/all.yml --dir .`
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* `./rggen-devtools/bin/checkout.rb --list ./rggen-checkout/all.yml --dir .`
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```
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$ mkdir work
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data/LICENSE
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The MIT License (MIT)
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Copyright (c) 2019-
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Copyright (c) 2019-2022 Taichi Ishitani
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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data/README.md
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# RgGen
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RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate soruce code related to configuration and status registers (CSR), e.g. SytemVerilog RTL, UVM register model (UVM RAL), Wiki documents, from human readable register map specifications.
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RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate soruce code related to configuration and status registers (CSR), e.g. SytemVerilog RTL, UVM register model (UVM RAL/uvm_reg), Wiki documents, from human readable register map specifications.
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RgGen has following features:
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* Generate source files related to CSR from register map specifications
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*
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*
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*
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* RTL module
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* SystemVerilog
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* Verilog
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* Need [rggen-verilog](https://github.com/rggen/rggen-verilog) plugin
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* VHDL
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* Need [rggen-vhdl](https://github.com/rggen/rggen-vhdl) plugin
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* Supports standard bus protocols
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* AMBA APB
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* AMBA AXI4-Lite
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* Wishbone
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* UVM register model (UVM RAL/uvm_reg)
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* Register map documents written in Markdown
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* Register map specifications can be written in human readable format
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* Ruby with APIs to describe register map information
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* Spreadsheet (XLSX, XLS, OSD, CSV)
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* [SiFive DUH](https://github.com/sifive/duh)
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* Need [rggen-duh](https://github.com/rggen/rggen-duh) plugin
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*
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* Customize RgGen for you environment
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* E.g. add special bit field types
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## Installation
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### Ruby
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RgGen is written in the [Ruby](https://www.ruby-lang.org/en/about/) programing language and its required version is 2.
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RgGen is written in the [Ruby](https://www.ruby-lang.org/en/about/) programing language and its required version is 2.6 or later. You need to install any of these versions of Ruby before installing RgGen tool. To install Ruby, see [this page](https://www.ruby-lang.org/en/downloads/).
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### Installatin Command
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@@ -92,14 +97,16 @@ Following EDA tools can accept the generated source files.
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* Synopsys VCS
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* Cadence Xcelium
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* Xilinx Vivado Simulator
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* Confirmed RTL only
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* Not sure if UVM register models are accepted
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* Verilator
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* Need `-Wno-fatal` switch
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* Icarus Verilog
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* Verilog RTL only
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* Synthesis tools
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* Synopsys Design Compiler
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* Intel Quartus
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* Xilinx Vivado
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* [Yosys](http://www.clifford.at/yosys/)
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* Verilog RTL
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## Example
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## Copyright & License
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Copyright © 2019-
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Copyright © 2019-2022 Taichi Ishitani. RgGen is licensed under the [MIT License](https://opensource.org/licenses/MIT), see [LICENSE](LICENSE) for futher detils.
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## Code of Conduct
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data/lib/rggen/version.rb
CHANGED
metadata
CHANGED
@@ -1,14 +1,14 @@
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--- !ruby/object:Gem::Specification
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name: rggen
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version: !ruby/object:Gem::Version
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version: 0.
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version: 0.26.1
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platform: ruby
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authors:
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- Taichi Ishitani
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autorequire:
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bindir: bin
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cert_chain: []
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date:
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date: 2022-06-07 00:00:00.000000000 Z
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dependencies:
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- !ruby/object:Gem::Dependency
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name: rggen-core
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.26.0
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type: :runtime
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prerelease: false
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version_requirements: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.26.0
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- !ruby/object:Gem::Dependency
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name: rggen-default-register-map
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requirement: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.26.0
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type: :runtime
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prerelease: false
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version_requirements: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.26.0
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- !ruby/object:Gem::Dependency
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name: rggen-markdown
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requirement: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.22.0
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type: :runtime
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prerelease: false
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version_requirements: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.22.0
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- !ruby/object:Gem::Dependency
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name: rggen-spreadsheet-loader
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requirement: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.21.0
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type: :runtime
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prerelease: false
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version_requirements: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.21.0
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- !ruby/object:Gem::Dependency
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name: rggen-systemverilog
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requirement: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.26.1
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type: :runtime
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prerelease: false
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version_requirements: !ruby/object:Gem::Requirement
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requirements:
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- - "~>"
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- !ruby/object:Gem::Version
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version: 0.
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version: 0.26.1
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- !ruby/object:Gem::Dependency
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name: bundler
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requirement: !ruby/object:Gem::Requirement
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metadata:
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bug_tracker_uri: https://github.com/rggen/rggen/issues
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mailing_list_uri: https://groups.google.com/d/forum/rggen
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rubygems_mfa_required: 'true'
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source_code_uri: https://github.com/rggen/rggen
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wiki_uri: https://github.com/rggen/rggen/wiki
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post_install_message:
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requirements:
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- - ">="
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- !ruby/object:Gem::Version
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version: '2.
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version: '2.6'
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required_rubygems_version: !ruby/object:Gem::Requirement
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requirements:
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- - ">="
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- !ruby/object:Gem::Version
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version: '0'
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requirements: []
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rubygems_version: 3.
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rubygems_version: 3.3.3
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signing_key:
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specification_version: 4
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summary: Code generation tool for configuration and status registers
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