rggen-vhdl 0.4.0 → 0.6.0

checksums.yaml

@@ -1,7 +1,7 @@
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data/LICENSE

@@ -1,6 +1,6 @@
 The MIT License (MIT)
 
-Copyright (c) 2021 - 2022 Taichi Ishitani
+Copyright (c) 2021-2023 Taichi Ishitani
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal

data/README.md

@@ -68,7 +68,7 @@ Feedbacks, bus reports, questions and etc. are welcome! You can post them bu usi
 
 ## Copyright & License
 
-Copyright © 2021 - 2022 Taichi Ishitani. RgGen::VHDL is licensed under the [MIT License](https://opensource.org/licenses/MIT), see [LICENSE](LICENSE) for futher details.
+Copyright © 2021-2023 Taichi Ishitani. RgGen::VHDL is licensed under the [MIT License](https://opensource.org/licenses/MIT), see [LICENSE](LICENSE) for futher details.
 
 ## Code of Conduct
 

data/lib/rggen/vhdl/register/type/default.erb

@@ -5,8 +5,7 @@ u_register: entity work.rggen_default_register
     ADDRESS_WIDTH   => <%= address_width %>,
     OFFSET_ADDRESS  => <%= offset_address %>,
     BUS_WIDTH       => <%= bus_width %>,
-    DATA_WIDTH      => <%= width %>,
-    REGISTER_INDEX  => <%= register_index %>
+    DATA_WIDTH      => <%= width %>
   )
   port map (
     i_clk                   => <%= clock %>,

data/lib/rggen/vhdl/register/type/external.rb

@@ -38,7 +38,7 @@ RgGen.define_list_item_feature(:register, :type, :external) do
     end
 
     def byte_size
-      register.byte_size
+      register.total_byte_size
     end
   end
 end

data/lib/rggen/vhdl/register_block/protocol/apb.erb

@@ -7,7 +7,8 @@ u_adapter: entity work.rggen_apb_adaper
     PRE_DECODE          => <%= pre_decode %>,
     BASE_ADDRESS        => <%= base_address %>,
     BYTE_SIZE           => <%= byte_size %>,
-    ERROR_STATUS        => <%= error_status %>
+    ERROR_STATUS        => <%= error_status %>,
+    INSERT_SLICER       => <%= insert_slicer %>
   )
   port map (
     i_clk                 => <%= register_block.clock %>,

data/lib/rggen/vhdl/register_block/protocol/axi4lite.erb

@@ -9,6 +9,7 @@ u_adapter: entity work.rggen_axi4lite_adapter
     BASE_ADDRESS        => <%= base_address %>,
     BYTE_SIZE           => <%= byte_size %>,
     ERROR_STATUS        => <%= error_status %>,
+    INSERT_SLICER       => <%= insert_slicer %>,
     WRITE_FIRST         => <%= write_first %>
   )
   port map (

data/lib/rggen/vhdl/register_block/protocol/wishbone.erb

@@ -8,6 +8,7 @@ u_adapter: entity work.rggen_wishbone_adapter
     BASE_ADDRESS        => <%= base_address %>,
     BYTE_SIZE           => <%= byte_size %>,
     ERROR_STATUS        => <%= error_status %>,
+    INSERT_SLICER       => <%= insert_slicer %>,
     USE_STALL           => <%= use_stall %>
   )
   port map (

data/lib/rggen/vhdl/register_block/protocol.rb

@@ -18,6 +18,9 @@ RgGen.define_list_feature(:register_block, :protocol) do
         generic :error_status, {
           name: 'ERROR_STATUS', type: :boolean, default: false
         }
+        generic :insert_slicer, {
+          name: 'INSERT_SLICER', type: :boolean, default: false
+        }
       end
 
       private

data/lib/rggen/vhdl/version.rb

@@ -2,6 +2,6 @@
 
 module RgGen
   module VHDL
-    VERSION = '0.4.0'
+    VERSION = '0.6.0'
   end
 end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: rggen-vhdl
 version: !ruby/object:Gem::Version
-  version: 0.4.0
+  version: 0.6.0
 platform: ruby
 authors:
 - Taichi Ishitani
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2022-10-10 00:00:00.000000000 Z
+date: 2023-04-28 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: rggen-systemverilog
@@ -16,14 +16,14 @@ dependencies:
     requirements:
     - - ">="
       - !ruby/object:Gem::Version
-        version: 0.28.0
+        version: 0.30.0
   type: :runtime
   prerelease: false
   version_requirements: !ruby/object:Gem::Requirement
     requirements:
     - - ">="
       - !ruby/object:Gem::Version
-        version: 0.28.0
+        version: 0.30.0
 - !ruby/object:Gem::Dependency
   name: bundler
   requirement: !ruby/object:Gem::Requirement
@@ -128,15 +128,15 @@ required_ruby_version: !ruby/object:Gem::Requirement
   requirements:
   - - ">="
     - !ruby/object:Gem::Version
-      version: 2.6.0
+      version: 2.7.0
 required_rubygems_version: !ruby/object:Gem::Requirement
   requirements:
   - - ">="
     - !ruby/object:Gem::Version
       version: '0'
 requirements: []
-rubygems_version: 3.3.7
+rubygems_version: 3.4.10
 signing_key: 
 specification_version: 4
-summary: rggen-vhdl-0.4.0
+summary: rggen-vhdl-0.6.0
 test_files: []