rggen-systemverilog 0.15.0 → 0.16.0

checksums.yaml

@@ -1,7 +1,7 @@
 ---
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-  data.tar.gz: 329fa0ec20a90177423cabe340b82e1b351f4464cffddd3bd67079eb023f4ca0
+  metadata.gz: 62ec6f5cb3ee1c7f88c2b46fa979376823e7d5f5098acf1cc41dd3b10a89de9b
+  data.tar.gz: 5c8976e639c443eb330be03e2c0487c261c50e46ef2fbac6e70adfb514023638
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+  data.tar.gz: ea482e0d904d91faf76b9575a4807ab92e55056c2ecb16fe4078cf03012314ba9d374088ca34570adbc9d64edec6fa21b647d7476b4c32e365c25946563afe36

data/lib/rggen/systemverilog/ral/bit_field/type.rb

@@ -75,8 +75,8 @@ RgGen.define_list_feature(:bit_field, :type) do
     end
 
     factory do
-      def select_feature(_configuration, bit_field)
-        target_features[bit_field.type]
+      def target_feature_key(_configuration, bit_field)
+        bit_field.type
       end
     end
   end

data/lib/rggen/systemverilog/ral/register/type.rb

@@ -146,8 +146,8 @@ RgGen.define_list_feature(:register, :type) do
     end
 
     factory do
-      def select_feature(_configuration, register)
-        target_features[register.type]
+      def target_feature_key(_configuration, register)
+        register.type
       end
     end
   end

data/lib/rggen/systemverilog/rtl/bit_field/type.rb

@@ -59,8 +59,8 @@ RgGen.define_list_feature(:bit_field, :type) do
     end
 
     factory do
-      def select_feature(_configuration, bit_field)
-        target_features[bit_field.type] || (
+      def target_feature_key(_configuration, bit_field)
+        target_features.key?(bit_field.type) && bit_field.type || (
           error "code generator for #{bit_field.type} " \
                 'bit field type is not implemented'
         )

data/lib/rggen/systemverilog/rtl/global/array_port_format.rb

@@ -15,5 +15,7 @@ RgGen.define_simple_feature(:global, :array_port_format) do
           error "illegal input value for array port format: #{value.inspect}"
         end
     end
+
+    printable :array_port_format
   end
 end

data/lib/rggen/systemverilog/rtl/global/fold_sv_interface_port.rb

@@ -20,5 +20,9 @@ RgGen.define_simple_feature(:global, :fold_sv_interface_port) do
           error "cannot convert #{value.inspect} into boolean"
         end
     end
+
+    printable :fold_sv_interface_port do
+      fold_sv_interface_port?
+    end
   end
 end

data/lib/rggen/systemverilog/rtl/register/type.rb

@@ -53,10 +53,11 @@ RgGen.define_list_feature(:register, :type) do
     end
 
     factory do
-      def select_feature(_configuration, register)
-        target_features[register.type] ||
-          unless register.type == :default
-            error "code generator for #{register.type} register type " \
+      def target_feature_key(_configuration, register)
+        type = register.type
+        (target_features.key?(type) || type == :default) && type ||
+          begin
+            error "code generator for #{type} register type " \
                   'is not implemented'
           end
       end

data/lib/rggen/systemverilog/rtl/register_block/protocol.rb

@@ -40,8 +40,8 @@ RgGen.define_list_feature(:register_block, :protocol) do
           (error 'no protocols are available', position)
       end
 
-      def select_feature(data)
-        target_features[data.value]
+      def target_feature_key(data)
+        data.value
       end
 
       private
@@ -100,8 +100,8 @@ RgGen.define_list_feature(:register_block, :protocol) do
     end
 
     factory do
-      def select_feature(configuration, _register_block)
-        target_features[configuration.protocol]
+      def target_feature_key(configuration, _register_block)
+        configuration.protocol
       end
     end
   end

data/lib/rggen/systemverilog/version.rb

@@ -2,6 +2,6 @@
 
 module RgGen
   module SystemVerilog
-    VERSION = '0.15.0'
+    VERSION = '0.16.0'
   end
 end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: rggen-systemverilog
 version: !ruby/object:Gem::Version
-  version: 0.15.0
+  version: 0.16.0
 platform: ruby
 authors:
 - Taichi Ishitani
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2019-09-18 00:00:00.000000000 Z
+date: 2019-10-01 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: docile
@@ -170,5 +170,5 @@ requirements: []
 rubygems_version: 3.0.3
 signing_key: 
 specification_version: 4
-summary: rggen-systemverilog-0.15.0
+summary: rggen-systemverilog-0.16.0
 test_files: []