rggen-default-register-map 0.13.0
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- checksums.yaml +7 -0
- data/CODE_OF_CONDUCT.md +74 -0
- data/LICENSE +21 -0
- data/README.md +45 -0
- data/lib/rggen/default_register_map.rb +46 -0
- data/lib/rggen/default_register_map/bit_field/bit_assignment.rb +122 -0
- data/lib/rggen/default_register_map/bit_field/comment.rb +18 -0
- data/lib/rggen/default_register_map/bit_field/initial_value.rb +75 -0
- data/lib/rggen/default_register_map/bit_field/name.rb +37 -0
- data/lib/rggen/default_register_map/bit_field/reference.rb +142 -0
- data/lib/rggen/default_register_map/bit_field/type.rb +117 -0
- data/lib/rggen/default_register_map/bit_field/type/rc.rb +9 -0
- data/lib/rggen/default_register_map/bit_field/type/reserved.rb +8 -0
- data/lib/rggen/default_register_map/bit_field/type/ro.rb +8 -0
- data/lib/rggen/default_register_map/bit_field/type/rof.rb +9 -0
- data/lib/rggen/default_register_map/bit_field/type/rs.rb +8 -0
- data/lib/rggen/default_register_map/bit_field/type/rw.rb +9 -0
- data/lib/rggen/default_register_map/bit_field/type/rwc.rb +9 -0
- data/lib/rggen/default_register_map/bit_field/type/rwe_rwl.rb +10 -0
- data/lib/rggen/default_register_map/bit_field/type/w0c_w1c.rb +9 -0
- data/lib/rggen/default_register_map/bit_field/type/w0s_w1s.rb +8 -0
- data/lib/rggen/default_register_map/bit_field/type/w0trg_w1trg.rb +8 -0
- data/lib/rggen/default_register_map/bit_field/type/wo.rb +9 -0
- data/lib/rggen/default_register_map/global/address_width.rb +34 -0
- data/lib/rggen/default_register_map/global/bus_width.rb +35 -0
- data/lib/rggen/default_register_map/register/name.rb +36 -0
- data/lib/rggen/default_register_map/register/offset_address.rb +106 -0
- data/lib/rggen/default_register_map/register/size.rb +95 -0
- data/lib/rggen/default_register_map/register/type.rb +135 -0
- data/lib/rggen/default_register_map/register/type/external.rb +16 -0
- data/lib/rggen/default_register_map/register/type/indirect.rb +256 -0
- data/lib/rggen/default_register_map/register_block/byte_size.rb +61 -0
- data/lib/rggen/default_register_map/register_block/name.rb +38 -0
- data/lib/rggen/default_register_map/setup.rb +18 -0
- data/lib/rggen/default_register_map/version.rb +7 -0
- metadata +95 -0
checksums.yaml
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---
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SHA256:
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metadata.gz: dea6eb93a9a7c226bcc6f01cfa7b28f9562178081dac18b6aff619b4b125f37c
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data.tar.gz: fb381afdedc89520fe440c19448cb859c8df2bf7db77142ef0d1c49a07cba29f
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SHA512:
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metadata.gz: 3452f7129497b227616940f466c43ed4c333026883e43e6a3f1cca89796fac3ec344f47d2ba7a9b084b3a9faf69fd137f77a04986853f29dc64aedc866aef129
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data.tar.gz: 70c32baa9be4415b05e0ca6e266242ad31a5a120375e6d1b952866c41115595ed106e28b74ab736e6541902680757a3e1403577536ddcc4f0563ce418723b32c
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data/CODE_OF_CONDUCT.md
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# Contributor Covenant Code of Conduct
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## Our Pledge
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In the interest of fostering an open and welcoming environment, we as
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contributors and maintainers pledge to making participation in our project and
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our community a harassment-free experience for everyone, regardless of age, body
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size, disability, ethnicity, gender identity and expression, level of experience,
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nationality, personal appearance, race, religion, or sexual identity and
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orientation.
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## Our Standards
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Examples of behavior that contributes to creating a positive environment
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include:
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* Using welcoming and inclusive language
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* Being respectful of differing viewpoints and experiences
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* Gracefully accepting constructive criticism
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* Focusing on what is best for the community
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* Showing empathy towards other community members
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Examples of unacceptable behavior by participants include:
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* The use of sexualized language or imagery and unwelcome sexual attention or
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advances
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* Trolling, insulting/derogatory comments, and personal or political attacks
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* Public or private harassment
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* Publishing others' private information, such as a physical or electronic
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address, without explicit permission
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* Other conduct which could reasonably be considered inappropriate in a
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professional setting
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## Our Responsibilities
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Project maintainers are responsible for clarifying the standards of acceptable
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behavior and are expected to take appropriate and fair corrective action in
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response to any instances of unacceptable behavior.
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Project maintainers have the right and responsibility to remove, edit, or
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reject comments, commits, code, wiki edits, issues, and other contributions
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that are not aligned to this Code of Conduct, or to ban temporarily or
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permanently any contributor for other behaviors that they deem inappropriate,
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threatening, offensive, or harmful.
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## Scope
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This Code of Conduct applies both within project spaces and in public spaces
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when an individual is representing the project or its community. Examples of
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representing a project or community include using an official project e-mail
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address, posting via an official social media account, or acting as an appointed
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representative at an online or offline event. Representation of a project may be
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further defined and clarified by project maintainers.
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## Enforcement
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Instances of abusive, harassing, or otherwise unacceptable behavior may be
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reported by contacting the project team at taichi730@gmail.com. All
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complaints will be reviewed and investigated and will result in a response that
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is deemed necessary and appropriate to the circumstances. The project team is
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obligated to maintain confidentiality with regard to the reporter of an incident.
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Further details of specific enforcement policies may be posted separately.
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Project maintainers who do not follow or enforce the Code of Conduct in good
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faith may face temporary or permanent repercussions as determined by other
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members of the project's leadership.
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## Attribution
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This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4,
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available at [http://contributor-covenant.org/version/1/4][version]
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[homepage]: http://contributor-covenant.org
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[version]: http://contributor-covenant.org/version/1/4/
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data/LICENSE
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The MIT License (MIT)
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Copyright (c) 2019 Taichi Ishitani
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE.
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data/README.md
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[![Gem Version](https://badge.fury.io/rb/rggen-default-register-map.svg)](https://badge.fury.io/rb/rggen-default-register-map)
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[![Build Status](https://travis-ci.com/rggen/rggen-default-register-map.svg?branch=master)](https://travis-ci.com/rggen/rggen-default-register-map)
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[![Maintainability](https://api.codeclimate.com/v1/badges/73177494e096af47f09e/maintainability)](https://codeclimate.com/github/rggen/rggen-default-register-map/maintainability)
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[![codecov](https://codecov.io/gh/rggen/rggen-default-register-map/branch/master/graph/badge.svg)](https://codecov.io/gh/rggen/rggen-default-register-map)
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[![Quality Gate Status](https://sonarcloud.io/api/project_badges/measure?project=rggen_rggen-default-register-map&metric=alert_status)](https://sonarcloud.io/dashboard?id=rggen_rggen-default-register-map)
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[![Gitter](https://badges.gitter.im/rggen/rggen.svg)](https://gitter.im/rggen/rggen?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge)
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# Rggen::DefaultRegisterMap
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RgGen::DefaultRegisterMap provides following features.
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* Format of regiter map
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* APIs to handle elements of regiter map
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## Installation
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During RgGen installation, RgGen::DefaultRegisterMap will also be installed automatically.
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```
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$ gem install rggen
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```
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If you to install RgGen::DefaultRegisterMap only, use the command below:
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```
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$ gem install rggen-default-register-map
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```
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## Contact
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Feedbacks, bug reports, questions and etc. are wellcome! You can post them by using following ways:
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* [GitHub Issue Tracker](https://github.com/rggen/rggen-default-register-map/issues)
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* [Chat Room](https://gitter.im/rggen/rggen)
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* [Mailing List](https://groups.google.com/d/forum/rggen)
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* [Mail](mailto:rggen@googlegroups.com)
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## Copyright & License
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Copyright © 2019 Taichi Ishitani. RgGen::DefaultRegisterMap is licensed under the [MIT License](https://opensource.org/licenses/MIT), see [LICENSE](LICENSE) for futher details.
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## Code of Conduct
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Everyone interacting in the RgGen project’s codebases, issue trackers, chat rooms and mailing lists is expected to follow the [code of conduct](https://github.com/rggen/rggen-default-register-map/blob/master/CODE_OF_CONDUCT.md).
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# frozen_string_literal: true
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require_relative 'default_register_map/version'
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module RgGen
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module DefaultRegisterMap
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FEATURES = [
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'default_register_map/bit_field/bit_assignment',
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'default_register_map/bit_field/comment',
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'default_register_map/bit_field/initial_value',
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'default_register_map/bit_field/name',
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'default_register_map/bit_field/reference',
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'default_register_map/bit_field/type',
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'default_register_map/bit_field/type/rc',
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'default_register_map/bit_field/type/reserved',
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'default_register_map/bit_field/type/ro',
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'default_register_map/bit_field/type/rof',
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'default_register_map/bit_field/type/rs',
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'default_register_map/bit_field/type/rw',
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'default_register_map/bit_field/type/rwc',
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'default_register_map/bit_field/type/rwe_rwl',
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'default_register_map/bit_field/type/w0c_w1c',
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'default_register_map/bit_field/type/w0s_w1s',
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'default_register_map/bit_field/type/w0trg_w1trg',
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'default_register_map/bit_field/type/wo',
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'default_register_map/global/address_width',
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'default_register_map/global/bus_width',
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'default_register_map/register/name',
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'default_register_map/register/offset_address',
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'default_register_map/register/size',
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'default_register_map/register/type',
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'default_register_map/register/type/external',
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'default_register_map/register/type/indirect',
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'default_register_map/register_block/byte_size',
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'default_register_map/register_block/name'
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].freeze
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def self.load_features
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FEATURES.each { |file| require_relative file }
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end
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def self.default_setup(_builder)
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load_features
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end
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end
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end
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# frozen_string_literal: true
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RgGen.define_simple_feature(:bit_field, :bit_assignment) do
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register_map do
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property :lsb, forward_to: :lsb_bit
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property :msb, forward_to: :msb_bit
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property :width, default: 1
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property :sequence_size
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property :step, initial: -> { width }
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property :sequential?, body: -> { !@sequence_size.nil? }
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property :bit_map, initial: -> { calc_bit_map }
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input_pattern /#{integer}(?::#{integer}){0,3}/,
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match_automatically: false
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build do |value|
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input_value = preprocess(value)
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KEYS.each { |key| parse_value(input_value, key) }
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end
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verify(:feature) do
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error_condition { [@lsb, @width, @sequence_size, @step].none? }
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message { 'no bit assignment is given' }
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end
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verify(:feature) do
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error_condition { !@lsb }
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message { 'no lsb is given' }
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end
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verify(:feature) do
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error_condition { lsb.negative? }
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message { "lsb is less than 0: #{lsb}" }
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end
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verify(:feature) do
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error_condition { width < 1 }
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message { "width is less than 1: #{width}" }
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end
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verify(:feature) do
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error_condition { sequential? && sequence_size < 1 }
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message { "sequence size is less than 1: #{sequence_size}" }
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end
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verify(:feature) do
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error_condition { sequential? && step < 1 }
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message { "step is less than 1: #{step}" }
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end
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verify(:feature) do
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error_condition { overlap? }
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message { 'overlap with existing bit field(s)' }
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end
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printable(:bit_assignments) do
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Array.new(@sequence_size || 1) do |i|
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width > 1 && "[#{msb(i)}:#{lsb(i)}]" || "[#{lsb(i)}]"
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end
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end
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private
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KEYS = [:lsb, :width, :sequence_size, :step].freeze
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def preprocess(value)
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if value.is_a?(Hash)
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value
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elsif match_pattern(value)
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split_match_data(match_data)
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else
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error "illegal input value for bit assignment: #{value.inspect}"
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end
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end
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def split_match_data(match_data)
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match_data
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.to_s
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.split(':')
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.map.with_index { |value, i| [KEYS[i], value] }
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.to_h
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end
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def parse_value(input_value, key)
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input_value.key?(key) &&
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instance_variable_set("@#{key}", Integer(input_value[key]))
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rescue ArgumentError, TypeError
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error "cannot convert #{input_value[key].inspect} into " \
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"bit assignment(#{key.to_s.tr('_', ' ')})"
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end
|
91
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+
|
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def lsb_bit(index = 0)
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lsb_msb_bit(index, @lsb)
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end
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95
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+
|
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def msb_bit(index = 0)
|
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lsb_msb_bit(index, @lsb + width - 1)
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+
end
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99
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+
|
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def lsb_msb_bit(index, base)
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calc_bit_position((sequential? && index) || 0, base)
|
102
|
+
end
|
103
|
+
|
104
|
+
def calc_bit_position(index, base)
|
105
|
+
if index.is_a?(Integer)
|
106
|
+
base + step * index
|
107
|
+
else
|
108
|
+
"#{base}+#{step}*#{index}"
|
109
|
+
end
|
110
|
+
end
|
111
|
+
|
112
|
+
def calc_bit_map
|
113
|
+
Array.new(sequence_size || 1) { |i| (2**width - 1) << lsb(i) }.inject(:|)
|
114
|
+
end
|
115
|
+
|
116
|
+
def overlap?
|
117
|
+
register
|
118
|
+
.bit_fields
|
119
|
+
.any? { |bit_field| (bit_field.bit_map & bit_map).positive? }
|
120
|
+
end
|
121
|
+
end
|
122
|
+
end
|
@@ -0,0 +1,18 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
RgGen.define_simple_feature(:bit_field, :comment) do
|
4
|
+
register_map do
|
5
|
+
property :comment, body: -> { @comment ||= '' }
|
6
|
+
|
7
|
+
build do |value|
|
8
|
+
@comment =
|
9
|
+
if value.is_a?(Array)
|
10
|
+
value.join("\n")
|
11
|
+
else
|
12
|
+
value.to_s
|
13
|
+
end
|
14
|
+
end
|
15
|
+
|
16
|
+
printable :comment
|
17
|
+
end
|
18
|
+
end
|
@@ -0,0 +1,75 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
RgGen.define_simple_feature(:bit_field, :initial_value) do
|
4
|
+
register_map do
|
5
|
+
property :initial_value, default: 0
|
6
|
+
property :initial_value?, body: -> { !@initial_value.nil? }
|
7
|
+
|
8
|
+
build do |value|
|
9
|
+
@initial_value =
|
10
|
+
begin
|
11
|
+
Integer(value)
|
12
|
+
rescue ArgumentError, TypeError
|
13
|
+
error "cannot convert #{value.inspect} into initial value"
|
14
|
+
end
|
15
|
+
end
|
16
|
+
|
17
|
+
verify(:component) do
|
18
|
+
error_condition { settings[:require] && !initial_value? }
|
19
|
+
message { 'no initial value is given' }
|
20
|
+
end
|
21
|
+
|
22
|
+
verify(:component) do
|
23
|
+
error_condition { initial_value? && initial_value < min_initial_value }
|
24
|
+
message do
|
25
|
+
'input initial value is less than minimum initial value: ' \
|
26
|
+
"initial value #{initial_value} " \
|
27
|
+
"minimum initial value #{min_initial_value}"
|
28
|
+
end
|
29
|
+
end
|
30
|
+
|
31
|
+
verify(:component) do
|
32
|
+
error_condition { initial_value? && initial_value > max_initial_value }
|
33
|
+
message do
|
34
|
+
'input initial value is greater than maximum initial value: ' \
|
35
|
+
"initial value #{initial_value} " \
|
36
|
+
"maximum initial value #{max_initial_value}"
|
37
|
+
end
|
38
|
+
end
|
39
|
+
|
40
|
+
verify(:component) do
|
41
|
+
error_condition { initial_value? && !match_valid_condition? }
|
42
|
+
message do
|
43
|
+
"does not match the valid initial value condition: #{initial_value}"
|
44
|
+
end
|
45
|
+
end
|
46
|
+
|
47
|
+
printable(:initial_value) do
|
48
|
+
@initial_value &&
|
49
|
+
begin
|
50
|
+
print_width = (bit_field.width + 3) / 4
|
51
|
+
format('0x%0*x', print_width, @initial_value)
|
52
|
+
end
|
53
|
+
end
|
54
|
+
|
55
|
+
private
|
56
|
+
|
57
|
+
def settings
|
58
|
+
@settings ||=
|
59
|
+
(bit_field.settings && bit_field.settings[:initial_value]) || {}
|
60
|
+
end
|
61
|
+
|
62
|
+
def min_initial_value
|
63
|
+
bit_field.width == 1 ? 0 : -(2**(bit_field.width - 1))
|
64
|
+
end
|
65
|
+
|
66
|
+
def max_initial_value
|
67
|
+
2**bit_field.width - 1
|
68
|
+
end
|
69
|
+
|
70
|
+
def match_valid_condition?
|
71
|
+
!settings.key?(:valid_condition) ||
|
72
|
+
instance_exec(@initial_value, &settings[:valid_condition])
|
73
|
+
end
|
74
|
+
end
|
75
|
+
end
|
@@ -0,0 +1,37 @@
|
|
1
|
+
# frozen_string_literal: true
|
2
|
+
|
3
|
+
RgGen.define_simple_feature(:bit_field, :name) do
|
4
|
+
register_map do
|
5
|
+
property :name, initial: -> { register.name }
|
6
|
+
property :full_name, forward_to: :get_full_name
|
7
|
+
|
8
|
+
input_pattern variable_name
|
9
|
+
|
10
|
+
build do |value|
|
11
|
+
@name =
|
12
|
+
if pattern_matched?
|
13
|
+
match_data.to_s
|
14
|
+
else
|
15
|
+
error "illegal input value for bit field name: #{value.inspect}"
|
16
|
+
end
|
17
|
+
@full_name = [register.name, @name]
|
18
|
+
end
|
19
|
+
|
20
|
+
verify(:feature) do
|
21
|
+
error_condition { duplicated_name? }
|
22
|
+
message { "duplicated bit field name: #{name}" }
|
23
|
+
end
|
24
|
+
|
25
|
+
printable :name
|
26
|
+
|
27
|
+
private
|
28
|
+
|
29
|
+
def get_full_name(separator = '.')
|
30
|
+
@full_name&.join(separator) || register.name
|
31
|
+
end
|
32
|
+
|
33
|
+
def duplicated_name?
|
34
|
+
register.bit_fields.any? { |bit_field| bit_field.name == name }
|
35
|
+
end
|
36
|
+
end
|
37
|
+
end
|