rggen-default-register-map 0.13.0

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Files changed (36) hide show
  1. checksums.yaml +7 -0
  2. data/CODE_OF_CONDUCT.md +74 -0
  3. data/LICENSE +21 -0
  4. data/README.md +45 -0
  5. data/lib/rggen/default_register_map.rb +46 -0
  6. data/lib/rggen/default_register_map/bit_field/bit_assignment.rb +122 -0
  7. data/lib/rggen/default_register_map/bit_field/comment.rb +18 -0
  8. data/lib/rggen/default_register_map/bit_field/initial_value.rb +75 -0
  9. data/lib/rggen/default_register_map/bit_field/name.rb +37 -0
  10. data/lib/rggen/default_register_map/bit_field/reference.rb +142 -0
  11. data/lib/rggen/default_register_map/bit_field/type.rb +117 -0
  12. data/lib/rggen/default_register_map/bit_field/type/rc.rb +9 -0
  13. data/lib/rggen/default_register_map/bit_field/type/reserved.rb +8 -0
  14. data/lib/rggen/default_register_map/bit_field/type/ro.rb +8 -0
  15. data/lib/rggen/default_register_map/bit_field/type/rof.rb +9 -0
  16. data/lib/rggen/default_register_map/bit_field/type/rs.rb +8 -0
  17. data/lib/rggen/default_register_map/bit_field/type/rw.rb +9 -0
  18. data/lib/rggen/default_register_map/bit_field/type/rwc.rb +9 -0
  19. data/lib/rggen/default_register_map/bit_field/type/rwe_rwl.rb +10 -0
  20. data/lib/rggen/default_register_map/bit_field/type/w0c_w1c.rb +9 -0
  21. data/lib/rggen/default_register_map/bit_field/type/w0s_w1s.rb +8 -0
  22. data/lib/rggen/default_register_map/bit_field/type/w0trg_w1trg.rb +8 -0
  23. data/lib/rggen/default_register_map/bit_field/type/wo.rb +9 -0
  24. data/lib/rggen/default_register_map/global/address_width.rb +34 -0
  25. data/lib/rggen/default_register_map/global/bus_width.rb +35 -0
  26. data/lib/rggen/default_register_map/register/name.rb +36 -0
  27. data/lib/rggen/default_register_map/register/offset_address.rb +106 -0
  28. data/lib/rggen/default_register_map/register/size.rb +95 -0
  29. data/lib/rggen/default_register_map/register/type.rb +135 -0
  30. data/lib/rggen/default_register_map/register/type/external.rb +16 -0
  31. data/lib/rggen/default_register_map/register/type/indirect.rb +256 -0
  32. data/lib/rggen/default_register_map/register_block/byte_size.rb +61 -0
  33. data/lib/rggen/default_register_map/register_block/name.rb +38 -0
  34. data/lib/rggen/default_register_map/setup.rb +18 -0
  35. data/lib/rggen/default_register_map/version.rb +7 -0
  36. metadata +95 -0
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+ # Contributor Covenant Code of Conduct
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+
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+ ## Our Pledge
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+
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+ In the interest of fostering an open and welcoming environment, we as
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+ contributors and maintainers pledge to making participation in our project and
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+ our community a harassment-free experience for everyone, regardless of age, body
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+ size, disability, ethnicity, gender identity and expression, level of experience,
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+ nationality, personal appearance, race, religion, or sexual identity and
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+ orientation.
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+
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+ ## Our Standards
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+
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+ Examples of behavior that contributes to creating a positive environment
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+ include:
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+
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+ * Using welcoming and inclusive language
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+ * Being respectful of differing viewpoints and experiences
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+ * Gracefully accepting constructive criticism
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+ * Focusing on what is best for the community
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+ * Showing empathy towards other community members
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+
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+ Examples of unacceptable behavior by participants include:
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+
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+ * The use of sexualized language or imagery and unwelcome sexual attention or
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+ advances
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+ * Trolling, insulting/derogatory comments, and personal or political attacks
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+ * Public or private harassment
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+ * Publishing others' private information, such as a physical or electronic
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+ address, without explicit permission
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+ * Other conduct which could reasonably be considered inappropriate in a
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+ professional setting
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+
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+ ## Our Responsibilities
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+
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+ Project maintainers are responsible for clarifying the standards of acceptable
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+ behavior and are expected to take appropriate and fair corrective action in
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+ response to any instances of unacceptable behavior.
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+
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+ Project maintainers have the right and responsibility to remove, edit, or
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+ reject comments, commits, code, wiki edits, issues, and other contributions
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+ that are not aligned to this Code of Conduct, or to ban temporarily or
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+ permanently any contributor for other behaviors that they deem inappropriate,
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+ threatening, offensive, or harmful.
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+
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+ ## Scope
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+
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+ This Code of Conduct applies both within project spaces and in public spaces
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+ when an individual is representing the project or its community. Examples of
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+ representing a project or community include using an official project e-mail
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+ address, posting via an official social media account, or acting as an appointed
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+ representative at an online or offline event. Representation of a project may be
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+ further defined and clarified by project maintainers.
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+
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+ ## Enforcement
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+
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+ Instances of abusive, harassing, or otherwise unacceptable behavior may be
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+ reported by contacting the project team at taichi730@gmail.com. All
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+ complaints will be reviewed and investigated and will result in a response that
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+ is deemed necessary and appropriate to the circumstances. The project team is
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+ obligated to maintain confidentiality with regard to the reporter of an incident.
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+ Further details of specific enforcement policies may be posted separately.
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+
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+ Project maintainers who do not follow or enforce the Code of Conduct in good
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+ faith may face temporary or permanent repercussions as determined by other
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+ members of the project's leadership.
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+
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+ ## Attribution
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+
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+ This Code of Conduct is adapted from the [Contributor Covenant][homepage], version 1.4,
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+ available at [http://contributor-covenant.org/version/1/4][version]
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+
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+ [homepage]: http://contributor-covenant.org
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+ [version]: http://contributor-covenant.org/version/1/4/
data/LICENSE ADDED
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+ The MIT License (MIT)
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+
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+ Copyright (c) 2019 Taichi Ishitani
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+
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+ Permission is hereby granted, free of charge, to any person obtaining a copy
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+ of this software and associated documentation files (the "Software"), to deal
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+ in the Software without restriction, including without limitation the rights
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+ to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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+ copies of the Software, and to permit persons to whom the Software is
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+ furnished to do so, subject to the following conditions:
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+
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+ The above copyright notice and this permission notice shall be included in
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+ all copies or substantial portions of the Software.
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+
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+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+ FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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+ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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+ THE SOFTWARE.
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+ [![Gem Version](https://badge.fury.io/rb/rggen-default-register-map.svg)](https://badge.fury.io/rb/rggen-default-register-map)
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+ [![Build Status](https://travis-ci.com/rggen/rggen-default-register-map.svg?branch=master)](https://travis-ci.com/rggen/rggen-default-register-map)
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+ [![Maintainability](https://api.codeclimate.com/v1/badges/73177494e096af47f09e/maintainability)](https://codeclimate.com/github/rggen/rggen-default-register-map/maintainability)
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+ [![codecov](https://codecov.io/gh/rggen/rggen-default-register-map/branch/master/graph/badge.svg)](https://codecov.io/gh/rggen/rggen-default-register-map)
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+ [![Quality Gate Status](https://sonarcloud.io/api/project_badges/measure?project=rggen_rggen-default-register-map&metric=alert_status)](https://sonarcloud.io/dashboard?id=rggen_rggen-default-register-map)
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+ [![Gitter](https://badges.gitter.im/rggen/rggen.svg)](https://gitter.im/rggen/rggen?utm_source=badge&utm_medium=badge&utm_campaign=pr-badge)
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+
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+
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+ # Rggen::DefaultRegisterMap
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+
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+ RgGen::DefaultRegisterMap provides following features.
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+
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+ * Format of regiter map
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+ * APIs to handle elements of regiter map
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+
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+ ## Installation
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+
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+ During RgGen installation, RgGen::DefaultRegisterMap will also be installed automatically.
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+
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+ ```
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+ $ gem install rggen
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+ ```
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+
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+ If you to install RgGen::DefaultRegisterMap only, use the command below:
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+
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+ ```
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+ $ gem install rggen-default-register-map
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+ ```
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+
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+ ## Contact
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+
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+ Feedbacks, bug reports, questions and etc. are wellcome! You can post them by using following ways:
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+
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+ * [GitHub Issue Tracker](https://github.com/rggen/rggen-default-register-map/issues)
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+ * [Chat Room](https://gitter.im/rggen/rggen)
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+ * [Mailing List](https://groups.google.com/d/forum/rggen)
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+ * [Mail](mailto:rggen@googlegroups.com)
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+
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+ ## Copyright & License
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+
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+ Copyright © 2019 Taichi Ishitani. RgGen::DefaultRegisterMap is licensed under the [MIT License](https://opensource.org/licenses/MIT), see [LICENSE](LICENSE) for futher details.
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+
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+ ## Code of Conduct
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+
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+ Everyone interacting in the RgGen project’s codebases, issue trackers, chat rooms and mailing lists is expected to follow the [code of conduct](https://github.com/rggen/rggen-default-register-map/blob/master/CODE_OF_CONDUCT.md).
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+ # frozen_string_literal: true
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+
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+ require_relative 'default_register_map/version'
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+
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+ module RgGen
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+ module DefaultRegisterMap
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+ FEATURES = [
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+ 'default_register_map/bit_field/bit_assignment',
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+ 'default_register_map/bit_field/comment',
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+ 'default_register_map/bit_field/initial_value',
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+ 'default_register_map/bit_field/name',
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+ 'default_register_map/bit_field/reference',
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+ 'default_register_map/bit_field/type',
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+ 'default_register_map/bit_field/type/rc',
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+ 'default_register_map/bit_field/type/reserved',
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+ 'default_register_map/bit_field/type/ro',
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+ 'default_register_map/bit_field/type/rof',
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+ 'default_register_map/bit_field/type/rs',
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+ 'default_register_map/bit_field/type/rw',
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+ 'default_register_map/bit_field/type/rwc',
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+ 'default_register_map/bit_field/type/rwe_rwl',
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+ 'default_register_map/bit_field/type/w0c_w1c',
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+ 'default_register_map/bit_field/type/w0s_w1s',
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+ 'default_register_map/bit_field/type/w0trg_w1trg',
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+ 'default_register_map/bit_field/type/wo',
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+ 'default_register_map/global/address_width',
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+ 'default_register_map/global/bus_width',
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+ 'default_register_map/register/name',
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+ 'default_register_map/register/offset_address',
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+ 'default_register_map/register/size',
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+ 'default_register_map/register/type',
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+ 'default_register_map/register/type/external',
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+ 'default_register_map/register/type/indirect',
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+ 'default_register_map/register_block/byte_size',
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+ 'default_register_map/register_block/name'
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+ ].freeze
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+
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+ def self.load_features
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+ FEATURES.each { |file| require_relative file }
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+ end
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+
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+ def self.default_setup(_builder)
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+ load_features
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+ end
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+ end
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+ end
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+ # frozen_string_literal: true
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+
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+ RgGen.define_simple_feature(:bit_field, :bit_assignment) do
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+ register_map do
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+ property :lsb, forward_to: :lsb_bit
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+ property :msb, forward_to: :msb_bit
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+ property :width, default: 1
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+ property :sequence_size
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+ property :step, initial: -> { width }
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+ property :sequential?, body: -> { !@sequence_size.nil? }
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+ property :bit_map, initial: -> { calc_bit_map }
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+
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+ input_pattern /#{integer}(?::#{integer}){0,3}/,
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+ match_automatically: false
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+
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+ build do |value|
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+ input_value = preprocess(value)
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+ KEYS.each { |key| parse_value(input_value, key) }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { [@lsb, @width, @sequence_size, @step].none? }
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+ message { 'no bit assignment is given' }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { !@lsb }
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+ message { 'no lsb is given' }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { lsb.negative? }
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+ message { "lsb is less than 0: #{lsb}" }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { width < 1 }
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+ message { "width is less than 1: #{width}" }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { sequential? && sequence_size < 1 }
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+ message { "sequence size is less than 1: #{sequence_size}" }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { sequential? && step < 1 }
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+ message { "step is less than 1: #{step}" }
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+ end
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+
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+ verify(:feature) do
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+ error_condition { overlap? }
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+ message { 'overlap with existing bit field(s)' }
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+ end
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+
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+ printable(:bit_assignments) do
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+ Array.new(@sequence_size || 1) do |i|
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+ width > 1 && "[#{msb(i)}:#{lsb(i)}]" || "[#{lsb(i)}]"
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+ end
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+ end
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+
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+ private
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+
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+ KEYS = [:lsb, :width, :sequence_size, :step].freeze
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+
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+ def preprocess(value)
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+ if value.is_a?(Hash)
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+ value
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+ elsif match_pattern(value)
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+ split_match_data(match_data)
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+ else
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+ error "illegal input value for bit assignment: #{value.inspect}"
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+ end
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+ end
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+
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+ def split_match_data(match_data)
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+ match_data
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+ .to_s
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+ .split(':')
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+ .map.with_index { |value, i| [KEYS[i], value] }
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+ .to_h
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+ end
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+
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+ def parse_value(input_value, key)
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+ input_value.key?(key) &&
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+ instance_variable_set("@#{key}", Integer(input_value[key]))
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+ rescue ArgumentError, TypeError
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+ error "cannot convert #{input_value[key].inspect} into " \
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+ "bit assignment(#{key.to_s.tr('_', ' ')})"
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+ end
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+
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+ def lsb_bit(index = 0)
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+ lsb_msb_bit(index, @lsb)
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+ end
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+
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+ def msb_bit(index = 0)
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+ lsb_msb_bit(index, @lsb + width - 1)
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+ end
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+
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+ def lsb_msb_bit(index, base)
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+ calc_bit_position((sequential? && index) || 0, base)
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+ end
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+
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+ def calc_bit_position(index, base)
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+ if index.is_a?(Integer)
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+ base + step * index
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+ else
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+ "#{base}+#{step}*#{index}"
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+ end
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+ end
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+
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+ def calc_bit_map
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+ Array.new(sequence_size || 1) { |i| (2**width - 1) << lsb(i) }.inject(:|)
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+ end
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+
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+ def overlap?
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+ register
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+ .bit_fields
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+ .any? { |bit_field| (bit_field.bit_map & bit_map).positive? }
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+ end
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+ end
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+ end
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+ # frozen_string_literal: true
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+
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+ RgGen.define_simple_feature(:bit_field, :comment) do
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+ register_map do
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+ property :comment, body: -> { @comment ||= '' }
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+
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+ build do |value|
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+ @comment =
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+ if value.is_a?(Array)
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+ value.join("\n")
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+ else
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+ value.to_s
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+ end
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+ end
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+
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+ printable :comment
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+ end
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+ end
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+ # frozen_string_literal: true
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+
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+ RgGen.define_simple_feature(:bit_field, :initial_value) do
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+ register_map do
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+ property :initial_value, default: 0
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+ property :initial_value?, body: -> { !@initial_value.nil? }
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+
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+ build do |value|
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+ @initial_value =
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+ begin
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+ Integer(value)
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+ rescue ArgumentError, TypeError
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+ error "cannot convert #{value.inspect} into initial value"
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+ end
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+ end
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+
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+ verify(:component) do
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+ error_condition { settings[:require] && !initial_value? }
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+ message { 'no initial value is given' }
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+ end
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+
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+ verify(:component) do
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+ error_condition { initial_value? && initial_value < min_initial_value }
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+ message do
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+ 'input initial value is less than minimum initial value: ' \
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+ "initial value #{initial_value} " \
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+ "minimum initial value #{min_initial_value}"
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+ end
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+ end
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+
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+ verify(:component) do
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+ error_condition { initial_value? && initial_value > max_initial_value }
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+ message do
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+ 'input initial value is greater than maximum initial value: ' \
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+ "initial value #{initial_value} " \
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+ "maximum initial value #{max_initial_value}"
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+ end
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+ end
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+
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+ verify(:component) do
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+ error_condition { initial_value? && !match_valid_condition? }
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+ message do
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+ "does not match the valid initial value condition: #{initial_value}"
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+ end
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+ end
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+
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+ printable(:initial_value) do
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+ @initial_value &&
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+ begin
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+ print_width = (bit_field.width + 3) / 4
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+ format('0x%0*x', print_width, @initial_value)
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+ end
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+ end
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+
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+ private
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+
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+ def settings
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+ @settings ||=
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+ (bit_field.settings && bit_field.settings[:initial_value]) || {}
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+ end
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+
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+ def min_initial_value
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+ bit_field.width == 1 ? 0 : -(2**(bit_field.width - 1))
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+ end
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+
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+ def max_initial_value
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+ 2**bit_field.width - 1
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+ end
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+
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+ def match_valid_condition?
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+ !settings.key?(:valid_condition) ||
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+ instance_exec(@initial_value, &settings[:valid_condition])
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+ end
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+ end
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+ end
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+ # frozen_string_literal: true
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+
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+ RgGen.define_simple_feature(:bit_field, :name) do
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+ register_map do
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+ property :name, initial: -> { register.name }
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+ property :full_name, forward_to: :get_full_name
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+
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+ input_pattern variable_name
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+
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+ build do |value|
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+ @name =
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+ if pattern_matched?
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+ match_data.to_s
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+ else
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+ error "illegal input value for bit field name: #{value.inspect}"
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+ end
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+ @full_name = [register.name, @name]
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+ end
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+
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+ verify(:feature) do
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+ error_condition { duplicated_name? }
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+ message { "duplicated bit field name: #{name}" }
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+ end
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+
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+ printable :name
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+
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+ private
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+
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+ def get_full_name(separator = '.')
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+ @full_name&.join(separator) || register.name
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+ end
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+
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+ def duplicated_name?
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+ register.bit_fields.any? { |bit_field| bit_field.name == name }
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+ end
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+ end
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+ end