raspi_lcd 0.0.1

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
@@ -0,0 +1,801 @@
1
+ // bcm2835.h
2
+ //
3
+ // C and C++ support for Broadcom BCM 2835 as used in Raspberry Pi
4
+ // http://elinux.org/RPi_Low-level_peripherals
5
+ // http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
6
+ //
7
+ // Author: Mike McCauley (mikem@open.com.au)
8
+ // Copyright (C) 2011 Mike McCauley
9
+ // $Id: bcm2835.h,v 1.4 2012/07/16 23:57:59 mikem Exp mikem $
10
+ //
11
+ /// \mainpage C library for Broadcom BCM 2835 as used in Raspberry Pi
12
+ ///
13
+ /// This is a C library for Raspberry Pi (RPi). It provides access to
14
+ /// GPIO and other IO functions on the Broadcom BCM 2835 chip,
15
+ /// allowing access to the GPIO pins on the
16
+ /// 26 pin IDE plug on the RPi board so you can control and interface with various external devices.
17
+ ///
18
+ /// It provides functions for reading digital inputs and setting digital outputs.
19
+ /// Pin event detection is supported by polling (interrupts not supported).
20
+ ///
21
+ /// It is C++ compatible, and installs as a header file and non-shared library on
22
+ /// any Linux-based distro (but clearly is no use except on Raspberry Pi or another board with
23
+ /// BCM 2835).
24
+ ///
25
+ /// The latest version of this documentation can be downloaded from
26
+ /// http://www.open.com.au/mikem/bcm2835
27
+ ///
28
+ /// The version of the package that this documentation refers to can be downloaded
29
+ /// from http://www.open.com.au/mikem/bcm2835/bcm2835-1.11.tar.gz
30
+ /// You can find the latest version at http://www.open.com.au/mikem/bcm2835
31
+ ///
32
+ /// Several example programs are provided.
33
+ ///
34
+ /// Based on data in http://elinux.org/RPi_Low-level_peripherals and
35
+ /// http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
36
+ /// and http://www.scribd.com/doc/101830961/GPIO-Pads-Control2
37
+ ///
38
+ /// You can also find online help and discussion at http://groups.google.com/group/bcm2835
39
+ /// Please use that group for all questions and discussions on this topic.
40
+ /// Do not contact the author directly, unless it is to discuss commercial licensing.
41
+ ///
42
+ /// Tested on debian6-19-04-2012, 2012-07-15-wheezy-raspbian and Occidentalisv01
43
+ /// CAUTION: it has been observed that when detect enables such as bcm2835_gpio_len()
44
+ /// are used and the pin is pulled LOW
45
+ /// it can cause temporary hangs on 2012-07-15-wheezy-raspbian and Occidentalisv01.
46
+ /// Reason for this is not yet determined, but suspect that an interrupt handler is
47
+ /// hitting a hard loop on those OSs.
48
+ /// If you must use bcm2835_gpio_len() and friends, make sure you disable the pins with
49
+ /// bcm2835_gpio_cler_len() and friends after use.
50
+ ///
51
+ /// \par Installation
52
+ ///
53
+ /// This library consists of a single non-shared library and header file, which will be
54
+ /// installed in the usual places by make install
55
+ ///
56
+ /// tar zxvf bcm2835-1.0.tar.gz
57
+ /// cd bcm2835-1.0
58
+ /// ./configure
59
+ /// make
60
+ /// # as root:
61
+ /// make check
62
+ /// make install
63
+ ///
64
+ /// \par Physical Addresses
65
+ ///
66
+ /// The functions bcm2845_peri_read(), bcm2845_peri_write() and bcm2845_peri_set_bits()
67
+ /// are low level peripheral register access functions. They are designed to use
68
+ /// physical addresses as described in section 1.2.3 ARM physical addresses
69
+ /// of the BCM2835 ARM Peripherals manual.
70
+ /// Physical addresses range from 0x20000000 to 0x20FFFFFF for peripherals. The bus
71
+ /// addresses for peripherals are set up to map onto the peripheral bus address range starting at
72
+ /// 0x7E000000. Thus a peripheral advertised in the manual at bus address 0x7Ennnnnn is available at
73
+ /// physical address 0x20nnnnnn.
74
+ ///
75
+ /// \par Pin Numbering
76
+ ///
77
+ /// The GPIO pin numbering as used by RPi is different to and inconsistent with the underlying
78
+ /// BCM 2835 chip pin numbering. http://elinux.org/RPi_BCM2835_GPIOs
79
+ ///
80
+ /// RPi has a 26 pin IDE header that provides access to some of the GPIO pins on the BCM 2835,
81
+ /// as well as power and ground pins. Not all GPIO pins on the BCM 2835 are available on the
82
+ /// IDE header.
83
+ ///
84
+ /// The functions in this librray are disgned to be passed the BCM 2835 GPIO pin number and _not_
85
+ /// the RPi pin number. There are symbolic definitions for each of the available pins
86
+ /// that you should use for convenience. See \ref RPiGPIOPin.
87
+ ///
88
+ /// \par SPI Pins
89
+ ///
90
+ /// The bcm2835_spi_* functions allow you to control the BCM 2835 SPI0 interface,
91
+ /// allowing you to send and received data by SPI (Serial Peripheral Interface).
92
+ /// For more information about SPI, see http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus
93
+ ///
94
+ /// When bcm2835_spi_begin() is called it changes the bahaviour of the SPI interface pins from their
95
+ /// default GPIO behaviour in order to support SPI. While SPI is in use, you will not be able
96
+ /// to control the state of the SPI pins through the usual bcm2835_spi_gpio_write().
97
+ /// When bcm2835_spi_end() is called, the SPI pins will all revert to inputs, and can then be
98
+ /// configured and controled with the usual bcm2835_gpio_* calls.
99
+ ///
100
+ /// The Raspberry Pi GPIO pins used for SPI are:
101
+ ///
102
+ /// - P1-19 (MOSI)
103
+ /// - P1-21 (MISO)
104
+ /// - P1-23 (CLK)
105
+ /// - P1-24 (CE0)
106
+ /// - P1-26 (CE1)
107
+ ///
108
+ /// \par Open Source Licensing GPL V2
109
+ ///
110
+ /// This is the appropriate option if you want to share the source code of your
111
+ /// application with everyone you distribute it to, and you also want to give them
112
+ /// the right to share who uses it. If you wish to use this software under Open
113
+ /// Source Licensing, you must contribute all your source code to the open source
114
+ /// community in accordance with the GPL Version 2 when your application is
115
+ /// distributed. See http://www.gnu.org/copyleft/gpl.html and COPYING
116
+ ///
117
+ /// \par Acknowledgements
118
+ ///
119
+ /// Some of this code has been inspired by Dom and Gert.
120
+ ///
121
+ /// \par Revision History
122
+ ///
123
+ /// \version 1.0 Initial release
124
+ /// \version 1.1 Minor bug fixes
125
+ /// \version 1.2 Added support for SPI
126
+ /// \version 1.3 Added bcm2835_spi_transfern()
127
+ /// \version 1.4 Fixed a problem that prevented SPI CE1 being used. Reported by David Robinson.
128
+ /// \version 1.5 Added bcm2835_close() to deinit the library. Suggested by C?sar Ortiz
129
+ /// \version 1.6 Document testing on 2012-07-15-wheezy-raspbian and Occidentalisv01
130
+ /// Functions bcm2835_gpio_ren(), bcm2835_gpio_fen(), bcm2835_gpio_hen()
131
+ /// bcm2835_gpio_len(), bcm2835_gpio_aren() and bcm2835_gpio_afen() now
132
+ /// changes only the pin specified. Other pins that were already previoulsy
133
+ /// enabled stay enabled.
134
+ /// Added bcm2835_gpio_clr_ren(), bcm2835_gpio_clr_fen(), bcm2835_gpio_clr_hen()
135
+ /// bcm2835_gpio_clr_len(), bcm2835_gpio_clr_aren(), bcm2835_gpio_clr_afen()
136
+ /// to clear the enable for individual pins, suggested by Andreas Sundstrom.
137
+ /// \version 1.7 Added bcm2835_spi_transfernb to support different buffers for read and write.
138
+ /// \version 1.8 Improvements to read barrier, as suggested by maddin.
139
+ /// \version 1.9 Improvements contributed by mikew:
140
+ /// I noticed that it was mallocing memory for the mmaps on /dev/mem.
141
+ /// It's not necessary to do that, you can just mmap the file directly,
142
+ /// so I've removed the mallocs (and frees).
143
+ /// I've also modified delayMicroseconds() to use nanosleep() for long waits,
144
+ /// and a busy wait on a high resolution timer for the rest. This is because
145
+ /// I've found that calling nanosleep() takes at least 100-200 us.
146
+ /// You need to link using '-lrt' using this version.
147
+ /// I've added some unsigned casts to the debug prints to silence compiler
148
+ /// warnings I was getting, fixed some typos, and changed the value of
149
+ /// BCM2835_PAD_HYSTERESIS_ENABLED to 0x08 as per Gert van Loo's doc at
150
+ /// http://www.scribd.com/doc/101830961/GPIO-Pads-Control2
151
+ /// Also added a define for the passwrd value that Gert says is needed to
152
+ /// change pad control settings.
153
+ /// \version 1.10 Changed the names of the delay functions to bcm2835_delay()
154
+ /// and bcm2835_delayMicroseconds() to prevent collisions with wiringPi.
155
+ /// Macros to map delay()-> bcm2835_delay() and
156
+ /// Macros to map delayMicroseconds()-> bcm2835_delayMicroseconds(), which
157
+ /// can be disabled by defining BCM2835_NO_DELAY_COMPATIBILITY
158
+ /// \version 1.11 Fixed incorrect link to download file
159
+ ///
160
+ ///
161
+ /// \author Mike McCauley (mikem@open.com.au)
162
+
163
+
164
+
165
+ // Defines for BCM2835
166
+ #ifndef BCM2835_H
167
+ #define BCM2835_H
168
+
169
+ #include <stdint.h>
170
+
171
+ /// \defgroup constants Constants for passing to and from library functions
172
+ /// The values here are designed to be passed to various functions in the bcm2835 library.
173
+ /// @{
174
+
175
+
176
+ /// This means pin HIGH, true, 3.3volts on a pin.
177
+ #define HIGH 0x1
178
+ /// This means pin LOW, false, 0volts on a pin.
179
+ #define LOW 0x0
180
+
181
+ // Physical addresses for various peripheral regiser sets
182
+ /// Base Physical Address of the BCM 2835 peripheral registers
183
+ #define BCM2835_PERI_BASE 0x20000000
184
+ /// Base Physical Address of the Pads registers
185
+ #define BCM2835_GPIO_PADS (BCM2835_PERI_BASE + 0x100000)
186
+ /// Base Physical Address of the Clock/timer registers
187
+ #define BCM2835_CLOCK_BASE (BCM2835_PERI_BASE + 0x101000)
188
+ /// Base Physical Address of the GPIO registers
189
+ #define BCM2835_GPIO_BASE (BCM2835_PERI_BASE + 0x200000)
190
+ /// Base Physical Address of the SPI0 registers
191
+ #define BCM2835_SPI0_BASE (BCM2835_PERI_BASE + 0x204000)
192
+ /// Base Physical Address of the PWM registers
193
+ #define BCM2835_GPIO_PWM (BCM2835_PERI_BASE + 0x20C000)
194
+
195
+ /// Size of memory page on RPi
196
+ #define BCM2835_PAGE_SIZE (4*1024)
197
+ /// Size of memory block on RPi
198
+ #define BCM2835_BLOCK_SIZE (4*1024)
199
+
200
+
201
+ // Defines for GPIO
202
+ // The BCM2835 has 54 GPIO pins.
203
+ // BCM2835 data sheet, Page 90 onwards.
204
+ /// GPIO register offsets from BCM2835_GPIO_BASE. Offsets into the GPIO Peripheral block in bytes per 6.1 Register View
205
+ #define BCM2835_GPFSEL0 0x0000 ///< GPIO Function Select 0
206
+ #define BCM2835_GPFSEL1 0x0004 ///< GPIO Function Select 1
207
+ #define BCM2835_GPFSEL2 0x0008 ///< GPIO Function Select 2
208
+ #define BCM2835_GPFSEL3 0x000c ///< GPIO Function Select 3
209
+ #define BCM2835_GPFSEL4 0x0010 ///< GPIO Function Select 4
210
+ #define BCM2835_GPFSEL5 0x0014 ///< GPIO Function Select 5
211
+ #define BCM2835_GPSET0 0x001c ///< GPIO Pin Output Set 0
212
+ #define BCM2835_GPSET1 0x0020 ///< GPIO Pin Output Set 1
213
+ #define BCM2835_GPCLR0 0x0028 ///< GPIO Pin Output Clear 0
214
+ #define BCM2835_GPCLR1 0x002c ///< GPIO Pin Output Clear 1
215
+ #define BCM2835_GPLEV0 0x0034 ///< GPIO Pin Level 0
216
+ #define BCM2835_GPLEV1 0x0038 ///< GPIO Pin Level 1
217
+ #define BCM2835_GPEDS0 0x0040 ///< GPIO Pin Event Detect Status 0
218
+ #define BCM2835_GPEDS1 0x0044 ///< GPIO Pin Event Detect Status 1
219
+ #define BCM2835_GPREN0 0x004c ///< GPIO Pin Rising Edge Detect Enable 0
220
+ #define BCM2835_GPREN1 0x0050 ///< GPIO Pin Rising Edge Detect Enable 1
221
+ #define BCM2835_GPFEN0 0x0048 ///< GPIO Pin Falling Edge Detect Enable 0
222
+ #define BCM2835_GPFEN1 0x005c ///< GPIO Pin Falling Edge Detect Enable 1
223
+ #define BCM2835_GPHEN0 0x0064 ///< GPIO Pin High Detect Enable 0
224
+ #define BCM2835_GPHEN1 0x0068 ///< GPIO Pin High Detect Enable 1
225
+ #define BCM2835_GPLEN0 0x0070 ///< GPIO Pin Low Detect Enable 0
226
+ #define BCM2835_GPLEN1 0x0074 ///< GPIO Pin Low Detect Enable 1
227
+ #define BCM2835_GPAREN0 0x007c ///< GPIO Pin Async. Rising Edge Detect 0
228
+ #define BCM2835_GPAREN1 0x0080 ///< GPIO Pin Async. Rising Edge Detect 1
229
+ #define BCM2835_GPAFEN0 0x0088 ///< GPIO Pin Async. Falling Edge Detect 0
230
+ #define BCM2835_GPAFEN1 0x008c ///< GPIO Pin Async. Falling Edge Detect 1
231
+ #define BCM2835_GPPUD 0x0094 ///< GPIO Pin Pull-up/down Enable
232
+ #define BCM2835_GPPUDCLK0 0x0098 ///< GPIO Pin Pull-up/down Enable Clock 0
233
+ #define BCM2835_GPPUDCLK1 0x009c ///< GPIO Pin Pull-up/down Enable Clock 1
234
+
235
+ /// \brief bcm2835PortFunction
236
+ /// Port function select modes for bcm2845_gpio_fsel()
237
+ typedef enum
238
+ {
239
+ BCM2835_GPIO_FSEL_INPT = 0b000, ///< Input
240
+ BCM2835_GPIO_FSEL_OUTP = 0b001, ///< Output
241
+ BCM2835_GPIO_FSEL_ALT0 = 0b100, ///< Alternate function 0
242
+ BCM2835_GPIO_FSEL_ALT1 = 0b101, ///< Alternate function 1
243
+ BCM2835_GPIO_FSEL_ALT2 = 0b110, ///< Alternate function 2
244
+ BCM2835_GPIO_FSEL_ALT3 = 0b111, ///< Alternate function 3
245
+ BCM2835_GPIO_FSEL_ALT4 = 0b011, ///< Alternate function 4
246
+ BCM2835_GPIO_FSEL_ALT5 = 0b010, ///< Alternate function 5
247
+ BCM2835_GPIO_FSEL_MASK = 0b111 ///< Function select bits mask
248
+ } bcm2835FunctionSelect;
249
+
250
+ /// \brief bcm2835PUDControl
251
+ /// Pullup/Pulldown defines for bcm2845_gpio_pud()
252
+ typedef enum
253
+ {
254
+ BCM2835_GPIO_PUD_OFF = 0b00, ///< Off ? disable pull-up/down
255
+ BCM2835_GPIO_PUD_DOWN = 0b01, ///< Enable Pull Down control
256
+ BCM2835_GPIO_PUD_UP = 0b10 ///< Enable Pull Up control
257
+ } bcm2835PUDControl;
258
+
259
+ /// Pad control register offsets from BCM2835_GPIO_PADS
260
+ #define BCM2835_PADS_GPIO_0_27 0x002c ///< Pad control register for pads 0 to 27
261
+ #define BCM2835_PADS_GPIO_28_45 0x0030 ///< Pad control register for pads 28 to 45
262
+ #define BCM2835_PADS_GPIO_46_53 0x0034 ///< Pad control register for pads 46 to 53
263
+
264
+ /// Pad Control masks
265
+ #define BCM2835_PAD_PASSWRD (0x5A << 24) ///< Password to enable setting pad mask
266
+ #define BCM2835_PAD_SLEW_RATE_UNLIMITED 0x10 ///< Slew rate unlimited
267
+ #define BCM2835_PAD_HYSTERESIS_ENABLED 0x08 ///< Hysteresis enabled
268
+ #define BCM2835_PAD_DRIVE_2mA 0x00 ///< 2mA drive current
269
+ #define BCM2835_PAD_DRIVE_4mA 0x01 ///< 4mA drive current
270
+ #define BCM2835_PAD_DRIVE_6mA 0x02 ///< 6mA drive current
271
+ #define BCM2835_PAD_DRIVE_8mA 0x03 ///< 8mA drive current
272
+ #define BCM2835_PAD_DRIVE_10mA 0x04 ///< 10mA drive current
273
+ #define BCM2835_PAD_DRIVE_12mA 0x05 ///< 12mA drive current
274
+ #define BCM2835_PAD_DRIVE_14mA 0x06 ///< 14mA drive current
275
+ #define BCM2835_PAD_DRIVE_16mA 0x07 ///< 16mA drive current
276
+
277
+ /// \brief bcm2835PadGroup
278
+ /// Pad group specification for bcm2845_gpio_pad()
279
+ typedef enum
280
+ {
281
+ BCM2835_PAD_GROUP_GPIO_0_27 = 0, ///< Pad group for GPIO pads 0 to 27
282
+ BCM2835_PAD_GROUP_GPIO_28_45 = 1, ///< Pad group for GPIO pads 28 to 45
283
+ BCM2835_PAD_GROUP_GPIO_46_53 = 2 ///< Pad group for GPIO pads 46 to 53
284
+ } bcm2835PadGroup;
285
+
286
+ /// \brief RPiGPIOPin
287
+ /// Here we define Raspberry Pin GPIO pins on P1 in terms of the underlying BCM GPIO pin numbers.
288
+ /// These can be passed as a pin number to any function requiring a pin.
289
+ /// Not all pins on the RPi 26 bin IDE plug are connected to GPIO pins
290
+ /// and some can adopt an alternate function.
291
+ /// At bootup, pins 8 and 10 are set to UART0_TXD, UART0_RXD (ie the alt0 function) respectively
292
+ /// When SPI0 is in use (ie after bcm2835_spi_begin()), pins 19, 21, 23, 24, 26 are dedicated to SPI
293
+ /// and cant be controlled independently
294
+ typedef enum
295
+ {
296
+ RPI_GPIO_P1_03 = 0, ///< Pin P1-03
297
+ RPI_GPIO_P1_05 = 1, ///< Pin P1-05
298
+ RPI_GPIO_P1_07 = 4, ///< Pin P1-07
299
+ RPI_GPIO_P1_08 = 14, ///< Pin P1-08, defaults to alt function 0 UART0_TXD
300
+ RPI_GPIO_P1_10 = 15, ///< Pin P1-10, defaults to alt function 0 UART0_RXD
301
+ RPI_GPIO_P1_11 = 17, ///< Pin P1-11
302
+ RPI_GPIO_P1_12 = 18, ///< Pin P1-12
303
+ RPI_GPIO_P1_13 = 21, ///< Pin P1-13
304
+ RPI_GPIO_P1_15 = 22, ///< Pin P1-15
305
+ RPI_GPIO_P1_16 = 23, ///< Pin P1-16
306
+ RPI_GPIO_P1_18 = 24, ///< Pin P1-18
307
+ RPI_GPIO_P1_19 = 10, ///< Pin P1-19, MOSI when SPI0 in use
308
+ RPI_GPIO_P1_21 = 9, ///< Pin P1-21, MISO when SPI0 in use
309
+ RPI_GPIO_P1_22 = 25, ///< Pin P1-22
310
+ RPI_GPIO_P1_23 = 11, ///< Pin P1-23, CLK when SPI0 in use
311
+ RPI_GPIO_P1_24 = 8, ///< Pin P1-24, CE0 when SPI0 in use
312
+ RPI_GPIO_P1_26 = 7 ///< Pin P1-26, CE1 when SPI0 in use
313
+ } RPiGPIOPin;
314
+
315
+ /// Defines for SPI
316
+ /// GPIO register offsets from BCM2835_SPI0_BASE.
317
+ /// Offsets into the SPI Peripheral block in bytes per 10.5 SPI Register Map
318
+ #define BCM2835_SPI0_CS 0x0000 ///< SPI Master Control and Status
319
+ #define BCM2835_SPI0_FIFO 0x0004 ///< SPI Master TX and RX FIFOs
320
+ #define BCM2835_SPI0_CLK 0x0008 ///< SPI Master Clock Divider
321
+ #define BCM2835_SPI0_DLEN 0x000c ///< SPI Master Data Length
322
+ #define BCM2835_SPI0_LTOH 0x0010 ///< SPI LOSSI mode TOH
323
+ #define BCM2835_SPI0_DC 0x0014 ///< SPI DMA DREQ Controls
324
+
325
+ // Register masks for SPI0_CS
326
+ #define BCM2835_SPI0_CS_LEN_LONG 0x02000000 ///< Enable Long data word in Lossi mode if DMA_LEN is set
327
+ #define BCM2835_SPI0_CS_DMA_LEN 0x01000000 ///< Enable DMA mode in Lossi mode
328
+ #define BCM2835_SPI0_CS_CSPOL2 0x00800000 ///< Chip Select 2 Polarity
329
+ #define BCM2835_SPI0_CS_CSPOL1 0x00400000 ///< Chip Select 1 Polarity
330
+ #define BCM2835_SPI0_CS_CSPOL0 0x00200000 ///< Chip Select 0 Polarity
331
+ #define BCM2835_SPI0_CS_RXF 0x00100000 ///< RXF - RX FIFO Full
332
+ #define BCM2835_SPI0_CS_RXR 0x00080000 ///< RXR RX FIFO needs Reading ( full)
333
+ #define BCM2835_SPI0_CS_TXD 0x00040000 ///< TXD TX FIFO can accept Data
334
+ #define BCM2835_SPI0_CS_RXD 0x00020000 ///< RXD RX FIFO contains Data
335
+ #define BCM2835_SPI0_CS_DONE 0x00010000 ///< Done transfer Done
336
+ #define BCM2835_SPI0_CS_TE_EN 0x00008000 ///< Unused
337
+ #define BCM2835_SPI0_CS_LMONO 0x00004000 ///< Unused
338
+ #define BCM2835_SPI0_CS_LEN 0x00002000 ///< LEN LoSSI enable
339
+ #define BCM2835_SPI0_CS_REN 0x00001000 ///< REN Read Enable
340
+ #define BCM2835_SPI0_CS_ADCS 0x00000800 ///< ADCS Automatically Deassert Chip Select
341
+ #define BCM2835_SPI0_CS_INTR 0x00000400 ///< INTR Interrupt on RXR
342
+ #define BCM2835_SPI0_CS_INTD 0x00000200 ///< INTD Interrupt on Done
343
+ #define BCM2835_SPI0_CS_DMAEN 0x00000100 ///< DMAEN DMA Enable
344
+ #define BCM2835_SPI0_CS_TA 0x00000080 ///< Transfer Active
345
+ #define BCM2835_SPI0_CS_CSPOL 0x00000040 ///< Chip Select Polarity
346
+ #define BCM2835_SPI0_CS_CLEAR 0x00000030 ///< Clear FIFO Clear RX and TX
347
+ #define BCM2835_SPI0_CS_CLEAR_RX 0x00000020 ///< Clear FIFO Clear RX
348
+ #define BCM2835_SPI0_CS_CLEAR_TX 0x00000010 ///< Clear FIFO Clear TX
349
+ #define BCM2835_SPI0_CS_CPOL 0x00000008 ///< Clock Polarity
350
+ #define BCM2835_SPI0_CS_CPHA 0x00000004 ///< Clock Phase
351
+ #define BCM2835_SPI0_CS_CS 0x00000003 ///< Chip Select
352
+
353
+ /// \brief bcm2835SPIBitOrder
354
+ /// Specifies the SPI data bit ordering
355
+ typedef enum
356
+ {
357
+ BCM2835_SPI_BIT_ORDER_LSBFIRST = 0, ///< LSB First
358
+ BCM2835_SPI_BIT_ORDER_MSBFIRST = 1 ///< MSB First
359
+ }bcm2835SPIBitOrder;
360
+
361
+ /// \brief bcm2835SPIMode
362
+ /// Specify the SPI data mode
363
+ typedef enum
364
+ {
365
+ BCM2835_SPI_MODE0 = 0, ///< CPOL = 0, CPHA = 0
366
+ BCM2835_SPI_MODE1 = 1, ///< CPOL = 0, CPHA = 1
367
+ BCM2835_SPI_MODE2 = 2, ///< CPOL = 1, CPHA = 0
368
+ BCM2835_SPI_MODE3 = 3, ///< CPOL = 1, CPHA = 1
369
+ }bcm2835SPIMode;
370
+
371
+ /// \brief bcm2835SPIChipSelect
372
+ /// Specify the SPI chip select pin(s)
373
+ typedef enum
374
+ {
375
+ BCM2835_SPI_CS0 = 0, ///< Chip Select 0
376
+ BCM2835_SPI_CS1 = 1, ///< Chip Select 1
377
+ BCM2835_SPI_CS2 = 2, ///< Chip Select 2 (ie pins CS1 and CS2 are asserted)
378
+ BCM2835_SPI_CS_NONE = 3, ///< No CS, control it yourself
379
+ } bcm2835SPIChipSelect;
380
+
381
+ /// \brief bcm2835SPIClockDivider
382
+ /// Specifies the divider used to generate the SPI clock from the system clock.
383
+ /// Figures below give the divider, clock period and clock frequency.
384
+ typedef enum
385
+ {
386
+ BCM2835_SPI_CLOCK_DIVIDER_65536 = 0, ///< 65536 = 256us = 4kHz
387
+ BCM2835_SPI_CLOCK_DIVIDER_32768 = 32768, ///< 32768 = 126us = 8kHz
388
+ BCM2835_SPI_CLOCK_DIVIDER_16384 = 16384, ///< 16384 = 64us = 15.625kHz
389
+ BCM2835_SPI_CLOCK_DIVIDER_8192 = 8192, ///< 8192 = 32us = 31.25kHz
390
+ BCM2835_SPI_CLOCK_DIVIDER_4096 = 4096, ///< 4096 = 16us = 62.5kHz
391
+ BCM2835_SPI_CLOCK_DIVIDER_2048 = 2048, ///< 2048 = 8us = 125kHz
392
+ BCM2835_SPI_CLOCK_DIVIDER_1024 = 1024, ///< 1024 = 4us = 250kHz
393
+ BCM2835_SPI_CLOCK_DIVIDER_512 = 512, ///< 512 = 2us = 500kHz
394
+ BCM2835_SPI_CLOCK_DIVIDER_256 = 256, ///< 256 = 1us = 1MHz
395
+ BCM2835_SPI_CLOCK_DIVIDER_128 = 128, ///< 128 = 500ns = = 2MHz
396
+ BCM2835_SPI_CLOCK_DIVIDER_64 = 64, ///< 64 = 250ns = 4MHz
397
+ BCM2835_SPI_CLOCK_DIVIDER_32 = 32, ///< 32 = 125ns = 8MHz
398
+ BCM2835_SPI_CLOCK_DIVIDER_16 = 16, ///< 16 = 50ns = 20MHz
399
+ BCM2835_SPI_CLOCK_DIVIDER_8 = 8, ///< 8 = 25ns = 40MHz
400
+ BCM2835_SPI_CLOCK_DIVIDER_4 = 4, ///< 4 = 12.5ns 80MHz
401
+ BCM2835_SPI_CLOCK_DIVIDER_2 = 2, ///< 2 = 6.25ns = 160MHz
402
+ BCM2835_SPI_CLOCK_DIVIDER_1 = 1, ///< 0 = 256us = 4kHz
403
+ } bcm2835SPIClockDivider;
404
+
405
+
406
+ /// @}
407
+
408
+
409
+ // Defines for PWM
410
+ #define BCM2835_PWM_CONTROL 0
411
+ #define BCM2835_PWM_STATUS 1
412
+ #define BCM2835_PWM0_RANGE 4
413
+ #define BCM2835_PWM0_DATA 5
414
+ #define BCM2835_PWM1_RANGE 8
415
+ #define BCM2835_PWM1_DATA 9
416
+
417
+ #define BCM2835_PWMCLK_CNTL 40
418
+ #define BCM2835_PWMCLK_DIV 41
419
+
420
+ #define BCM2835_PWM1_MS_MODE 0x8000 /// Run in MS mode
421
+ #define BCM2835_PWM1_USEFIFO 0x2000 /// Data from FIFO
422
+ #define BCM2835_PWM1_REVPOLAR 0x1000 /// Reverse polarity
423
+ #define BCM2835_PWM1_OFFSTATE 0x0800 /// Ouput Off state
424
+ #define BCM2835_PWM1_REPEATFF 0x0400 /// Repeat last value if FIFO empty
425
+ #define BCM2835_PWM1_SERIAL 0x0200 /// Run in serial mode
426
+ #define BCM2835_PWM1_ENABLE 0x0100 /// Channel Enable
427
+
428
+ #define BCM2835_PWM0_MS_MODE 0x0080 /// Run in MS mode
429
+ #define BCM2835_PWM0_USEFIFO 0x0020 /// Data from FIFO
430
+ #define BCM2835_PWM0_REVPOLAR 0x0010 /// Reverse polarity
431
+ #define BCM2835_PWM0_OFFSTATE 0x0008 /// Ouput Off state
432
+ #define BCM2835_PWM0_REPEATFF 0x0004 /// Repeat last value if FIFO empty
433
+ #define BCM2835_PWM0_SERIAL 0x0002 /// Run in serial mode
434
+ #define BCM2835_PWM0_ENABLE 0x0001 /// Channel Enable
435
+
436
+ // Historical name compatibility
437
+ #ifndef BCM2835_NO_DELAY_COMPATIBILITY
438
+ #define delay(x) bcm2835_delay(x)
439
+ #define delayMicroseconds(x) bcm2835_delayMicroseconds(x)
440
+ #endif
441
+
442
+ #ifdef __cplusplus
443
+ extern "C" {
444
+ #endif
445
+
446
+ /// \defgroup init Library initialisation and management
447
+ /// These functions allow you to intialise and control the bcm2835 library
448
+ /// @{
449
+
450
+ /// Initialise the library by opening /dev/mem and getting pointers to the
451
+ /// internal memory for BCM 2835 device registers. You must call this (successfully)
452
+ /// before calling any other
453
+ /// functions in this library (except bcm2835_set_debug).
454
+ /// If bcm2835_init() fails by returning 0,
455
+ /// calling any other function may result in crashes or other failures.
456
+ /// Prints messages to stderr in case of errors.
457
+ /// \return 1 if successful else 0
458
+ extern int bcm2835_init(void);
459
+
460
+ /// Close the library, deallocating any allocated memory and closing /dev/mem
461
+ /// \return 1 if successful else 0
462
+ extern int bcm2835_close(void);
463
+
464
+ /// Sets the debug level of the library.
465
+ /// A value of 1 prevents mapping to /dev/mem, and makes the library print out
466
+ /// what it would do, rather than accessing the GPIO registers.
467
+ /// A value of 0, the default, causes normal operation.
468
+ /// Call this before calling bcm2835_init();
469
+ /// \param[in] debug The new debug level. 1 means debug
470
+ extern void bcm2835_set_debug(uint8_t debug);
471
+
472
+ /// @} // end of init
473
+
474
+ /// \defgroup lowlevel Low level register access
475
+ /// These functions provide low level register access, and should not generally
476
+ /// need to be used
477
+ ///
478
+ /// @{
479
+
480
+ /// Reads 32 bit value from a peripheral address
481
+ /// The read is done twice, and is therefore always safe in terms of
482
+ /// manual section 1.3 Peripheral access precautions for correct memory ordering
483
+ /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc.
484
+ /// \return the value read from the 32 bit register
485
+ /// \sa Physical Addresses
486
+ extern uint32_t bcm2835_peri_read(volatile uint32_t* paddr);
487
+
488
+
489
+ /// Reads 32 bit value from a peripheral address without the read barrier
490
+ /// You should only use this when your code has previously called bcm2835_peri_read()
491
+ /// within the same peripheral, and no other peripheral access has occurred since.
492
+ /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc.
493
+ /// \return the value read from the 32 bit register
494
+ /// \sa Physical Addresses
495
+ extern uint32_t bcm2835_peri_read_nb(volatile uint32_t* paddr);
496
+
497
+
498
+ /// Writes 32 bit value from a peripheral address
499
+ /// The write is done twice, and is therefore always safe in terms of
500
+ /// manual section 1.3 Peripheral access precautions for correct memory ordering
501
+ /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc.
502
+ /// \param[in] value The 32 bit value to write
503
+ /// \sa Physical Addresses
504
+ extern void bcm2835_peri_write(volatile uint32_t* paddr, uint32_t value);
505
+
506
+ /// Writes 32 bit value from a peripheral address without the write barrier
507
+ /// You should only use this when your code has previously called bcm2835_peri_write()
508
+ /// within the same peripheral, and no other peripheral access has occurred since.
509
+ /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc.
510
+ /// \param[in] value The 32 bit value to write
511
+ /// \sa Physical Addresses
512
+ extern void bcm2835_peri_write_nb(volatile uint32_t* paddr, uint32_t value);
513
+
514
+ /// Alters a number of bits in a 32 peripheral regsiter.
515
+ /// It reads the current valu and then alters the bits deines as 1 in mask,
516
+ /// according to the bit value in value.
517
+ /// All other bits that are 0 in the mask are unaffected.
518
+ /// Use this to alter a subset of the bits in a register.
519
+ /// The write is done twice, and is therefore always safe in terms of
520
+ /// manual section 1.3 Peripheral access precautions for correct memory ordering
521
+ /// \param[in] paddr Physical address to read from. See BCM2835_GPIO_BASE etc.
522
+ /// \param[in] value The 32 bit value to write, masked in by mask.
523
+ /// \param[in] mask Bitmask that defines the bits that will be altered in the register.
524
+ /// \sa Physical Addresses
525
+ extern void bcm2835_peri_set_bits(volatile uint32_t* paddr, uint32_t value, uint32_t mask);
526
+ /// @} // end of lowlevel
527
+
528
+ /// \defgroup gpio GPIO register access
529
+ /// These functions allow you to control the GPIO interface. You can set the
530
+ /// function of each GPIO pin, read the input state and set the output state.
531
+ /// @{
532
+
533
+ /// Sets the Function Select register for the given pin, which configures
534
+ /// the pin as Input, Output or one of the 6 alternate functions.
535
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from RPiGPIOPin.
536
+ /// \param[in] mode Mode to set the pin to, one of BCM2835_GPIO_FSEL_* from \ref bcm2835FunctionSelect
537
+ extern void bcm2835_gpio_fsel(uint8_t pin, uint8_t mode);
538
+
539
+ /// Sets the specified pin output to
540
+ /// HIGH.
541
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
542
+ /// \sa bcm2835_gpio_write()
543
+ extern void bcm2835_gpio_set(uint8_t pin);
544
+
545
+ /// Sets the specified pin output to
546
+ /// LOW.
547
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
548
+ /// \sa bcm2835_gpio_write()
549
+ extern void bcm2835_gpio_clr(uint8_t pin);
550
+
551
+ /// Reads the current level on the specified
552
+ /// pin and returns either HIGH or LOW. Works whether or not the pin
553
+ /// is an input or an output.
554
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
555
+ /// \return the current level either HIGH or LOW
556
+ extern uint8_t bcm2835_gpio_lev(uint8_t pin);
557
+
558
+ /// Event Detect Status.
559
+ /// Tests whether the specified pin has detected a level or edge
560
+ /// as requested by bcm2835_gpio_ren(), bcm2835_gpio_fen(), bcm2835_gpio_hen(),
561
+ /// bcm2835_gpio_len(), bcm2835_gpio_aren(), bcm2835_gpio_afen().
562
+ /// Clear the flag for a given pin by calling bcm2835_gpio_set_eds(pin);
563
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
564
+ /// \return HIGH if the event detect status for th given pin is true.
565
+ extern uint8_t bcm2835_gpio_eds(uint8_t pin);
566
+
567
+ /// Sets the Event Detect Status register for a given pin to 1,
568
+ /// which has the effect of clearing the flag. Use this afer seeing
569
+ /// an Event Detect Status on the pin.
570
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
571
+ extern void bcm2835_gpio_set_eds(uint8_t pin);
572
+
573
+ /// Enable Rising Edge Detect Enable for the specified pin.
574
+ /// When a rising edge is detected, sets the appropriate pin in Event Detect Status.
575
+ /// The GPRENn registers use
576
+ /// synchronous edge detection. This means the input signal is sampled using the
577
+ /// system clock and then it is looking for a ?011? pattern on the sampled signal. This
578
+ /// has the effect of suppressing glitches.
579
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
580
+ extern void bcm2835_gpio_ren(uint8_t pin);
581
+
582
+ /// Disable Rising Edge Detect Enable for the specified pin.
583
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
584
+ extern void bcm2835_gpio_clr_ren(uint8_t pin);
585
+
586
+ /// Enable Falling Edge Detect Enable for the specified pin.
587
+ /// When a falling edge is detected, sets the appropriate pin in Event Detect Status.
588
+ /// The GPRENn registers use
589
+ /// synchronous edge detection. This means the input signal is sampled using the
590
+ /// system clock and then it is looking for a ?100? pattern on the sampled signal. This
591
+ /// has the effect of suppressing glitches.
592
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
593
+ extern void bcm2835_gpio_fen(uint8_t pin);
594
+
595
+ /// Disable Falling Edge Detect Enable for the specified pin.
596
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
597
+ extern void bcm2835_gpio_clr_fen(uint8_t pin);
598
+
599
+ /// Enable High Detect Enable for the specified pin.
600
+ /// When a HIGH level is detected on the pin, sets the appropriate pin in Event Detect Status.
601
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
602
+ extern void bcm2835_gpio_hen(uint8_t pin);
603
+
604
+ /// Disable High Detect Enable for the specified pin.
605
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
606
+ extern void bcm2835_gpio_clr_hen(uint8_t pin);
607
+
608
+ /// Enable Low Detect Enable for the specified pin.
609
+ /// When a LOW level is detected on the pin, sets the appropriate pin in Event Detect Status.
610
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
611
+ extern void bcm2835_gpio_len(uint8_t pin);
612
+
613
+ /// Disable Low Detect Enable for the specified pin.
614
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
615
+ extern void bcm2835_gpio_clr_len(uint8_t pin);
616
+
617
+ /// Enable Asynchronous Rising Edge Detect Enable for the specified pin.
618
+ /// When a rising edge is detected, sets the appropriate pin in Event Detect Status.
619
+ /// Asynchronous means the incoming signal is not sampled by the system clock. As such
620
+ /// rising edges of very short duration can be detected.
621
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
622
+ extern void bcm2835_gpio_aren(uint8_t pin);
623
+
624
+ /// Disable Asynchronous Rising Edge Detect Enable for the specified pin.
625
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
626
+ extern void bcm2835_gpio_clr_aren(uint8_t pin);
627
+
628
+ /// Enable Asynchronous Falling Edge Detect Enable for the specified pin.
629
+ /// When a falling edge is detected, sets the appropriate pin in Event Detect Status.
630
+ /// Asynchronous means the incoming signal is not sampled by the system clock. As such
631
+ /// falling edges of very short duration can be detected.
632
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
633
+ extern void bcm2835_gpio_afen(uint8_t pin);
634
+
635
+ /// Disable Asynchronous Falling Edge Detect Enable for the specified pin.
636
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
637
+ extern void bcm2835_gpio_clr_afen(uint8_t pin);
638
+
639
+ /// Sets the Pull-up/down register for the given pin. This is
640
+ /// used with bcm2835_gpio_pudclk() to set the Pull-up/down resistor for the given pin.
641
+ /// However, it is usually more convenient to use bcm2835_gpio_set_pud().
642
+ /// \param[in] pud The desired Pull-up/down mode. One of BCM2835_GPIO_PUD_* from bcm2835PUDControl
643
+ /// \sa bcm2835_gpio_set_pud()
644
+ extern void bcm2835_gpio_pud(uint8_t pud);
645
+
646
+ /// Clocks the Pull-up/down value set earlier by bcm2835_gpio_pud() into the pin.
647
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
648
+ /// \param[in] on HIGH to clock the value from bcm2835_gpio_pud() into the pin.
649
+ /// LOW to remove the clock.
650
+ /// \sa bcm2835_gpio_set_pud()
651
+ extern void bcm2835_gpio_pudclk(uint8_t pin, uint8_t on);
652
+
653
+ /// Reads and returns the Pad Control for the given GPIO group.
654
+ /// \param[in] group The GPIO pad group number, one of BCM2835_PAD_GROUP_GPIO_*
655
+ /// \return Mask of bits from BCM2835_PAD_* from \ref bcm2835PadGroup
656
+ extern uint32_t bcm2835_gpio_pad(uint8_t group);
657
+
658
+ /// Sets the Pad Control for the given GPIO group.
659
+ /// \param[in] group The GPIO pad group number, one of BCM2835_PAD_GROUP_GPIO_*
660
+ /// \param[in] control Mask of bits from BCM2835_PAD_* from \ref bcm2835PadGroup
661
+ extern void bcm2835_gpio_set_pad(uint8_t group, uint32_t control);
662
+
663
+ /// Delays for the specified number of milliseconds.
664
+ /// Uses nanosleep(), and therefore does not use CPU until the time is up.
665
+ /// \param[in] millis Delay in milliseconds
666
+ extern void bcm2835_delay (unsigned int millis);
667
+
668
+ /// Delays for the specified number of microseconds.
669
+ /// Uses nanosleep(), and therefore does not use CPU until the time is up.
670
+ /// However, you are at the mercy of nanosleep(). From the manual for nanosleep:
671
+ /// If the interval specified in req is not an exact multiple of the granularity
672
+ /// underlying clock (see time(7)), then the interval will be
673
+ /// rounded up to the next multiple. Furthermore, after the sleep com-
674
+ /// pletes, there may still be a delay before the CPU becomes free to once
675
+ /// again execute the calling thread.
676
+ /// For times less than about 450 microseconds, uses a busy wait on a high resolution timer.
677
+ /// It is reported that a delay of 0 microseconds on RaspberryPi will in fact
678
+ /// result in a dleay of about 80 microseconds. Your mileage may vary.
679
+ /// \param[in] micros Delay in microseconds
680
+ extern void bcm2835_delayMicroseconds (unsigned int micros);
681
+
682
+ /// Sets the output state of the specified pin
683
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
684
+ /// \param[in] on HIGH sets the output to HIGH and LOW to LOW.
685
+ extern void bcm2835_gpio_write(uint8_t pin, uint8_t on);
686
+
687
+ /// Sets the Pull-up/down mode for the specified pin. This is more convenient than
688
+ /// clocking the mode in with bcm2835_gpio_pud() and bcm2835_gpio_pudclk().
689
+ /// \param[in] pin GPIO number, or one of RPI_GPIO_P1_* from \ref RPiGPIOPin.
690
+ /// \param[in] pud The desired Pull-up/down mode. One of BCM2835_GPIO_PUD_* from bcm2835PUDControl
691
+ extern void bcm2835_gpio_set_pud(uint8_t pin, uint8_t pud);
692
+
693
+ /// @}
694
+
695
+ /// \defgroup spi SPI access
696
+ /// These functions let you use SPI0 (Serial Peripheral Interface) to
697
+ /// interface with an external SPI device.
698
+ /// @{
699
+
700
+ /// Start SPI operations.
701
+ /// Forces RPi SPI0 pins P1-19 (MOSI), P1-21 (MISO), P1-23 (CLK), P1-24 (CE0) and P1-26 (CE1)
702
+ /// to alternate function ALT0, which enables those pins for SPI interface.
703
+ /// You should call bcm2835_spi_end() when all SPI funcitons are complete to return the pins to
704
+ /// their default functions
705
+ /// \sa bcm2835_spi_end()
706
+ extern void bcm2835_spi_begin(void);
707
+
708
+ /// End SPI operations.
709
+ /// SPI0 pins P1-19 (MOSI), P1-21 (MISO), P1-23 (CLK), P1-24 (CE0) and P1-26 (CE1)
710
+ /// are returned to their default INPUT behaviour.
711
+ extern void bcm2835_spi_end(void);
712
+
713
+ /// Sets the SPI bit order
714
+ /// NOTE: has no effect. Not supported by SPI0.
715
+ /// Defaults to
716
+ /// \param[in] order The desired bit order, one of BCM2835_SPI_BIT_ORDER_*,
717
+ /// see \ref bcm2835SPIBitOrder
718
+ extern void bcm2835_spi_setBitOrder(uint8_t order);
719
+
720
+ /// Sets the SPI clock divider and therefore the
721
+ /// SPI clock speed.
722
+ /// \param[in] divider The desired SPI clock divider, one of BCM2835_SPI_CLOCK_DIVIDER_*,
723
+ /// see \ref bcm2835SPIClockDivider
724
+ extern void bcm2835_spi_setClockDivider(uint16_t divider);
725
+
726
+ /// Sets the SPI data mode
727
+ /// Sets the clock polariy and phase
728
+ /// \param[in] mode The desired data mode, one of BCM2835_SPI_MODE*,
729
+ /// see \ref bcm2835SPIMode
730
+ extern void bcm2835_spi_setDataMode(uint8_t mode);
731
+
732
+ /// Sets the chip select pin(s)
733
+ /// When an bcm2835_spi_transfer() is made, the selected pin(s) will be asserted during the
734
+ /// transfer.
735
+ /// \param[in] cs Specifies the CS pins(s) that are used to activate the desired slave.
736
+ /// One of BCM2835_SPI_CS*, see \ref bcm2835SPIChipSelect
737
+ extern void bcm2835_spi_chipSelect(uint8_t cs);
738
+
739
+ /// Sets the chip select pin polarity for a given pin
740
+ /// When an bcm2835_spi_transfer() occurs, the currently selected chip select pin(s)
741
+ /// will be asserted to the
742
+ /// value given by active. When transfers are not happening, the chip select pin(s)
743
+ /// return to the complement (inactive) value.
744
+ /// \param[in] cs The chip select pin to affect
745
+ /// \param[in] active Whether the chip select pin is to be active HIGH
746
+ extern void bcm2835_spi_setChipSelectPolarity(uint8_t cs, uint8_t active);
747
+
748
+ /// Transfers one byte to and from the currently selected SPI slave.
749
+ /// Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect)
750
+ /// during the transfer.
751
+ /// Clocks the 8 bit value out on MOSI, and simultaneously clocks in data from MISO.
752
+ /// Returns the read data byte from the slave.
753
+ /// Uses polled transfer as per section 10.6.1 of teh BCM 2835 ARM Peripherls manual
754
+ /// \param[in] value The 8 bit data byte to write to MOSI
755
+ /// \return The 8 bit byte simultaneously read from MISO
756
+ /// \sa bcm2835_spi_transfern()
757
+ extern uint8_t bcm2835_spi_transfer(uint8_t value);
758
+
759
+ /// Transfers any number of bytes to and from the currently selected SPI slave.
760
+ /// Asserts the currently selected CS pins (as previously set by bcm2835_spi_chipSelect)
761
+ /// during the transfer.
762
+ /// Clocks the len 8 bit bytes out on MOSI, and simultaneously clocks in data from MISO.
763
+ /// The data read read from the slave is placed into rbuf. rbuf must be at least len bytes long
764
+ /// Uses polled transfer as per section 10.6.1 of the BCM 2835 ARM Peripherls manual
765
+ /// \param[in] tbuf Buffer of bytes to send.
766
+ /// \param[out] rbuf Received bytes will by put in this buffer
767
+ /// \param[in] len Number of bytes in the tbuf buffer, and the number of bytes to send/received
768
+ /// \sa bcm2835_spi_transfer()
769
+ extern void bcm2835_spi_transfernb(char* tbuf, char* rbuf, uint32_t len);
770
+
771
+ /// Transfers any number of bytes to and from the currently selected SPI slave
772
+ /// using bcm2835_spi_transfernb.
773
+ /// The returned data from the slave replaces the transmitted data in the buffer.
774
+ /// \param[in,out] buf Buffer of bytes to send. Received bytes will replace the contents
775
+ /// \param[in] len Number of bytes int eh buffer, and the number of bytes to send/received
776
+ /// \sa bcm2835_spi_transfer()
777
+ extern void bcm2835_spi_transfern(char* buf, uint32_t len);
778
+
779
+
780
+ /// @}
781
+
782
+ #ifdef __cplusplus
783
+ }
784
+ #endif
785
+
786
+ #endif // BCM2835_H
787
+
788
+ /// @example blink.c
789
+ /// Blinks RPi GPIO pin 11 on and off
790
+
791
+ /// @example input.c
792
+ /// Reads the state of an RPi input pin
793
+
794
+ /// @example event.c
795
+ /// Shows how to use event detection on an input pin
796
+
797
+ /// @example spi.c
798
+ /// Shows how to use SPI interface to transfer a byte to and from an SPI device
799
+
800
+ /// @example spin.c
801
+ /// Shows how to use SPI interface to transfer a number of bytes to and from an SPI device