rallhook 0.7.5 → 0.8.0
Sign up to get free protection for your applications and to get access to all the features.
- data/AUTHORS +2 -0
- data/CHANGELOG +2 -0
- data/README +0 -2
- data/Rakefile +1 -1
- data/TODO +0 -1
- data/ext/rallhook_base/deps/distorm/config.h +170 -0
- data/ext/rallhook_base/deps/distorm/distorm.h +401 -0
- data/ext/rallhook_base/deps/distorm/mnemonics.c +258 -0
- data/ext/rallhook_base/deps/distorm/mnemonics.h +200 -0
- data/ext/rallhook_base/deps/distorm/src/decoder.c +548 -0
- data/ext/rallhook_base/deps/distorm/src/decoder.h +18 -0
- data/ext/rallhook_base/deps/distorm/src/distorm.c +375 -0
- data/ext/rallhook_base/deps/distorm/src/instructions.c +490 -0
- data/ext/rallhook_base/deps/distorm/src/instructions.h +445 -0
- data/ext/rallhook_base/deps/distorm/src/insts.c +4851 -0
- data/ext/rallhook_base/deps/distorm/src/insts.h +36 -0
- data/ext/rallhook_base/deps/distorm/src/operands.c +1270 -0
- data/ext/rallhook_base/deps/distorm/src/operands.h +38 -0
- data/ext/rallhook_base/deps/distorm/src/prefix.c +380 -0
- data/ext/rallhook_base/deps/distorm/src/prefix.h +76 -0
- data/ext/rallhook_base/deps/distorm/src/pydistorm.h +62 -0
- data/ext/rallhook_base/deps/distorm/src/textdefs.c +180 -0
- data/ext/rallhook_base/deps/distorm/src/textdefs.h +68 -0
- data/ext/rallhook_base/deps/distorm/src/wstring.c +55 -0
- data/ext/rallhook_base/deps/distorm/src/wstring.h +43 -0
- data/ext/rallhook_base/deps/distorm/src/x86defs.c +41 -0
- data/ext/rallhook_base/deps/distorm/src/x86defs.h +105 -0
- data/ext/rallhook_base/extconf.rb +15 -20
- data/ext/rallhook_base/rallhook.c +20 -8
- metadata +27 -5
@@ -0,0 +1,258 @@
|
|
1
|
+
/*
|
2
|
+
mnemonics.c
|
3
|
+
|
4
|
+
diStorm3 - Powerful disassembler for X86/AMD64
|
5
|
+
http://ragestorm.net/distorm/
|
6
|
+
distorm at gmail dot com
|
7
|
+
Copyright (C) 2010 Gil Dabah
|
8
|
+
|
9
|
+
This program is free software: you can redistribute it and/or modify
|
10
|
+
it under the terms of the GNU General Public License as published by
|
11
|
+
the Free Software Foundation, either version 3 of the License, or
|
12
|
+
(at your option) any later version.
|
13
|
+
|
14
|
+
This program is distributed in the hope that it will be useful,
|
15
|
+
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
16
|
+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
17
|
+
GNU General Public License for more details.
|
18
|
+
|
19
|
+
You should have received a copy of the GNU General Public License
|
20
|
+
along with this program. If not, see <http://www.gnu.org/licenses/>
|
21
|
+
*/
|
22
|
+
|
23
|
+
|
24
|
+
#include "mnemonics.h"
|
25
|
+
|
26
|
+
const _WMnemonic _MNEMONICS[] = {
|
27
|
+
{0x9, "UNDEFINED"},
|
28
|
+
{0x3, "ADD"}, {0x4, "PUSH"}, {0x3, "POP"}, {0x2, "OR"}, {0x3, "ADC"}, {0x3, "SBB"},
|
29
|
+
{0x3, "AND"}, {0x3, "DAA"}, {0x3, "SUB"}, {0x3, "DAS"}, {0x3, "XOR"}, {0x3, "AAA"},
|
30
|
+
{0x3, "CMP"}, {0x3, "AAS"}, {0x3, "INC"}, {0x3, "DEC"}, {0x5, "PUSHA"}, {0x4, "POPA"},
|
31
|
+
{0x5, "BOUND"}, {0x4, "ARPL"}, {0x4, "IMUL"}, {0x3, "INS"}, {0x4, "OUTS"},
|
32
|
+
{0x2, "JO"}, {0x3, "JNO"}, {0x2, "JB"}, {0x3, "JAE"}, {0x2, "JZ"}, {0x3, "JNZ"},
|
33
|
+
{0x3, "JBE"}, {0x2, "JA"}, {0x2, "JS"}, {0x3, "JNS"}, {0x2, "JP"}, {0x3, "JNP"},
|
34
|
+
{0x2, "JL"}, {0x3, "JGE"}, {0x3, "JLE"}, {0x2, "JG"}, {0x4, "TEST"}, {0x4, "XCHG"},
|
35
|
+
{0x3, "MOV"}, {0x3, "LEA"}, {0x3, "CBW"}, {0x4, "CWDE"}, {0x4, "CDQE"}, {0x3, "CWD"},
|
36
|
+
{0x3, "CDQ"}, {0x3, "CQO"}, {0x8, "CALL FAR"}, {0x5, "PUSHF"}, {0x4, "POPF"},
|
37
|
+
{0x4, "SAHF"}, {0x4, "LAHF"}, {0x4, "MOVS"}, {0x4, "CMPS"}, {0x4, "STOS"},
|
38
|
+
{0x4, "LODS"}, {0x4, "SCAS"}, {0x3, "RET"}, {0x3, "LES"}, {0x3, "LDS"}, {0x5, "ENTER"},
|
39
|
+
{0x5, "LEAVE"}, {0x4, "RETF"}, {0x5, "INT 3"}, {0x3, "INT"}, {0x4, "INTO"},
|
40
|
+
{0x4, "IRET"}, {0x3, "AAM"}, {0x3, "AAD"}, {0x4, "SALC"}, {0x4, "XLAT"}, {0x6, "LOOPNZ"},
|
41
|
+
{0x5, "LOOPZ"}, {0x4, "LOOP"}, {0x4, "JCXZ"}, {0x5, "JECXZ"}, {0x5, "JRCXZ"},
|
42
|
+
{0x2, "IN"}, {0x3, "OUT"}, {0x4, "CALL"}, {0x3, "JMP"}, {0x7, "JMP FAR"}, {0x4, "INT1"},
|
43
|
+
{0x3, "HLT"}, {0x3, "CMC"}, {0x3, "CLC"}, {0x3, "STC"}, {0x3, "CLI"}, {0x3, "STI"},
|
44
|
+
{0x3, "CLD"}, {0x3, "STD"}, {0x3, "LAR"}, {0x3, "LSL"}, {0x7, "SYSCALL"}, {0x4, "CLTS"},
|
45
|
+
{0x6, "SYSRET"}, {0x4, "INVD"}, {0x6, "WBINVD"}, {0x3, "UD2"}, {0x5, "FEMMS"},
|
46
|
+
{0x3, "NOP"}, {0x5, "WRMSR"}, {0x5, "RDTSC"}, {0x5, "RDMSR"}, {0x5, "RDPMC"},
|
47
|
+
{0x8, "SYSENTER"}, {0x7, "SYSEXIT"}, {0x6, "GETSEC"}, {0x5, "CMOVO"}, {0x6, "CMOVNO"},
|
48
|
+
{0x5, "CMOVB"}, {0x6, "CMOVAE"}, {0x5, "CMOVZ"}, {0x6, "CMOVNZ"}, {0x6, "CMOVBE"},
|
49
|
+
{0x5, "CMOVA"}, {0x5, "CMOVS"}, {0x6, "CMOVNS"}, {0x5, "CMOVP"}, {0x6, "CMOVNP"},
|
50
|
+
{0x5, "CMOVL"}, {0x6, "CMOVGE"}, {0x6, "CMOVLE"}, {0x5, "CMOVG"}, {0x4, "SETO"},
|
51
|
+
{0x5, "SETNO"}, {0x4, "SETB"}, {0x5, "SETAE"}, {0x4, "SETZ"}, {0x5, "SETNZ"},
|
52
|
+
{0x5, "SETBE"}, {0x4, "SETA"}, {0x4, "SETS"}, {0x5, "SETNS"}, {0x4, "SETP"},
|
53
|
+
{0x5, "SETNP"}, {0x4, "SETL"}, {0x5, "SETGE"}, {0x5, "SETLE"}, {0x4, "SETG"},
|
54
|
+
{0x5, "CPUID"}, {0x2, "BT"}, {0x4, "SHLD"}, {0x3, "RSM"}, {0x3, "BTS"}, {0x4, "SHRD"},
|
55
|
+
{0x7, "CMPXCHG"}, {0x3, "LSS"}, {0x3, "BTR"}, {0x3, "LFS"}, {0x3, "LGS"}, {0x5, "MOVZX"},
|
56
|
+
{0x3, "BTC"}, {0x3, "BSF"}, {0x5, "MOVSX"}, {0x4, "XADD"}, {0x6, "MOVNTI"},
|
57
|
+
{0x5, "BSWAP"}, {0x4, "SLDT"}, {0x3, "STR"}, {0x4, "LLDT"}, {0x3, "LTR"}, {0x4, "VERR"},
|
58
|
+
{0x4, "VERW"}, {0x4, "SGDT"}, {0x4, "SIDT"}, {0x4, "LGDT"}, {0x4, "LIDT"},
|
59
|
+
{0x4, "SMSW"}, {0x4, "LMSW"}, {0x6, "INVLPG"}, {0x6, "VMCALL"}, {0x8, "VMLAUNCH"},
|
60
|
+
{0x8, "VMRESUME"}, {0x6, "VMXOFF"}, {0x7, "MONITOR"}, {0x5, "MWAIT"}, {0x6, "XGETBV"},
|
61
|
+
{0x6, "XSETBV"}, {0x5, "VMRUN"}, {0x7, "VMMCALL"}, {0x6, "VMLOAD"}, {0x6, "VMSAVE"},
|
62
|
+
{0x4, "STGI"}, {0x4, "CLGI"}, {0x6, "SKINIT"}, {0x7, "INVLPGA"}, {0x6, "SWAPGS"},
|
63
|
+
{0x6, "RDTSCP"}, {0x8, "PREFETCH"}, {0x9, "PREFETCHW"}, {0x5, "PI2FW"}, {0x5, "PI2FD"},
|
64
|
+
{0x5, "PF2IW"}, {0x5, "PF2ID"}, {0x6, "PFNACC"}, {0x7, "PFPNACC"}, {0x7, "PFCMPGE"},
|
65
|
+
{0x5, "PFMIN"}, {0x5, "PFRCP"}, {0x7, "PFRSQRT"}, {0x5, "PFSUB"}, {0x5, "PFADD"},
|
66
|
+
{0x7, "PFCMPGT"}, {0x5, "PFMAX"}, {0x8, "PFRCPIT1"}, {0x8, "PFRSQIT1"}, {0x6, "PFSUBR"},
|
67
|
+
{0x5, "PFACC"}, {0x7, "PFCMPEQ"}, {0x5, "PFMUL"}, {0x8, "PFRCPIT2"}, {0x7, "PMULHRW"},
|
68
|
+
{0x6, "PSWAPD"}, {0x7, "PAVGUSB"}, {0x6, "MOVUPS"}, {0x6, "MOVUPD"}, {0x5, "MOVSS"},
|
69
|
+
{0x5, "MOVSD"}, {0x6, "VMOVSS"}, {0x6, "VMOVSD"}, {0x7, "VMOVUPS"}, {0x7, "VMOVUPD"},
|
70
|
+
{0x7, "MOVHLPS"}, {0x6, "MOVLPS"}, {0x6, "MOVLPD"}, {0x8, "MOVSLDUP"}, {0x7, "MOVDDUP"},
|
71
|
+
{0x8, "VMOVHLPS"}, {0x7, "VMOVLPS"}, {0x7, "VMOVLPD"}, {0x9, "VMOVSLDUP"},
|
72
|
+
{0x8, "VMOVDDUP"}, {0x8, "UNPCKLPS"}, {0x8, "UNPCKLPD"}, {0x9, "VUNPCKLPS"},
|
73
|
+
{0x9, "VUNPCKLPD"}, {0x8, "UNPCKHPS"}, {0x8, "UNPCKHPD"}, {0x9, "VUNPCKHPS"},
|
74
|
+
{0x9, "VUNPCKHPD"}, {0x7, "MOVLHPS"}, {0x6, "MOVHPS"}, {0x6, "MOVHPD"}, {0x8, "MOVSHDUP"},
|
75
|
+
{0x8, "VMOVLHPS"}, {0x7, "VMOVHPS"}, {0x7, "VMOVHPD"}, {0x9, "VMOVSHDUP"},
|
76
|
+
{0xb, "PREFETCHNTA"}, {0xa, "PREFETCHT0"}, {0xa, "PREFETCHT1"}, {0xa, "PREFETCHT2"},
|
77
|
+
{0x6, "MOVAPS"}, {0x6, "MOVAPD"}, {0x7, "VMOVAPS"}, {0x7, "VMOVAPD"}, {0x8, "CVTPI2PS"},
|
78
|
+
{0x8, "CVTPI2PD"}, {0x8, "CVTSI2SS"}, {0x8, "CVTSI2SD"}, {0x9, "VCVTSI2SS"},
|
79
|
+
{0x9, "VCVTSI2SD"}, {0x7, "MOVNTPS"}, {0x7, "MOVNTPD"}, {0x7, "MOVNTSS"},
|
80
|
+
{0x7, "MOVNTSD"}, {0x8, "VMOVNTPS"}, {0x8, "VMOVNTPD"}, {0x9, "CVTTPS2PI"},
|
81
|
+
{0x9, "CVTTPD2PI"}, {0x9, "CVTTSS2SI"}, {0x9, "CVTTSD2SI"}, {0xa, "VCVTTSS2SI"},
|
82
|
+
{0xa, "VCVTTSD2SI"}, {0x8, "CVTPS2PI"}, {0x8, "CVTPD2PI"}, {0x8, "CVTSS2SI"},
|
83
|
+
{0x8, "CVTSD2SI"}, {0x9, "VCVTSS2SI"}, {0x9, "VCVTSD2SI"}, {0x7, "UCOMISS"},
|
84
|
+
{0x7, "UCOMISD"}, {0x8, "VUCOMISS"}, {0x8, "VUCOMISD"}, {0x6, "COMISS"}, {0x6, "COMISD"},
|
85
|
+
{0x7, "VCOMISS"}, {0x7, "VCOMISD"}, {0x6, "PSHUFB"}, {0x7, "VPSHUFB"}, {0x6, "PHADDW"},
|
86
|
+
{0x7, "VPHADDW"}, {0x6, "PHADDD"}, {0x7, "VPHADDD"}, {0x7, "PHADDSW"}, {0x8, "VPHADDSW"},
|
87
|
+
{0x9, "PMADDUBSW"}, {0xa, "VPMADDUBSW"}, {0x6, "PHSUBW"}, {0x7, "VPHSUBW"},
|
88
|
+
{0x6, "PHSUBD"}, {0x7, "VPHSUBD"}, {0x7, "PHSUBSW"}, {0x8, "VPHSUBSW"}, {0x6, "PSIGNB"},
|
89
|
+
{0x7, "VPSIGNB"}, {0x6, "PSIGNW"}, {0x7, "VPSIGNW"}, {0x6, "PSIGND"}, {0x7, "VPSIGND"},
|
90
|
+
{0x8, "PMULHRSW"}, {0x9, "VPMULHRSW"}, {0x9, "VPERMILPS"}, {0x9, "VPERMILPD"},
|
91
|
+
{0x8, "VPTESTPS"}, {0x8, "VPTESTPD"}, {0x8, "PBLENDVB"}, {0x8, "BLENDVPS"},
|
92
|
+
{0x8, "BLENDVPD"}, {0x5, "PTEST"}, {0x6, "VPTEST"}, {0xc, "VBROADCASTSS"},
|
93
|
+
{0xc, "VBROADCASTSD"}, {0xe, "VBROADCASTF128"}, {0x5, "PABSB"}, {0x6, "VPABSB"},
|
94
|
+
{0x5, "PABSW"}, {0x6, "VPABSW"}, {0x5, "PABSD"}, {0x6, "VPABSD"}, {0x8, "PMOVSXBW"},
|
95
|
+
{0x9, "VPMOVSXBW"}, {0x8, "PMOVSXBD"}, {0x9, "VPMOVSXBD"}, {0x8, "PMOVSXBQ"},
|
96
|
+
{0x9, "VPMOVSXBQ"}, {0x8, "PMOVSXWD"}, {0x9, "VPMOVSXWD"}, {0x8, "PMOVSXWQ"},
|
97
|
+
{0x9, "VPMOVSXWQ"}, {0x8, "PMOVSXDQ"}, {0x9, "VPMOVSXDQ"}, {0x6, "PMULDQ"},
|
98
|
+
{0x7, "VPMULDQ"}, {0x7, "PCMPEQQ"}, {0x8, "VPCMPEQQ"}, {0x8, "MOVNTDQA"},
|
99
|
+
{0x9, "VMOVNTDQA"}, {0x8, "PACKUSDW"}, {0x9, "VPACKUSDW"}, {0xa, "VMASKMOVPS"},
|
100
|
+
{0xa, "VMASKMOVPD"}, {0x8, "PMOVZXBW"}, {0x9, "VPMOVZXBW"}, {0x8, "PMOVZXBD"},
|
101
|
+
{0x9, "VPMOVZXBD"}, {0x8, "PMOVZXBQ"}, {0x9, "VPMOVZXBQ"}, {0x8, "PMOVZXWD"},
|
102
|
+
{0x9, "VPMOVZXWD"}, {0x8, "PMOVZXWQ"}, {0x9, "VPMOVZXWQ"}, {0x8, "PMOVZXDQ"},
|
103
|
+
{0x9, "VPMOVZXDQ"}, {0x7, "PCMPGTQ"}, {0x8, "VPCMPGTQ"}, {0x6, "PMINSB"},
|
104
|
+
{0x7, "VPMINSB"}, {0x6, "PMINSD"}, {0x7, "VPMINSD"}, {0x6, "PMINUW"}, {0x7, "VPMINUW"},
|
105
|
+
{0x6, "PMINUD"}, {0x7, "VPMINUD"}, {0x6, "PMAXSB"}, {0x7, "VPMAXSB"}, {0x6, "PMAXSD"},
|
106
|
+
{0x7, "VPMAXSD"}, {0x6, "PMAXUW"}, {0x7, "VPMAXUW"}, {0x6, "PMAXUD"}, {0x7, "VPMAXUD"},
|
107
|
+
{0x6, "PMULLD"}, {0x7, "VPMULLD"}, {0xa, "PHMINPOSUW"}, {0xb, "VPHMINPOSUW"},
|
108
|
+
{0x6, "INVEPT"}, {0x7, "INVVPID"}, {0xe, "VFMADDSUB132PS"}, {0xe, "VFMADDSUB132PD"},
|
109
|
+
{0xe, "VFMSUBADD132PS"}, {0xe, "VFMSUBADD132PD"}, {0xb, "VFMADD132PS"}, {0xb, "VFMADD132PD"},
|
110
|
+
{0xb, "VFMADD132SS"}, {0xb, "VFMADD132SD"}, {0xb, "VFMSUB132PS"}, {0xb, "VFMSUB132PD"},
|
111
|
+
{0xb, "VFMSUB132SS"}, {0xb, "VFMSUB132SD"}, {0xc, "VFNMADD132PS"}, {0xc, "VFNMADD132PD"},
|
112
|
+
{0xc, "VFNMADD132SS"}, {0xc, "VFNMADD132SD"}, {0xc, "VFNMSUB132PS"}, {0xc, "VFNMSUB132PD"},
|
113
|
+
{0xc, "VFNMSUB132SS"}, {0xc, "VFNMSUB132SD"}, {0xe, "VFMADDSUB213PS"}, {0xe, "VFMADDSUB213PD"},
|
114
|
+
{0xe, "VFMSUBADD213PS"}, {0xe, "VFMSUBADD213PD"}, {0xb, "VFMADD213PS"}, {0xb, "VFMADD213PD"},
|
115
|
+
{0xb, "VFMADD213SS"}, {0xb, "VFMADD213SD"}, {0xb, "VFMSUB213PS"}, {0xb, "VFMSUB213PD"},
|
116
|
+
{0xb, "VFMSUB213SS"}, {0xb, "VFMSUB213SD"}, {0xc, "VFNMADD213PS"}, {0xc, "VFNMADD213PD"},
|
117
|
+
{0xc, "VFNMADD213SS"}, {0xc, "VFNMADD213SD"}, {0xc, "VFNMSUB213PS"}, {0xc, "VFNMSUB213PD"},
|
118
|
+
{0xc, "VFNMSUB213SS"}, {0xc, "VFNMSUB213SD"}, {0xe, "VFMADDSUB231PS"}, {0xe, "VFMADDSUB231PD"},
|
119
|
+
{0xe, "VFMSUBADD231PS"}, {0xe, "VFMSUBADD231PD"}, {0xb, "VFMADD231PS"}, {0xb, "VFMADD231PD"},
|
120
|
+
{0xb, "VFMADD231SS"}, {0xb, "VFMADD231SD"}, {0xb, "VFMSUB231PS"}, {0xb, "VFMSUB231PD"},
|
121
|
+
{0xb, "VFMSUB231SS"}, {0xb, "VFMSUB231SD"}, {0xc, "VFNMADD231PS"}, {0xc, "VFNMADD231PD"},
|
122
|
+
{0xc, "VFNMADD231SS"}, {0xc, "VFNMADD231SD"}, {0xc, "VFNMSUB231PS"}, {0xc, "VFNMSUB231PD"},
|
123
|
+
{0xc, "VFNMSUB231SS"}, {0xc, "VFNMSUB231SD"}, {0x6, "AESIMC"}, {0x7, "VAESIMC"},
|
124
|
+
{0x6, "AESENC"}, {0x7, "VAESENC"}, {0xa, "AESENCLAST"}, {0xb, "VAESENCLAST"},
|
125
|
+
{0x6, "AESDEC"}, {0x7, "VAESDEC"}, {0xa, "AESDECLAST"}, {0xb, "VAESDECLAST"},
|
126
|
+
{0x5, "MOVBE"}, {0x5, "CRC32"}, {0xa, "VPERM2F128"}, {0x7, "ROUNDPS"}, {0x8, "VROUNDPS"},
|
127
|
+
{0x7, "ROUNDPD"}, {0x8, "VROUNDPD"}, {0x7, "ROUNDSS"}, {0x8, "VROUNDSS"},
|
128
|
+
{0x7, "ROUNDSD"}, {0x8, "VROUNDSD"}, {0x7, "BLENDPS"}, {0x8, "VBLENDPS"},
|
129
|
+
{0x7, "BLENDPD"}, {0x8, "VBLENDPD"}, {0x7, "PBLENDW"}, {0x9, "VPBLENDVW"},
|
130
|
+
{0x7, "PALIGNR"}, {0x8, "VPALIGNR"}, {0x6, "PEXTRB"}, {0x7, "VPEXTRB"}, {0x6, "PEXTRW"},
|
131
|
+
{0x7, "VPEXTRW"}, {0x6, "PEXTRD"}, {0x6, "PEXTRQ"}, {0x7, "VPEXTRD"}, {0x9, "EXTRACTPS"},
|
132
|
+
{0xa, "VEXTRACTPS"}, {0xb, "VINSERTF128"}, {0xc, "VEXTRACTF128"}, {0x6, "PINSRB"},
|
133
|
+
{0x7, "VPINSRB"}, {0x8, "INSERTPS"}, {0x9, "VINSERTPS"}, {0x6, "PINSRD"},
|
134
|
+
{0x6, "PINSRQ"}, {0x7, "VPINSRD"}, {0x7, "VPINSRQ"}, {0x4, "DPPS"}, {0x5, "VDPPS"},
|
135
|
+
{0x4, "DPPD"}, {0x5, "VDPPD"}, {0x7, "MPSADBW"}, {0x8, "VMPSADBW"}, {0x9, "PCLMULQDQ"},
|
136
|
+
{0xa, "VPCLMULQDQ"}, {0x9, "VBLENDVPS"}, {0x9, "VBLENDVPD"}, {0x9, "VPBLENDVB"},
|
137
|
+
{0x9, "PCMPESTRM"}, {0xa, "VPCMPESTRM"}, {0x9, "PCMPESTRI"}, {0x9, "VCMPESTRI"},
|
138
|
+
{0x9, "PCMPISTRM"}, {0xa, "VPCMPISTRM"}, {0x9, "PCMPISTRI"}, {0xa, "VPCMPISTRI"},
|
139
|
+
{0xf, "AESKEYGENASSIST"}, {0x10, "VAESKEYGENASSIST"}, {0x8, "MOVMSKPS"},
|
140
|
+
{0x8, "MOVMSKPD"}, {0x9, "VMOVMSKPS"}, {0x9, "VMOVMSKPD"}, {0x6, "SQRTPS"},
|
141
|
+
{0x6, "SQRTPD"}, {0x6, "SQRTSS"}, {0x6, "SQRTSD"}, {0x7, "VSQRTSS"}, {0x7, "VSQRTSD"},
|
142
|
+
{0x7, "VSQRTPS"}, {0x7, "VSQRTPD"}, {0x7, "RSQRTPS"}, {0x7, "RSQRTSS"}, {0x8, "VRSQRTSS"},
|
143
|
+
{0x8, "VRSQRTPS"}, {0x5, "RCPPS"}, {0x5, "RCPSS"}, {0x6, "VRCPSS"}, {0x6, "VRCPPS"},
|
144
|
+
{0x5, "ANDPS"}, {0x5, "ANDPD"}, {0x6, "VANDPS"}, {0x6, "VANDPD"}, {0x6, "ANDNPS"},
|
145
|
+
{0x6, "ANDNPD"}, {0x7, "VANDNPS"}, {0x7, "VANDNPD"}, {0x4, "ORPS"}, {0x4, "ORPD"},
|
146
|
+
{0x5, "VORPS"}, {0x5, "VORPD"}, {0x5, "XORPS"}, {0x5, "XORPD"}, {0x6, "VXORPS"},
|
147
|
+
{0x6, "VXORPD"}, {0x5, "ADDPS"}, {0x5, "ADDPD"}, {0x5, "ADDSS"}, {0x5, "ADDSD"},
|
148
|
+
{0x6, "VADDPS"}, {0x6, "VADDPD"}, {0x6, "VADDSS"}, {0x6, "VADDSD"}, {0x5, "MULPS"},
|
149
|
+
{0x5, "MULPD"}, {0x5, "MULSS"}, {0x5, "MULSD"}, {0x6, "VMULPS"}, {0x6, "VMULPD"},
|
150
|
+
{0x6, "VMULSS"}, {0x6, "VMULSD"}, {0x8, "CVTPS2PD"}, {0x8, "CVTPD2PS"}, {0x8, "CVTSS2SD"},
|
151
|
+
{0x8, "CVTSD2SS"}, {0x9, "VCVTSS2SD"}, {0x9, "VCVTSD2SS"}, {0x9, "VCVTPS2PD"},
|
152
|
+
{0x9, "VCVTPD2PS"}, {0x8, "CVTDQ2PS"}, {0x8, "CVTPS2DQ"}, {0x9, "CVTTPS2DQ"},
|
153
|
+
{0x9, "VCVTDQ2PS"}, {0x9, "VCVTPS2DQ"}, {0xa, "VCVTTPS2DQ"}, {0x5, "SUBPS"},
|
154
|
+
{0x5, "SUBPD"}, {0x5, "SUBSS"}, {0x5, "SUBSD"}, {0x6, "VSUBPS"}, {0x6, "VSUBPD"},
|
155
|
+
{0x6, "VSUBSS"}, {0x6, "VSUBSD"}, {0x5, "MINPS"}, {0x5, "MINPD"}, {0x5, "MINSS"},
|
156
|
+
{0x5, "MINSD"}, {0x6, "VMINPS"}, {0x6, "VMINPD"}, {0x6, "VMINSS"}, {0x6, "VMINSD"},
|
157
|
+
{0x5, "DIVPS"}, {0x5, "DIVPD"}, {0x5, "DIVSS"}, {0x5, "DIVSD"}, {0x6, "VDIVPS"},
|
158
|
+
{0x6, "VDIVPD"}, {0x6, "VDIVSS"}, {0x6, "VDIVSD"}, {0x5, "MAXPS"}, {0x5, "MAXPD"},
|
159
|
+
{0x5, "MAXSS"}, {0x5, "MAXSD"}, {0x6, "VMAXPS"}, {0x6, "VMAXPD"}, {0x6, "VMAXSS"},
|
160
|
+
{0x6, "VMAXSD"}, {0x9, "PUNPCKLBW"}, {0xa, "VPUNPCKLBW"}, {0x9, "PUNPCKLWD"},
|
161
|
+
{0xa, "VPUNPCKLWD"}, {0x9, "PUNPCKLDQ"}, {0xa, "VPUNPCKLDQ"}, {0x8, "PACKSSWB"},
|
162
|
+
{0x9, "VPACKSSWB"}, {0x7, "PCMPGTB"}, {0x8, "VPCMPGTB"}, {0x7, "PCMPGTW"},
|
163
|
+
{0x8, "VPCMPGTW"}, {0x7, "PCMPGTD"}, {0x8, "VPCMPGTD"}, {0x8, "PACKUSWB"},
|
164
|
+
{0x9, "VPACKUSWB"}, {0x9, "PUNPCKHBW"}, {0xa, "VPUNPCKHBW"}, {0x9, "PUNPCKHWD"},
|
165
|
+
{0xa, "VPUNPCKHWD"}, {0x9, "PUNPCKHDQ"}, {0xa, "VPUNPCKHDQ"}, {0x8, "PACKSSDW"},
|
166
|
+
{0x9, "VPACKSSDW"}, {0xa, "PUNPCKLQDQ"}, {0xb, "VPUNPCKLQDQ"}, {0xa, "PUNPCKHQDQ"},
|
167
|
+
{0xb, "VPUNPCKHQDQ"}, {0x4, "MOVD"}, {0x4, "MOVQ"}, {0x5, "VMOVD"}, {0x5, "VMOVQ"},
|
168
|
+
{0x6, "MOVDQA"}, {0x6, "MOVDQU"}, {0x7, "VMOVDQA"}, {0x7, "VMOVDQU"}, {0x6, "PSHUFW"},
|
169
|
+
{0x6, "PSHUFD"}, {0x7, "PSHUFHW"}, {0x7, "PSHUFLW"}, {0x7, "VPSHUFD"}, {0x8, "VPSHUFHW"},
|
170
|
+
{0x8, "VPSHUFLW"}, {0x5, "PSRLW"}, {0x6, "VPSRLW"}, {0x5, "PSRAW"}, {0x6, "VPSRAW"},
|
171
|
+
{0x5, "PSLLW"}, {0x6, "VPSLLW"}, {0x5, "PSRLD"}, {0x6, "VPSRLD"}, {0x5, "PSRAD"},
|
172
|
+
{0x6, "VPSRAD"}, {0x5, "PSLLD"}, {0x6, "VPSLLD"}, {0x5, "PSRLQ"}, {0x6, "VPSRLQ"},
|
173
|
+
{0x6, "PSRLDQ"}, {0x7, "VPSRLDQ"}, {0x5, "PSLLQ"}, {0x6, "VPSLLQ"}, {0x6, "PSLLDQ"},
|
174
|
+
{0x7, "VPSLLDQ"}, {0x7, "PCMPEQB"}, {0x8, "VPCMPEQB"}, {0x7, "PCMPEQW"}, {0x8, "VPCMPEQW"},
|
175
|
+
{0x7, "PCMPEQD"}, {0x8, "VPCMPEQD"}, {0x4, "EMMS"}, {0xa, "VZEROUPPER"}, {0x8, "VZEROALL"},
|
176
|
+
{0x6, "VMREAD"}, {0x5, "EXTRQ"}, {0x7, "INSERTQ"}, {0x7, "VMWRITE"}, {0x6, "HADDPD"},
|
177
|
+
{0x6, "HADDPS"}, {0x7, "VHADDPD"}, {0x7, "VHADDPS"}, {0x6, "HSUBPD"}, {0x6, "HSUBPS"},
|
178
|
+
{0x7, "VHSUBPD"}, {0x7, "VHSUBPS"}, {0x6, "FXSAVE"}, {0x7, "FXRSTOR"}, {0x4, "XAVE"},
|
179
|
+
{0x6, "LFENCE"}, {0x6, "XRSTOR"}, {0x6, "MFENCE"}, {0x6, "SFENCE"}, {0x7, "CLFLUSH"},
|
180
|
+
{0x7, "LDMXCSR"}, {0x8, "VLDMXCSR"}, {0x7, "STMXCSR"}, {0x8, "VSTMXCSR"},
|
181
|
+
{0x6, "POPCNT"}, {0x3, "BSR"}, {0x5, "LZCNT"}, {0x7, "CMPEQPS"}, {0x7, "CMPLTPS"},
|
182
|
+
{0x7, "CMPLEPS"}, {0xa, "CMPUNORDPS"}, {0x8, "CMPNEQPS"}, {0x8, "CMPNLTPS"},
|
183
|
+
{0x8, "CMPNLEPS"}, {0x8, "CMPORDPS"}, {0x7, "CMPEQPD"}, {0x7, "CMPLTPD"},
|
184
|
+
{0x7, "CMPLEPD"}, {0xa, "CMPUNORDPD"}, {0x8, "CMPNEQPD"}, {0x8, "CMPNLTPD"},
|
185
|
+
{0x8, "CMPNLEPD"}, {0x8, "CMPORDPD"}, {0x7, "CMPEQSS"}, {0x7, "CMPLTSS"},
|
186
|
+
{0x7, "CMPLESS"}, {0xa, "CMPUNORDSS"}, {0x8, "CMPNEQSS"}, {0x8, "CMPNLTSS"},
|
187
|
+
{0x8, "CMPNLESS"}, {0x8, "CMPORDSS"}, {0x7, "CMPEQSD"}, {0x7, "CMPLTSD"},
|
188
|
+
{0x7, "CMPLESD"}, {0xa, "CMPUNORDSD"}, {0x8, "CMPNEQSD"}, {0x8, "CMPNLTSD"},
|
189
|
+
{0x8, "CMPNLESD"}, {0x8, "CMPORDSD"}, {0x8, "VCMPEQPS"}, {0x8, "VCMPLTPS"},
|
190
|
+
{0x8, "VCMPLEPS"}, {0xb, "VCMPUNORDPS"}, {0x9, "VCMPNEQPS"}, {0x9, "VCMPNLTPS"},
|
191
|
+
{0x9, "VCMPNLEPS"}, {0x9, "VCMPORDPS"}, {0x8, "VCMPEQPD"}, {0x8, "VCMPLTPD"},
|
192
|
+
{0x8, "VCMPLEPD"}, {0xb, "VCMPUNORDPD"}, {0x9, "VCMPNEQPD"}, {0x9, "VCMPNLTPD"},
|
193
|
+
{0x9, "VCMPNLEPD"}, {0x9, "VCMPORDPD"}, {0x8, "VCMPEQSS"}, {0x8, "VCMPLTSS"},
|
194
|
+
{0x8, "VCMPLESS"}, {0xb, "VCMPUNORDSS"}, {0x9, "VCMPNEQSS"}, {0x9, "VCMPNLTSS"},
|
195
|
+
{0x9, "VCMPNLESS"}, {0x9, "VCMPORDSS"}, {0x8, "VCMPEQSD"}, {0x8, "VCMPLTSD"},
|
196
|
+
{0x8, "VCMPLESD"}, {0xb, "VCMPUNORDSD"}, {0x9, "VCMPNEQSD"}, {0x9, "VCMPNLTSD"},
|
197
|
+
{0x9, "VCMPNLESD"}, {0x9, "VCMPORDSD"}, {0x6, "PINSRW"}, {0x7, "VPINSRW"},
|
198
|
+
{0x6, "SHUFPS"}, {0x6, "SHUFPD"}, {0x7, "VSHUFPS"}, {0x7, "VSHUFPD"}, {0x9, "CMPXCHG8B"},
|
199
|
+
{0xa, "CMPXCHG16B"}, {0x7, "VMPTRST"}, {0x7, "VMPTRLD"}, {0x7, "VMCLEAR"},
|
200
|
+
{0x5, "VMXON"}, {0x8, "ADDSUBPD"}, {0x8, "ADDSUBPS"}, {0x9, "VADDSUBPD"},
|
201
|
+
{0x9, "VADDSUBPS"}, {0x5, "PADDQ"}, {0x6, "VPADDQ"}, {0x6, "PMULLW"}, {0x7, "VPMULLW"},
|
202
|
+
{0x7, "MOVQ2DQ"}, {0x7, "MOVDQ2Q"}, {0x8, "PMOVMSKB"}, {0x9, "VPMOVMSKB"},
|
203
|
+
{0x7, "PSUBUSB"}, {0x8, "VPSUBUSB"}, {0x7, "PSUBUSW"}, {0x8, "VPSUBUSW"},
|
204
|
+
{0x6, "PMINUB"}, {0x7, "VPMINUB"}, {0x4, "PAND"}, {0x5, "VPAND"}, {0x7, "PADDUSB"},
|
205
|
+
{0x8, "VPADDUSW"}, {0x7, "PADDUSW"}, {0x6, "PMAXUB"}, {0x7, "VPMAXUB"}, {0x5, "PANDN"},
|
206
|
+
{0x6, "VPANDN"}, {0x5, "PAVGB"}, {0x6, "VPAVGB"}, {0x5, "PAVGW"}, {0x6, "VPAVGW"},
|
207
|
+
{0x7, "PMULHUW"}, {0x8, "VPMULHUW"}, {0x6, "PMULHW"}, {0x7, "VPMULHW"}, {0x9, "CVTTPD2DQ"},
|
208
|
+
{0x8, "CVTDQ2PD"}, {0x8, "CVTPD2DQ"}, {0xa, "VCVTTPD2DQ"}, {0x9, "VCVTDQ2PD"},
|
209
|
+
{0x9, "VCVTPD2DQ"}, {0x6, "MOVNTQ"}, {0x7, "MOVNTDQ"}, {0x8, "VMOVNTDQ"},
|
210
|
+
{0x6, "PSUBSB"}, {0x7, "VPSUBSB"}, {0x6, "PSUBSW"}, {0x7, "VPSUBSW"}, {0x6, "PMINSW"},
|
211
|
+
{0x7, "VPMINSW"}, {0x3, "POR"}, {0x4, "VPOR"}, {0x6, "PADDSB"}, {0x7, "VPADDSB"},
|
212
|
+
{0x6, "PADDSW"}, {0x7, "VPADDSW"}, {0x6, "PMAXSW"}, {0x7, "VPMAXSW"}, {0x4, "PXOR"},
|
213
|
+
{0x5, "VPXOR"}, {0x5, "LDDQU"}, {0x6, "VLDDQU"}, {0x7, "PMULUDQ"}, {0x8, "VPMULUDQ"},
|
214
|
+
{0x7, "PMADDWD"}, {0x8, "VPMADDWD"}, {0x6, "PSADBW"}, {0x7, "VPSADBW"}, {0x8, "MASKMOVQ"},
|
215
|
+
{0xa, "MASKMOVDQU"}, {0xb, "VMASKMOVDQU"}, {0x5, "PSUBB"}, {0x6, "VPSUBB"},
|
216
|
+
{0x5, "PSUBW"}, {0x6, "VPSUBW"}, {0x5, "PSUBD"}, {0x6, "VPSUBD"}, {0x5, "PSUBQ"},
|
217
|
+
{0x6, "VPSUBQ"}, {0x5, "PADDB"}, {0x6, "VPADDB"}, {0x5, "PADDW"}, {0x6, "VPADDW"},
|
218
|
+
{0x5, "PADDD"}, {0x6, "VPADDD"}, {0x3, "ROL"}, {0x3, "ROR"}, {0x3, "RCL"},
|
219
|
+
{0x3, "RCR"}, {0x3, "SHL"}, {0x3, "SHR"}, {0x3, "SAL"}, {0x3, "SAR"}, {0x4, "FADD"},
|
220
|
+
{0x4, "FMUL"}, {0x4, "FCOM"}, {0x5, "FCOMP"}, {0x4, "FSUB"}, {0x5, "FSUBR"},
|
221
|
+
{0x4, "FDIV"}, {0x5, "FDIVR"}, {0x3, "FLD"}, {0x3, "FST"}, {0x4, "FSTP"}, {0x6, "FLDENV"},
|
222
|
+
{0x5, "FLDCW"}, {0x4, "FXCH"}, {0x4, "FNOP"}, {0x4, "FCHS"}, {0x4, "FABS"},
|
223
|
+
{0x4, "FTST"}, {0x4, "FXAM"}, {0x4, "FLD1"}, {0x6, "FLDL2T"}, {0x6, "FLDL2E"},
|
224
|
+
{0x5, "FLDPI"}, {0x6, "FLDLG2"}, {0x6, "FLDLN2"}, {0x4, "FLDZ"}, {0x5, "F2XM1"},
|
225
|
+
{0x5, "FYL2X"}, {0x5, "FPTAN"}, {0x6, "FPATAN"}, {0x7, "FXTRACT"}, {0x6, "FPREM1"},
|
226
|
+
{0x7, "FDECSTP"}, {0x7, "FINCSTP"}, {0x5, "FPREM"}, {0x7, "FYL2XP1"}, {0x5, "FSQRT"},
|
227
|
+
{0x7, "FSINCOS"}, {0x7, "FRNDINT"}, {0x6, "FSCALE"}, {0x4, "FSIN"}, {0x4, "FCOS"},
|
228
|
+
{0x7, "FNSTENV"}, {0x6, "FSTENV"}, {0x6, "FNSTCW"}, {0x5, "FSTCW"}, {0x5, "FIADD"},
|
229
|
+
{0x5, "FIMUL"}, {0x5, "FICOM"}, {0x6, "FICOMP"}, {0x5, "FISUB"}, {0x6, "FISUBR"},
|
230
|
+
{0x5, "FIDIV"}, {0x6, "FIDIVR"}, {0x6, "FCMOVB"}, {0x6, "FCMOVE"}, {0x7, "FCMOVBE"},
|
231
|
+
{0x6, "FCMOVU"}, {0x7, "FUCOMPP"}, {0x4, "FILD"}, {0x6, "FISTTP"}, {0x4, "FIST"},
|
232
|
+
{0x5, "FISTP"}, {0x7, "FCMOVNB"}, {0x7, "FCMOVNE"}, {0x8, "FCMOVNBE"}, {0x7, "FCMOVNU"},
|
233
|
+
{0x4, "FENI"}, {0x6, "FEDISI"}, {0x6, "FSETPM"}, {0x6, "FUCOMI"}, {0x5, "FCOMI"},
|
234
|
+
{0x6, "FNCLEX"}, {0x5, "FCLEX"}, {0x6, "FNINIT"}, {0x5, "FINIT"}, {0x6, "FRSTOR"},
|
235
|
+
{0x5, "FFREE"}, {0x5, "FUCOM"}, {0x6, "FUCOMP"}, {0x6, "FNSAVE"}, {0x5, "FSAVE"},
|
236
|
+
{0x6, "FNSTSW"}, {0x5, "FSTSW"}, {0x5, "FADDP"}, {0x5, "FMULP"}, {0x6, "FCOMPP"},
|
237
|
+
{0x6, "FSUBRP"}, {0x5, "FSUBP"}, {0x6, "FDIVRP"}, {0x5, "FDIVP"}, {0x4, "FBLD"},
|
238
|
+
{0x5, "FBSTP"}, {0x7, "FUCOMIP"}, {0x6, "FCOMIP"}, {0x3, "NOT"}, {0x3, "NEG"},
|
239
|
+
{0x3, "MUL"}, {0x3, "DIV"}, {0x4, "IDIV"}, {0x4, "WAIT"}, {0x6, "MOVSXD"},
|
240
|
+
{0x5, "PAUSE"}
|
241
|
+
};
|
242
|
+
|
243
|
+
const _WRegister _REGISTERS[] = {
|
244
|
+
{0x3, "RAX"}, {0x3, "RCX"}, {0x3, "RDX"}, {0x3, "RBX"}, {0x3, "RSP"}, {0x3, "RBP"}, {0x3, "RSI"}, {0x3, "RDI"}, {0x2, "R8"}, {0x2, "R9"}, {0x3, "R10"}, {0x3, "R11"}, {0x3, "R12"}, {0x3, "R13"}, {0x3, "R14"}, {0x3, "R15"},
|
245
|
+
{0x3, "EAX"}, {0x3, "ECX"}, {0x3, "EDX"}, {0x3, "EBX"}, {0x3, "ESP"}, {0x3, "EBP"}, {0x3, "ESI"}, {0x3, "EDI"}, {0x3, "R8D"}, {0x3, "R9D"}, {0x4, "R10D"}, {0x4, "R11D"}, {0x4, "R12D"}, {0x4, "R13D"}, {0x4, "R14D"}, {0x4, "R15D"},
|
246
|
+
{0x2, "AX"}, {0x2, "CX"}, {0x2, "DX"}, {0x2, "BX"}, {0x2, "SP"}, {0x2, "BP"}, {0x2, "SI"}, {0x2, "DI"}, {0x3, "R8W"}, {0x3, "R9W"}, {0x4, "R10W"}, {0x4, "R11W"}, {0x4, "R12W"}, {0x4, "R13W"}, {0x4, "R14W"}, {0x4, "R15W"},
|
247
|
+
{0x2, "AL"}, {0x2, "CL"}, {0x2, "DL"}, {0x2, "BL"}, {0x2, "AH"}, {0x2, "CH"}, {0x2, "DH"}, {0x2, "BH"}, {0x3, "R8B"}, {0x3, "R9B"}, {0x4, "R10B"}, {0x4, "R11B"}, {0x4, "R12B"}, {0x4, "R13B"}, {0x4, "R14B"}, {0x4, "R15B"},
|
248
|
+
{0x3, "SPL"}, {0x3, "BPL"}, {0x3, "SIL"}, {0x3, "DIL"},
|
249
|
+
{0x2, "ES"}, {0x2, "CS"}, {0x2, "SS"}, {0x2, "DS"}, {0x2, "FS"}, {0x2, "GS"},
|
250
|
+
{0x3, "RIP"},
|
251
|
+
{0x3, "ST0"}, {0x3, "ST1"}, {0x3, "ST2"}, {0x3, "ST3"}, {0x3, "ST4"}, {0x3, "ST5"}, {0x3, "ST6"}, {0x3, "ST7"},
|
252
|
+
{0x3, "MM0"}, {0x3, "MM1"}, {0x3, "MM2"}, {0x3, "MM3"}, {0x3, "MM4"}, {0x3, "MM5"}, {0x3, "MM6"}, {0x3, "MM7"},
|
253
|
+
{0x4, "XMM0"}, {0x4, "XMM1"}, {0x4, "XMM2"}, {0x4, "XMM3"}, {0x4, "XMM4"}, {0x4, "XMM5"}, {0x4, "XMM6"}, {0x4, "XMM7"}, {0x4, "XMM8"}, {0x4, "XMM9"}, {0x5, "XMM10"}, {0x5, "XMM11"}, {0x5, "XMM12"}, {0x5, "XMM13"}, {0x5, "XMM14"}, {0x5, "XMM15"},
|
254
|
+
{0x4, "YMM0"}, {0x4, "YMM1"}, {0x4, "YMM2"}, {0x4, "YMM3"}, {0x4, "YMM4"}, {0x4, "YMM5"}, {0x4, "YMM6"}, {0x4, "YMM7"}, {0x4, "YMM8"}, {0x4, "YMM9"}, {0x5, "YMM10"}, {0x5, "YMM11"}, {0x5, "YMM12"}, {0x5, "YMM13"}, {0x5, "YMM14"}, {0x5, "YMM15"},
|
255
|
+
{0x3, "CR0"}, {0x0, ""}, {0x3, "CR2"}, {0x3, "CR3"}, {0x3, "CR4"}, {0x0, ""}, {0x0, ""}, {0x0, ""}, {0x3, "CR8"},
|
256
|
+
{0x3, "DR0"}, {0x3, "DR1"}, {0x3, "DR2"}, {0x3, "DR3"}, {0x0, ""}, {0x0, ""}, {0x3, "DR6"}, {0x3, "DR7"}
|
257
|
+
};
|
258
|
+
|
@@ -0,0 +1,200 @@
|
|
1
|
+
/*
|
2
|
+
mnemonics.h
|
3
|
+
|
4
|
+
diStorm3 - Powerful disassembler for X86/AMD64
|
5
|
+
http://ragestorm.net/distorm/
|
6
|
+
distorm at gmail dot com
|
7
|
+
Copyright (C) 2010 Gil Dabah
|
8
|
+
|
9
|
+
This program is free software: you can redistribute it and/or modify
|
10
|
+
it under the terms of the GNU General Public License as published by
|
11
|
+
the Free Software Foundation, either version 3 of the License, or
|
12
|
+
(at your option) any later version.
|
13
|
+
|
14
|
+
This program is distributed in the hope that it will be useful,
|
15
|
+
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
16
|
+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
17
|
+
GNU General Public License for more details.
|
18
|
+
|
19
|
+
You should have received a copy of the GNU General Public License
|
20
|
+
along with this program. If not, see <http://www.gnu.org/licenses/>
|
21
|
+
*/
|
22
|
+
|
23
|
+
|
24
|
+
#ifndef MNEMONICS_H
|
25
|
+
#define MNEMONICS_H
|
26
|
+
|
27
|
+
#ifdef __cplusplus
|
28
|
+
extern "C" {
|
29
|
+
#endif
|
30
|
+
|
31
|
+
typedef struct WMnemonic {
|
32
|
+
unsigned int length;
|
33
|
+
unsigned char p[17]; /* p is a null terminated string. */
|
34
|
+
} _WMnemonic;
|
35
|
+
|
36
|
+
typedef struct WRegister {
|
37
|
+
unsigned int length;
|
38
|
+
unsigned char p[6]; /* p is a null terminated string. */
|
39
|
+
} _WRegister;
|
40
|
+
|
41
|
+
extern const _WMnemonic _MNEMONICS[];
|
42
|
+
extern const _WRegister _REGISTERS[];
|
43
|
+
|
44
|
+
#ifdef __cplusplus
|
45
|
+
} /* End Of Extern */
|
46
|
+
#endif
|
47
|
+
|
48
|
+
#define GET_REGISTER_NAME(r) (unsigned char*)_REGISTERS[(x)].p
|
49
|
+
#define GET_MNEMONIC_NAME(m) (unsigned char*)_MNEMONICS[(m)].p
|
50
|
+
|
51
|
+
typedef enum {
|
52
|
+
I_UNDEFINED,
|
53
|
+
I_ADD, I_PUSH, I_POP, I_OR, I_ADC, I_SBB, I_AND, I_DAA, I_SUB, I_DAS, I_XOR, I_AAA,
|
54
|
+
I_CMP, I_AAS, I_INC, I_DEC, I_PUSHA, I_POPA, I_BOUND, I_ARPL, I_IMUL, I_INS, I_OUTS,
|
55
|
+
I_JO, I_JNO, I_JB, I_JAE, I_JZ, I_JNZ, I_JBE, I_JA, I_JS, I_JNS, I_JP, I_JNP, I_JL,
|
56
|
+
I_JGE, I_JLE, I_JG, I_TEST, I_XCHG, I_MOV, I_LEA, I_CBW, I_CWDE, I_CDQE, I_CWD, I_CDQ,
|
57
|
+
I_CQO, I_CALL_FAR, I_PUSHF, I_POPF, I_SAHF, I_LAHF, I_MOVS, I_CMPS, I_STOS, I_LODS,
|
58
|
+
I_SCAS, I_RET, I_LES, I_LDS, I_ENTER, I_LEAVE, I_RETF, I_INT_3, I_INT, I_INTO, I_IRET,
|
59
|
+
I_AAM, I_AAD, I_SALC, I_XLAT, I_LOOPNZ, I_LOOPZ, I_LOOP, I_JCXZ, I_JECXZ, I_JRCXZ,
|
60
|
+
I_IN, I_OUT, I_CALL, I_JMP, I_JMP_FAR, I_INT1, I_HLT, I_CMC, I_CLC, I_STC, I_CLI,
|
61
|
+
I_STI, I_CLD, I_STD, I_LAR, I_LSL, I_SYSCALL, I_CLTS, I_SYSRET, I_INVD, I_WBINVD,
|
62
|
+
I_UD2, I_FEMMS, I_NOP, I_WRMSR, I_RDTSC, I_RDMSR, I_RDPMC, I_SYSENTER, I_SYSEXIT,
|
63
|
+
I_GETSEC, I_CMOVO, I_CMOVNO, I_CMOVB, I_CMOVAE, I_CMOVZ, I_CMOVNZ, I_CMOVBE, I_CMOVA,
|
64
|
+
I_CMOVS, I_CMOVNS, I_CMOVP, I_CMOVNP, I_CMOVL, I_CMOVGE, I_CMOVLE, I_CMOVG, I_SETO,
|
65
|
+
I_SETNO, I_SETB, I_SETAE, I_SETZ, I_SETNZ, I_SETBE, I_SETA, I_SETS, I_SETNS, I_SETP,
|
66
|
+
I_SETNP, I_SETL, I_SETGE, I_SETLE, I_SETG, I_CPUID, I_BT, I_SHLD, I_RSM, I_BTS,
|
67
|
+
I_SHRD, I_CMPXCHG, I_LSS, I_BTR, I_LFS, I_LGS, I_MOVZX, I_BTC, I_BSF, I_MOVSX, I_XADD,
|
68
|
+
I_MOVNTI, I_BSWAP, I_SLDT, I_STR, I_LLDT, I_LTR, I_VERR, I_VERW, I_SGDT, I_SIDT,
|
69
|
+
I_LGDT, I_LIDT, I_SMSW, I_LMSW, I_INVLPG, I_VMCALL, I_VMLAUNCH, I_VMRESUME, I_VMXOFF,
|
70
|
+
I_MONITOR, I_MWAIT, I_XGETBV, I_XSETBV, I_VMRUN, I_VMMCALL, I_VMLOAD, I_VMSAVE,
|
71
|
+
I_STGI, I_CLGI, I_SKINIT, I_INVLPGA, I_SWAPGS, I_RDTSCP, I_PREFETCH, I_PREFETCHW,
|
72
|
+
I_PI2FW, I_PI2FD, I_PF2IW, I_PF2ID, I_PFNACC, I_PFPNACC, I_PFCMPGE, I_PFMIN, I_PFRCP,
|
73
|
+
I_PFRSQRT, I_PFSUB, I_PFADD, I_PFCMPGT, I_PFMAX, I_PFRCPIT1, I_PFRSQIT1, I_PFSUBR,
|
74
|
+
I_PFACC, I_PFCMPEQ, I_PFMUL, I_PFRCPIT2, I_PMULHRW, I_PSWAPD, I_PAVGUSB, I_MOVUPS,
|
75
|
+
I_MOVUPD, I_MOVSS, I_MOVSD, I_VMOVSS, I_VMOVSD, I_VMOVUPS, I_VMOVUPD, I_MOVHLPS,
|
76
|
+
I_MOVLPS, I_MOVLPD, I_MOVSLDUP, I_MOVDDUP, I_VMOVHLPS, I_VMOVLPS, I_VMOVLPD,
|
77
|
+
I_VMOVSLDUP, I_VMOVDDUP, I_UNPCKLPS, I_UNPCKLPD, I_VUNPCKLPS, I_VUNPCKLPD, I_UNPCKHPS,
|
78
|
+
I_UNPCKHPD, I_VUNPCKHPS, I_VUNPCKHPD, I_MOVLHPS, I_MOVHPS, I_MOVHPD, I_MOVSHDUP,
|
79
|
+
I_VMOVLHPS, I_VMOVHPS, I_VMOVHPD, I_VMOVSHDUP, I_PREFETCHNTA, I_PREFETCHT0,
|
80
|
+
I_PREFETCHT1, I_PREFETCHT2, I_MOVAPS, I_MOVAPD, I_VMOVAPS, I_VMOVAPD, I_CVTPI2PS,
|
81
|
+
I_CVTPI2PD, I_CVTSI2SS, I_CVTSI2SD, I_VCVTSI2SS, I_VCVTSI2SD, I_MOVNTPS, I_MOVNTPD,
|
82
|
+
I_MOVNTSS, I_MOVNTSD, I_VMOVNTPS, I_VMOVNTPD, I_CVTTPS2PI, I_CVTTPD2PI, I_CVTTSS2SI,
|
83
|
+
I_CVTTSD2SI, I_VCVTTSS2SI, I_VCVTTSD2SI, I_CVTPS2PI, I_CVTPD2PI, I_CVTSS2SI,
|
84
|
+
I_CVTSD2SI, I_VCVTSS2SI, I_VCVTSD2SI, I_UCOMISS, I_UCOMISD, I_VUCOMISS, I_VUCOMISD,
|
85
|
+
I_COMISS, I_COMISD, I_VCOMISS, I_VCOMISD, I_PSHUFB, I_VPSHUFB, I_PHADDW, I_VPHADDW,
|
86
|
+
I_PHADDD, I_VPHADDD, I_PHADDSW, I_VPHADDSW, I_PMADDUBSW, I_VPMADDUBSW, I_PHSUBW,
|
87
|
+
I_VPHSUBW, I_PHSUBD, I_VPHSUBD, I_PHSUBSW, I_VPHSUBSW, I_PSIGNB, I_VPSIGNB, I_PSIGNW,
|
88
|
+
I_VPSIGNW, I_PSIGND, I_VPSIGND, I_PMULHRSW, I_VPMULHRSW, I_VPERMILPS, I_VPERMILPD,
|
89
|
+
I_VPTESTPS, I_VPTESTPD, I_PBLENDVB, I_BLENDVPS, I_BLENDVPD, I_PTEST, I_VPTEST,
|
90
|
+
I_VBROADCASTSS, I_VBROADCASTSD, I_VBROADCASTF128, I_PABSB, I_VPABSB, I_PABSW,
|
91
|
+
I_VPABSW, I_PABSD, I_VPABSD, I_PMOVSXBW, I_VPMOVSXBW, I_PMOVSXBD, I_VPMOVSXBD,
|
92
|
+
I_PMOVSXBQ, I_VPMOVSXBQ, I_PMOVSXWD, I_VPMOVSXWD, I_PMOVSXWQ, I_VPMOVSXWQ, I_PMOVSXDQ,
|
93
|
+
I_VPMOVSXDQ, I_PMULDQ, I_VPMULDQ, I_PCMPEQQ, I_VPCMPEQQ, I_MOVNTDQA, I_VMOVNTDQA,
|
94
|
+
I_PACKUSDW, I_VPACKUSDW, I_VMASKMOVPS, I_VMASKMOVPD, I_PMOVZXBW, I_VPMOVZXBW,
|
95
|
+
I_PMOVZXBD, I_VPMOVZXBD, I_PMOVZXBQ, I_VPMOVZXBQ, I_PMOVZXWD, I_VPMOVZXWD, I_PMOVZXWQ,
|
96
|
+
I_VPMOVZXWQ, I_PMOVZXDQ, I_VPMOVZXDQ, I_PCMPGTQ, I_VPCMPGTQ, I_PMINSB, I_VPMINSB,
|
97
|
+
I_PMINSD, I_VPMINSD, I_PMINUW, I_VPMINUW, I_PMINUD, I_VPMINUD, I_PMAXSB, I_VPMAXSB,
|
98
|
+
I_PMAXSD, I_VPMAXSD, I_PMAXUW, I_VPMAXUW, I_PMAXUD, I_VPMAXUD, I_PMULLD, I_VPMULLD,
|
99
|
+
I_PHMINPOSUW, I_VPHMINPOSUW, I_INVEPT, I_INVVPID, I_VFMADDSUB132PS, I_VFMADDSUB132PD,
|
100
|
+
I_VFMSUBADD132PS, I_VFMSUBADD132PD, I_VFMADD132PS, I_VFMADD132PD, I_VFMADD132SS,
|
101
|
+
I_VFMADD132SD, I_VFMSUB132PS, I_VFMSUB132PD, I_VFMSUB132SS, I_VFMSUB132SD,
|
102
|
+
I_VFNMADD132PS, I_VFNMADD132PD, I_VFNMADD132SS, I_VFNMADD132SD, I_VFNMSUB132PS,
|
103
|
+
I_VFNMSUB132PD, I_VFNMSUB132SS, I_VFNMSUB132SD, I_VFMADDSUB213PS, I_VFMADDSUB213PD,
|
104
|
+
I_VFMSUBADD213PS, I_VFMSUBADD213PD, I_VFMADD213PS, I_VFMADD213PD, I_VFMADD213SS,
|
105
|
+
I_VFMADD213SD, I_VFMSUB213PS, I_VFMSUB213PD, I_VFMSUB213SS, I_VFMSUB213SD,
|
106
|
+
I_VFNMADD213PS, I_VFNMADD213PD, I_VFNMADD213SS, I_VFNMADD213SD, I_VFNMSUB213PS,
|
107
|
+
I_VFNMSUB213PD, I_VFNMSUB213SS, I_VFNMSUB213SD, I_VFMADDSUB231PS, I_VFMADDSUB231PD,
|
108
|
+
I_VFMSUBADD231PS, I_VFMSUBADD231PD, I_VFMADD231PS, I_VFMADD231PD, I_VFMADD231SS,
|
109
|
+
I_VFMADD231SD, I_VFMSUB231PS, I_VFMSUB231PD, I_VFMSUB231SS, I_VFMSUB231SD,
|
110
|
+
I_VFNMADD231PS, I_VFNMADD231PD, I_VFNMADD231SS, I_VFNMADD231SD, I_VFNMSUB231PS,
|
111
|
+
I_VFNMSUB231PD, I_VFNMSUB231SS, I_VFNMSUB231SD, I_AESIMC, I_VAESIMC, I_AESENC,
|
112
|
+
I_VAESENC, I_AESENCLAST, I_VAESENCLAST, I_AESDEC, I_VAESDEC, I_AESDECLAST, I_VAESDECLAST,
|
113
|
+
I_MOVBE, I_CRC32, I_VPERM2F128, I_ROUNDPS, I_VROUNDPS, I_ROUNDPD, I_VROUNDPD,
|
114
|
+
I_ROUNDSS, I_VROUNDSS, I_ROUNDSD, I_VROUNDSD, I_BLENDPS, I_VBLENDPS, I_BLENDPD,
|
115
|
+
I_VBLENDPD, I_PBLENDW, I_VPBLENDVW, I_PALIGNR, I_VPALIGNR, I_PEXTRB, I_VPEXTRB,
|
116
|
+
I_PEXTRW, I_VPEXTRW, I_PEXTRD, I_PEXTRQ, I_VPEXTRD, I_EXTRACTPS, I_VEXTRACTPS,
|
117
|
+
I_VINSERTF128, I_VEXTRACTF128, I_PINSRB, I_VPINSRB, I_INSERTPS, I_VINSERTPS,
|
118
|
+
I_PINSRD, I_PINSRQ, I_VPINSRD, I_VPINSRQ, I_DPPS, I_VDPPS, I_DPPD, I_VDPPD, I_MPSADBW,
|
119
|
+
I_VMPSADBW, I_PCLMULQDQ, I_VPCLMULQDQ, I_VBLENDVPS, I_VBLENDVPD, I_VPBLENDVB,
|
120
|
+
I_PCMPESTRM, I_VPCMPESTRM, I_PCMPESTRI, I_VCMPESTRI, I_PCMPISTRM, I_VPCMPISTRM,
|
121
|
+
I_PCMPISTRI, I_VPCMPISTRI, I_AESKEYGENASSIST, I_VAESKEYGENASSIST, I_MOVMSKPS,
|
122
|
+
I_MOVMSKPD, I_VMOVMSKPS, I_VMOVMSKPD, I_SQRTPS, I_SQRTPD, I_SQRTSS, I_SQRTSD,
|
123
|
+
I_VSQRTSS, I_VSQRTSD, I_VSQRTPS, I_VSQRTPD, I_RSQRTPS, I_RSQRTSS, I_VRSQRTSS,
|
124
|
+
I_VRSQRTPS, I_RCPPS, I_RCPSS, I_VRCPSS, I_VRCPPS, I_ANDPS, I_ANDPD, I_VANDPS,
|
125
|
+
I_VANDPD, I_ANDNPS, I_ANDNPD, I_VANDNPS, I_VANDNPD, I_ORPS, I_ORPD, I_VORPS, I_VORPD,
|
126
|
+
I_XORPS, I_XORPD, I_VXORPS, I_VXORPD, I_ADDPS, I_ADDPD, I_ADDSS, I_ADDSD, I_VADDPS,
|
127
|
+
I_VADDPD, I_VADDSS, I_VADDSD, I_MULPS, I_MULPD, I_MULSS, I_MULSD, I_VMULPS, I_VMULPD,
|
128
|
+
I_VMULSS, I_VMULSD, I_CVTPS2PD, I_CVTPD2PS, I_CVTSS2SD, I_CVTSD2SS, I_VCVTSS2SD,
|
129
|
+
I_VCVTSD2SS, I_VCVTPS2PD, I_VCVTPD2PS, I_CVTDQ2PS, I_CVTPS2DQ, I_CVTTPS2DQ,
|
130
|
+
I_VCVTDQ2PS, I_VCVTPS2DQ, I_VCVTTPS2DQ, I_SUBPS, I_SUBPD, I_SUBSS, I_SUBSD, I_VSUBPS,
|
131
|
+
I_VSUBPD, I_VSUBSS, I_VSUBSD, I_MINPS, I_MINPD, I_MINSS, I_MINSD, I_VMINPS, I_VMINPD,
|
132
|
+
I_VMINSS, I_VMINSD, I_DIVPS, I_DIVPD, I_DIVSS, I_DIVSD, I_VDIVPS, I_VDIVPD, I_VDIVSS,
|
133
|
+
I_VDIVSD, I_MAXPS, I_MAXPD, I_MAXSS, I_MAXSD, I_VMAXPS, I_VMAXPD, I_VMAXSS, I_VMAXSD,
|
134
|
+
I_PUNPCKLBW, I_VPUNPCKLBW, I_PUNPCKLWD, I_VPUNPCKLWD, I_PUNPCKLDQ, I_VPUNPCKLDQ,
|
135
|
+
I_PACKSSWB, I_VPACKSSWB, I_PCMPGTB, I_VPCMPGTB, I_PCMPGTW, I_VPCMPGTW, I_PCMPGTD,
|
136
|
+
I_VPCMPGTD, I_PACKUSWB, I_VPACKUSWB, I_PUNPCKHBW, I_VPUNPCKHBW, I_PUNPCKHWD,
|
137
|
+
I_VPUNPCKHWD, I_PUNPCKHDQ, I_VPUNPCKHDQ, I_PACKSSDW, I_VPACKSSDW, I_PUNPCKLQDQ,
|
138
|
+
I_VPUNPCKLQDQ, I_PUNPCKHQDQ, I_VPUNPCKHQDQ, I_MOVD, I_MOVQ, I_VMOVD, I_VMOVQ,
|
139
|
+
I_MOVDQA, I_MOVDQU, I_VMOVDQA, I_VMOVDQU, I_PSHUFW, I_PSHUFD, I_PSHUFHW, I_PSHUFLW,
|
140
|
+
I_VPSHUFD, I_VPSHUFHW, I_VPSHUFLW, I_PSRLW, I_VPSRLW, I_PSRAW, I_VPSRAW, I_PSLLW,
|
141
|
+
I_VPSLLW, I_PSRLD, I_VPSRLD, I_PSRAD, I_VPSRAD, I_PSLLD, I_VPSLLD, I_PSRLQ, I_VPSRLQ,
|
142
|
+
I_PSRLDQ, I_VPSRLDQ, I_PSLLQ, I_VPSLLQ, I_PSLLDQ, I_VPSLLDQ, I_PCMPEQB, I_VPCMPEQB,
|
143
|
+
I_PCMPEQW, I_VPCMPEQW, I_PCMPEQD, I_VPCMPEQD, I_EMMS, I_VZEROUPPER, I_VZEROALL,
|
144
|
+
I_VMREAD, I_EXTRQ, I_INSERTQ, I_VMWRITE, I_HADDPD, I_HADDPS, I_VHADDPD, I_VHADDPS,
|
145
|
+
I_HSUBPD, I_HSUBPS, I_VHSUBPD, I_VHSUBPS, I_FXSAVE, I_FXRSTOR, I_XAVE, I_LFENCE,
|
146
|
+
I_XRSTOR, I_MFENCE, I_SFENCE, I_CLFLUSH, I_LDMXCSR, I_VLDMXCSR, I_STMXCSR, I_VSTMXCSR,
|
147
|
+
I_POPCNT, I_BSR, I_LZCNT, I_CMPEQPS, I_CMPLTPS, I_CMPLEPS, I_CMPUNORDPS, I_CMPNEQPS,
|
148
|
+
I_CMPNLTPS, I_CMPNLEPS, I_CMPORDPS, I_CMPEQPD, I_CMPLTPD, I_CMPLEPD, I_CMPUNORDPD,
|
149
|
+
I_CMPNEQPD, I_CMPNLTPD, I_CMPNLEPD, I_CMPORDPD, I_CMPEQSS, I_CMPLTSS, I_CMPLESS,
|
150
|
+
I_CMPUNORDSS, I_CMPNEQSS, I_CMPNLTSS, I_CMPNLESS, I_CMPORDSS, I_CMPEQSD, I_CMPLTSD,
|
151
|
+
I_CMPLESD, I_CMPUNORDSD, I_CMPNEQSD, I_CMPNLTSD, I_CMPNLESD, I_CMPORDSD, I_VCMPEQPS,
|
152
|
+
I_VCMPLTPS, I_VCMPLEPS, I_VCMPUNORDPS, I_VCMPNEQPS, I_VCMPNLTPS, I_VCMPNLEPS,
|
153
|
+
I_VCMPORDPS, I_VCMPEQPD, I_VCMPLTPD, I_VCMPLEPD, I_VCMPUNORDPD, I_VCMPNEQPD,
|
154
|
+
I_VCMPNLTPD, I_VCMPNLEPD, I_VCMPORDPD, I_VCMPEQSS, I_VCMPLTSS, I_VCMPLESS, I_VCMPUNORDSS,
|
155
|
+
I_VCMPNEQSS, I_VCMPNLTSS, I_VCMPNLESS, I_VCMPORDSS, I_VCMPEQSD, I_VCMPLTSD,
|
156
|
+
I_VCMPLESD, I_VCMPUNORDSD, I_VCMPNEQSD, I_VCMPNLTSD, I_VCMPNLESD, I_VCMPORDSD,
|
157
|
+
I_PINSRW, I_VPINSRW, I_SHUFPS, I_SHUFPD, I_VSHUFPS, I_VSHUFPD, I_CMPXCHG8B, I_CMPXCHG16B,
|
158
|
+
I_VMPTRST, I_VMPTRLD, I_VMCLEAR, I_VMXON, I_ADDSUBPD, I_ADDSUBPS, I_VADDSUBPD,
|
159
|
+
I_VADDSUBPS, I_PADDQ, I_VPADDQ, I_PMULLW, I_VPMULLW, I_MOVQ2DQ, I_MOVDQ2Q, I_PMOVMSKB,
|
160
|
+
I_VPMOVMSKB, I_PSUBUSB, I_VPSUBUSB, I_PSUBUSW, I_VPSUBUSW, I_PMINUB, I_VPMINUB,
|
161
|
+
I_PAND, I_VPAND, I_PADDUSB, I_VPADDUSW, I_PADDUSW, I_PMAXUB, I_VPMAXUB, I_PANDN,
|
162
|
+
I_VPANDN, I_PAVGB, I_VPAVGB, I_PAVGW, I_VPAVGW, I_PMULHUW, I_VPMULHUW, I_PMULHW,
|
163
|
+
I_VPMULHW, I_CVTTPD2DQ, I_CVTDQ2PD, I_CVTPD2DQ, I_VCVTTPD2DQ, I_VCVTDQ2PD, I_VCVTPD2DQ,
|
164
|
+
I_MOVNTQ, I_MOVNTDQ, I_VMOVNTDQ, I_PSUBSB, I_VPSUBSB, I_PSUBSW, I_VPSUBSW, I_PMINSW,
|
165
|
+
I_VPMINSW, I_POR, I_VPOR, I_PADDSB, I_VPADDSB, I_PADDSW, I_VPADDSW, I_PMAXSW,
|
166
|
+
I_VPMAXSW, I_PXOR, I_VPXOR, I_LDDQU, I_VLDDQU, I_PMULUDQ, I_VPMULUDQ, I_PMADDWD,
|
167
|
+
I_VPMADDWD, I_PSADBW, I_VPSADBW, I_MASKMOVQ, I_MASKMOVDQU, I_VMASKMOVDQU, I_PSUBB,
|
168
|
+
I_VPSUBB, I_PSUBW, I_VPSUBW, I_PSUBD, I_VPSUBD, I_PSUBQ, I_VPSUBQ, I_PADDB, I_VPADDB,
|
169
|
+
I_PADDW, I_VPADDW, I_PADDD, I_VPADDD, I_ROL, I_ROR, I_RCL, I_RCR, I_SHL, I_SHR,
|
170
|
+
I_SAL, I_SAR, I_FADD, I_FMUL, I_FCOM, I_FCOMP, I_FSUB, I_FSUBR, I_FDIV, I_FDIVR,
|
171
|
+
I_FLD, I_FST, I_FSTP, I_FLDENV, I_FLDCW, I_FXCH, I_FNOP, I_FCHS, I_FABS, I_FTST,
|
172
|
+
I_FXAM, I_FLD1, I_FLDL2T, I_FLDL2E, I_FLDPI, I_FLDLG2, I_FLDLN2, I_FLDZ, I_F2XM1,
|
173
|
+
I_FYL2X, I_FPTAN, I_FPATAN, I_FXTRACT, I_FPREM1, I_FDECSTP, I_FINCSTP, I_FPREM,
|
174
|
+
I_FYL2XP1, I_FSQRT, I_FSINCOS, I_FRNDINT, I_FSCALE, I_FSIN, I_FCOS, I_FNSTENV,
|
175
|
+
I_FSTENV, I_FNSTCW, I_FSTCW, I_FIADD, I_FIMUL, I_FICOM, I_FICOMP, I_FISUB, I_FISUBR,
|
176
|
+
I_FIDIV, I_FIDIVR, I_FCMOVB, I_FCMOVE, I_FCMOVBE, I_FCMOVU, I_FUCOMPP, I_FILD,
|
177
|
+
I_FISTTP, I_FIST, I_FISTP, I_FCMOVNB, I_FCMOVNE, I_FCMOVNBE, I_FCMOVNU, I_FENI,
|
178
|
+
I_FEDISI, I_FSETPM, I_FUCOMI, I_FCOMI, I_FNCLEX, I_FCLEX, I_FNINIT, I_FINIT, I_FRSTOR,
|
179
|
+
I_FFREE, I_FUCOM, I_FUCOMP, I_FNSAVE, I_FSAVE, I_FNSTSW, I_FSTSW, I_FADDP, I_FMULP,
|
180
|
+
I_FCOMPP, I_FSUBRP, I_FSUBP, I_FDIVRP, I_FDIVP, I_FBLD, I_FBSTP, I_FUCOMIP, I_FCOMIP,
|
181
|
+
I_NOT, I_NEG, I_MUL, I_DIV, I_IDIV, I_WAIT, I_MOVSXD, I_PAUSE
|
182
|
+
} _InstructionType;
|
183
|
+
|
184
|
+
typedef enum {
|
185
|
+
R_RAX, R_RCX, R_RDX, R_RBX, R_RSP, R_RBP, R_RSI, R_RDI, R_R8, R_R9, R_R10, R_R11, R_R12, R_R13, R_R14, R_R15,
|
186
|
+
R_EAX, R_ECX, R_EDX, R_EBX, R_ESP, R_EBP, R_ESI, R_EDI, R_R8D, R_R9D, R_R10D, R_R11D, R_R12D, R_R13D, R_R14D, R_R15D,
|
187
|
+
R_AX, R_CX, R_DX, R_BX, R_SP, R_BP, R_SI, R_DI, R_R8W, R_R9W, R_R10W, R_R11W, R_R12W, R_R13W, R_R14W, R_R15W,
|
188
|
+
R_AL, R_CL, R_DL, R_BL, R_AH, R_CH, R_DH, R_BH, R_R8B, R_R9B, R_R10B, R_R11B, R_R12B, R_R13B, R_R14B, R_R15B,
|
189
|
+
R_SPL, R_BPL, R_SIL, R_DIL,
|
190
|
+
R_ES, R_CS, R_SS, R_DS, R_FS, R_GS,
|
191
|
+
R_RIP,
|
192
|
+
R_ST0, R_ST1, R_ST2, R_ST3, R_ST4, R_ST5, R_ST6, R_ST7,
|
193
|
+
R_MM0, R_MM1, R_MM2, R_MM3, R_MM4, R_MM5, R_MM6, R_MM7,
|
194
|
+
R_XMM0, R_XMM1, R_XMM2, R_XMM3, R_XMM4, R_XMM5, R_XMM6, R_XMM7, R_XMM8, R_XMM9, R_XMM10, R_XMM11, R_XMM12, R_XMM13, R_XMM14, R_XMM15,
|
195
|
+
R_YMM0, R_YMM1, R_YMM2, R_YMM3, R_YMM4, R_YMM5, R_YMM6, R_YMM7, R_YMM8, R_YMM9, R_YMM10, R_YMM11, R_YMM12, R_YMM13, R_YMM14, R_YMM15,
|
196
|
+
R_CR0, R_UNUSED0, R_CR2, R_CR3, R_CR4, R_UNUSED1, R_UNUSED2, R_UNUSED3, R_CR8,
|
197
|
+
R_DR0, R_DR1, R_DR2, R_DR3, R_UNUSED4, R_UNUSED5, R_DR6, R_DR7
|
198
|
+
} _RegisterType;
|
199
|
+
|
200
|
+
#endif /* MNEMONICS_H */
|