pq_crypto 0.6.5 → 0.6.7

data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_acc_l4_avx2_asm.S → mldsa_pointwise_acc_l4_avx2_asm.S}

@@ -17,6 +17,40 @@
  * AVX2 Dilithium implementation @[REF_AVX2].
  */
 
+/*yaml
+  Name: pointwise_acc_l4_avx2_asm
+  Description: x86_64 AVX2 pointwise multiply-accumulate of length-4 polynomial vectors
+  Signature: void mld_pointwise_acc_l4_avx2_asm(int32_t *c, const int32_t a[4][256], const int32_t b[4][256], const int32_t *qdata)
+  ABI:
+    Architecture: x86_64
+    CallingConvention: SysV
+    Features: [AVX2]
+    rdi:
+      type: buffer
+      size_bytes: 1024
+      permissions: write-only
+      c_parameter: int32_t *c
+      description: Output polynomial (256 x int32_t)
+    rsi:
+      type: buffer
+      size_bytes: 4096
+      permissions: read-only
+      c_parameter: const int32_t a[4][256]
+      description: Input polynomial vector a (4 x 256 x int32_t)
+    rdx:
+      type: buffer
+      size_bytes: 4096
+      permissions: read-only
+      c_parameter: const int32_t b[4][256]
+      description: Input polynomial vector b (4 x 256 x int32_t)
+    rcx:
+      type: buffer
+      size_bytes: 2496
+      permissions: read-only
+      c_parameter: const int32_t *qdata
+      description: Precomputed constants (624 x int32_t)
+*/
+
 #include "../../../common.h"
 #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
     !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
@@ -24,7 +58,7 @@
 
 /*
  * WARNING: This file is auto-derived from the mldsa-native source file
- *   dev/x86_64/src/pointwise_acc_l4_avx2_asm.S using scripts/simpasm. Do not modify it directly.
+ *   dev/x86_64/src/mldsa_pointwise_acc_l4_avx2_asm.S using scripts/simpasm. Do not modify it directly.
  */
 
 .text
@@ -37,7 +71,7 @@ MLD_ASM_FN_SYMBOL(pointwise_acc_l4_avx2_asm)
         vmovdqa (%rcx), %ymm1
         xorl %eax, %eax
 
-Lpointwise_acc_l4_avx2_looptop2:
+Lmld_pointwise_acc_l4_avx2_looptop2:
         vmovdqa (%rsi), %ymm6
         vmovdqa 0x20(%rsi), %ymm8
         vmovdqa (%rdx), %ymm10
@@ -125,7 +159,7 @@ Lpointwise_acc_l4_avx2_looptop2:
         addq $0x40, %rdi
         addl $0x1, %eax
         cmpl $0x10, %eax
-        jb Lpointwise_acc_l4_avx2_looptop2
+        jb Lmld_pointwise_acc_l4_avx2_looptop2
         retq
         .cfi_endproc
 

data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_acc_l5_avx2_asm.S → mldsa_pointwise_acc_l5_avx2_asm.S}

@@ -17,6 +17,40 @@
  * AVX2 Dilithium implementation @[REF_AVX2].
  */
 
+/*yaml
+  Name: pointwise_acc_l5_avx2_asm
+  Description: x86_64 AVX2 pointwise multiply-accumulate of length-5 polynomial vectors
+  Signature: void mld_pointwise_acc_l5_avx2_asm(int32_t *c, const int32_t a[5][256], const int32_t b[5][256], const int32_t *qdata)
+  ABI:
+    Architecture: x86_64
+    CallingConvention: SysV
+    Features: [AVX2]
+    rdi:
+      type: buffer
+      size_bytes: 1024
+      permissions: write-only
+      c_parameter: int32_t *c
+      description: Output polynomial (256 x int32_t)
+    rsi:
+      type: buffer
+      size_bytes: 5120
+      permissions: read-only
+      c_parameter: const int32_t a[5][256]
+      description: Input polynomial vector a (5 x 256 x int32_t)
+    rdx:
+      type: buffer
+      size_bytes: 5120
+      permissions: read-only
+      c_parameter: const int32_t b[5][256]
+      description: Input polynomial vector b (5 x 256 x int32_t)
+    rcx:
+      type: buffer
+      size_bytes: 2496
+      permissions: read-only
+      c_parameter: const int32_t *qdata
+      description: Precomputed constants (624 x int32_t)
+*/
+
 #include "../../../common.h"
 #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
     !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
@@ -24,7 +58,7 @@
 
 /*
  * WARNING: This file is auto-derived from the mldsa-native source file
- *   dev/x86_64/src/pointwise_acc_l5_avx2_asm.S using scripts/simpasm. Do not modify it directly.
+ *   dev/x86_64/src/mldsa_pointwise_acc_l5_avx2_asm.S using scripts/simpasm. Do not modify it directly.
  */
 
 .text
@@ -37,7 +71,7 @@ MLD_ASM_FN_SYMBOL(pointwise_acc_l5_avx2_asm)
         vmovdqa (%rcx), %ymm1
         xorl %eax, %eax
 
-Lpointwise_acc_l5_avx2_looptop2:
+Lmld_pointwise_acc_l5_avx2_looptop2:
         vmovdqa (%rsi), %ymm6
         vmovdqa 0x20(%rsi), %ymm8
         vmovdqa (%rdx), %ymm10
@@ -141,7 +175,7 @@ Lpointwise_acc_l5_avx2_looptop2:
         addq $0x40, %rdi
         addl $0x1, %eax
         cmpl $0x10, %eax
-        jb Lpointwise_acc_l5_avx2_looptop2
+        jb Lmld_pointwise_acc_l5_avx2_looptop2
         retq
         .cfi_endproc
 

data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_acc_l7_avx2_asm.S → mldsa_pointwise_acc_l7_avx2_asm.S}

@@ -17,6 +17,40 @@
  * AVX2 Dilithium implementation @[REF_AVX2].
  */
 
+/*yaml
+  Name: pointwise_acc_l7_avx2_asm
+  Description: x86_64 AVX2 pointwise multiply-accumulate of length-7 polynomial vectors
+  Signature: void mld_pointwise_acc_l7_avx2_asm(int32_t *c, const int32_t a[7][256], const int32_t b[7][256], const int32_t *qdata)
+  ABI:
+    Architecture: x86_64
+    CallingConvention: SysV
+    Features: [AVX2]
+    rdi:
+      type: buffer
+      size_bytes: 1024
+      permissions: write-only
+      c_parameter: int32_t *c
+      description: Output polynomial (256 x int32_t)
+    rsi:
+      type: buffer
+      size_bytes: 7168
+      permissions: read-only
+      c_parameter: const int32_t a[7][256]
+      description: Input polynomial vector a (7 x 256 x int32_t)
+    rdx:
+      type: buffer
+      size_bytes: 7168
+      permissions: read-only
+      c_parameter: const int32_t b[7][256]
+      description: Input polynomial vector b (7 x 256 x int32_t)
+    rcx:
+      type: buffer
+      size_bytes: 2496
+      permissions: read-only
+      c_parameter: const int32_t *qdata
+      description: Precomputed constants (624 x int32_t)
+*/
+
 #include "../../../common.h"
 #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
     !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
@@ -24,7 +58,7 @@
 
 /*
  * WARNING: This file is auto-derived from the mldsa-native source file
- *   dev/x86_64/src/pointwise_acc_l7_avx2_asm.S using scripts/simpasm. Do not modify it directly.
+ *   dev/x86_64/src/mldsa_pointwise_acc_l7_avx2_asm.S using scripts/simpasm. Do not modify it directly.
  */
 
 .text
@@ -37,7 +71,7 @@ MLD_ASM_FN_SYMBOL(pointwise_acc_l7_avx2_asm)
         vmovdqa (%rcx), %ymm1
         xorl %eax, %eax
 
-Lpointwise_acc_l7_avx2_looptop2:
+Lmld_pointwise_acc_l7_avx2_looptop2:
         vmovdqa (%rsi), %ymm6
         vmovdqa 0x20(%rsi), %ymm8
         vmovdqa (%rdx), %ymm10
@@ -173,7 +207,7 @@ Lpointwise_acc_l7_avx2_looptop2:
         addq $0x40, %rdi
         addl $0x1, %eax
         cmpl $0x10, %eax
-        jb Lpointwise_acc_l7_avx2_looptop2
+        jb Lmld_pointwise_acc_l7_avx2_looptop2
         retq
         .cfi_endproc
 

data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{pointwise_avx2_asm.S → mldsa_pointwise_avx2_asm.S}

@@ -17,13 +17,41 @@
  * AVX2 Dilithium implementation @[REF_AVX2].
  */
 
+/*yaml
+  Name: pointwise_avx2_asm
+  Description: x86_64 AVX2 pointwise Montgomery multiplication
+  Signature: void mld_pointwise_avx2_asm(int32_t *a, const int32_t *b, const int32_t *qdata)
+  ABI:
+    Architecture: x86_64
+    CallingConvention: SysV
+    Features: [AVX2]
+    rdi:
+      type: buffer
+      size_bytes: 1024
+      permissions: read/write
+      c_parameter: int32_t *a
+      description: Input/output polynomial (256 x int32_t)
+    rsi:
+      type: buffer
+      size_bytes: 1024
+      permissions: read-only
+      c_parameter: const int32_t *b
+      description: Input polynomial (256 x int32_t)
+    rdx:
+      type: buffer
+      size_bytes: 2496
+      permissions: read-only
+      c_parameter: const int32_t *qdata
+      description: Precomputed constants (624 x int32_t)
+*/
+
 #include "../../../common.h"
 #if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
     !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED)
 
 /*
  * WARNING: This file is auto-derived from the mldsa-native source file
- *   dev/x86_64/src/pointwise_avx2_asm.S using scripts/simpasm. Do not modify it directly.
+ *   dev/x86_64/src/mldsa_pointwise_avx2_asm.S using scripts/simpasm. Do not modify it directly.
  */
 
 .text
@@ -36,7 +64,7 @@ MLD_ASM_FN_SYMBOL(pointwise_avx2_asm)
         vmovdqa (%rdx), %ymm1
         xorl %eax, %eax
 
-Lpointwise_avx2_looptop1:
+Lmld_pointwise_avx2_looptop1:
         vmovdqa (%rdi), %ymm2
         vmovdqa 0x20(%rdi), %ymm4
         vmovdqa 0x40(%rdi), %ymm6
@@ -86,7 +114,7 @@ Lpointwise_avx2_looptop1:
         addq $0x60, %rsi
         addl $0x1, %eax
         cmpl $0xa, %eax
-        jb Lpointwise_avx2_looptop1
+        jb Lmld_pointwise_avx2_looptop1
         vmovdqa (%rdi), %ymm2
         vmovdqa 0x20(%rdi), %ymm4
         vmovdqa (%rsi), %ymm10

data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/{poly_caddq_avx2_asm.S → mldsa_poly_caddq_avx2_asm.S}

@@ -18,14 +18,23 @@
  */
 
 
-/*************************************************
- * Name:        mld_poly_caddq_avx2_asm
- *
- * Description: For all coefficients of in/out polynomial add Q if
- *              coefficient is negative.
- *
- * Arguments:   - int32_t *r: pointer to input/output polynomial
- **************************************************/
+/*yaml
+  Name: poly_caddq_avx2_asm
+  Description: x86_64 AVX2 conditional addition of q to each coefficient.
+    For all coefficients of the in/out polynomial, add Q if the coefficient
+    is negative.
+  Signature: void mld_poly_caddq_avx2_asm(int32_t *r)
+  ABI:
+    Architecture: x86_64
+    CallingConvention: SysV
+    Features: [AVX2]
+    rdi:
+      type: buffer
+      size_bytes: 1024
+      permissions: read/write
+      c_parameter: int32_t *r
+      description: Input/output polynomial (256 x int32_t)
+*/
 
 #include "../../../common.h"
 
@@ -35,7 +44,7 @@
 
 /*
  * WARNING: This file is auto-derived from the mldsa-native source file
- *   dev/x86_64/src/poly_caddq_avx2_asm.S using scripts/simpasm. Do not modify it directly.
+ *   dev/x86_64/src/mldsa_poly_caddq_avx2_asm.S using scripts/simpasm. Do not modify it directly.
  */
 
 .text

data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/mldsa_poly_chknorm_avx2_asm.S

@@ -0,0 +1,176 @@
+/*
+ * Copyright (c) The mldsa-native project authors
+ * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
+ */
+
+/* References
+ * ==========
+ *
+ * - [REF_AVX2]
+ *   CRYSTALS-Dilithium optimized AVX2 implementation
+ *   Bai, Ducas, Kiltz, Lepoint, Lyubashevsky, Schwabe, Seiler, Stehlé
+ *   https://github.com/pq-crystals/dilithium/tree/master/avx2
+ */
+
+/*
+ * This file is derived from the public domain
+ * AVX2 Dilithium implementation @[REF_AVX2].
+ */
+
+
+/*yaml
+  Name: poly_chknorm_avx2_asm
+  Description: x86_64 AVX2 infinity-norm bound check on polynomial coefficients.
+    Check the infinity norm of the polynomial against the given bound B.
+    Returns 0 if the norm is strictly smaller than B; otherwise returns 1
+    (i.e. returns 1 if any |coefficient| >= B, 0 otherwise).
+  Signature: int mld_poly_chknorm_avx2_asm(const int32_t *a, int32_t B)
+  ABI:
+    Architecture: x86_64
+    CallingConvention: SysV
+    Features: [AVX2]
+    rdi:
+      type: buffer
+      size_bytes: 1024
+      permissions: read-only
+      c_parameter: const int32_t *a
+      description: Input polynomial (256 x int32_t)
+    rsi:
+      type: scalar
+      c_parameter: int32_t B
+      description: Norm bound (must be non-negative)
+      test_with: 131072  # representative non-negative bound (1 << 17)
+*/
+
+#include "../../../common.h"
+
+#if defined(MLD_ARITH_BACKEND_X86_64_DEFAULT) && \
+    !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED)
+
+
+/*
+ * WARNING: This file is auto-derived from the mldsa-native source file
+ *   dev/x86_64/src/mldsa_poly_chknorm_avx2_asm.S using scripts/simpasm. Do not modify it directly.
+ */
+
+.text
+.balign 4
+.global MLD_ASM_NAMESPACE(poly_chknorm_avx2_asm)
+MLD_ASM_FN_SYMBOL(poly_chknorm_avx2_asm)
+
+        .cfi_startproc
+        subl $0x1, %esi
+        vpxor %xmm1, %xmm1, %xmm1
+        vmovd %esi, %xmm2
+        vpbroadcastd %xmm2, %ymm2
+        vpabsd (%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x20(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x40(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x60(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x80(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0xa0(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0xc0(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0xe0(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x100(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x120(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x140(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x160(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x180(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x1a0(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x1c0(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x1e0(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x200(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x220(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x240(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x260(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x280(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x2a0(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x2c0(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x2e0(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x300(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x320(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x340(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x360(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        vpabsd 0x380(%rdi), %ymm0
+        vpcmpgtd %ymm2, %ymm0, %ymm0
+        vpor %ymm0, %ymm1, %ymm1
+        vpabsd 0x3a0(%rdi), %ymm3
+        vpcmpgtd %ymm2, %ymm3, %ymm3
+        vpor %ymm3, %ymm1, %ymm1
+        vpabsd 0x3c0(%rdi), %ymm4
+        vpcmpgtd %ymm2, %ymm4, %ymm4
+        vpor %ymm4, %ymm1, %ymm1
+        vpabsd 0x3e0(%rdi), %ymm5
+        vpcmpgtd %ymm2, %ymm5, %ymm5
+        vpor %ymm5, %ymm1, %ymm1
+        xorl %eax, %eax
+        vptest %ymm1, %ymm1
+        setne %al
+        retq
+        .cfi_endproc
+
+MLD_ASM_FN_SIZE(poly_chknorm_avx2_asm)
+
+
+#endif /* MLD_ARITH_BACKEND_X86_64_DEFAULT && !MLD_CONFIG_MULTILEVEL_NO_SHARED \
+        */
+
+#if defined(__ELF__)
+.section .note.GNU-stack,"",%progbits
+#endif