pq_crypto 0.6.0 → 0.6.2

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (154) hide show
  1. checksums.yaml +4 -4
  2. data/CHANGELOG.md +12 -0
  3. data/SECURITY.md +7 -0
  4. data/ext/pqcrypto/extconf.rb +2 -0
  5. data/ext/pqcrypto/pqcrypto_ruby_secure.c +139 -0
  6. data/ext/pqcrypto/pqcrypto_secure.c +532 -0
  7. data/ext/pqcrypto/pqcrypto_secure.h +20 -0
  8. data/ext/pqcrypto/pqcrypto_version.h +1 -1
  9. data/ext/pqcrypto/vendor/.vendored +4 -4
  10. data/ext/pqcrypto/vendor/mldsa-native/README.md +23 -10
  11. data/ext/pqcrypto/vendor/mldsa-native/mldsa/README.md +23 -0
  12. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native.c +114 -58
  13. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native.h +498 -461
  14. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native_asm.S +145 -85
  15. data/ext/pqcrypto/vendor/mldsa-native/mldsa/mldsa_native_config.h +456 -422
  16. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/cbmc.h +47 -25
  17. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/common.h +26 -14
  18. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/ct.h +56 -81
  19. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/debug.h +17 -24
  20. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/fips202.c +33 -40
  21. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/fips202.h +67 -87
  22. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/fips202x4.c +19 -14
  23. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/fips202x4.h +13 -5
  24. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.c +84 -10
  25. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/keccakf1600.h +10 -5
  26. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/auto.h +6 -0
  27. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/fips202_native_aarch64.h +22 -15
  28. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_scalar_aarch64_asm.S +376 -0
  29. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_v84a_aarch64_asm.S +204 -0
  30. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x2_v84a_aarch64_asm.S +259 -0
  31. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_scalar_hybrid_aarch64_asm.S +1077 -0
  32. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_v84a_scalar_hybrid_aarch64_asm.S +987 -0
  33. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccakf1600_round_constants.c +16 -10
  34. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_scalar.h +2 -1
  35. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x1_v84a.h +1 -1
  36. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x2_v84a.h +4 -2
  37. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_scalar.h +2 -2
  38. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/x4_v8a_v84a_scalar.h +1 -1
  39. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/api.h +60 -0
  40. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/mve.h +48 -0
  41. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/fips202_native_armv81m.h +18 -1
  42. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.S +658 -582
  43. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccak_f1600_x4_mve.c +5 -100
  44. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/keccakf1600_round_constants.c +26 -25
  45. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/state_extract_bytes_x4_mve.S +334 -0
  46. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/armv81m/src/state_xor_bytes_x4_mve.S +355 -0
  47. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/auto.h +8 -3
  48. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/{xkcp.h → keccak_f1600_x4_avx2.h} +11 -8
  49. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/fips202_native_x86_64.h +44 -0
  50. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccak_f1600_x4_avx2_asm.S +454 -0
  51. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/keccakf1600_constants.c +52 -0
  52. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/meta.h +37 -28
  53. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/aarch64_zetas.c +213 -196
  54. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/arith_native_aarch64.h +248 -64
  55. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/intt_aarch64_asm.S +753 -0
  56. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/mld_polyvecl_pointwise_acc_montgomery_l4_aarch64_asm.S +129 -0
  57. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/mld_polyvecl_pointwise_acc_montgomery_l5_aarch64_asm.S +145 -0
  58. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/mld_polyvecl_pointwise_acc_montgomery_l7_aarch64_asm.S +177 -0
  59. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/ntt_aarch64_asm.S +653 -0
  60. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/pointwise_montgomery_aarch64_asm.S +84 -0
  61. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_caddq_aarch64_asm.S +53 -0
  62. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_chknorm_aarch64_asm.S +55 -0
  63. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_decompose_32_aarch64_asm.S +86 -0
  64. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_decompose_88_aarch64_asm.S +86 -0
  65. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_use_hint_32_aarch64_asm.S +103 -0
  66. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_use_hint_88_aarch64_asm.S +111 -0
  67. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_17_aarch64_asm.S +75 -0
  68. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_19_aarch64_asm.S +72 -0
  69. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_table.c +23 -11
  70. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_aarch64_asm.S +189 -0
  71. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta2_aarch64_asm.S +137 -0
  72. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta4_aarch64_asm.S +130 -0
  73. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta_table.c +520 -516
  74. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_table.c +34 -33
  75. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/api.h +202 -242
  76. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/meta.h +25 -17
  77. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/arith_native_x86_64.h +112 -28
  78. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/consts.c +1 -1
  79. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/consts.h +1 -1
  80. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/intt_avx2_asm.S +2311 -0
  81. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/ntt_avx2_asm.S +2383 -0
  82. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/nttunpack_avx2_asm.S +238 -0
  83. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_acc_l4_avx2_asm.S +139 -0
  84. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_acc_l5_avx2_asm.S +155 -0
  85. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_acc_l7_avx2_asm.S +187 -0
  86. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_avx2_asm.S +130 -0
  87. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_caddq_avx2_asm.S +190 -0
  88. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_decompose_32_avx2.c +6 -4
  89. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_decompose_88_avx2.c +6 -4
  90. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_use_hint_32_avx2.c +9 -8
  91. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_use_hint_88_avx2.c +10 -9
  92. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/polyz_unpack_17_avx2.c +8 -5
  93. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/polyz_unpack_19_avx2.c +8 -5
  94. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_eta2_avx2.c +6 -4
  95. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_eta4_avx2.c +6 -4
  96. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/rej_uniform_table.c +130 -129
  97. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/packing.c +109 -180
  98. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/packing.h +169 -150
  99. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly.c +56 -40
  100. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly.h +149 -164
  101. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly_kl.c +52 -57
  102. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/poly_kl.h +132 -167
  103. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec.c +57 -424
  104. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec.h +167 -474
  105. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec_lazy.c +308 -0
  106. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/polyvec_lazy.h +653 -0
  107. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/reduce.h +22 -29
  108. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/rounding.h +37 -43
  109. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/sign.c +511 -367
  110. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/sign.h +456 -417
  111. data/lib/pq_crypto/hybrid_kem.rb +1 -1
  112. data/lib/pq_crypto/internal.rb +23 -0
  113. data/lib/pq_crypto/kem.rb +27 -34
  114. data/lib/pq_crypto/pkcs8/der.rb +68 -0
  115. data/lib/pq_crypto/pkcs8/private_key_choice.rb +186 -0
  116. data/lib/pq_crypto/pkcs8.rb +51 -468
  117. data/lib/pq_crypto/serialization.rb +19 -29
  118. data/lib/pq_crypto/signature.rb +28 -35
  119. data/lib/pq_crypto/version.rb +1 -1
  120. data/lib/pq_crypto.rb +10 -0
  121. data/script/vendor_libs.rb +3 -3
  122. metadata +44 -35
  123. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_scalar_asm.S +0 -376
  124. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x1_v84a_asm.S +0 -204
  125. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x2_v84a_asm.S +0 -259
  126. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_scalar_hybrid_asm.S +0 -1077
  127. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/aarch64/src/keccak_f1600_x4_v8a_v84a_scalar_hybrid_asm.S +0 -987
  128. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/KeccakP_1600_times4_SIMD256.c +0 -488
  129. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/fips202/native/x86_64/src/KeccakP_1600_times4_SIMD256.h +0 -16
  130. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/intt.S +0 -753
  131. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/mld_polyvecl_pointwise_acc_montgomery_l4.S +0 -129
  132. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/mld_polyvecl_pointwise_acc_montgomery_l5.S +0 -145
  133. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/mld_polyvecl_pointwise_acc_montgomery_l7.S +0 -177
  134. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/ntt.S +0 -653
  135. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/pointwise_montgomery.S +0 -79
  136. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_caddq_asm.S +0 -53
  137. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_chknorm_asm.S +0 -55
  138. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_decompose_32_asm.S +0 -85
  139. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_decompose_88_asm.S +0 -85
  140. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_use_hint_32_asm.S +0 -102
  141. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/poly_use_hint_88_asm.S +0 -110
  142. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_17_asm.S +0 -72
  143. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/polyz_unpack_19_asm.S +0 -69
  144. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_asm.S +0 -189
  145. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta2_asm.S +0 -135
  146. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/aarch64/src/rej_uniform_eta4_asm.S +0 -128
  147. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/intt.S +0 -2311
  148. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/ntt.S +0 -2383
  149. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/nttunpack.S +0 -239
  150. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise.S +0 -131
  151. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_acc_l4.S +0 -139
  152. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_acc_l5.S +0 -155
  153. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/pointwise_acc_l7.S +0 -187
  154. data/ext/pqcrypto/vendor/mldsa-native/mldsa/src/native/x86_64/src/poly_caddq_avx2.c +0 -61
@@ -1,129 +0,0 @@
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- /* Copyright (c) The mldsa-native project authors
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- * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
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- */
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-
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- #include "../../../common.h"
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- #if defined(MLD_ARITH_BACKEND_AARCH64) && !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
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- (defined(MLD_CONFIG_MULTILEVEL_WITH_SHARED) || MLDSA_L == 4)
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-
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- /*
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- * WARNING: This file is auto-derived from the mldsa-native source file
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- * dev/aarch64_opt/src/mld_polyvecl_pointwise_acc_montgomery_l4.S using scripts/simpasm. Do not modify it directly.
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- */
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-
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- #if defined(__ELF__)
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- .section .note.GNU-stack,"",@progbits
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- #endif
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-
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- .text
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- .balign 4
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- .global MLD_ASM_NAMESPACE(polyvecl_pointwise_acc_montgomery_l4_asm)
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- MLD_ASM_FN_SYMBOL(polyvecl_pointwise_acc_montgomery_l4_asm)
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-
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- .cfi_startproc
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- mov w3, #0xe001 // =57345
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- movk w3, #0x7f, lsl #16
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- dup v0.4s, w3
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- mov w3, #0x2001 // =8193
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- movk w3, #0x380, lsl #16
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- dup v1.4s, w3
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- mov x3, #0x40 // =64
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-
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- Lpolyvecl_pointwise_acc_montgomery_l4_loop_start:
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- ldr q17, [x1, #0x10]
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- ldr q18, [x1, #0x20]
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- ldr q19, [x1, #0x30]
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- ldr q16, [x1], #0x40
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- ldr q21, [x2, #0x10]
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- ldr q22, [x2, #0x20]
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- ldr q23, [x2, #0x30]
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- ldr q20, [x2], #0x40
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- smull v24.2d, v16.2s, v20.2s
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- smull2 v25.2d, v16.4s, v20.4s
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- smull v26.2d, v17.2s, v21.2s
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- smull2 v27.2d, v17.4s, v21.4s
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- smull v28.2d, v18.2s, v22.2s
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- smull2 v29.2d, v18.4s, v22.4s
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- smull v30.2d, v19.2s, v23.2s
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- smull2 v31.2d, v19.4s, v23.4s
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- ldr q16, [x1, #0x3c0]
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- ldr q17, [x1, #0x3d0]
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- ldr q18, [x1, #0x3e0]
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- ldr q19, [x1, #0x3f0]
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- ldr q20, [x2, #0x3c0]
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- ldr q21, [x2, #0x3d0]
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- ldr q22, [x2, #0x3e0]
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- ldr q23, [x2, #0x3f0]
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- smlal v24.2d, v16.2s, v20.2s
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- smlal2 v25.2d, v16.4s, v20.4s
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- smlal v26.2d, v17.2s, v21.2s
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- smlal2 v27.2d, v17.4s, v21.4s
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- smlal v28.2d, v18.2s, v22.2s
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- smlal2 v29.2d, v18.4s, v22.4s
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- smlal v30.2d, v19.2s, v23.2s
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- smlal2 v31.2d, v19.4s, v23.4s
65
- ldr q16, [x1, #0x7c0]
66
- ldr q17, [x1, #0x7d0]
67
- ldr q18, [x1, #0x7e0]
68
- ldr q19, [x1, #0x7f0]
69
- ldr q20, [x2, #0x7c0]
70
- ldr q21, [x2, #0x7d0]
71
- ldr q22, [x2, #0x7e0]
72
- ldr q23, [x2, #0x7f0]
73
- smlal v24.2d, v16.2s, v20.2s
74
- smlal2 v25.2d, v16.4s, v20.4s
75
- smlal v26.2d, v17.2s, v21.2s
76
- smlal2 v27.2d, v17.4s, v21.4s
77
- smlal v28.2d, v18.2s, v22.2s
78
- smlal2 v29.2d, v18.4s, v22.4s
79
- smlal v30.2d, v19.2s, v23.2s
80
- smlal2 v31.2d, v19.4s, v23.4s
81
- ldr q16, [x1, #0xbc0]
82
- ldr q17, [x1, #0xbd0]
83
- ldr q18, [x1, #0xbe0]
84
- ldr q19, [x1, #0xbf0]
85
- ldr q20, [x2, #0xbc0]
86
- ldr q21, [x2, #0xbd0]
87
- ldr q22, [x2, #0xbe0]
88
- ldr q23, [x2, #0xbf0]
89
- smlal v24.2d, v16.2s, v20.2s
90
- smlal2 v25.2d, v16.4s, v20.4s
91
- smlal v26.2d, v17.2s, v21.2s
92
- smlal2 v27.2d, v17.4s, v21.4s
93
- smlal v28.2d, v18.2s, v22.2s
94
- smlal2 v29.2d, v18.4s, v22.4s
95
- smlal v30.2d, v19.2s, v23.2s
96
- smlal2 v31.2d, v19.4s, v23.4s
97
- uzp1 v16.4s, v24.4s, v25.4s
98
- mul v16.4s, v16.4s, v1.4s
99
- smlsl v24.2d, v16.2s, v0.2s
100
- smlsl2 v25.2d, v16.4s, v0.4s
101
- uzp2 v16.4s, v24.4s, v25.4s
102
- uzp1 v17.4s, v26.4s, v27.4s
103
- mul v17.4s, v17.4s, v1.4s
104
- smlsl v26.2d, v17.2s, v0.2s
105
- smlsl2 v27.2d, v17.4s, v0.4s
106
- uzp2 v17.4s, v26.4s, v27.4s
107
- uzp1 v18.4s, v28.4s, v29.4s
108
- mul v18.4s, v18.4s, v1.4s
109
- smlsl v28.2d, v18.2s, v0.2s
110
- smlsl2 v29.2d, v18.4s, v0.4s
111
- uzp2 v18.4s, v28.4s, v29.4s
112
- uzp1 v19.4s, v30.4s, v31.4s
113
- mul v19.4s, v19.4s, v1.4s
114
- smlsl v30.2d, v19.2s, v0.2s
115
- smlsl2 v31.2d, v19.4s, v0.4s
116
- uzp2 v19.4s, v30.4s, v31.4s
117
- str q17, [x0, #0x10]
118
- str q18, [x0, #0x20]
119
- str q19, [x0, #0x30]
120
- str q16, [x0], #0x40
121
- subs x3, x3, #0x4
122
- cbnz x3, Lpolyvecl_pointwise_acc_montgomery_l4_loop_start
123
- ret
124
- .cfi_endproc
125
-
126
- MLD_ASM_FN_SIZE(polyvecl_pointwise_acc_montgomery_l4_asm)
127
-
128
- #endif /* MLD_ARITH_BACKEND_AARCH64 && !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
129
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_L == 4) */
@@ -1,145 +0,0 @@
1
- /* Copyright (c) The mldsa-native project authors
2
- * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
3
- */
4
-
5
- #include "../../../common.h"
6
- #if defined(MLD_ARITH_BACKEND_AARCH64) && !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
7
- (defined(MLD_CONFIG_MULTILEVEL_WITH_SHARED) || MLDSA_L == 5)
8
-
9
- /*
10
- * WARNING: This file is auto-derived from the mldsa-native source file
11
- * dev/aarch64_opt/src/mld_polyvecl_pointwise_acc_montgomery_l5.S using scripts/simpasm. Do not modify it directly.
12
- */
13
-
14
- #if defined(__ELF__)
15
- .section .note.GNU-stack,"",@progbits
16
- #endif
17
-
18
- .text
19
- .balign 4
20
- .global MLD_ASM_NAMESPACE(polyvecl_pointwise_acc_montgomery_l5_asm)
21
- MLD_ASM_FN_SYMBOL(polyvecl_pointwise_acc_montgomery_l5_asm)
22
-
23
- .cfi_startproc
24
- mov w3, #0xe001 // =57345
25
- movk w3, #0x7f, lsl #16
26
- dup v0.4s, w3
27
- mov w3, #0x2001 // =8193
28
- movk w3, #0x380, lsl #16
29
- dup v1.4s, w3
30
- mov x3, #0x40 // =64
31
-
32
- Lpolyvecl_pointwise_acc_montgomery_l5_loop_start:
33
- ldr q17, [x1, #0x10]
34
- ldr q18, [x1, #0x20]
35
- ldr q19, [x1, #0x30]
36
- ldr q16, [x1], #0x40
37
- ldr q21, [x2, #0x10]
38
- ldr q22, [x2, #0x20]
39
- ldr q23, [x2, #0x30]
40
- ldr q20, [x2], #0x40
41
- smull v24.2d, v16.2s, v20.2s
42
- smull2 v25.2d, v16.4s, v20.4s
43
- smull v26.2d, v17.2s, v21.2s
44
- smull2 v27.2d, v17.4s, v21.4s
45
- smull v28.2d, v18.2s, v22.2s
46
- smull2 v29.2d, v18.4s, v22.4s
47
- smull v30.2d, v19.2s, v23.2s
48
- smull2 v31.2d, v19.4s, v23.4s
49
- ldr q16, [x1, #0x3c0]
50
- ldr q17, [x1, #0x3d0]
51
- ldr q18, [x1, #0x3e0]
52
- ldr q19, [x1, #0x3f0]
53
- ldr q20, [x2, #0x3c0]
54
- ldr q21, [x2, #0x3d0]
55
- ldr q22, [x2, #0x3e0]
56
- ldr q23, [x2, #0x3f0]
57
- smlal v24.2d, v16.2s, v20.2s
58
- smlal2 v25.2d, v16.4s, v20.4s
59
- smlal v26.2d, v17.2s, v21.2s
60
- smlal2 v27.2d, v17.4s, v21.4s
61
- smlal v28.2d, v18.2s, v22.2s
62
- smlal2 v29.2d, v18.4s, v22.4s
63
- smlal v30.2d, v19.2s, v23.2s
64
- smlal2 v31.2d, v19.4s, v23.4s
65
- ldr q16, [x1, #0x7c0]
66
- ldr q17, [x1, #0x7d0]
67
- ldr q18, [x1, #0x7e0]
68
- ldr q19, [x1, #0x7f0]
69
- ldr q20, [x2, #0x7c0]
70
- ldr q21, [x2, #0x7d0]
71
- ldr q22, [x2, #0x7e0]
72
- ldr q23, [x2, #0x7f0]
73
- smlal v24.2d, v16.2s, v20.2s
74
- smlal2 v25.2d, v16.4s, v20.4s
75
- smlal v26.2d, v17.2s, v21.2s
76
- smlal2 v27.2d, v17.4s, v21.4s
77
- smlal v28.2d, v18.2s, v22.2s
78
- smlal2 v29.2d, v18.4s, v22.4s
79
- smlal v30.2d, v19.2s, v23.2s
80
- smlal2 v31.2d, v19.4s, v23.4s
81
- ldr q16, [x1, #0xbc0]
82
- ldr q17, [x1, #0xbd0]
83
- ldr q18, [x1, #0xbe0]
84
- ldr q19, [x1, #0xbf0]
85
- ldr q20, [x2, #0xbc0]
86
- ldr q21, [x2, #0xbd0]
87
- ldr q22, [x2, #0xbe0]
88
- ldr q23, [x2, #0xbf0]
89
- smlal v24.2d, v16.2s, v20.2s
90
- smlal2 v25.2d, v16.4s, v20.4s
91
- smlal v26.2d, v17.2s, v21.2s
92
- smlal2 v27.2d, v17.4s, v21.4s
93
- smlal v28.2d, v18.2s, v22.2s
94
- smlal2 v29.2d, v18.4s, v22.4s
95
- smlal v30.2d, v19.2s, v23.2s
96
- smlal2 v31.2d, v19.4s, v23.4s
97
- ldr q16, [x1, #0xfc0]
98
- ldr q17, [x1, #0xfd0]
99
- ldr q18, [x1, #0xfe0]
100
- ldr q19, [x1, #0xff0]
101
- ldr q20, [x2, #0xfc0]
102
- ldr q21, [x2, #0xfd0]
103
- ldr q22, [x2, #0xfe0]
104
- ldr q23, [x2, #0xff0]
105
- smlal v24.2d, v16.2s, v20.2s
106
- smlal2 v25.2d, v16.4s, v20.4s
107
- smlal v26.2d, v17.2s, v21.2s
108
- smlal2 v27.2d, v17.4s, v21.4s
109
- smlal v28.2d, v18.2s, v22.2s
110
- smlal2 v29.2d, v18.4s, v22.4s
111
- smlal v30.2d, v19.2s, v23.2s
112
- smlal2 v31.2d, v19.4s, v23.4s
113
- uzp1 v16.4s, v24.4s, v25.4s
114
- mul v16.4s, v16.4s, v1.4s
115
- smlsl v24.2d, v16.2s, v0.2s
116
- smlsl2 v25.2d, v16.4s, v0.4s
117
- uzp2 v16.4s, v24.4s, v25.4s
118
- uzp1 v17.4s, v26.4s, v27.4s
119
- mul v17.4s, v17.4s, v1.4s
120
- smlsl v26.2d, v17.2s, v0.2s
121
- smlsl2 v27.2d, v17.4s, v0.4s
122
- uzp2 v17.4s, v26.4s, v27.4s
123
- uzp1 v18.4s, v28.4s, v29.4s
124
- mul v18.4s, v18.4s, v1.4s
125
- smlsl v28.2d, v18.2s, v0.2s
126
- smlsl2 v29.2d, v18.4s, v0.4s
127
- uzp2 v18.4s, v28.4s, v29.4s
128
- uzp1 v19.4s, v30.4s, v31.4s
129
- mul v19.4s, v19.4s, v1.4s
130
- smlsl v30.2d, v19.2s, v0.2s
131
- smlsl2 v31.2d, v19.4s, v0.4s
132
- uzp2 v19.4s, v30.4s, v31.4s
133
- str q17, [x0, #0x10]
134
- str q18, [x0, #0x20]
135
- str q19, [x0, #0x30]
136
- str q16, [x0], #0x40
137
- subs x3, x3, #0x4
138
- cbnz x3, Lpolyvecl_pointwise_acc_montgomery_l5_loop_start
139
- ret
140
- .cfi_endproc
141
-
142
- MLD_ASM_FN_SIZE(polyvecl_pointwise_acc_montgomery_l5_asm)
143
-
144
- #endif /* MLD_ARITH_BACKEND_AARCH64 && !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
145
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_L == 5) */
@@ -1,177 +0,0 @@
1
- /* Copyright (c) The mldsa-native project authors
2
- * SPDX-License-Identifier: Apache-2.0 OR ISC OR MIT
3
- */
4
-
5
- #include "../../../common.h"
6
- #if defined(MLD_ARITH_BACKEND_AARCH64) && !defined(MLD_CONFIG_MULTILEVEL_NO_SHARED) && \
7
- (defined(MLD_CONFIG_MULTILEVEL_WITH_SHARED) || MLDSA_L == 7)
8
-
9
- /*
10
- * WARNING: This file is auto-derived from the mldsa-native source file
11
- * dev/aarch64_opt/src/mld_polyvecl_pointwise_acc_montgomery_l7.S using scripts/simpasm. Do not modify it directly.
12
- */
13
-
14
- #if defined(__ELF__)
15
- .section .note.GNU-stack,"",@progbits
16
- #endif
17
-
18
- .text
19
- .balign 4
20
- .global MLD_ASM_NAMESPACE(polyvecl_pointwise_acc_montgomery_l7_asm)
21
- MLD_ASM_FN_SYMBOL(polyvecl_pointwise_acc_montgomery_l7_asm)
22
-
23
- .cfi_startproc
24
- mov w3, #0xe001 // =57345
25
- movk w3, #0x7f, lsl #16
26
- dup v0.4s, w3
27
- mov w3, #0x2001 // =8193
28
- movk w3, #0x380, lsl #16
29
- dup v1.4s, w3
30
- mov x3, #0x40 // =64
31
-
32
- Lpolyvecl_pointwise_acc_montgomery_l7_loop_start:
33
- ldr q17, [x1, #0x10]
34
- ldr q18, [x1, #0x20]
35
- ldr q19, [x1, #0x30]
36
- ldr q16, [x1], #0x40
37
- ldr q21, [x2, #0x10]
38
- ldr q22, [x2, #0x20]
39
- ldr q23, [x2, #0x30]
40
- ldr q20, [x2], #0x40
41
- smull v24.2d, v16.2s, v20.2s
42
- smull2 v25.2d, v16.4s, v20.4s
43
- smull v26.2d, v17.2s, v21.2s
44
- smull2 v27.2d, v17.4s, v21.4s
45
- smull v28.2d, v18.2s, v22.2s
46
- smull2 v29.2d, v18.4s, v22.4s
47
- smull v30.2d, v19.2s, v23.2s
48
- smull2 v31.2d, v19.4s, v23.4s
49
- ldr q16, [x1, #0x3c0]
50
- ldr q17, [x1, #0x3d0]
51
- ldr q18, [x1, #0x3e0]
52
- ldr q19, [x1, #0x3f0]
53
- ldr q20, [x2, #0x3c0]
54
- ldr q21, [x2, #0x3d0]
55
- ldr q22, [x2, #0x3e0]
56
- ldr q23, [x2, #0x3f0]
57
- smlal v24.2d, v16.2s, v20.2s
58
- smlal2 v25.2d, v16.4s, v20.4s
59
- smlal v26.2d, v17.2s, v21.2s
60
- smlal2 v27.2d, v17.4s, v21.4s
61
- smlal v28.2d, v18.2s, v22.2s
62
- smlal2 v29.2d, v18.4s, v22.4s
63
- smlal v30.2d, v19.2s, v23.2s
64
- smlal2 v31.2d, v19.4s, v23.4s
65
- ldr q16, [x1, #0x7c0]
66
- ldr q17, [x1, #0x7d0]
67
- ldr q18, [x1, #0x7e0]
68
- ldr q19, [x1, #0x7f0]
69
- ldr q20, [x2, #0x7c0]
70
- ldr q21, [x2, #0x7d0]
71
- ldr q22, [x2, #0x7e0]
72
- ldr q23, [x2, #0x7f0]
73
- smlal v24.2d, v16.2s, v20.2s
74
- smlal2 v25.2d, v16.4s, v20.4s
75
- smlal v26.2d, v17.2s, v21.2s
76
- smlal2 v27.2d, v17.4s, v21.4s
77
- smlal v28.2d, v18.2s, v22.2s
78
- smlal2 v29.2d, v18.4s, v22.4s
79
- smlal v30.2d, v19.2s, v23.2s
80
- smlal2 v31.2d, v19.4s, v23.4s
81
- ldr q16, [x1, #0xbc0]
82
- ldr q17, [x1, #0xbd0]
83
- ldr q18, [x1, #0xbe0]
84
- ldr q19, [x1, #0xbf0]
85
- ldr q20, [x2, #0xbc0]
86
- ldr q21, [x2, #0xbd0]
87
- ldr q22, [x2, #0xbe0]
88
- ldr q23, [x2, #0xbf0]
89
- smlal v24.2d, v16.2s, v20.2s
90
- smlal2 v25.2d, v16.4s, v20.4s
91
- smlal v26.2d, v17.2s, v21.2s
92
- smlal2 v27.2d, v17.4s, v21.4s
93
- smlal v28.2d, v18.2s, v22.2s
94
- smlal2 v29.2d, v18.4s, v22.4s
95
- smlal v30.2d, v19.2s, v23.2s
96
- smlal2 v31.2d, v19.4s, v23.4s
97
- ldr q16, [x1, #0xfc0]
98
- ldr q17, [x1, #0xfd0]
99
- ldr q18, [x1, #0xfe0]
100
- ldr q19, [x1, #0xff0]
101
- ldr q20, [x2, #0xfc0]
102
- ldr q21, [x2, #0xfd0]
103
- ldr q22, [x2, #0xfe0]
104
- ldr q23, [x2, #0xff0]
105
- smlal v24.2d, v16.2s, v20.2s
106
- smlal2 v25.2d, v16.4s, v20.4s
107
- smlal v26.2d, v17.2s, v21.2s
108
- smlal2 v27.2d, v17.4s, v21.4s
109
- smlal v28.2d, v18.2s, v22.2s
110
- smlal2 v29.2d, v18.4s, v22.4s
111
- smlal v30.2d, v19.2s, v23.2s
112
- smlal2 v31.2d, v19.4s, v23.4s
113
- ldr q16, [x1, #0x13c0]
114
- ldr q17, [x1, #0x13d0]
115
- ldr q18, [x1, #0x13e0]
116
- ldr q19, [x1, #0x13f0]
117
- ldr q20, [x2, #0x13c0]
118
- ldr q21, [x2, #0x13d0]
119
- ldr q22, [x2, #0x13e0]
120
- ldr q23, [x2, #0x13f0]
121
- smlal v24.2d, v16.2s, v20.2s
122
- smlal2 v25.2d, v16.4s, v20.4s
123
- smlal v26.2d, v17.2s, v21.2s
124
- smlal2 v27.2d, v17.4s, v21.4s
125
- smlal v28.2d, v18.2s, v22.2s
126
- smlal2 v29.2d, v18.4s, v22.4s
127
- smlal v30.2d, v19.2s, v23.2s
128
- smlal2 v31.2d, v19.4s, v23.4s
129
- ldr q16, [x1, #0x17c0]
130
- ldr q17, [x1, #0x17d0]
131
- ldr q18, [x1, #0x17e0]
132
- ldr q19, [x1, #0x17f0]
133
- ldr q20, [x2, #0x17c0]
134
- ldr q21, [x2, #0x17d0]
135
- ldr q22, [x2, #0x17e0]
136
- ldr q23, [x2, #0x17f0]
137
- smlal v24.2d, v16.2s, v20.2s
138
- smlal2 v25.2d, v16.4s, v20.4s
139
- smlal v26.2d, v17.2s, v21.2s
140
- smlal2 v27.2d, v17.4s, v21.4s
141
- smlal v28.2d, v18.2s, v22.2s
142
- smlal2 v29.2d, v18.4s, v22.4s
143
- smlal v30.2d, v19.2s, v23.2s
144
- smlal2 v31.2d, v19.4s, v23.4s
145
- uzp1 v16.4s, v24.4s, v25.4s
146
- mul v16.4s, v16.4s, v1.4s
147
- smlsl v24.2d, v16.2s, v0.2s
148
- smlsl2 v25.2d, v16.4s, v0.4s
149
- uzp2 v16.4s, v24.4s, v25.4s
150
- uzp1 v17.4s, v26.4s, v27.4s
151
- mul v17.4s, v17.4s, v1.4s
152
- smlsl v26.2d, v17.2s, v0.2s
153
- smlsl2 v27.2d, v17.4s, v0.4s
154
- uzp2 v17.4s, v26.4s, v27.4s
155
- uzp1 v18.4s, v28.4s, v29.4s
156
- mul v18.4s, v18.4s, v1.4s
157
- smlsl v28.2d, v18.2s, v0.2s
158
- smlsl2 v29.2d, v18.4s, v0.4s
159
- uzp2 v18.4s, v28.4s, v29.4s
160
- uzp1 v19.4s, v30.4s, v31.4s
161
- mul v19.4s, v19.4s, v1.4s
162
- smlsl v30.2d, v19.2s, v0.2s
163
- smlsl2 v31.2d, v19.4s, v0.4s
164
- uzp2 v19.4s, v30.4s, v31.4s
165
- str q17, [x0, #0x10]
166
- str q18, [x0, #0x20]
167
- str q19, [x0, #0x30]
168
- str q16, [x0], #0x40
169
- subs x3, x3, #0x4
170
- cbnz x3, Lpolyvecl_pointwise_acc_montgomery_l7_loop_start
171
- ret
172
- .cfi_endproc
173
-
174
- MLD_ASM_FN_SIZE(polyvecl_pointwise_acc_montgomery_l7_asm)
175
-
176
- #endif /* MLD_ARITH_BACKEND_AARCH64 && !MLD_CONFIG_MULTILEVEL_NO_SHARED && \
177
- (MLD_CONFIG_MULTILEVEL_WITH_SHARED || MLDSA_L == 7) */