passenger 5.0.24 → 5.0.25

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/gcc-armv6plus.hpp

@@ -1,252 +0,0 @@
-#ifndef BOOST_ATOMIC_DETAIL_GCC_ARMV6PLUS_HPP
-#define BOOST_ATOMIC_DETAIL_GCC_ARMV6PLUS_HPP
-
-//  Distributed under the Boost Software License, Version 1.0.
-//  See accompanying file LICENSE_1_0.txt or copy at
-//  http://www.boost.org/LICENSE_1_0.txt)
-//
-//  Copyright (c) 2009 Helge Bahmann
-//  Copyright (c) 2009 Phil Endecott
-//  Copyright (c) 2013 Tim Blechmann
-//  ARM Code by Phil Endecott, based on other architectures.
-
-#include <cstddef>
-#include <boost/cstdint.hpp>
-#include <boost/atomic/detail/config.hpp>
-
-#ifdef BOOST_ATOMIC_HAS_PRAGMA_ONCE
-#pragma once
-#endif
-
-// From the ARM Architecture Reference Manual for architecture v6:
-//
-// LDREX{<cond>} <Rd>, [<Rn>]
-// <Rd> Specifies the destination register for the memory word addressed by <Rd>
-// <Rn> Specifies the register containing the address.
-//
-// STREX{<cond>} <Rd>, <Rm>, [<Rn>]
-// <Rd> Specifies the destination register for the returned status value.
-//      0  if the operation updates memory
-//      1  if the operation fails to update memory
-// <Rm> Specifies the register containing the word to be stored to memory.
-// <Rn> Specifies the register containing the address.
-// Rd must not be the same register as Rm or Rn.
-//
-// ARM v7 is like ARM v6 plus:
-// There are half-word and byte versions of the LDREX and STREX instructions,
-// LDREXH, LDREXB, STREXH and STREXB.
-// There are also double-word versions, LDREXD and STREXD.
-// (Actually it looks like these are available from version 6k onwards.)
-// FIXME these are not yet used; should be mostly a matter of copy-and-paste.
-// I think you can supply an immediate offset to the address.
-//
-// A memory barrier is effected using a "co-processor 15" instruction,
-// though a separate assembler mnemonic is available for it in v7.
-
-namespace boost {
-namespace atomics {
-namespace detail {
-
-// "Thumb 1" is a subset of the ARM instruction set that uses a 16-bit encoding.  It
-// doesn't include all instructions and in particular it doesn't include the co-processor
-// instruction used for the memory barrier or the load-locked/store-conditional
-// instructions.  So, if we're compiling in "Thumb 1" mode, we need to wrap all of our
-// asm blocks with code to temporarily change to ARM mode.
-//
-// You can only change between ARM and Thumb modes when branching using the bx instruction.
-// bx takes an address specified in a register.  The least significant bit of the address
-// indicates the mode, so 1 is added to indicate that the destination code is Thumb.
-// A temporary register is needed for the address and is passed as an argument to these
-// macros.  It must be one of the "low" registers accessible to Thumb code, specified
-// using the "l" attribute in the asm statement.
-//
-// Architecture v7 introduces "Thumb 2", which does include (almost?) all of the ARM
-// instruction set.  So in v7 we don't need to change to ARM mode; we can write "universal
-// assembler" which will assemble to Thumb 2 or ARM code as appropriate.  The only thing
-// we need to do to make this "universal" assembler mode work is to insert "IT" instructions
-// to annotate the conditional instructions.  These are ignored in other modes (e.g. v6),
-// so they can always be present.
-
-#if defined(__thumb__) && !defined(__ARM_ARCH_7A__)
-// FIXME also other v7 variants.
-#define BOOST_ATOMIC_ARM_ASM_START(TMPREG) "adr " #TMPREG ", 1f\n" "bx " #TMPREG "\n" ".arm\n" ".align 4\n" "1: "
-#define BOOST_ATOMIC_ARM_ASM_END(TMPREG)   "adr " #TMPREG ", 1f + 1\n" "bx " #TMPREG "\n" ".thumb\n" ".align 2\n" "1: "
-
-#else
-// The tmpreg is wasted in this case, which is non-optimal.
-#define BOOST_ATOMIC_ARM_ASM_START(TMPREG)
-#define BOOST_ATOMIC_ARM_ASM_END(TMPREG)
-#endif
-
-#if defined(__ARM_ARCH_7A__)
-// FIXME ditto.
-#define BOOST_ATOMIC_ARM_DMB "dmb\n"
-#else
-#define BOOST_ATOMIC_ARM_DMB "mcr\tp15, 0, r0, c7, c10, 5\n"
-#endif
-
-inline void
-arm_barrier(void)
-{
-    int brtmp;
-    __asm__ __volatile__ (
-        BOOST_ATOMIC_ARM_ASM_START(%0)
-        BOOST_ATOMIC_ARM_DMB
-        BOOST_ATOMIC_ARM_ASM_END(%0)
-        : "=&l" (brtmp) :: "memory"
-    );
-}
-
-inline void
-platform_fence_before(memory_order order)
-{
-    switch(order) {
-        case memory_order_release:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            arm_barrier();
-        case memory_order_consume:
-        default:;
-    }
-}
-
-inline void
-platform_fence_after(memory_order order)
-{
-    switch(order) {
-        case memory_order_acquire:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            arm_barrier();
-        default:;
-    }
-}
-
-inline void
-platform_fence_before_store(memory_order order)
-{
-    platform_fence_before(order);
-}
-
-inline void
-platform_fence_after_store(memory_order order)
-{
-    if (order == memory_order_seq_cst)
-        arm_barrier();
-}
-
-inline void
-platform_fence_after_load(memory_order order)
-{
-    platform_fence_after(order);
-}
-
-template<typename T>
-inline bool
-platform_cmpxchg32(T & expected, T desired, volatile T * ptr)
-{
-    int success;
-    int tmp;
-    __asm__ (
-        BOOST_ATOMIC_ARM_ASM_START(%2)
-        "mov     %1, #0\n"        // success = 0
-        "ldrex   %0, %3\n"      // expected' = *(&i)
-        "teq     %0, %4\n"        // flags = expected'==expected
-        "ittt    eq\n"
-        "strexeq %2, %5, %3\n"  // if (flags.equal) *(&i) = desired, tmp = !OK
-        "teqeq   %2, #0\n"        // if (flags.equal) flags = tmp==0
-        "moveq   %1, #1\n"        // if (flags.equal) success = 1
-        BOOST_ATOMIC_ARM_ASM_END(%2)
-            : "=&r" (expected),  // %0
-            "=&r" (success),   // %1
-            "=&l" (tmp),       // %2
-            "+Q" (*ptr)          // %3
-            : "r" (expected),    // %4
-            "r" (desired) // %5
-            : "cc"
-        );
-    return success;
-}
-
-}
-}
-
-#define BOOST_ATOMIC_THREAD_FENCE 2
-inline void
-atomic_thread_fence(memory_order order)
-{
-    switch(order) {
-        case memory_order_acquire:
-        case memory_order_release:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            atomics::detail::arm_barrier();
-        default:;
-    }
-}
-
-#define BOOST_ATOMIC_SIGNAL_FENCE 2
-inline void
-atomic_signal_fence(memory_order)
-{
-    __asm__ __volatile__ ("" ::: "memory");
-}
-
-class atomic_flag
-{
-private:
-    atomic_flag(const atomic_flag &) /* = delete */ ;
-    atomic_flag & operator=(const atomic_flag &) /* = delete */ ;
-    uint32_t v_;
-public:
-    BOOST_CONSTEXPR atomic_flag(void) BOOST_NOEXCEPT : v_(0) {}
-
-    void
-    clear(memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        atomics::detail::platform_fence_before_store(order);
-        const_cast<volatile uint32_t &>(v_) = 0;
-        atomics::detail::platform_fence_after_store(order);
-    }
-
-    bool
-    test_and_set(memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        atomics::detail::platform_fence_before(order);
-        uint32_t expected = v_;
-        do {
-            if (expected == 1)
-                break;
-        } while (!atomics::detail::platform_cmpxchg32(expected, (uint32_t)1, &v_));
-        atomics::detail::platform_fence_after(order);
-        return expected;
-    }
-};
-#define BOOST_ATOMIC_FLAG_LOCK_FREE 2
-
-}
-
-#undef BOOST_ATOMIC_ARM_ASM_START
-#undef BOOST_ATOMIC_ARM_ASM_END
-
-#include <boost/atomic/detail/base.hpp>
-
-#if !defined(BOOST_ATOMIC_FORCE_FALLBACK)
-
-#define BOOST_ATOMIC_CHAR_LOCK_FREE 2
-#define BOOST_ATOMIC_CHAR16_T_LOCK_FREE 2
-#define BOOST_ATOMIC_CHAR32_T_LOCK_FREE 2
-#define BOOST_ATOMIC_WCHAR_T_LOCK_FREE 2
-#define BOOST_ATOMIC_SHORT_LOCK_FREE 2
-#define BOOST_ATOMIC_INT_LOCK_FREE 2
-#define BOOST_ATOMIC_LONG_LOCK_FREE 2
-#define BOOST_ATOMIC_LLONG_LOCK_FREE 0
-#define BOOST_ATOMIC_POINTER_LOCK_FREE 2
-#define BOOST_ATOMIC_BOOL_LOCK_FREE 2
-
-#include <boost/atomic/detail/cas32weak.hpp>
-
-#endif /* !defined(BOOST_ATOMIC_FORCE_FALLBACK) */
-
-#endif
-

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/gcc-cas.hpp

@@ -1,157 +0,0 @@
-//  Copyright (c) 2011 Helge Bahmann
-//  Copyright (c) 2013 Tim Blechmann
-//
-//  Distributed under the Boost Software License, Version 1.0.
-//  See accompanying file LICENSE_1_0.txt or copy at
-//  http://www.boost.org/LICENSE_1_0.txt)
-
-// Use the gnu builtin __sync_val_compare_and_swap to build
-// atomic operations for 32 bit and smaller.
-
-#ifndef BOOST_ATOMIC_DETAIL_GENERIC_CAS_HPP
-#define BOOST_ATOMIC_DETAIL_GENERIC_CAS_HPP
-
-#include <cstddef>
-#include <boost/cstdint.hpp>
-#include <boost/atomic/detail/config.hpp>
-
-#ifdef BOOST_ATOMIC_HAS_PRAGMA_ONCE
-#pragma once
-#endif
-
-namespace boost {
-
-#define BOOST_ATOMIC_THREAD_FENCE 2
-inline void
-atomic_thread_fence(memory_order order)
-{
-    switch(order) {
-        case memory_order_relaxed:
-            break;
-        case memory_order_release:
-        case memory_order_consume:
-        case memory_order_acquire:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            __sync_synchronize();
-            break;
-    }
-}
-
-namespace atomics {
-namespace detail {
-
-inline void
-platform_fence_before(memory_order)
-{
-    /* empty, as compare_and_swap is synchronizing already */
-}
-
-inline void
-platform_fence_after(memory_order)
-{
-    /* empty, as compare_and_swap is synchronizing already */
-}
-
-inline void
-platform_fence_before_store(memory_order order)
-{
-    switch(order) {
-        case memory_order_relaxed:
-        case memory_order_acquire:
-        case memory_order_consume:
-            break;
-        case memory_order_release:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            __sync_synchronize();
-            break;
-    }
-}
-
-inline void
-platform_fence_after_store(memory_order order)
-{
-    if (order == memory_order_seq_cst)
-        __sync_synchronize();
-}
-
-inline void
-platform_fence_after_load(memory_order order)
-{
-    switch(order) {
-        case memory_order_relaxed:
-        case memory_order_release:
-            break;
-        case memory_order_consume:
-        case memory_order_acquire:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            __sync_synchronize();
-            break;
-    }
-}
-
-template<typename T>
-inline bool
-platform_cmpxchg32_strong(T & expected, T desired, volatile T * ptr)
-{
-    T found = __sync_val_compare_and_swap(ptr, expected, desired);
-    bool success = (found == expected);
-    expected = found;
-    return success;
-}
-
-class atomic_flag
-{
-private:
-    atomic_flag(const atomic_flag &) /* = delete */ ;
-    atomic_flag & operator=(const atomic_flag &) /* = delete */ ;
-    uint32_t v_;
-public:
-    BOOST_CONSTEXPR atomic_flag(void) BOOST_NOEXCEPT : v_(0) {}
-
-    void
-    clear(memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        atomics::detail::platform_fence_before_store(order);
-        const_cast<volatile uint32_t &>(v_) = 0;
-        atomics::detail::platform_fence_after_store(order);
-    }
-
-    bool
-    test_and_set(memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        atomics::detail::platform_fence_before(order);
-        uint32_t expected = v_;
-        do {
-            if (expected == 1)
-                break;
-        } while (!atomics::detail::platform_cmpxchg32(expected, (uint32_t)1, &v_));
-        atomics::detail::platform_fence_after(order);
-        return expected;
-    }
-};
-#define BOOST_ATOMIC_FLAG_LOCK_FREE 2
-
-}
-}
-}
-
-#include <boost/atomic/detail/base.hpp>
-
-#if !defined(BOOST_ATOMIC_FORCE_FALLBACK)
-
-#define BOOST_ATOMIC_CHAR_LOCK_FREE 2
-#define BOOST_ATOMIC_SHORT_LOCK_FREE 2
-#define BOOST_ATOMIC_INT_LOCK_FREE 2
-#define BOOST_ATOMIC_LONG_LOCK_FREE (sizeof(long) <= 4 ? 2 : 0)
-#define BOOST_ATOMIC_LLONG_LOCK_FREE (sizeof(long long) <= 4 ? 2 : 0)
-#define BOOST_ATOMIC_POINTER_LOCK_FREE (sizeof(void *) <= 4 ? 2 : 0)
-#define BOOST_ATOMIC_BOOL_LOCK_FREE 2
-
-#include <boost/atomic/detail/cas32strong.hpp>
-
-#endif /* !defined(BOOST_ATOMIC_FORCE_FALLBACK) */
-
-#endif

data/src/cxx_supportlib/vendor-modified/boost/atomic/detail/gcc-ppc.hpp

@@ -1,2850 +0,0 @@
-#ifndef BOOST_ATOMIC_DETAIL_GCC_PPC_HPP
-#define BOOST_ATOMIC_DETAIL_GCC_PPC_HPP
-
-//  Copyright (c) 2009 Helge Bahmann
-//  Copyright (c) 2013 Tim Blechmann
-//
-//  Distributed under the Boost Software License, Version 1.0.
-//  See accompanying file LICENSE_1_0.txt or copy at
-//  http://www.boost.org/LICENSE_1_0.txt)
-
-#include <cstddef>
-#include <boost/cstdint.hpp>
-#include <boost/atomic/detail/config.hpp>
-
-#ifdef BOOST_ATOMIC_HAS_PRAGMA_ONCE
-#pragma once
-#endif
-
-/*
-    Refer to: Motorola: "Programming Environments Manual for 32-Bit
-    Implementations of the PowerPC Architecture", Appendix E:
-    "Synchronization Programming Examples" for an explanation of what is
-    going on here (can be found on the web at various places by the
-    name "MPCFPE32B.pdf", Google is your friend...)
-
-    Most of the atomic operations map to instructions in a relatively
-    straight-forward fashion, but "load"s may at first glance appear
-    a bit strange as they map to:
-
-            lwz %rX, addr
-            cmpw %rX, %rX
-            bne- 1f
-        1:
-
-    That is, the CPU is forced to perform a branch that "formally" depends
-    on the value retrieved from memory. This scheme has an overhead of
-    about 1-2 clock cycles per load, but it allows to map "acquire" to
-    the "isync" instruction instead of "sync" uniformly and for all type
-    of atomic operations. Since "isync" has a cost of about 15 clock
-    cycles, while "sync" hast a cost of about 50 clock cycles, the small
-    penalty to atomic loads more than compensates for this.
-
-    Byte- and halfword-sized atomic values are realized by encoding the
-    value to be represented into a word, performing sign/zero extension
-    as appropriate. This means that after add/sub operations the value
-    needs fixing up to accurately preserve the wrap-around semantic of
-    the smaller type. (Nothing special needs to be done for the bit-wise
-    and the "exchange type" operators as the compiler already sees to
-    it that values carried in registers are extended appropriately and
-    everything falls into place naturally).
-
-    The register constraint "b"  instructs gcc to use any register
-    except r0; this is sometimes required because the encoding for
-    r0 is used to signify "constant zero" in a number of instructions,
-    making r0 unusable in this place. For simplicity this constraint
-    is used everywhere since I am to lazy to look this up on a
-    per-instruction basis, and ppc has enough registers for this not
-    to pose a problem.
-*/
-
-namespace boost {
-namespace atomics {
-namespace detail {
-
-inline void
-ppc_fence_before(memory_order order)
-{
-    switch(order) {
-        case memory_order_release:
-        case memory_order_acq_rel:
-#if defined(__powerpc64__)
-            __asm__ __volatile__ ("lwsync" ::: "memory");
-            break;
-#endif
-        case memory_order_seq_cst:
-            __asm__ __volatile__ ("sync" ::: "memory");
-        default:;
-    }
-}
-
-inline void
-ppc_fence_after(memory_order order)
-{
-    switch(order) {
-        case memory_order_acquire:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            __asm__ __volatile__ ("isync");
-        case memory_order_consume:
-            __asm__ __volatile__ ("" ::: "memory");
-        default:;
-    }
-}
-
-inline void
-ppc_fence_after_store(memory_order order)
-{
-    switch(order) {
-        case memory_order_seq_cst:
-            __asm__ __volatile__ ("sync");
-        default:;
-    }
-}
-
-}
-}
-
-class atomic_flag
-{
-private:
-    atomic_flag(const atomic_flag &) /* = delete */ ;
-    atomic_flag & operator=(const atomic_flag &) /* = delete */ ;
-    uint32_t v_;
-public:
-    BOOST_CONSTEXPR atomic_flag(void) BOOST_NOEXCEPT : v_(0) {}
-
-    void
-    clear(memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        atomics::detail::ppc_fence_before(order);
-        const_cast<volatile uint32_t &>(v_) = 0;
-        atomics::detail::ppc_fence_after_store(order);
-    }
-
-    bool
-    test_and_set(memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        uint32_t original;
-        atomics::detail::ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (1)
-            : "cr0"
-        );
-        atomics::detail::ppc_fence_after(order);
-        return original;
-    }
-};
-
-} /* namespace boost */
-
-#define BOOST_ATOMIC_FLAG_LOCK_FREE 2
-
-#include <boost/atomic/detail/base.hpp>
-
-#if !defined(BOOST_ATOMIC_FORCE_FALLBACK)
-
-#define BOOST_ATOMIC_CHAR_LOCK_FREE 2
-#define BOOST_ATOMIC_CHAR16_T_LOCK_FREE 2
-#define BOOST_ATOMIC_CHAR32_T_LOCK_FREE 2
-#define BOOST_ATOMIC_WCHAR_T_LOCK_FREE 2
-#define BOOST_ATOMIC_SHORT_LOCK_FREE 2
-#define BOOST_ATOMIC_INT_LOCK_FREE 2
-#define BOOST_ATOMIC_LONG_LOCK_FREE 2
-#define BOOST_ATOMIC_POINTER_LOCK_FREE 2
-#if defined(__powerpc64__)
-#define BOOST_ATOMIC_LLONG_LOCK_FREE 2
-#else
-#define BOOST_ATOMIC_LLONG_LOCK_FREE 0
-#endif
-#define BOOST_ATOMIC_BOOL_LOCK_FREE 2
-
-/* Would like to move the slow-path of failed compare_exchange
-(that clears the "success" bit) out-of-line. gcc can in
-principle do that using ".subsection"/".previous", but Apple's
-binutils seemingly does not understand that. Therefore wrap
-the "clear" of the flag in a macro and let it remain
-in-line for Apple
-*/
-
-#if !defined(__APPLE__)
-
-#define BOOST_ATOMIC_ASM_SLOWPATH_CLEAR \
-    "9:\n" \
-    ".subsection 2\n" \
-    "2: addi %1,0,0\n" \
-    "b 9b\n" \
-    ".previous\n" \
-
-#else
-
-#define BOOST_ATOMIC_ASM_SLOWPATH_CLEAR \
-    "b 9f\n" \
-    "2: addi %1,0,0\n" \
-    "9:\n" \
-
-#endif
-
-namespace boost {
-namespace atomics {
-namespace detail {
-
-/* integral types */
-
-template<typename T>
-class base_atomic<T, int, 1, true>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef int32_t storage_type;
-    typedef T difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m"(v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=&r" (v)
-            : "m" (v_)
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "extsb %1, %1\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "extsb %1, %1\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "and %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "or %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "xor %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-template<typename T>
-class base_atomic<T, int, 1, false>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef uint32_t storage_type;
-    typedef T difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m"(v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=&r" (v)
-            : "m" (v_)
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "rlwinm %1, %1, 0, 0xff\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "rlwinm %1, %1, 0, 0xff\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "and %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "or %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "xor %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-template<typename T>
-class base_atomic<T, int, 2, true>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef int32_t storage_type;
-    typedef T difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m"(v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=&r" (v)
-            : "m" (v_)
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "extsh %1, %1\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "extsh %1, %1\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "and %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "or %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "xor %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-template<typename T>
-class base_atomic<T, int, 2, false>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef uint32_t storage_type;
-    typedef T difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m"(v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=&r" (v)
-            : "m" (v_)
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "rlwinm %1, %1, 0, 0xffff\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "rlwinm %1, %1, 0, 0xffff\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "and %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "or %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "xor %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-template<typename T, bool Sign>
-class base_atomic<T, int, 4, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef T difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        const_cast<volatile value_type &>(v_) = v;
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v = const_cast<const volatile value_type &>(v_);
-        __asm__ __volatile__ (
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "+b"(v)
-            :
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "and %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "or %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "xor %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    value_type v_;
-};
-
-#if defined(__powerpc64__)
-
-template<typename T, bool Sign>
-class base_atomic<T, int, 8, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef T difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        const_cast<volatile value_type &>(v_) = v;
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v = const_cast<const volatile value_type &>(v_);
-        __asm__ __volatile__ (
-            "cmpd %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "+b"(v)
-            :
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y1\n"
-            "stdcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "and %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "or %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "xor %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    value_type v_;
-};
-
-#endif
-
-/* pointer types */
-
-#if !defined(__powerpc64__)
-
-template<bool Sign>
-class base_atomic<void *, void *, 4, Sign>
-{
-    typedef base_atomic this_type;
-    typedef ptrdiff_t difference_type;
-    typedef void * value_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m" (v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(v)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    value_type
-    fetch_add(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    BOOST_ATOMIC_DECLARE_VOID_POINTER_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    value_type v_;
-};
-
-template<typename T, bool Sign>
-class base_atomic<T *, void *, 4, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T * value_type;
-    typedef ptrdiff_t difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m" (v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(v)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        v = v * sizeof(*v_);
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        v = v * sizeof(*v_);
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "stwcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_POINTER_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    value_type v_;
-};
-
-#else
-
-template<bool Sign>
-class base_atomic<void *, void *, 8, Sign>
-{
-    typedef base_atomic this_type;
-    typedef ptrdiff_t difference_type;
-    typedef void * value_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "std %1, %0\n"
-            : "+m" (v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ (
-            "ld %0, %1\n"
-            "cmpd %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(v)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y1\n"
-            "stdcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    value_type
-    fetch_add(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    BOOST_ATOMIC_DECLARE_VOID_POINTER_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    value_type v_;
-};
-
-template<typename T, bool Sign>
-class base_atomic<T *, void *, 8, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T * value_type;
-    typedef ptrdiff_t difference_type;
-public:
-    BOOST_CONSTEXPR explicit base_atomic(value_type v) BOOST_NOEXCEPT : v_(v) {}
-    base_atomic(void) {}
-
-    void
-    store(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        ppc_fence_before(order);
-        __asm__ (
-            "std %1, %0\n"
-            : "+m" (v_)
-            : "r" (v)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        value_type v;
-        __asm__ (
-            "ld %0, %1\n"
-            "cmpd %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(v)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return v;
-    }
-
-    value_type
-    exchange(value_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        value_type original;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y1\n"
-            "stdcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (v)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected), "=&b" (success), "+Z"(v_)
-            : "b" (expected), "b" (desired)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        return success;
-    }
-
-    value_type
-    fetch_add(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        v = v * sizeof(*v_);
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "add %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    value_type
-    fetch_sub(difference_type v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        v = v * sizeof(*v_);
-        value_type original, tmp;
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y2\n"
-            "sub %1,%0,%3\n"
-            "stdcx. %1,%y2\n"
-            "bne- 1b\n"
-            : "=&b" (original), "=&b" (tmp), "+Z"(v_)
-            : "b" (v)
-            : "cc");
-        ppc_fence_after(order);
-        return original;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_POINTER_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    value_type v_;
-};
-
-#endif
-
-/* generic */
-
-template<typename T, bool Sign>
-class base_atomic<T, void, 1, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef uint32_t storage_type;
-public:
-    explicit base_atomic(value_type const& v) BOOST_NOEXCEPT : v_(0)
-    {
-        memcpy(&v_, &v, sizeof(value_type));
-    }
-    base_atomic(void) {}
-
-    void
-    store(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m" (v_)
-            : "r" (tmp)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(tmp)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-
-        value_type v;
-        memcpy(&v, &tmp, sizeof(value_type));
-        return v;
-    }
-
-    value_type
-    exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0, original;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (tmp)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        value_type res;
-        memcpy(&res, &original, sizeof(value_type));
-        return res;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s = 0, desired_s = 0;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s = 0, desired_s = 0;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_BASE_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-template<typename T, bool Sign>
-class base_atomic<T, void, 2, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef uint32_t storage_type;
-public:
-    explicit base_atomic(value_type const& v) BOOST_NOEXCEPT : v_(0)
-    {
-        memcpy(&v_, &v, sizeof(value_type));
-    }
-
-    base_atomic(void) {}
-
-    void
-    store(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m" (v_)
-            : "r" (tmp)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(tmp)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-
-        value_type v;
-        memcpy(&v, &tmp, sizeof(value_type));
-        return v;
-    }
-
-    value_type
-    exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0, original;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (tmp)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        value_type res;
-        memcpy(&res, &original, sizeof(value_type));
-        return res;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s = 0, desired_s = 0;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s = 0, desired_s = 0;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_BASE_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-template<typename T, bool Sign>
-class base_atomic<T, void, 4, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef uint32_t storage_type;
-public:
-    explicit base_atomic(value_type const& v) BOOST_NOEXCEPT : v_(0)
-    {
-        memcpy(&v_, &v, sizeof(value_type));
-    }
-
-    base_atomic(void) {}
-
-    void
-    store(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "stw %1, %0\n"
-            : "+m" (v_)
-            : "r" (tmp)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp;
-        __asm__ __volatile__ (
-            "lwz %0, %1\n"
-            "cmpw %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(tmp)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-
-        value_type v;
-        memcpy(&v, &tmp, sizeof(value_type));
-        return v;
-    }
-
-    value_type
-    exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0, original;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "lwarx %0,%y1\n"
-            "stwcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (tmp)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        value_type res;
-        memcpy(&res, &original, sizeof(value_type));
-        return res;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s = 0, desired_s = 0;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s = 0, desired_s = 0;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: lwarx %0,%y2\n"
-            "cmpw %0, %3\n"
-            "bne- 2f\n"
-            "stwcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_BASE_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-
-#if defined(__powerpc64__)
-
-template<typename T, bool Sign>
-class base_atomic<T, void, 8, Sign>
-{
-    typedef base_atomic this_type;
-    typedef T value_type;
-    typedef uint64_t storage_type;
-public:
-    explicit base_atomic(value_type const& v) BOOST_NOEXCEPT : v_(0)
-    {
-        memcpy(&v_, &v, sizeof(value_type));
-    }
-
-    base_atomic(void) {}
-
-    void
-    store(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "std %1, %0\n"
-            : "+m" (v_)
-            : "r" (tmp)
-        );
-        ppc_fence_after_store(order);
-    }
-
-    value_type
-    load(memory_order order = memory_order_seq_cst) const volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp;
-        __asm__ __volatile__ (
-            "ld %0, %1\n"
-            "cmpd %0, %0\n"
-            "bne- 1f\n"
-            "1:\n"
-            : "=r"(tmp)
-            : "m"(v_)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-
-        value_type v;
-        memcpy(&v, &tmp, sizeof(value_type));
-        return v;
-    }
-
-    value_type
-    exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile BOOST_NOEXCEPT
-    {
-        storage_type tmp = 0, original;
-        memcpy(&tmp, &v, sizeof(value_type));
-        ppc_fence_before(order);
-        __asm__ (
-            "1:\n"
-            "ldarx %0,%y1\n"
-            "stdcx. %2,%y1\n"
-            "bne- 1b\n"
-            : "=&b" (original), "+Z"(v_)
-            : "b" (tmp)
-            : "cr0"
-        );
-        ppc_fence_after(order);
-        value_type res;
-        memcpy(&res, &original, sizeof(value_type));
-        return res;
-    }
-
-    bool
-    compare_exchange_weak(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s, desired_s;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 2f\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    compare_exchange_strong(
-        value_type & expected,
-        value_type const& desired,
-        memory_order success_order,
-        memory_order failure_order) volatile BOOST_NOEXCEPT
-    {
-        storage_type expected_s, desired_s;
-        memcpy(&expected_s, &expected, sizeof(value_type));
-        memcpy(&desired_s, &desired, sizeof(value_type));
-
-        int success;
-        ppc_fence_before(success_order);
-        __asm__(
-            "0: ldarx %0,%y2\n"
-            "cmpd %0, %3\n"
-            "bne- 2f\n"
-            "stdcx. %4,%y2\n"
-            "bne- 0b\n"
-            "addi %1,0,1\n"
-            "1:"
-
-            BOOST_ATOMIC_ASM_SLOWPATH_CLEAR
-            : "=&b" (expected_s), "=&b" (success), "+Z"(v_)
-            : "b" (expected_s), "b" (desired_s)
-            : "cr0"
-        );
-        if (success)
-            ppc_fence_after(success_order);
-        else
-            ppc_fence_after(failure_order);
-        memcpy(&expected, &expected_s, sizeof(value_type));
-        return success;
-    }
-
-    bool
-    is_lock_free(void) const volatile BOOST_NOEXCEPT
-    {
-        return true;
-    }
-
-    BOOST_ATOMIC_DECLARE_BASE_OPERATORS
-private:
-    base_atomic(const base_atomic &) /* = delete */ ;
-    void operator=(const base_atomic &) /* = delete */ ;
-    storage_type v_;
-};
-#endif
-
-}
-}
-
-#define BOOST_ATOMIC_THREAD_FENCE 2
-inline void
-atomic_thread_fence(memory_order order)
-{
-    switch(order) {
-        case memory_order_acquire:
-            __asm__ __volatile__ ("isync" ::: "memory");
-            break;
-        case memory_order_release:
-#if defined(__powerpc64__)
-            __asm__ __volatile__ ("lwsync" ::: "memory");
-            break;
-#endif
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            __asm__ __volatile__ ("sync" ::: "memory");
-        default:;
-    }
-}
-
-#define BOOST_ATOMIC_SIGNAL_FENCE 2
-inline void
-atomic_signal_fence(memory_order order)
-{
-    switch(order) {
-        case memory_order_acquire:
-        case memory_order_release:
-        case memory_order_acq_rel:
-        case memory_order_seq_cst:
-            __asm__ __volatile__ ("" ::: "memory");
-            break;
-        default:;
-    }
-}
-
-}
-
-#endif /* !defined(BOOST_ATOMIC_FORCE_FALLBACK) */
-
-#endif