origen_verilog 0.5.1 → 0.5.2
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- checksums.yaml +4 -4
- data/config/version.rb +1 -1
- data/lib/origen_verilog/top_level.rb +3 -1
- metadata +17 -3
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
|
|
1
1
|
---
|
2
2
|
SHA256:
|
3
|
-
metadata.gz:
|
4
|
-
data.tar.gz:
|
3
|
+
metadata.gz: 80796409ee6e42886de1605a432950942dfa194acd55fe3e25212fc2721889c2
|
4
|
+
data.tar.gz: 802f08a8edc22ff0381b058d3fc004d1cc933fabbcf497457970ad3a6f961a9e
|
5
5
|
SHA512:
|
6
|
-
metadata.gz:
|
7
|
-
data.tar.gz:
|
6
|
+
metadata.gz: 60adeb9de92dcdeb2059687d7c055cdf03ab046ecea42d413060682704a4ddd30b44059e48b51d8125eaeac2e87c5b0ac8e4dd6c72ec4c22fde2b57208931afe
|
7
|
+
data.tar.gz: 06c4bf52b809323520f85e68493e3f6dd95b2d9a7c5f28cc98fc54c76a1db5dbcaeb92449601e9a1849fbb6a13ea85dc1b1c48caa17f8014b8ae287ddaaa06e4
|
data/config/version.rb
CHANGED
@@ -18,12 +18,14 @@ module OrigenVerilog
|
|
18
18
|
end
|
19
19
|
if r = node.find(:range)
|
20
20
|
size = r.to_a[0] - r.to_a[1] + 1
|
21
|
+
offset = r.to_a[1]
|
21
22
|
else
|
22
23
|
size = 1
|
24
|
+
offset = nil
|
23
25
|
end
|
24
26
|
n = node.to_a.dup
|
25
27
|
while n.last.is_a?(String)
|
26
|
-
add_pin n.pop, direction: direction, size: size
|
28
|
+
add_pin n.pop.to_sym, direction: direction, size: size, offset: offset
|
27
29
|
end
|
28
30
|
end
|
29
31
|
end
|
metadata
CHANGED
@@ -1,15 +1,29 @@
|
|
1
1
|
--- !ruby/object:Gem::Specification
|
2
2
|
name: origen_verilog
|
3
3
|
version: !ruby/object:Gem::Version
|
4
|
-
version: 0.5.
|
4
|
+
version: 0.5.2
|
5
5
|
platform: ruby
|
6
6
|
authors:
|
7
7
|
- Stephen McGinty
|
8
8
|
autorequire:
|
9
9
|
bindir: bin
|
10
10
|
cert_chain: []
|
11
|
-
date: 2018-
|
11
|
+
date: 2018-12-20 00:00:00.000000000 Z
|
12
12
|
dependencies:
|
13
|
+
- !ruby/object:Gem::Dependency
|
14
|
+
name: origen
|
15
|
+
requirement: !ruby/object:Gem::Requirement
|
16
|
+
requirements:
|
17
|
+
- - ">="
|
18
|
+
- !ruby/object:Gem::Version
|
19
|
+
version: 0.41.0
|
20
|
+
type: :runtime
|
21
|
+
prerelease: false
|
22
|
+
version_requirements: !ruby/object:Gem::Requirement
|
23
|
+
requirements:
|
24
|
+
- - ">="
|
25
|
+
- !ruby/object:Gem::Version
|
26
|
+
version: 0.41.0
|
13
27
|
- !ruby/object:Gem::Dependency
|
14
28
|
name: ast
|
15
29
|
requirement: !ruby/object:Gem::Requirement
|
@@ -93,7 +107,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
|
|
93
107
|
version: 1.8.11
|
94
108
|
requirements: []
|
95
109
|
rubyforge_project:
|
96
|
-
rubygems_version: 2.7.
|
110
|
+
rubygems_version: 2.7.7
|
97
111
|
signing_key:
|
98
112
|
specification_version: 4
|
99
113
|
summary: A parser and generator for Verilog (IEEE 1364)
|