origen_spi 0.1.0 → 0.1.1

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data/config/commands.rb CHANGED
@@ -39,13 +39,19 @@ when "examples", "test"
39
39
  status = 0
40
40
 
41
41
  ARGV = %w(pattern/clock_test.rb -t default.rb -e default.rb -r approved)
42
- load "#{Origen.top}/lib/origen/commands/generate.rb"# #ARGV = %w(some_pattern -t debug -r approved)
42
+ load "#{Origen.top}/lib/origen/commands/generate.rb"
43
43
 
44
44
  ARGV = %w(pattern/shift_test.rb -t default.rb -e default.rb -r approved)
45
- load "#{Origen.top}/lib/origen/commands/generate.rb"# #ARGV = %w(some_pattern -t debug -r approved)
45
+ load "#{Origen.top}/lib/origen/commands/generate.rb"
46
46
 
47
47
  ARGV = %w(pattern/overlay_test.rb -t default.rb -e default.rb -r approved)
48
- load "#{Origen.top}/lib/origen/commands/generate.rb"# #ARGV = %w(some_pattern -t debug -r approved)
48
+ load "#{Origen.top}/lib/origen/commands/generate.rb"
49
+
50
+ ARGV = %w(pattern/keep_ss_active.rb -t default.rb -e default.rb -r approved)
51
+ load "#{Origen.top}/lib/origen/commands/generate.rb"
52
+
53
+ ARGV = %w(pattern/clear_flags_test.rb -t default.rb -e default.rb -r approved)
54
+ load "#{Origen.top}/lib/origen/commands/generate.rb"
49
55
 
50
56
  if Origen.app.stats.changed_files == 0 &&
51
57
  Origen.app.stats.new_files == 0 &&
data/config/version.rb CHANGED
@@ -1,7 +1,7 @@
1
1
  module OrigenSpi
2
2
  MAJOR = 0
3
3
  MINOR = 1
4
- BUGFIX = 0
4
+ BUGFIX = 1
5
5
  DEV = nil
6
6
 
7
7
  VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')
@@ -233,7 +233,8 @@ module OrigenSpi
233
233
  # spi_instance.shift master_in: in_cmp_reg
234
234
  def shift(options = {})
235
235
  options = {
236
- master_out: 0
236
+ master_out: 0,
237
+ keep_ss_active: false
237
238
  }.merge(options)
238
239
 
239
240
  validate_settings
@@ -290,7 +291,11 @@ module OrigenSpi
290
291
  @sclk_pin.drive @clk_format == :rl ? 0 : 1
291
292
  @miso_pin.dont_care unless @miso_pin.nil?
292
293
  @mosi_pin.drive 0 unless @mosi_pin.nil?
293
- @ss_pin.drive @ss_active == 1 ? 0 : 1 unless @ss_pin.nil?
294
+ @ss_pin.drive @ss_active == 1 ? 0 : 1 unless @ss_pin.nil? || options[:keep_ss_active]
295
+
296
+ # clear flags if registers were provided
297
+ options[:master_out].clear_flags if options[:master_out].respond_to?(:clear_flags)
298
+ options[:master_in].clear_flags if options[:master_in].respond_to?(:clear_flags)
294
299
  end
295
300
 
296
301
  # Internal method
@@ -0,0 +1,18 @@
1
+ Pattern.create do
2
+ tester.set_timeset 'tp0', 20
3
+ dut.pin(:ss).drive 1
4
+ dut.pin(:sclk).drive 0
5
+ dut.pin(:mosi).drive 0
6
+ dut.pin(:miso).dont_care
7
+
8
+ tester.cycle
9
+
10
+ out_data = Origen::Registers::Reg.dummy(12).write 7
11
+ in_data = Origen::Registers::Reg.dummy(12).read 0x5a5
12
+ cc 'shifting 12-bits lsb first, 0x7 out, 0x5a5 in'
13
+ dut.spi.shift master_out: out_data, master_in: in_data
14
+
15
+ tester.cycle
16
+ cc 'shifting in same register, should be no compares'
17
+ dut.spi.shift master_in: in_data
18
+ end
@@ -0,0 +1,25 @@
1
+ Pattern.create do
2
+ tester.set_timeset 'tp0', 20
3
+ dut.pin(:ss).drive 1
4
+ dut.pin(:sclk).drive 0
5
+ dut.pin(:mosi).drive 0
6
+ dut.pin(:miso).dont_care
7
+
8
+ tester.cycle
9
+
10
+ out_data = Origen::Registers::Reg.dummy(12).write 7
11
+ in_data = Origen::Registers::Reg.dummy(12).read 0x5a5
12
+ cc 'shifting 12-bits lsb first, 0x7 out, 0x5a5 in -- keeping ss active'
13
+ dut.spi.shift master_out: out_data, master_in: in_data, keep_ss_active: true
14
+
15
+ cc 'cycle with ss active'
16
+ tester.cycle
17
+
18
+ cc 'shifting 12-bits lsb first, 0x7 out, 0x5a5 in -- allow ss inactive'
19
+ in_data.read
20
+ dut.spi.shift master_out: out_data, master_in: in_data
21
+
22
+ cc 'cycle with ss inactive'
23
+ tester.cycle
24
+
25
+ end
@@ -15,12 +15,16 @@ Pattern.create do
15
15
  tester.cycle
16
16
 
17
17
  cc 'repeat 12-bits lsb first, 0x7 out, 0x5a5 in; clock multiple = 4'
18
+ out_data.write 7
19
+ in_data.read 0x5a5
18
20
  dut.spi.clk_multiple = 4
19
21
  dut.spi.shift master_out: out_data, master_in: in_data
20
22
 
21
23
  tester.cycle
22
24
 
23
25
  cc 'repeat 12-bits, 0x7 out, 0x5a5 in; clock multiple = 4, with msb first, move miso compare to cycle 3'
26
+ out_data.write 7
27
+ in_data.read 0x5a5
24
28
  dut.spi.data_order = :msb0
25
29
  dut.spi.miso_compare_cycle = 3
26
30
  dut.spi.shift master_out: out_data, master_in: in_data
@@ -46,7 +50,9 @@ Pattern.create do
46
50
  tester.cycle
47
51
 
48
52
  cc 'test capture'
53
+ in_data.bits[11..8].read
49
54
  in_data.bits[7..4].store
55
+ in_data.bits[3..0].read
50
56
  dut.spi.shift master_out: 0xa5a, master_in: in_data
51
57
 
52
58
  tester.cycle
@@ -56,6 +56,25 @@ can be changed after instantiation. See API for more details.
56
56
  dut.spi.ss_pin = nil
57
57
  ~~~
58
58
 
59
+ Once the driver is instantiated shift operations can be performed by calls to the shift method (overlay/store/masking etc. is handled):
60
+
61
+ ~~~ruby
62
+ # shift out, masking input compares
63
+ dut.spi.shift master_out: 0xFF, size: 32
64
+
65
+ # shift out, register - size doesn't need to be passed when register is provided
66
+ dut.spi.shift master_out: dut.my_reg
67
+
68
+ # shift in read examples:
69
+ dut.spi.shift master_in: 0xFF, size: 32
70
+
71
+ # provide a register to mask or store (mark the bits appropriately)
72
+ dut.spi.shift master_in: dut.my_reg
73
+
74
+ # simultaneous shift in/out
75
+ dut.spi.shift master_out: some_value_or_reg, master_in: some_other_value_or_reg
76
+ ~~~
77
+
59
78
 
60
79
  ### How To Setup a Development Environment
61
80
 
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: origen_spi
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.1.0
4
+ version: 0.1.1
5
5
  platform: ruby
6
6
  authors:
7
7
  - Paul DeRouen
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2017-12-18 00:00:00.000000000 Z
11
+ date: 2018-08-02 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: origen
@@ -53,7 +53,9 @@ files:
53
53
  - lib/origen_spi.rb
54
54
  - lib/origen_spi/driver.rb
55
55
  - lib/tasks/origen_spi.rake
56
+ - pattern/clear_flags_test.rb
56
57
  - pattern/clock_test.rb
58
+ - pattern/keep_ss_active.rb
57
59
  - pattern/overlay_test.rb
58
60
  - pattern/shift_test.rb
59
61
  - templates/web/index.md.erb